1*5113495bSYour Name 2*5113495bSYour Name /* 3*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4*5113495bSYour Name * 5*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 6*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 7*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16*5113495bSYour Name */ 17*5113495bSYour Name 18*5113495bSYour Name 19*5113495bSYour Name 20*5113495bSYour Name #ifndef _RXPCU_EARLY_RX_INDICATION_H_ 21*5113495bSYour Name #define _RXPCU_EARLY_RX_INDICATION_H_ 22*5113495bSYour Name #if !defined(__ASSEMBLER__) 23*5113495bSYour Name #endif 24*5113495bSYour Name 25*5113495bSYour Name #define NUM_OF_DWORDS_RXPCU_EARLY_RX_INDICATION 2 26*5113495bSYour Name 27*5113495bSYour Name #define NUM_OF_QWORDS_RXPCU_EARLY_RX_INDICATION 1 28*5113495bSYour Name 29*5113495bSYour Name struct rxpcu_early_rx_indication { 30*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 31*5113495bSYour Name uint32_t pkt_type : 4, 32*5113495bSYour Name dot11ax_su_extended : 1, 33*5113495bSYour Name rate_mcs : 4, 34*5113495bSYour Name dot11ax_received_ext_ru_size : 4, 35*5113495bSYour Name reserved_0a : 19; 36*5113495bSYour Name uint32_t tlv64_padding : 32; 37*5113495bSYour Name #else 38*5113495bSYour Name uint32_t reserved_0a : 19, 39*5113495bSYour Name dot11ax_received_ext_ru_size : 4, 40*5113495bSYour Name rate_mcs : 4, 41*5113495bSYour Name dot11ax_su_extended : 1, 42*5113495bSYour Name pkt_type : 4; 43*5113495bSYour Name uint32_t tlv64_padding : 32; 44*5113495bSYour Name #endif 45*5113495bSYour Name }; 46*5113495bSYour Name 47*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_PKT_TYPE_OFFSET 0x0000000000000000 48*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_PKT_TYPE_LSB 0 49*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_PKT_TYPE_MSB 3 50*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_PKT_TYPE_MASK 0x000000000000000f 51*5113495bSYour Name 52*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000000 53*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_SU_EXTENDED_LSB 4 54*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_SU_EXTENDED_MSB 4 55*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_SU_EXTENDED_MASK 0x0000000000000010 56*5113495bSYour Name 57*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RATE_MCS_OFFSET 0x0000000000000000 58*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RATE_MCS_LSB 5 59*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RATE_MCS_MSB 8 60*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RATE_MCS_MASK 0x00000000000001e0 61*5113495bSYour Name 62*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_RECEIVED_EXT_RU_SIZE_OFFSET 0x0000000000000000 63*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_RECEIVED_EXT_RU_SIZE_LSB 9 64*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_RECEIVED_EXT_RU_SIZE_MSB 12 65*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_RECEIVED_EXT_RU_SIZE_MASK 0x0000000000001e00 66*5113495bSYour Name 67*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RESERVED_0A_OFFSET 0x0000000000000000 68*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RESERVED_0A_LSB 13 69*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RESERVED_0A_MSB 31 70*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RESERVED_0A_MASK 0x00000000ffffe000 71*5113495bSYour Name 72*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_TLV64_PADDING_OFFSET 0x0000000000000000 73*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_TLV64_PADDING_LSB 32 74*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_TLV64_PADDING_MSB 63 75*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_TLV64_PADDING_MASK 0xffffffff00000000 76*5113495bSYour Name 77*5113495bSYour Name #endif 78