1 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 19 20 #ifndef _RXPCU_EARLY_RX_INDICATION_H_ 21 #define _RXPCU_EARLY_RX_INDICATION_H_ 22 #if !defined(__ASSEMBLER__) 23 #endif 24 25 #define NUM_OF_DWORDS_RXPCU_EARLY_RX_INDICATION 2 26 27 #define NUM_OF_QWORDS_RXPCU_EARLY_RX_INDICATION 1 28 29 struct rxpcu_early_rx_indication { 30 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 31 uint32_t pkt_type : 4, 32 dot11ax_su_extended : 1, 33 rate_mcs : 4, 34 dot11ax_received_ext_ru_size : 4, 35 reserved_0a : 19; 36 uint32_t tlv64_padding : 32; 37 #else 38 uint32_t reserved_0a : 19, 39 dot11ax_received_ext_ru_size : 4, 40 rate_mcs : 4, 41 dot11ax_su_extended : 1, 42 pkt_type : 4; 43 uint32_t tlv64_padding : 32; 44 #endif 45 }; 46 47 #define RXPCU_EARLY_RX_INDICATION_PKT_TYPE_OFFSET 0x0000000000000000 48 #define RXPCU_EARLY_RX_INDICATION_PKT_TYPE_LSB 0 49 #define RXPCU_EARLY_RX_INDICATION_PKT_TYPE_MSB 3 50 #define RXPCU_EARLY_RX_INDICATION_PKT_TYPE_MASK 0x000000000000000f 51 52 #define RXPCU_EARLY_RX_INDICATION_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000000 53 #define RXPCU_EARLY_RX_INDICATION_DOT11AX_SU_EXTENDED_LSB 4 54 #define RXPCU_EARLY_RX_INDICATION_DOT11AX_SU_EXTENDED_MSB 4 55 #define RXPCU_EARLY_RX_INDICATION_DOT11AX_SU_EXTENDED_MASK 0x0000000000000010 56 57 #define RXPCU_EARLY_RX_INDICATION_RATE_MCS_OFFSET 0x0000000000000000 58 #define RXPCU_EARLY_RX_INDICATION_RATE_MCS_LSB 5 59 #define RXPCU_EARLY_RX_INDICATION_RATE_MCS_MSB 8 60 #define RXPCU_EARLY_RX_INDICATION_RATE_MCS_MASK 0x00000000000001e0 61 62 #define RXPCU_EARLY_RX_INDICATION_DOT11AX_RECEIVED_EXT_RU_SIZE_OFFSET 0x0000000000000000 63 #define RXPCU_EARLY_RX_INDICATION_DOT11AX_RECEIVED_EXT_RU_SIZE_LSB 9 64 #define RXPCU_EARLY_RX_INDICATION_DOT11AX_RECEIVED_EXT_RU_SIZE_MSB 12 65 #define RXPCU_EARLY_RX_INDICATION_DOT11AX_RECEIVED_EXT_RU_SIZE_MASK 0x0000000000001e00 66 67 #define RXPCU_EARLY_RX_INDICATION_RESERVED_0A_OFFSET 0x0000000000000000 68 #define RXPCU_EARLY_RX_INDICATION_RESERVED_0A_LSB 13 69 #define RXPCU_EARLY_RX_INDICATION_RESERVED_0A_MSB 31 70 #define RXPCU_EARLY_RX_INDICATION_RESERVED_0A_MASK 0x00000000ffffe000 71 72 #define RXPCU_EARLY_RX_INDICATION_TLV64_PADDING_OFFSET 0x0000000000000000 73 #define RXPCU_EARLY_RX_INDICATION_TLV64_PADDING_LSB 32 74 #define RXPCU_EARLY_RX_INDICATION_TLV64_PADDING_MSB 63 75 #define RXPCU_EARLY_RX_INDICATION_TLV64_PADDING_MASK 0xffffffff00000000 76 77 #endif 78