1*5113495bSYour Name 2*5113495bSYour Name /* 3*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4*5113495bSYour Name * 5*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 6*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 7*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 8*5113495bSYour Name * 9*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16*5113495bSYour Name */ 17*5113495bSYour Name 18*5113495bSYour Name 19*5113495bSYour Name 20*5113495bSYour Name #ifndef _TX_FES_SETUP_H_ 21*5113495bSYour Name #define _TX_FES_SETUP_H_ 22*5113495bSYour Name #if !defined(__ASSEMBLER__) 23*5113495bSYour Name #endif 24*5113495bSYour Name 25*5113495bSYour Name #define NUM_OF_DWORDS_TX_FES_SETUP 10 26*5113495bSYour Name 27*5113495bSYour Name #define NUM_OF_QWORDS_TX_FES_SETUP 5 28*5113495bSYour Name 29*5113495bSYour Name struct tx_fes_setup { 30*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 31*5113495bSYour Name uint32_t schedule_id : 32; 32*5113495bSYour Name uint32_t fes_in_11ax_trigger_response_config : 1, 33*5113495bSYour Name bo_based_tid_aggregation_limit : 4, 34*5113495bSYour Name __reserved_g_0005 : 1, 35*5113495bSYour Name expect_i2r_lmr : 1, 36*5113495bSYour Name transmit_start_reason : 3, 37*5113495bSYour Name use_alt_power_sr : 1, 38*5113495bSYour Name static_2_pwr_mode_status : 1, 39*5113495bSYour Name obss_srg_opport_transmit_status : 1, 40*5113495bSYour Name srp_based_transmit_status : 1, 41*5113495bSYour Name obss_pd_based_transmit_status : 1, 42*5113495bSYour Name puncture_from_all_allowed_modes : 1, 43*5113495bSYour Name schedule_cmd_ring_id : 5, 44*5113495bSYour Name fes_control_mode : 2, 45*5113495bSYour Name number_of_users : 6, 46*5113495bSYour Name mu_type : 1, 47*5113495bSYour Name ofdma_triggered_response : 1, 48*5113495bSYour Name response_to_response_cmd : 1; 49*5113495bSYour Name uint32_t schedule_try : 4, 50*5113495bSYour Name ndp_frame : 2, 51*5113495bSYour Name txbf : 1, 52*5113495bSYour Name allow_txop_exceed_in_1st_pkt : 1, 53*5113495bSYour Name ignore_bw_available : 1, 54*5113495bSYour Name ignore_tbtt : 1, 55*5113495bSYour Name static_bandwidth : 3, 56*5113495bSYour Name set_txop_duration_all_ones : 1, 57*5113495bSYour Name transmission_contains_mu_rts : 1, 58*5113495bSYour Name bw_restricted_frames_embedded : 1, 59*5113495bSYour Name ast_index : 16; 60*5113495bSYour Name uint32_t cv_id : 8, 61*5113495bSYour Name trigger_resp_txpdu_ppdu_boundary : 2, 62*5113495bSYour Name rxpcu_setup_complete_present : 1, 63*5113495bSYour Name rbo_must_have_data_user_limit : 4, 64*5113495bSYour Name mu_ndp : 1, 65*5113495bSYour Name bf_type : 2, 66*5113495bSYour Name cbf_nc_index_mask : 1, 67*5113495bSYour Name cbf_nc_index : 3, 68*5113495bSYour Name cbf_nr_index_mask : 1, 69*5113495bSYour Name cbf_nr_index : 3, 70*5113495bSYour Name secure___reserved_g_0005_ista : 1, 71*5113495bSYour Name ndpa : 1, 72*5113495bSYour Name wait_sifs : 2, 73*5113495bSYour Name cbf_feedback_type_mask : 1, 74*5113495bSYour Name cbf_feedback_type : 1; 75*5113495bSYour Name uint32_t cbf_sounding_token : 6, 76*5113495bSYour Name cbf_sounding_token_mask : 1, 77*5113495bSYour Name cbf_bw_mask : 1, 78*5113495bSYour Name cbf_bw : 3, 79*5113495bSYour Name use_static_bw : 1, 80*5113495bSYour Name coex_nack_count : 5, 81*5113495bSYour Name sch_tx_burst_ongoing : 1, 82*5113495bSYour Name gen_tqm_update_mpdu_count_tlv : 1, 83*5113495bSYour Name transmit_vif : 4, 84*5113495bSYour Name optimal_bw_retry_count : 4, 85*5113495bSYour Name fes_continuation_ratio_threshold : 5; 86*5113495bSYour Name uint32_t transmit_cca_bitmap : 32; 87*5113495bSYour Name uint32_t tb___reserved_g_0005 : 1, 88*5113495bSYour Name __reserved_g_0005_trigger_subtype : 4, 89*5113495bSYour Name min_cts2self_count : 4, 90*5113495bSYour Name max_cts2self_count : 4, 91*5113495bSYour Name wifi_radar_enable : 1, 92*5113495bSYour Name reserved_6a : 18; 93*5113495bSYour Name uint32_t monitor_override_sta_31_0 : 32; 94*5113495bSYour Name uint32_t monitor_override_sta_36_32 : 5, 95*5113495bSYour Name reserved_8a : 27; 96*5113495bSYour Name uint32_t fw2sw_info : 32; 97*5113495bSYour Name #else 98*5113495bSYour Name uint32_t schedule_id : 32; 99*5113495bSYour Name uint32_t response_to_response_cmd : 1, 100*5113495bSYour Name ofdma_triggered_response : 1, 101*5113495bSYour Name mu_type : 1, 102*5113495bSYour Name number_of_users : 6, 103*5113495bSYour Name fes_control_mode : 2, 104*5113495bSYour Name schedule_cmd_ring_id : 5, 105*5113495bSYour Name puncture_from_all_allowed_modes : 1, 106*5113495bSYour Name obss_pd_based_transmit_status : 1, 107*5113495bSYour Name srp_based_transmit_status : 1, 108*5113495bSYour Name obss_srg_opport_transmit_status : 1, 109*5113495bSYour Name static_2_pwr_mode_status : 1, 110*5113495bSYour Name use_alt_power_sr : 1, 111*5113495bSYour Name transmit_start_reason : 3, 112*5113495bSYour Name expect_i2r_lmr : 1, 113*5113495bSYour Name __reserved_g_0005 : 1, 114*5113495bSYour Name bo_based_tid_aggregation_limit : 4, 115*5113495bSYour Name fes_in_11ax_trigger_response_config : 1; 116*5113495bSYour Name uint32_t ast_index : 16, 117*5113495bSYour Name bw_restricted_frames_embedded : 1, 118*5113495bSYour Name transmission_contains_mu_rts : 1, 119*5113495bSYour Name set_txop_duration_all_ones : 1, 120*5113495bSYour Name static_bandwidth : 3, 121*5113495bSYour Name ignore_tbtt : 1, 122*5113495bSYour Name ignore_bw_available : 1, 123*5113495bSYour Name allow_txop_exceed_in_1st_pkt : 1, 124*5113495bSYour Name txbf : 1, 125*5113495bSYour Name ndp_frame : 2, 126*5113495bSYour Name schedule_try : 4; 127*5113495bSYour Name uint32_t cbf_feedback_type : 1, 128*5113495bSYour Name cbf_feedback_type_mask : 1, 129*5113495bSYour Name wait_sifs : 2, 130*5113495bSYour Name ndpa : 1, 131*5113495bSYour Name secure___reserved_g_0005_ista : 1, 132*5113495bSYour Name cbf_nr_index : 3, 133*5113495bSYour Name cbf_nr_index_mask : 1, 134*5113495bSYour Name cbf_nc_index : 3, 135*5113495bSYour Name cbf_nc_index_mask : 1, 136*5113495bSYour Name bf_type : 2, 137*5113495bSYour Name mu_ndp : 1, 138*5113495bSYour Name rbo_must_have_data_user_limit : 4, 139*5113495bSYour Name rxpcu_setup_complete_present : 1, 140*5113495bSYour Name trigger_resp_txpdu_ppdu_boundary : 2, 141*5113495bSYour Name cv_id : 8; 142*5113495bSYour Name uint32_t fes_continuation_ratio_threshold : 5, 143*5113495bSYour Name optimal_bw_retry_count : 4, 144*5113495bSYour Name transmit_vif : 4, 145*5113495bSYour Name gen_tqm_update_mpdu_count_tlv : 1, 146*5113495bSYour Name sch_tx_burst_ongoing : 1, 147*5113495bSYour Name coex_nack_count : 5, 148*5113495bSYour Name use_static_bw : 1, 149*5113495bSYour Name cbf_bw : 3, 150*5113495bSYour Name cbf_bw_mask : 1, 151*5113495bSYour Name cbf_sounding_token_mask : 1, 152*5113495bSYour Name cbf_sounding_token : 6; 153*5113495bSYour Name uint32_t transmit_cca_bitmap : 32; 154*5113495bSYour Name uint32_t reserved_6a : 18, 155*5113495bSYour Name wifi_radar_enable : 1, 156*5113495bSYour Name max_cts2self_count : 4, 157*5113495bSYour Name min_cts2self_count : 4, 158*5113495bSYour Name __reserved_g_0005_trigger_subtype : 4, 159*5113495bSYour Name tb___reserved_g_0005 : 1; 160*5113495bSYour Name uint32_t monitor_override_sta_31_0 : 32; 161*5113495bSYour Name uint32_t reserved_8a : 27, 162*5113495bSYour Name monitor_override_sta_36_32 : 5; 163*5113495bSYour Name uint32_t fw2sw_info : 32; 164*5113495bSYour Name #endif 165*5113495bSYour Name }; 166*5113495bSYour Name 167*5113495bSYour Name #define TX_FES_SETUP_SCHEDULE_ID_OFFSET 0x0000000000000000 168*5113495bSYour Name #define TX_FES_SETUP_SCHEDULE_ID_LSB 0 169*5113495bSYour Name #define TX_FES_SETUP_SCHEDULE_ID_MSB 31 170*5113495bSYour Name #define TX_FES_SETUP_SCHEDULE_ID_MASK 0x00000000ffffffff 171*5113495bSYour Name 172*5113495bSYour Name #define TX_FES_SETUP_FES_IN_11AX_TRIGGER_RESPONSE_CONFIG_OFFSET 0x0000000000000000 173*5113495bSYour Name #define TX_FES_SETUP_FES_IN_11AX_TRIGGER_RESPONSE_CONFIG_LSB 32 174*5113495bSYour Name #define TX_FES_SETUP_FES_IN_11AX_TRIGGER_RESPONSE_CONFIG_MSB 32 175*5113495bSYour Name #define TX_FES_SETUP_FES_IN_11AX_TRIGGER_RESPONSE_CONFIG_MASK 0x0000000100000000 176*5113495bSYour Name 177*5113495bSYour Name #define TX_FES_SETUP_BO_BASED_TID_AGGREGATION_LIMIT_OFFSET 0x0000000000000000 178*5113495bSYour Name #define TX_FES_SETUP_BO_BASED_TID_AGGREGATION_LIMIT_LSB 33 179*5113495bSYour Name #define TX_FES_SETUP_BO_BASED_TID_AGGREGATION_LIMIT_MSB 36 180*5113495bSYour Name #define TX_FES_SETUP_BO_BASED_TID_AGGREGATION_LIMIT_MASK 0x0000001e00000000 181*5113495bSYour Name 182*5113495bSYour Name #define TX_FES_SETUP_EXPECT_I2R_LMR_OFFSET 0x0000000000000000 183*5113495bSYour Name #define TX_FES_SETUP_EXPECT_I2R_LMR_LSB 38 184*5113495bSYour Name #define TX_FES_SETUP_EXPECT_I2R_LMR_MSB 38 185*5113495bSYour Name #define TX_FES_SETUP_EXPECT_I2R_LMR_MASK 0x0000004000000000 186*5113495bSYour Name 187*5113495bSYour Name #define TX_FES_SETUP_TRANSMIT_START_REASON_OFFSET 0x0000000000000000 188*5113495bSYour Name #define TX_FES_SETUP_TRANSMIT_START_REASON_LSB 39 189*5113495bSYour Name #define TX_FES_SETUP_TRANSMIT_START_REASON_MSB 41 190*5113495bSYour Name #define TX_FES_SETUP_TRANSMIT_START_REASON_MASK 0x0000038000000000 191*5113495bSYour Name 192*5113495bSYour Name #define TX_FES_SETUP_USE_ALT_POWER_SR_OFFSET 0x0000000000000000 193*5113495bSYour Name #define TX_FES_SETUP_USE_ALT_POWER_SR_LSB 42 194*5113495bSYour Name #define TX_FES_SETUP_USE_ALT_POWER_SR_MSB 42 195*5113495bSYour Name #define TX_FES_SETUP_USE_ALT_POWER_SR_MASK 0x0000040000000000 196*5113495bSYour Name 197*5113495bSYour Name #define TX_FES_SETUP_STATIC_2_PWR_MODE_STATUS_OFFSET 0x0000000000000000 198*5113495bSYour Name #define TX_FES_SETUP_STATIC_2_PWR_MODE_STATUS_LSB 43 199*5113495bSYour Name #define TX_FES_SETUP_STATIC_2_PWR_MODE_STATUS_MSB 43 200*5113495bSYour Name #define TX_FES_SETUP_STATIC_2_PWR_MODE_STATUS_MASK 0x0000080000000000 201*5113495bSYour Name 202*5113495bSYour Name #define TX_FES_SETUP_OBSS_SRG_OPPORT_TRANSMIT_STATUS_OFFSET 0x0000000000000000 203*5113495bSYour Name #define TX_FES_SETUP_OBSS_SRG_OPPORT_TRANSMIT_STATUS_LSB 44 204*5113495bSYour Name #define TX_FES_SETUP_OBSS_SRG_OPPORT_TRANSMIT_STATUS_MSB 44 205*5113495bSYour Name #define TX_FES_SETUP_OBSS_SRG_OPPORT_TRANSMIT_STATUS_MASK 0x0000100000000000 206*5113495bSYour Name 207*5113495bSYour Name #define TX_FES_SETUP_SRP_BASED_TRANSMIT_STATUS_OFFSET 0x0000000000000000 208*5113495bSYour Name #define TX_FES_SETUP_SRP_BASED_TRANSMIT_STATUS_LSB 45 209*5113495bSYour Name #define TX_FES_SETUP_SRP_BASED_TRANSMIT_STATUS_MSB 45 210*5113495bSYour Name #define TX_FES_SETUP_SRP_BASED_TRANSMIT_STATUS_MASK 0x0000200000000000 211*5113495bSYour Name 212*5113495bSYour Name #define TX_FES_SETUP_OBSS_PD_BASED_TRANSMIT_STATUS_OFFSET 0x0000000000000000 213*5113495bSYour Name #define TX_FES_SETUP_OBSS_PD_BASED_TRANSMIT_STATUS_LSB 46 214*5113495bSYour Name #define TX_FES_SETUP_OBSS_PD_BASED_TRANSMIT_STATUS_MSB 46 215*5113495bSYour Name #define TX_FES_SETUP_OBSS_PD_BASED_TRANSMIT_STATUS_MASK 0x0000400000000000 216*5113495bSYour Name 217*5113495bSYour Name #define TX_FES_SETUP_PUNCTURE_FROM_ALL_ALLOWED_MODES_OFFSET 0x0000000000000000 218*5113495bSYour Name #define TX_FES_SETUP_PUNCTURE_FROM_ALL_ALLOWED_MODES_LSB 47 219*5113495bSYour Name #define TX_FES_SETUP_PUNCTURE_FROM_ALL_ALLOWED_MODES_MSB 47 220*5113495bSYour Name #define TX_FES_SETUP_PUNCTURE_FROM_ALL_ALLOWED_MODES_MASK 0x0000800000000000 221*5113495bSYour Name 222*5113495bSYour Name #define TX_FES_SETUP_SCHEDULE_CMD_RING_ID_OFFSET 0x0000000000000000 223*5113495bSYour Name #define TX_FES_SETUP_SCHEDULE_CMD_RING_ID_LSB 48 224*5113495bSYour Name #define TX_FES_SETUP_SCHEDULE_CMD_RING_ID_MSB 52 225*5113495bSYour Name #define TX_FES_SETUP_SCHEDULE_CMD_RING_ID_MASK 0x001f000000000000 226*5113495bSYour Name 227*5113495bSYour Name #define TX_FES_SETUP_FES_CONTROL_MODE_OFFSET 0x0000000000000000 228*5113495bSYour Name #define TX_FES_SETUP_FES_CONTROL_MODE_LSB 53 229*5113495bSYour Name #define TX_FES_SETUP_FES_CONTROL_MODE_MSB 54 230*5113495bSYour Name #define TX_FES_SETUP_FES_CONTROL_MODE_MASK 0x0060000000000000 231*5113495bSYour Name 232*5113495bSYour Name #define TX_FES_SETUP_NUMBER_OF_USERS_OFFSET 0x0000000000000000 233*5113495bSYour Name #define TX_FES_SETUP_NUMBER_OF_USERS_LSB 55 234*5113495bSYour Name #define TX_FES_SETUP_NUMBER_OF_USERS_MSB 60 235*5113495bSYour Name #define TX_FES_SETUP_NUMBER_OF_USERS_MASK 0x1f80000000000000 236*5113495bSYour Name 237*5113495bSYour Name #define TX_FES_SETUP_MU_TYPE_OFFSET 0x0000000000000000 238*5113495bSYour Name #define TX_FES_SETUP_MU_TYPE_LSB 61 239*5113495bSYour Name #define TX_FES_SETUP_MU_TYPE_MSB 61 240*5113495bSYour Name #define TX_FES_SETUP_MU_TYPE_MASK 0x2000000000000000 241*5113495bSYour Name 242*5113495bSYour Name #define TX_FES_SETUP_OFDMA_TRIGGERED_RESPONSE_OFFSET 0x0000000000000000 243*5113495bSYour Name #define TX_FES_SETUP_OFDMA_TRIGGERED_RESPONSE_LSB 62 244*5113495bSYour Name #define TX_FES_SETUP_OFDMA_TRIGGERED_RESPONSE_MSB 62 245*5113495bSYour Name #define TX_FES_SETUP_OFDMA_TRIGGERED_RESPONSE_MASK 0x4000000000000000 246*5113495bSYour Name 247*5113495bSYour Name #define TX_FES_SETUP_RESPONSE_TO_RESPONSE_CMD_OFFSET 0x0000000000000000 248*5113495bSYour Name #define TX_FES_SETUP_RESPONSE_TO_RESPONSE_CMD_LSB 63 249*5113495bSYour Name #define TX_FES_SETUP_RESPONSE_TO_RESPONSE_CMD_MSB 63 250*5113495bSYour Name #define TX_FES_SETUP_RESPONSE_TO_RESPONSE_CMD_MASK 0x8000000000000000 251*5113495bSYour Name 252*5113495bSYour Name #define TX_FES_SETUP_SCHEDULE_TRY_OFFSET 0x0000000000000008 253*5113495bSYour Name #define TX_FES_SETUP_SCHEDULE_TRY_LSB 0 254*5113495bSYour Name #define TX_FES_SETUP_SCHEDULE_TRY_MSB 3 255*5113495bSYour Name #define TX_FES_SETUP_SCHEDULE_TRY_MASK 0x000000000000000f 256*5113495bSYour Name 257*5113495bSYour Name #define TX_FES_SETUP_NDP_FRAME_OFFSET 0x0000000000000008 258*5113495bSYour Name #define TX_FES_SETUP_NDP_FRAME_LSB 4 259*5113495bSYour Name #define TX_FES_SETUP_NDP_FRAME_MSB 5 260*5113495bSYour Name #define TX_FES_SETUP_NDP_FRAME_MASK 0x0000000000000030 261*5113495bSYour Name 262*5113495bSYour Name #define TX_FES_SETUP_TXBF_OFFSET 0x0000000000000008 263*5113495bSYour Name #define TX_FES_SETUP_TXBF_LSB 6 264*5113495bSYour Name #define TX_FES_SETUP_TXBF_MSB 6 265*5113495bSYour Name #define TX_FES_SETUP_TXBF_MASK 0x0000000000000040 266*5113495bSYour Name 267*5113495bSYour Name #define TX_FES_SETUP_ALLOW_TXOP_EXCEED_IN_1ST_PKT_OFFSET 0x0000000000000008 268*5113495bSYour Name #define TX_FES_SETUP_ALLOW_TXOP_EXCEED_IN_1ST_PKT_LSB 7 269*5113495bSYour Name #define TX_FES_SETUP_ALLOW_TXOP_EXCEED_IN_1ST_PKT_MSB 7 270*5113495bSYour Name #define TX_FES_SETUP_ALLOW_TXOP_EXCEED_IN_1ST_PKT_MASK 0x0000000000000080 271*5113495bSYour Name 272*5113495bSYour Name #define TX_FES_SETUP_IGNORE_BW_AVAILABLE_OFFSET 0x0000000000000008 273*5113495bSYour Name #define TX_FES_SETUP_IGNORE_BW_AVAILABLE_LSB 8 274*5113495bSYour Name #define TX_FES_SETUP_IGNORE_BW_AVAILABLE_MSB 8 275*5113495bSYour Name #define TX_FES_SETUP_IGNORE_BW_AVAILABLE_MASK 0x0000000000000100 276*5113495bSYour Name 277*5113495bSYour Name #define TX_FES_SETUP_IGNORE_TBTT_OFFSET 0x0000000000000008 278*5113495bSYour Name #define TX_FES_SETUP_IGNORE_TBTT_LSB 9 279*5113495bSYour Name #define TX_FES_SETUP_IGNORE_TBTT_MSB 9 280*5113495bSYour Name #define TX_FES_SETUP_IGNORE_TBTT_MASK 0x0000000000000200 281*5113495bSYour Name 282*5113495bSYour Name #define TX_FES_SETUP_STATIC_BANDWIDTH_OFFSET 0x0000000000000008 283*5113495bSYour Name #define TX_FES_SETUP_STATIC_BANDWIDTH_LSB 10 284*5113495bSYour Name #define TX_FES_SETUP_STATIC_BANDWIDTH_MSB 12 285*5113495bSYour Name #define TX_FES_SETUP_STATIC_BANDWIDTH_MASK 0x0000000000001c00 286*5113495bSYour Name 287*5113495bSYour Name #define TX_FES_SETUP_SET_TXOP_DURATION_ALL_ONES_OFFSET 0x0000000000000008 288*5113495bSYour Name #define TX_FES_SETUP_SET_TXOP_DURATION_ALL_ONES_LSB 13 289*5113495bSYour Name #define TX_FES_SETUP_SET_TXOP_DURATION_ALL_ONES_MSB 13 290*5113495bSYour Name #define TX_FES_SETUP_SET_TXOP_DURATION_ALL_ONES_MASK 0x0000000000002000 291*5113495bSYour Name 292*5113495bSYour Name #define TX_FES_SETUP_TRANSMISSION_CONTAINS_MU_RTS_OFFSET 0x0000000000000008 293*5113495bSYour Name #define TX_FES_SETUP_TRANSMISSION_CONTAINS_MU_RTS_LSB 14 294*5113495bSYour Name #define TX_FES_SETUP_TRANSMISSION_CONTAINS_MU_RTS_MSB 14 295*5113495bSYour Name #define TX_FES_SETUP_TRANSMISSION_CONTAINS_MU_RTS_MASK 0x0000000000004000 296*5113495bSYour Name 297*5113495bSYour Name #define TX_FES_SETUP_BW_RESTRICTED_FRAMES_EMBEDDED_OFFSET 0x0000000000000008 298*5113495bSYour Name #define TX_FES_SETUP_BW_RESTRICTED_FRAMES_EMBEDDED_LSB 15 299*5113495bSYour Name #define TX_FES_SETUP_BW_RESTRICTED_FRAMES_EMBEDDED_MSB 15 300*5113495bSYour Name #define TX_FES_SETUP_BW_RESTRICTED_FRAMES_EMBEDDED_MASK 0x0000000000008000 301*5113495bSYour Name 302*5113495bSYour Name #define TX_FES_SETUP_AST_INDEX_OFFSET 0x0000000000000008 303*5113495bSYour Name #define TX_FES_SETUP_AST_INDEX_LSB 16 304*5113495bSYour Name #define TX_FES_SETUP_AST_INDEX_MSB 31 305*5113495bSYour Name #define TX_FES_SETUP_AST_INDEX_MASK 0x00000000ffff0000 306*5113495bSYour Name 307*5113495bSYour Name #define TX_FES_SETUP_CV_ID_OFFSET 0x0000000000000008 308*5113495bSYour Name #define TX_FES_SETUP_CV_ID_LSB 32 309*5113495bSYour Name #define TX_FES_SETUP_CV_ID_MSB 39 310*5113495bSYour Name #define TX_FES_SETUP_CV_ID_MASK 0x000000ff00000000 311*5113495bSYour Name 312*5113495bSYour Name #define TX_FES_SETUP_TRIGGER_RESP_TXPDU_PPDU_BOUNDARY_OFFSET 0x0000000000000008 313*5113495bSYour Name #define TX_FES_SETUP_TRIGGER_RESP_TXPDU_PPDU_BOUNDARY_LSB 40 314*5113495bSYour Name #define TX_FES_SETUP_TRIGGER_RESP_TXPDU_PPDU_BOUNDARY_MSB 41 315*5113495bSYour Name #define TX_FES_SETUP_TRIGGER_RESP_TXPDU_PPDU_BOUNDARY_MASK 0x0000030000000000 316*5113495bSYour Name 317*5113495bSYour Name #define TX_FES_SETUP_RXPCU_SETUP_COMPLETE_PRESENT_OFFSET 0x0000000000000008 318*5113495bSYour Name #define TX_FES_SETUP_RXPCU_SETUP_COMPLETE_PRESENT_LSB 42 319*5113495bSYour Name #define TX_FES_SETUP_RXPCU_SETUP_COMPLETE_PRESENT_MSB 42 320*5113495bSYour Name #define TX_FES_SETUP_RXPCU_SETUP_COMPLETE_PRESENT_MASK 0x0000040000000000 321*5113495bSYour Name 322*5113495bSYour Name #define TX_FES_SETUP_RBO_MUST_HAVE_DATA_USER_LIMIT_OFFSET 0x0000000000000008 323*5113495bSYour Name #define TX_FES_SETUP_RBO_MUST_HAVE_DATA_USER_LIMIT_LSB 43 324*5113495bSYour Name #define TX_FES_SETUP_RBO_MUST_HAVE_DATA_USER_LIMIT_MSB 46 325*5113495bSYour Name #define TX_FES_SETUP_RBO_MUST_HAVE_DATA_USER_LIMIT_MASK 0x0000780000000000 326*5113495bSYour Name 327*5113495bSYour Name #define TX_FES_SETUP_MU_NDP_OFFSET 0x0000000000000008 328*5113495bSYour Name #define TX_FES_SETUP_MU_NDP_LSB 47 329*5113495bSYour Name #define TX_FES_SETUP_MU_NDP_MSB 47 330*5113495bSYour Name #define TX_FES_SETUP_MU_NDP_MASK 0x0000800000000000 331*5113495bSYour Name 332*5113495bSYour Name #define TX_FES_SETUP_BF_TYPE_OFFSET 0x0000000000000008 333*5113495bSYour Name #define TX_FES_SETUP_BF_TYPE_LSB 48 334*5113495bSYour Name #define TX_FES_SETUP_BF_TYPE_MSB 49 335*5113495bSYour Name #define TX_FES_SETUP_BF_TYPE_MASK 0x0003000000000000 336*5113495bSYour Name 337*5113495bSYour Name #define TX_FES_SETUP_CBF_NC_INDEX_MASK_OFFSET 0x0000000000000008 338*5113495bSYour Name #define TX_FES_SETUP_CBF_NC_INDEX_MASK_LSB 50 339*5113495bSYour Name #define TX_FES_SETUP_CBF_NC_INDEX_MASK_MSB 50 340*5113495bSYour Name #define TX_FES_SETUP_CBF_NC_INDEX_MASK_MASK 0x0004000000000000 341*5113495bSYour Name 342*5113495bSYour Name #define TX_FES_SETUP_CBF_NC_INDEX_OFFSET 0x0000000000000008 343*5113495bSYour Name #define TX_FES_SETUP_CBF_NC_INDEX_LSB 51 344*5113495bSYour Name #define TX_FES_SETUP_CBF_NC_INDEX_MSB 53 345*5113495bSYour Name #define TX_FES_SETUP_CBF_NC_INDEX_MASK 0x0038000000000000 346*5113495bSYour Name 347*5113495bSYour Name #define TX_FES_SETUP_CBF_NR_INDEX_MASK_OFFSET 0x0000000000000008 348*5113495bSYour Name #define TX_FES_SETUP_CBF_NR_INDEX_MASK_LSB 54 349*5113495bSYour Name #define TX_FES_SETUP_CBF_NR_INDEX_MASK_MSB 54 350*5113495bSYour Name #define TX_FES_SETUP_CBF_NR_INDEX_MASK_MASK 0x0040000000000000 351*5113495bSYour Name 352*5113495bSYour Name #define TX_FES_SETUP_CBF_NR_INDEX_OFFSET 0x0000000000000008 353*5113495bSYour Name #define TX_FES_SETUP_CBF_NR_INDEX_LSB 55 354*5113495bSYour Name #define TX_FES_SETUP_CBF_NR_INDEX_MSB 57 355*5113495bSYour Name #define TX_FES_SETUP_CBF_NR_INDEX_MASK 0x0380000000000000 356*5113495bSYour Name 357*5113495bSYour Name #define TX_FES_SETUP_SECURE_RANGING_ISTA_OFFSET 0x0000000000000008 358*5113495bSYour Name #define TX_FES_SETUP_SECURE_RANGING_ISTA_LSB 58 359*5113495bSYour Name #define TX_FES_SETUP_SECURE_RANGING_ISTA_MSB 58 360*5113495bSYour Name #define TX_FES_SETUP_SECURE_RANGING_ISTA_MASK 0x0400000000000000 361*5113495bSYour Name 362*5113495bSYour Name #define TX_FES_SETUP_NDPA_OFFSET 0x0000000000000008 363*5113495bSYour Name #define TX_FES_SETUP_NDPA_LSB 59 364*5113495bSYour Name #define TX_FES_SETUP_NDPA_MSB 59 365*5113495bSYour Name #define TX_FES_SETUP_NDPA_MASK 0x0800000000000000 366*5113495bSYour Name 367*5113495bSYour Name #define TX_FES_SETUP_WAIT_SIFS_OFFSET 0x0000000000000008 368*5113495bSYour Name #define TX_FES_SETUP_WAIT_SIFS_LSB 60 369*5113495bSYour Name #define TX_FES_SETUP_WAIT_SIFS_MSB 61 370*5113495bSYour Name #define TX_FES_SETUP_WAIT_SIFS_MASK 0x3000000000000000 371*5113495bSYour Name 372*5113495bSYour Name #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_MASK_OFFSET 0x0000000000000008 373*5113495bSYour Name #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_MASK_LSB 62 374*5113495bSYour Name #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_MASK_MSB 62 375*5113495bSYour Name #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_MASK_MASK 0x4000000000000000 376*5113495bSYour Name 377*5113495bSYour Name #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_OFFSET 0x0000000000000008 378*5113495bSYour Name #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_LSB 63 379*5113495bSYour Name #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_MSB 63 380*5113495bSYour Name #define TX_FES_SETUP_CBF_FEEDBACK_TYPE_MASK 0x8000000000000000 381*5113495bSYour Name 382*5113495bSYour Name #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_OFFSET 0x0000000000000010 383*5113495bSYour Name #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_LSB 0 384*5113495bSYour Name #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_MSB 5 385*5113495bSYour Name #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_MASK 0x000000000000003f 386*5113495bSYour Name 387*5113495bSYour Name #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_MASK_OFFSET 0x0000000000000010 388*5113495bSYour Name #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_MASK_LSB 6 389*5113495bSYour Name #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_MASK_MSB 6 390*5113495bSYour Name #define TX_FES_SETUP_CBF_SOUNDING_TOKEN_MASK_MASK 0x0000000000000040 391*5113495bSYour Name 392*5113495bSYour Name #define TX_FES_SETUP_CBF_BW_MASK_OFFSET 0x0000000000000010 393*5113495bSYour Name #define TX_FES_SETUP_CBF_BW_MASK_LSB 7 394*5113495bSYour Name #define TX_FES_SETUP_CBF_BW_MASK_MSB 7 395*5113495bSYour Name #define TX_FES_SETUP_CBF_BW_MASK_MASK 0x0000000000000080 396*5113495bSYour Name 397*5113495bSYour Name #define TX_FES_SETUP_CBF_BW_OFFSET 0x0000000000000010 398*5113495bSYour Name #define TX_FES_SETUP_CBF_BW_LSB 8 399*5113495bSYour Name #define TX_FES_SETUP_CBF_BW_MSB 10 400*5113495bSYour Name #define TX_FES_SETUP_CBF_BW_MASK 0x0000000000000700 401*5113495bSYour Name 402*5113495bSYour Name #define TX_FES_SETUP_USE_STATIC_BW_OFFSET 0x0000000000000010 403*5113495bSYour Name #define TX_FES_SETUP_USE_STATIC_BW_LSB 11 404*5113495bSYour Name #define TX_FES_SETUP_USE_STATIC_BW_MSB 11 405*5113495bSYour Name #define TX_FES_SETUP_USE_STATIC_BW_MASK 0x0000000000000800 406*5113495bSYour Name 407*5113495bSYour Name #define TX_FES_SETUP_COEX_NACK_COUNT_OFFSET 0x0000000000000010 408*5113495bSYour Name #define TX_FES_SETUP_COEX_NACK_COUNT_LSB 12 409*5113495bSYour Name #define TX_FES_SETUP_COEX_NACK_COUNT_MSB 16 410*5113495bSYour Name #define TX_FES_SETUP_COEX_NACK_COUNT_MASK 0x000000000001f000 411*5113495bSYour Name 412*5113495bSYour Name #define TX_FES_SETUP_SCH_TX_BURST_ONGOING_OFFSET 0x0000000000000010 413*5113495bSYour Name #define TX_FES_SETUP_SCH_TX_BURST_ONGOING_LSB 17 414*5113495bSYour Name #define TX_FES_SETUP_SCH_TX_BURST_ONGOING_MSB 17 415*5113495bSYour Name #define TX_FES_SETUP_SCH_TX_BURST_ONGOING_MASK 0x0000000000020000 416*5113495bSYour Name 417*5113495bSYour Name #define TX_FES_SETUP_GEN_TQM_UPDATE_MPDU_COUNT_TLV_OFFSET 0x0000000000000010 418*5113495bSYour Name #define TX_FES_SETUP_GEN_TQM_UPDATE_MPDU_COUNT_TLV_LSB 18 419*5113495bSYour Name #define TX_FES_SETUP_GEN_TQM_UPDATE_MPDU_COUNT_TLV_MSB 18 420*5113495bSYour Name #define TX_FES_SETUP_GEN_TQM_UPDATE_MPDU_COUNT_TLV_MASK 0x0000000000040000 421*5113495bSYour Name 422*5113495bSYour Name #define TX_FES_SETUP_TRANSMIT_VIF_OFFSET 0x0000000000000010 423*5113495bSYour Name #define TX_FES_SETUP_TRANSMIT_VIF_LSB 19 424*5113495bSYour Name #define TX_FES_SETUP_TRANSMIT_VIF_MSB 22 425*5113495bSYour Name #define TX_FES_SETUP_TRANSMIT_VIF_MASK 0x0000000000780000 426*5113495bSYour Name 427*5113495bSYour Name #define TX_FES_SETUP_OPTIMAL_BW_RETRY_COUNT_OFFSET 0x0000000000000010 428*5113495bSYour Name #define TX_FES_SETUP_OPTIMAL_BW_RETRY_COUNT_LSB 23 429*5113495bSYour Name #define TX_FES_SETUP_OPTIMAL_BW_RETRY_COUNT_MSB 26 430*5113495bSYour Name #define TX_FES_SETUP_OPTIMAL_BW_RETRY_COUNT_MASK 0x0000000007800000 431*5113495bSYour Name 432*5113495bSYour Name #define TX_FES_SETUP_FES_CONTINUATION_RATIO_THRESHOLD_OFFSET 0x0000000000000010 433*5113495bSYour Name #define TX_FES_SETUP_FES_CONTINUATION_RATIO_THRESHOLD_LSB 27 434*5113495bSYour Name #define TX_FES_SETUP_FES_CONTINUATION_RATIO_THRESHOLD_MSB 31 435*5113495bSYour Name #define TX_FES_SETUP_FES_CONTINUATION_RATIO_THRESHOLD_MASK 0x00000000f8000000 436*5113495bSYour Name 437*5113495bSYour Name #define TX_FES_SETUP_TRANSMIT_CCA_BITMAP_OFFSET 0x0000000000000010 438*5113495bSYour Name #define TX_FES_SETUP_TRANSMIT_CCA_BITMAP_LSB 32 439*5113495bSYour Name #define TX_FES_SETUP_TRANSMIT_CCA_BITMAP_MSB 63 440*5113495bSYour Name #define TX_FES_SETUP_TRANSMIT_CCA_BITMAP_MASK 0xffffffff00000000 441*5113495bSYour Name 442*5113495bSYour Name #define TX_FES_SETUP_RANGING_TRIGGER_SUBTYPE_OFFSET 0x0000000000000018 443*5113495bSYour Name #define TX_FES_SETUP_RANGING_TRIGGER_SUBTYPE_LSB 1 444*5113495bSYour Name #define TX_FES_SETUP_RANGING_TRIGGER_SUBTYPE_MSB 4 445*5113495bSYour Name #define TX_FES_SETUP_RANGING_TRIGGER_SUBTYPE_MASK 0x000000000000001e 446*5113495bSYour Name 447*5113495bSYour Name #define TX_FES_SETUP_MIN_CTS2SELF_COUNT_OFFSET 0x0000000000000018 448*5113495bSYour Name #define TX_FES_SETUP_MIN_CTS2SELF_COUNT_LSB 5 449*5113495bSYour Name #define TX_FES_SETUP_MIN_CTS2SELF_COUNT_MSB 8 450*5113495bSYour Name #define TX_FES_SETUP_MIN_CTS2SELF_COUNT_MASK 0x00000000000001e0 451*5113495bSYour Name 452*5113495bSYour Name #define TX_FES_SETUP_MAX_CTS2SELF_COUNT_OFFSET 0x0000000000000018 453*5113495bSYour Name #define TX_FES_SETUP_MAX_CTS2SELF_COUNT_LSB 9 454*5113495bSYour Name #define TX_FES_SETUP_MAX_CTS2SELF_COUNT_MSB 12 455*5113495bSYour Name #define TX_FES_SETUP_MAX_CTS2SELF_COUNT_MASK 0x0000000000001e00 456*5113495bSYour Name 457*5113495bSYour Name #define TX_FES_SETUP_WIFI_RADAR_ENABLE_OFFSET 0x0000000000000018 458*5113495bSYour Name #define TX_FES_SETUP_WIFI_RADAR_ENABLE_LSB 13 459*5113495bSYour Name #define TX_FES_SETUP_WIFI_RADAR_ENABLE_MSB 13 460*5113495bSYour Name #define TX_FES_SETUP_WIFI_RADAR_ENABLE_MASK 0x0000000000002000 461*5113495bSYour Name 462*5113495bSYour Name #define TX_FES_SETUP_RESERVED_6A_OFFSET 0x0000000000000018 463*5113495bSYour Name #define TX_FES_SETUP_RESERVED_6A_LSB 14 464*5113495bSYour Name #define TX_FES_SETUP_RESERVED_6A_MSB 31 465*5113495bSYour Name #define TX_FES_SETUP_RESERVED_6A_MASK 0x00000000ffffc000 466*5113495bSYour Name 467*5113495bSYour Name #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_31_0_OFFSET 0x0000000000000018 468*5113495bSYour Name #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_31_0_LSB 32 469*5113495bSYour Name #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_31_0_MSB 63 470*5113495bSYour Name #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_31_0_MASK 0xffffffff00000000 471*5113495bSYour Name 472*5113495bSYour Name #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_36_32_OFFSET 0x0000000000000020 473*5113495bSYour Name #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_36_32_LSB 0 474*5113495bSYour Name #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_36_32_MSB 4 475*5113495bSYour Name #define TX_FES_SETUP_MONITOR_OVERRIDE_STA_36_32_MASK 0x000000000000001f 476*5113495bSYour Name 477*5113495bSYour Name #define TX_FES_SETUP_RESERVED_8A_OFFSET 0x0000000000000020 478*5113495bSYour Name #define TX_FES_SETUP_RESERVED_8A_LSB 5 479*5113495bSYour Name #define TX_FES_SETUP_RESERVED_8A_MSB 31 480*5113495bSYour Name #define TX_FES_SETUP_RESERVED_8A_MASK 0x00000000ffffffe0 481*5113495bSYour Name 482*5113495bSYour Name #define TX_FES_SETUP_FW2SW_INFO_OFFSET 0x0000000000000020 483*5113495bSYour Name #define TX_FES_SETUP_FW2SW_INFO_LSB 32 484*5113495bSYour Name #define TX_FES_SETUP_FW2SW_INFO_MSB 63 485*5113495bSYour Name #define TX_FES_SETUP_FW2SW_INFO_MASK 0xffffffff00000000 486*5113495bSYour Name 487*5113495bSYour Name #endif 488