1 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 19 20 #ifndef _TX_FES_STATUS_START_H_ 21 #define _TX_FES_STATUS_START_H_ 22 #if !defined(__ASSEMBLER__) 23 #endif 24 25 #define NUM_OF_DWORDS_TX_FES_STATUS_START 4 26 27 #define NUM_OF_QWORDS_TX_FES_STATUS_START 2 28 29 struct tx_fes_status_start { 30 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 31 uint32_t schedule_id : 32; 32 uint32_t reserved_1a : 8, 33 transmit_start_reason : 3, 34 disabled_user_bitmap_36_32 : 5, 35 schedule_cmd_ring_id : 5, 36 fes_control_mode : 2, 37 schedule_try : 4, 38 medium_prot_type : 3, 39 reserved_1b : 2; 40 uint32_t optimal_bw_try_count : 4, 41 number_of_users : 7, 42 coex_nack_count : 5, 43 cca_ed0 : 16; 44 uint32_t disabled_user_bitmap_31_0 : 32; 45 #else 46 uint32_t schedule_id : 32; 47 uint32_t reserved_1b : 2, 48 medium_prot_type : 3, 49 schedule_try : 4, 50 fes_control_mode : 2, 51 schedule_cmd_ring_id : 5, 52 disabled_user_bitmap_36_32 : 5, 53 transmit_start_reason : 3, 54 reserved_1a : 8; 55 uint32_t cca_ed0 : 16, 56 coex_nack_count : 5, 57 number_of_users : 7, 58 optimal_bw_try_count : 4; 59 uint32_t disabled_user_bitmap_31_0 : 32; 60 #endif 61 }; 62 63 #define TX_FES_STATUS_START_SCHEDULE_ID_OFFSET 0x0000000000000000 64 #define TX_FES_STATUS_START_SCHEDULE_ID_LSB 0 65 #define TX_FES_STATUS_START_SCHEDULE_ID_MSB 31 66 #define TX_FES_STATUS_START_SCHEDULE_ID_MASK 0x00000000ffffffff 67 68 #define TX_FES_STATUS_START_RESERVED_1A_OFFSET 0x0000000000000000 69 #define TX_FES_STATUS_START_RESERVED_1A_LSB 32 70 #define TX_FES_STATUS_START_RESERVED_1A_MSB 39 71 #define TX_FES_STATUS_START_RESERVED_1A_MASK 0x000000ff00000000 72 73 #define TX_FES_STATUS_START_TRANSMIT_START_REASON_OFFSET 0x0000000000000000 74 #define TX_FES_STATUS_START_TRANSMIT_START_REASON_LSB 40 75 #define TX_FES_STATUS_START_TRANSMIT_START_REASON_MSB 42 76 #define TX_FES_STATUS_START_TRANSMIT_START_REASON_MASK 0x0000070000000000 77 78 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_36_32_OFFSET 0x0000000000000000 79 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_36_32_LSB 43 80 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_36_32_MSB 47 81 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_36_32_MASK 0x0000f80000000000 82 83 #define TX_FES_STATUS_START_SCHEDULE_CMD_RING_ID_OFFSET 0x0000000000000000 84 #define TX_FES_STATUS_START_SCHEDULE_CMD_RING_ID_LSB 48 85 #define TX_FES_STATUS_START_SCHEDULE_CMD_RING_ID_MSB 52 86 #define TX_FES_STATUS_START_SCHEDULE_CMD_RING_ID_MASK 0x001f000000000000 87 88 #define TX_FES_STATUS_START_FES_CONTROL_MODE_OFFSET 0x0000000000000000 89 #define TX_FES_STATUS_START_FES_CONTROL_MODE_LSB 53 90 #define TX_FES_STATUS_START_FES_CONTROL_MODE_MSB 54 91 #define TX_FES_STATUS_START_FES_CONTROL_MODE_MASK 0x0060000000000000 92 93 #define TX_FES_STATUS_START_SCHEDULE_TRY_OFFSET 0x0000000000000000 94 #define TX_FES_STATUS_START_SCHEDULE_TRY_LSB 55 95 #define TX_FES_STATUS_START_SCHEDULE_TRY_MSB 58 96 #define TX_FES_STATUS_START_SCHEDULE_TRY_MASK 0x0780000000000000 97 98 #define TX_FES_STATUS_START_MEDIUM_PROT_TYPE_OFFSET 0x0000000000000000 99 #define TX_FES_STATUS_START_MEDIUM_PROT_TYPE_LSB 59 100 #define TX_FES_STATUS_START_MEDIUM_PROT_TYPE_MSB 61 101 #define TX_FES_STATUS_START_MEDIUM_PROT_TYPE_MASK 0x3800000000000000 102 103 #define TX_FES_STATUS_START_RESERVED_1B_OFFSET 0x0000000000000000 104 #define TX_FES_STATUS_START_RESERVED_1B_LSB 62 105 #define TX_FES_STATUS_START_RESERVED_1B_MSB 63 106 #define TX_FES_STATUS_START_RESERVED_1B_MASK 0xc000000000000000 107 108 #define TX_FES_STATUS_START_OPTIMAL_BW_TRY_COUNT_OFFSET 0x0000000000000008 109 #define TX_FES_STATUS_START_OPTIMAL_BW_TRY_COUNT_LSB 0 110 #define TX_FES_STATUS_START_OPTIMAL_BW_TRY_COUNT_MSB 3 111 #define TX_FES_STATUS_START_OPTIMAL_BW_TRY_COUNT_MASK 0x000000000000000f 112 113 #define TX_FES_STATUS_START_NUMBER_OF_USERS_OFFSET 0x0000000000000008 114 #define TX_FES_STATUS_START_NUMBER_OF_USERS_LSB 4 115 #define TX_FES_STATUS_START_NUMBER_OF_USERS_MSB 10 116 #define TX_FES_STATUS_START_NUMBER_OF_USERS_MASK 0x00000000000007f0 117 118 #define TX_FES_STATUS_START_COEX_NACK_COUNT_OFFSET 0x0000000000000008 119 #define TX_FES_STATUS_START_COEX_NACK_COUNT_LSB 11 120 #define TX_FES_STATUS_START_COEX_NACK_COUNT_MSB 15 121 #define TX_FES_STATUS_START_COEX_NACK_COUNT_MASK 0x000000000000f800 122 123 #define TX_FES_STATUS_START_CCA_ED0_OFFSET 0x0000000000000008 124 #define TX_FES_STATUS_START_CCA_ED0_LSB 16 125 #define TX_FES_STATUS_START_CCA_ED0_MSB 31 126 #define TX_FES_STATUS_START_CCA_ED0_MASK 0x00000000ffff0000 127 128 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_31_0_OFFSET 0x0000000000000008 129 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_31_0_LSB 32 130 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_31_0_MSB 63 131 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_31_0_MASK 0xffffffff00000000 132 133 #endif 134