xref: /wlan-driver/fw-api/hw/kiwi/v2/tx_flush_req.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /*
3  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 
18 
19 
20 #ifndef _TX_FLUSH_REQ_H_
21 #define _TX_FLUSH_REQ_H_
22 #if !defined(__ASSEMBLER__)
23 #endif
24 
25 #define NUM_OF_DWORDS_TX_FLUSH_REQ 2
26 
27 #define NUM_OF_QWORDS_TX_FLUSH_REQ 1
28 
29 struct tx_flush_req {
30 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
31              uint32_t flush_req_reason                                        :  8,
32                       phytx_abort_reason                                      :  8,
33                       flush_req_user_number_or_link_id                        :  6,
34                       mlo_abort_reason                                        :  5,
35                       reserved_0a                                             :  5;
36              uint32_t tlv64_padding                                           : 32;
37 #else
38              uint32_t reserved_0a                                             :  5,
39                       mlo_abort_reason                                        :  5,
40                       flush_req_user_number_or_link_id                        :  6,
41                       phytx_abort_reason                                      :  8,
42                       flush_req_reason                                        :  8;
43              uint32_t tlv64_padding                                           : 32;
44 #endif
45 };
46 
47 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_OFFSET                                        0x0000000000000000
48 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_LSB                                           0
49 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_MSB                                           7
50 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_MASK                                          0x00000000000000ff
51 
52 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_OFFSET                                      0x0000000000000000
53 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_LSB                                         8
54 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_MSB                                         15
55 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_MASK                                        0x000000000000ff00
56 
57 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_OFFSET                        0x0000000000000000
58 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_LSB                           16
59 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_MSB                           21
60 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_MASK                          0x00000000003f0000
61 
62 #define TX_FLUSH_REQ_MLO_ABORT_REASON_OFFSET                                        0x0000000000000000
63 #define TX_FLUSH_REQ_MLO_ABORT_REASON_LSB                                           22
64 #define TX_FLUSH_REQ_MLO_ABORT_REASON_MSB                                           26
65 #define TX_FLUSH_REQ_MLO_ABORT_REASON_MASK                                          0x0000000007c00000
66 
67 #define TX_FLUSH_REQ_RESERVED_0A_OFFSET                                             0x0000000000000000
68 #define TX_FLUSH_REQ_RESERVED_0A_LSB                                                27
69 #define TX_FLUSH_REQ_RESERVED_0A_MSB                                                31
70 #define TX_FLUSH_REQ_RESERVED_0A_MASK                                               0x00000000f8000000
71 
72 #define TX_FLUSH_REQ_TLV64_PADDING_OFFSET                                           0x0000000000000000
73 #define TX_FLUSH_REQ_TLV64_PADDING_LSB                                              32
74 #define TX_FLUSH_REQ_TLV64_PADDING_MSB                                              63
75 #define TX_FLUSH_REQ_TLV64_PADDING_MASK                                             0xffffffff00000000
76 
77 #endif
78