1 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 19 20 #ifndef _TXPCU_BUFFER_STATUS_H_ 21 #define _TXPCU_BUFFER_STATUS_H_ 22 #if !defined(__ASSEMBLER__) 23 #endif 24 25 #include "txpcu_buffer_basics.h" 26 #define NUM_OF_DWORDS_TXPCU_BUFFER_STATUS 2 27 28 #define NUM_OF_QWORDS_TXPCU_BUFFER_STATUS 1 29 30 struct txpcu_buffer_status { 31 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 32 struct txpcu_buffer_basics txpcu_basix_buffer_info; 33 uint32_t reserved : 15, 34 msdu_end : 1, 35 tx_data_sync_value : 16; 36 #else 37 struct txpcu_buffer_basics txpcu_basix_buffer_info; 38 uint32_t tx_data_sync_value : 16, 39 msdu_end : 1, 40 reserved : 15; 41 #endif 42 }; 43 44 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_OFFSET 0x0000000000000000 45 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_LSB 0 46 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_MSB 7 47 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_MASK 0x00000000000000ff 48 49 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_OFFSET 0x0000000000000000 50 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_LSB 8 51 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_MSB 15 52 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_MASK 0x000000000000ff00 53 54 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_OFFSET 0x0000000000000000 55 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_LSB 16 56 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_MSB 31 57 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_MASK 0x00000000ffff0000 58 59 #define TXPCU_BUFFER_STATUS_RESERVED_OFFSET 0x0000000000000000 60 #define TXPCU_BUFFER_STATUS_RESERVED_LSB 32 61 #define TXPCU_BUFFER_STATUS_RESERVED_MSB 46 62 #define TXPCU_BUFFER_STATUS_RESERVED_MASK 0x00007fff00000000 63 64 #define TXPCU_BUFFER_STATUS_MSDU_END_OFFSET 0x0000000000000000 65 #define TXPCU_BUFFER_STATUS_MSDU_END_LSB 47 66 #define TXPCU_BUFFER_STATUS_MSDU_END_MSB 47 67 #define TXPCU_BUFFER_STATUS_MSDU_END_MASK 0x0000800000000000 68 69 #define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_OFFSET 0x0000000000000000 70 #define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_LSB 48 71 #define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_MSB 63 72 #define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_MASK 0xffff000000000000 73 74 #endif 75