1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name 18*5113495bSYour Name #ifndef _COEX_RX_STATUS_H_ 19*5113495bSYour Name #define _COEX_RX_STATUS_H_ 20*5113495bSYour Name 21*5113495bSYour Name #define NUM_OF_DWORDS_COEX_RX_STATUS 2 22*5113495bSYour Name 23*5113495bSYour Name struct coex_rx_status { 24*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 25*5113495bSYour Name uint32_t rx_mac_frame_status : 2, 26*5113495bSYour Name rx_with_tx_response : 1, 27*5113495bSYour Name rx_rate : 5, 28*5113495bSYour Name rx_bw : 3, 29*5113495bSYour Name single_mpdu : 1, 30*5113495bSYour Name filter_status : 1, 31*5113495bSYour Name ampdu : 1, 32*5113495bSYour Name directed : 1, 33*5113495bSYour Name reserved_0 : 1, 34*5113495bSYour Name rx_nss : 3, 35*5113495bSYour Name rx_rssi : 8, 36*5113495bSYour Name rx_type : 3, 37*5113495bSYour Name retry_bit_setting : 1, 38*5113495bSYour Name more_data_bit_setting : 1; 39*5113495bSYour Name uint32_t remain_rx_packet_time : 16, 40*5113495bSYour Name rx_remaining_fes_time : 16; 41*5113495bSYour Name #else 42*5113495bSYour Name uint32_t more_data_bit_setting : 1, 43*5113495bSYour Name retry_bit_setting : 1, 44*5113495bSYour Name rx_type : 3, 45*5113495bSYour Name rx_rssi : 8, 46*5113495bSYour Name rx_nss : 3, 47*5113495bSYour Name reserved_0 : 1, 48*5113495bSYour Name directed : 1, 49*5113495bSYour Name ampdu : 1, 50*5113495bSYour Name filter_status : 1, 51*5113495bSYour Name single_mpdu : 1, 52*5113495bSYour Name rx_bw : 3, 53*5113495bSYour Name rx_rate : 5, 54*5113495bSYour Name rx_with_tx_response : 1, 55*5113495bSYour Name rx_mac_frame_status : 2; 56*5113495bSYour Name uint32_t rx_remaining_fes_time : 16, 57*5113495bSYour Name remain_rx_packet_time : 16; 58*5113495bSYour Name #endif 59*5113495bSYour Name }; 60*5113495bSYour Name 61*5113495bSYour Name #define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_OFFSET 0x00000000 62*5113495bSYour Name #define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_LSB 0 63*5113495bSYour Name #define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_MSB 1 64*5113495bSYour Name #define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_MASK 0x00000003 65*5113495bSYour Name 66*5113495bSYour Name #define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_OFFSET 0x00000000 67*5113495bSYour Name #define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_LSB 2 68*5113495bSYour Name #define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_MSB 2 69*5113495bSYour Name #define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_MASK 0x00000004 70*5113495bSYour Name 71*5113495bSYour Name #define COEX_RX_STATUS_RX_RATE_OFFSET 0x00000000 72*5113495bSYour Name #define COEX_RX_STATUS_RX_RATE_LSB 3 73*5113495bSYour Name #define COEX_RX_STATUS_RX_RATE_MSB 7 74*5113495bSYour Name #define COEX_RX_STATUS_RX_RATE_MASK 0x000000f8 75*5113495bSYour Name 76*5113495bSYour Name #define COEX_RX_STATUS_RX_BW_OFFSET 0x00000000 77*5113495bSYour Name #define COEX_RX_STATUS_RX_BW_LSB 8 78*5113495bSYour Name #define COEX_RX_STATUS_RX_BW_MSB 10 79*5113495bSYour Name #define COEX_RX_STATUS_RX_BW_MASK 0x00000700 80*5113495bSYour Name 81*5113495bSYour Name #define COEX_RX_STATUS_SINGLE_MPDU_OFFSET 0x00000000 82*5113495bSYour Name #define COEX_RX_STATUS_SINGLE_MPDU_LSB 11 83*5113495bSYour Name #define COEX_RX_STATUS_SINGLE_MPDU_MSB 11 84*5113495bSYour Name #define COEX_RX_STATUS_SINGLE_MPDU_MASK 0x00000800 85*5113495bSYour Name 86*5113495bSYour Name #define COEX_RX_STATUS_FILTER_STATUS_OFFSET 0x00000000 87*5113495bSYour Name #define COEX_RX_STATUS_FILTER_STATUS_LSB 12 88*5113495bSYour Name #define COEX_RX_STATUS_FILTER_STATUS_MSB 12 89*5113495bSYour Name #define COEX_RX_STATUS_FILTER_STATUS_MASK 0x00001000 90*5113495bSYour Name 91*5113495bSYour Name #define COEX_RX_STATUS_AMPDU_OFFSET 0x00000000 92*5113495bSYour Name #define COEX_RX_STATUS_AMPDU_LSB 13 93*5113495bSYour Name #define COEX_RX_STATUS_AMPDU_MSB 13 94*5113495bSYour Name #define COEX_RX_STATUS_AMPDU_MASK 0x00002000 95*5113495bSYour Name 96*5113495bSYour Name #define COEX_RX_STATUS_DIRECTED_OFFSET 0x00000000 97*5113495bSYour Name #define COEX_RX_STATUS_DIRECTED_LSB 14 98*5113495bSYour Name #define COEX_RX_STATUS_DIRECTED_MSB 14 99*5113495bSYour Name #define COEX_RX_STATUS_DIRECTED_MASK 0x00004000 100*5113495bSYour Name 101*5113495bSYour Name #define COEX_RX_STATUS_RESERVED_0_OFFSET 0x00000000 102*5113495bSYour Name #define COEX_RX_STATUS_RESERVED_0_LSB 15 103*5113495bSYour Name #define COEX_RX_STATUS_RESERVED_0_MSB 15 104*5113495bSYour Name #define COEX_RX_STATUS_RESERVED_0_MASK 0x00008000 105*5113495bSYour Name 106*5113495bSYour Name #define COEX_RX_STATUS_RX_NSS_OFFSET 0x00000000 107*5113495bSYour Name #define COEX_RX_STATUS_RX_NSS_LSB 16 108*5113495bSYour Name #define COEX_RX_STATUS_RX_NSS_MSB 18 109*5113495bSYour Name #define COEX_RX_STATUS_RX_NSS_MASK 0x00070000 110*5113495bSYour Name 111*5113495bSYour Name #define COEX_RX_STATUS_RX_RSSI_OFFSET 0x00000000 112*5113495bSYour Name #define COEX_RX_STATUS_RX_RSSI_LSB 19 113*5113495bSYour Name #define COEX_RX_STATUS_RX_RSSI_MSB 26 114*5113495bSYour Name #define COEX_RX_STATUS_RX_RSSI_MASK 0x07f80000 115*5113495bSYour Name 116*5113495bSYour Name #define COEX_RX_STATUS_RX_TYPE_OFFSET 0x00000000 117*5113495bSYour Name #define COEX_RX_STATUS_RX_TYPE_LSB 27 118*5113495bSYour Name #define COEX_RX_STATUS_RX_TYPE_MSB 29 119*5113495bSYour Name #define COEX_RX_STATUS_RX_TYPE_MASK 0x38000000 120*5113495bSYour Name 121*5113495bSYour Name #define COEX_RX_STATUS_RETRY_BIT_SETTING_OFFSET 0x00000000 122*5113495bSYour Name #define COEX_RX_STATUS_RETRY_BIT_SETTING_LSB 30 123*5113495bSYour Name #define COEX_RX_STATUS_RETRY_BIT_SETTING_MSB 30 124*5113495bSYour Name #define COEX_RX_STATUS_RETRY_BIT_SETTING_MASK 0x40000000 125*5113495bSYour Name 126*5113495bSYour Name #define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_OFFSET 0x00000000 127*5113495bSYour Name #define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_LSB 31 128*5113495bSYour Name #define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_MSB 31 129*5113495bSYour Name #define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_MASK 0x80000000 130*5113495bSYour Name 131*5113495bSYour Name #define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_OFFSET 0x00000004 132*5113495bSYour Name #define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_LSB 0 133*5113495bSYour Name #define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_MSB 15 134*5113495bSYour Name #define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_MASK 0x0000ffff 135*5113495bSYour Name 136*5113495bSYour Name #define COEX_RX_STATUS_RX_REMAINING_FES_TIME_OFFSET 0x00000004 137*5113495bSYour Name #define COEX_RX_STATUS_RX_REMAINING_FES_TIME_LSB 16 138*5113495bSYour Name #define COEX_RX_STATUS_RX_REMAINING_FES_TIME_MSB 31 139*5113495bSYour Name #define COEX_RX_STATUS_RX_REMAINING_FES_TIME_MASK 0xffff0000 140*5113495bSYour Name 141*5113495bSYour Name #endif 142