xref: /wlan-driver/fw-api/hw/peach/v1/eht_sig_usr_mu_mimo_info.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 #ifndef _EHT_SIG_USR_MU_MIMO_INFO_H_
19 #define _EHT_SIG_USR_MU_MIMO_INFO_H_
20 
21 #define NUM_OF_DWORDS_EHT_SIG_USR_MU_MIMO_INFO 2
22 
23 struct eht_sig_usr_mu_mimo_info {
24 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
25              uint32_t sta_id                                                  : 11,
26                       sta_mcs                                                 :  4,
27                       sta_coding                                              :  1,
28                       sta_spatial_config                                      :  6,
29                       reserved_0a                                             :  1,
30                       rx_integrity_check_passed                               :  1,
31                       subband80_cc_mask                                       :  8;
32              uint32_t user_order_subband80_0                                  :  8,
33                       user_order_subband80_1                                  :  8,
34                       user_order_subband80_2                                  :  8,
35                       user_order_subband80_3                                  :  8;
36 #else
37              uint32_t subband80_cc_mask                                       :  8,
38                       rx_integrity_check_passed                               :  1,
39                       reserved_0a                                             :  1,
40                       sta_spatial_config                                      :  6,
41                       sta_coding                                              :  1,
42                       sta_mcs                                                 :  4,
43                       sta_id                                                  : 11;
44              uint32_t user_order_subband80_3                                  :  8,
45                       user_order_subband80_2                                  :  8,
46                       user_order_subband80_1                                  :  8,
47                       user_order_subband80_0                                  :  8;
48 #endif
49 };
50 
51 #define EHT_SIG_USR_MU_MIMO_INFO_STA_ID_OFFSET                                      0x00000000
52 #define EHT_SIG_USR_MU_MIMO_INFO_STA_ID_LSB                                         0
53 #define EHT_SIG_USR_MU_MIMO_INFO_STA_ID_MSB                                         10
54 #define EHT_SIG_USR_MU_MIMO_INFO_STA_ID_MASK                                        0x000007ff
55 
56 #define EHT_SIG_USR_MU_MIMO_INFO_STA_MCS_OFFSET                                     0x00000000
57 #define EHT_SIG_USR_MU_MIMO_INFO_STA_MCS_LSB                                        11
58 #define EHT_SIG_USR_MU_MIMO_INFO_STA_MCS_MSB                                        14
59 #define EHT_SIG_USR_MU_MIMO_INFO_STA_MCS_MASK                                       0x00007800
60 
61 #define EHT_SIG_USR_MU_MIMO_INFO_STA_CODING_OFFSET                                  0x00000000
62 #define EHT_SIG_USR_MU_MIMO_INFO_STA_CODING_LSB                                     15
63 #define EHT_SIG_USR_MU_MIMO_INFO_STA_CODING_MSB                                     15
64 #define EHT_SIG_USR_MU_MIMO_INFO_STA_CODING_MASK                                    0x00008000
65 
66 #define EHT_SIG_USR_MU_MIMO_INFO_STA_SPATIAL_CONFIG_OFFSET                          0x00000000
67 #define EHT_SIG_USR_MU_MIMO_INFO_STA_SPATIAL_CONFIG_LSB                             16
68 #define EHT_SIG_USR_MU_MIMO_INFO_STA_SPATIAL_CONFIG_MSB                             21
69 #define EHT_SIG_USR_MU_MIMO_INFO_STA_SPATIAL_CONFIG_MASK                            0x003f0000
70 
71 #define EHT_SIG_USR_MU_MIMO_INFO_RESERVED_0A_OFFSET                                 0x00000000
72 #define EHT_SIG_USR_MU_MIMO_INFO_RESERVED_0A_LSB                                    22
73 #define EHT_SIG_USR_MU_MIMO_INFO_RESERVED_0A_MSB                                    22
74 #define EHT_SIG_USR_MU_MIMO_INFO_RESERVED_0A_MASK                                   0x00400000
75 
76 #define EHT_SIG_USR_MU_MIMO_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET                   0x00000000
77 #define EHT_SIG_USR_MU_MIMO_INFO_RX_INTEGRITY_CHECK_PASSED_LSB                      23
78 #define EHT_SIG_USR_MU_MIMO_INFO_RX_INTEGRITY_CHECK_PASSED_MSB                      23
79 #define EHT_SIG_USR_MU_MIMO_INFO_RX_INTEGRITY_CHECK_PASSED_MASK                     0x00800000
80 
81 #define EHT_SIG_USR_MU_MIMO_INFO_SUBBAND80_CC_MASK_OFFSET                           0x00000000
82 #define EHT_SIG_USR_MU_MIMO_INFO_SUBBAND80_CC_MASK_LSB                              24
83 #define EHT_SIG_USR_MU_MIMO_INFO_SUBBAND80_CC_MASK_MSB                              31
84 #define EHT_SIG_USR_MU_MIMO_INFO_SUBBAND80_CC_MASK_MASK                             0xff000000
85 
86 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_0_OFFSET                      0x00000004
87 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_0_LSB                         0
88 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_0_MSB                         7
89 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_0_MASK                        0x000000ff
90 
91 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_1_OFFSET                      0x00000004
92 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_1_LSB                         8
93 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_1_MSB                         15
94 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_1_MASK                        0x0000ff00
95 
96 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_2_OFFSET                      0x00000004
97 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_2_LSB                         16
98 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_2_MSB                         23
99 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_2_MASK                        0x00ff0000
100 
101 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_3_OFFSET                      0x00000004
102 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_3_LSB                         24
103 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_3_MSB                         31
104 #define EHT_SIG_USR_MU_MIMO_INFO_USER_ORDER_SUBBAND80_3_MASK                        0xff000000
105 
106 #endif
107