xref: /wlan-driver/fw-api/hw/peach/v1/reo_entrance_ring.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 #ifndef _REO_ENTRANCE_RING_H_
19 #define _REO_ENTRANCE_RING_H_
20 
21 #include "rx_mpdu_details.h"
22 #define NUM_OF_DWORDS_REO_ENTRANCE_RING 8
23 
24 struct reo_entrance_ring {
25 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
26              struct   rx_mpdu_details                                           reo_level_mpdu_frame_info;
27              uint32_t rx_reo_queue_desc_addr_31_0                             : 32;
28              uint32_t rx_reo_queue_desc_addr_39_32                            :  8,
29                       rounded_mpdu_byte_count                                 : 14,
30                       reo_destination_indication                              :  5,
31                       frameless_bar                                           :  1,
32                       reserved_5a                                             :  4;
33              uint32_t rxdma_push_reason                                       :  2,
34                       rxdma_error_code                                        :  5,
35                       mpdu_fragment_number                                    :  4,
36                       sw_exception                                            :  1,
37                       sw_exception_mpdu_delink                                :  1,
38                       sw_exception_destination_ring_valid                     :  1,
39                       sw_exception_destination_ring                           :  5,
40                       mpdu_sequence_number                                    : 12,
41                       reserved_6a                                             :  1;
42              uint32_t phy_ppdu_id                                             : 16,
43                       src_link_id                                             :  3,
44                       reserved_7a                                             :  1,
45                       ring_id                                                 :  8,
46                       looping_count                                           :  4;
47 #else
48              struct   rx_mpdu_details                                           reo_level_mpdu_frame_info;
49              uint32_t rx_reo_queue_desc_addr_31_0                             : 32;
50              uint32_t reserved_5a                                             :  4,
51                       frameless_bar                                           :  1,
52                       reo_destination_indication                              :  5,
53                       rounded_mpdu_byte_count                                 : 14,
54                       rx_reo_queue_desc_addr_39_32                            :  8;
55              uint32_t reserved_6a                                             :  1,
56                       mpdu_sequence_number                                    : 12,
57                       sw_exception_destination_ring                           :  5,
58                       sw_exception_destination_ring_valid                     :  1,
59                       sw_exception_mpdu_delink                                :  1,
60                       sw_exception                                            :  1,
61                       mpdu_fragment_number                                    :  4,
62                       rxdma_error_code                                        :  5,
63                       rxdma_push_reason                                       :  2;
64              uint32_t looping_count                                           :  4,
65                       ring_id                                                 :  8,
66                       reserved_7a                                             :  1,
67                       src_link_id                                             :  3,
68                       phy_ppdu_id                                             : 16;
69 #endif
70 };
71 
72 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
73 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
74 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MSB 31
75 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
76 
77 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
78 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
79 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MSB 7
80 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
81 
82 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
83 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
84 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB 11
85 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000f00
86 
87 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
88 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 12
89 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MSB 31
90 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff000
91 
92 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x00000008
93 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB 0
94 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MSB 7
95 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK 0x000000ff
96 
97 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x00000008
98 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 8
99 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MSB 8
100 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00000100
101 
102 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x00000008
103 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 9
104 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MSB 9
105 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00000200
106 
107 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x00000008
108 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB 10
109 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MSB 10
110 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK 0x00000400
111 
112 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x00000008
113 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB 11
114 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MSB 11
115 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK 0x00000800
116 
117 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000008
118 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 12
119 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MSB 12
120 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x00001000
121 
122 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET 0x00000008
123 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB 13
124 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MSB 13
125 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK 0x00002000
126 
127 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x00000008
128 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 14
129 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MSB 14
130 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x00004000
131 
132 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_OFFSET 0x00000008
133 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_LSB 15
134 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_MSB 26
135 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_MASK 0x07ff8000
136 
137 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_OFFSET 0x00000008
138 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_LSB 27
139 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MSB 27
140 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MASK 0x08000000
141 
142 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_OFFSET 0x00000008
143 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_LSB 28
144 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_MSB 31
145 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_MASK 0xf0000000
146 
147 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000c
148 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0
149 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MSB 31
150 #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff
151 
152 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET                        0x00000010
153 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_LSB                           0
154 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_MSB                           31
155 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_MASK                          0xffffffff
156 
157 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET                       0x00000014
158 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_LSB                          0
159 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_MSB                          7
160 #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_MASK                         0x000000ff
161 
162 #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_OFFSET                            0x00000014
163 #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_LSB                               8
164 #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_MSB                               21
165 #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_MASK                              0x003fff00
166 
167 #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_OFFSET                         0x00000014
168 #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_LSB                            22
169 #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_MSB                            26
170 #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_MASK                           0x07c00000
171 
172 #define REO_ENTRANCE_RING_FRAMELESS_BAR_OFFSET                                      0x00000014
173 #define REO_ENTRANCE_RING_FRAMELESS_BAR_LSB                                         27
174 #define REO_ENTRANCE_RING_FRAMELESS_BAR_MSB                                         27
175 #define REO_ENTRANCE_RING_FRAMELESS_BAR_MASK                                        0x08000000
176 
177 #define REO_ENTRANCE_RING_RESERVED_5A_OFFSET                                        0x00000014
178 #define REO_ENTRANCE_RING_RESERVED_5A_LSB                                           28
179 #define REO_ENTRANCE_RING_RESERVED_5A_MSB                                           31
180 #define REO_ENTRANCE_RING_RESERVED_5A_MASK                                          0xf0000000
181 
182 #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_OFFSET                                  0x00000018
183 #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_LSB                                     0
184 #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_MSB                                     1
185 #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_MASK                                    0x00000003
186 
187 #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_OFFSET                                   0x00000018
188 #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_LSB                                      2
189 #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_MSB                                      6
190 #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_MASK                                     0x0000007c
191 
192 #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_OFFSET                               0x00000018
193 #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_LSB                                  7
194 #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_MSB                                  10
195 #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_MASK                                 0x00000780
196 
197 #define REO_ENTRANCE_RING_SW_EXCEPTION_OFFSET                                       0x00000018
198 #define REO_ENTRANCE_RING_SW_EXCEPTION_LSB                                          11
199 #define REO_ENTRANCE_RING_SW_EXCEPTION_MSB                                          11
200 #define REO_ENTRANCE_RING_SW_EXCEPTION_MASK                                         0x00000800
201 
202 #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_OFFSET                           0x00000018
203 #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_LSB                              12
204 #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_MSB                              12
205 #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_MASK                             0x00001000
206 
207 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_OFFSET                0x00000018
208 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_LSB                   13
209 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_MSB                   13
210 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_MASK                  0x00002000
211 
212 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_OFFSET                      0x00000018
213 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_LSB                         14
214 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_MSB                         18
215 #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_MASK                        0x0007c000
216 
217 #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_OFFSET                               0x00000018
218 #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_LSB                                  19
219 #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_MSB                                  30
220 #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_MASK                                 0x7ff80000
221 
222 #define REO_ENTRANCE_RING_RESERVED_6A_OFFSET                                        0x00000018
223 #define REO_ENTRANCE_RING_RESERVED_6A_LSB                                           31
224 #define REO_ENTRANCE_RING_RESERVED_6A_MSB                                           31
225 #define REO_ENTRANCE_RING_RESERVED_6A_MASK                                          0x80000000
226 
227 #define REO_ENTRANCE_RING_PHY_PPDU_ID_OFFSET                                        0x0000001c
228 #define REO_ENTRANCE_RING_PHY_PPDU_ID_LSB                                           0
229 #define REO_ENTRANCE_RING_PHY_PPDU_ID_MSB                                           15
230 #define REO_ENTRANCE_RING_PHY_PPDU_ID_MASK                                          0x0000ffff
231 
232 #define REO_ENTRANCE_RING_SRC_LINK_ID_OFFSET                                        0x0000001c
233 #define REO_ENTRANCE_RING_SRC_LINK_ID_LSB                                           16
234 #define REO_ENTRANCE_RING_SRC_LINK_ID_MSB                                           18
235 #define REO_ENTRANCE_RING_SRC_LINK_ID_MASK                                          0x00070000
236 
237 #define REO_ENTRANCE_RING_RESERVED_7A_OFFSET                                        0x0000001c
238 #define REO_ENTRANCE_RING_RESERVED_7A_LSB                                           19
239 #define REO_ENTRANCE_RING_RESERVED_7A_MSB                                           19
240 #define REO_ENTRANCE_RING_RESERVED_7A_MASK                                          0x00080000
241 
242 #define REO_ENTRANCE_RING_RING_ID_OFFSET                                            0x0000001c
243 #define REO_ENTRANCE_RING_RING_ID_LSB                                               20
244 #define REO_ENTRANCE_RING_RING_ID_MSB                                               27
245 #define REO_ENTRANCE_RING_RING_ID_MASK                                              0x0ff00000
246 
247 #define REO_ENTRANCE_RING_LOOPING_COUNT_OFFSET                                      0x0000001c
248 #define REO_ENTRANCE_RING_LOOPING_COUNT_LSB                                         28
249 #define REO_ENTRANCE_RING_LOOPING_COUNT_MSB                                         31
250 #define REO_ENTRANCE_RING_LOOPING_COUNT_MASK                                        0xf0000000
251 
252 #endif
253