1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name 18*5113495bSYour Name #ifndef _RU_ALLOCATION_160_INFO_H_ 19*5113495bSYour Name #define _RU_ALLOCATION_160_INFO_H_ 20*5113495bSYour Name 21*5113495bSYour Name #define NUM_OF_DWORDS_RU_ALLOCATION_160_INFO 4 22*5113495bSYour Name 23*5113495bSYour Name struct ru_allocation_160_info { 24*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 25*5113495bSYour Name uint32_t ru_allocation_band0_0 : 9, 26*5113495bSYour Name ru_allocation_band0_1 : 9, 27*5113495bSYour Name reserved_0a : 6, 28*5113495bSYour Name ru_allocations_01_subband80_mask : 4, 29*5113495bSYour Name ru_allocations_23_subband80_mask : 4; 30*5113495bSYour Name uint32_t ru_allocation_band0_2 : 9, 31*5113495bSYour Name ru_allocation_band0_3 : 9, 32*5113495bSYour Name reserved_1a : 14; 33*5113495bSYour Name uint32_t ru_allocation_band1_0 : 9, 34*5113495bSYour Name ru_allocation_band1_1 : 9, 35*5113495bSYour Name reserved_2a : 14; 36*5113495bSYour Name uint32_t ru_allocation_band1_2 : 9, 37*5113495bSYour Name ru_allocation_band1_3 : 9, 38*5113495bSYour Name reserved_3a : 14; 39*5113495bSYour Name #else 40*5113495bSYour Name uint32_t ru_allocations_23_subband80_mask : 4, 41*5113495bSYour Name ru_allocations_01_subband80_mask : 4, 42*5113495bSYour Name reserved_0a : 6, 43*5113495bSYour Name ru_allocation_band0_1 : 9, 44*5113495bSYour Name ru_allocation_band0_0 : 9; 45*5113495bSYour Name uint32_t reserved_1a : 14, 46*5113495bSYour Name ru_allocation_band0_3 : 9, 47*5113495bSYour Name ru_allocation_band0_2 : 9; 48*5113495bSYour Name uint32_t reserved_2a : 14, 49*5113495bSYour Name ru_allocation_band1_1 : 9, 50*5113495bSYour Name ru_allocation_band1_0 : 9; 51*5113495bSYour Name uint32_t reserved_3a : 14, 52*5113495bSYour Name ru_allocation_band1_3 : 9, 53*5113495bSYour Name ru_allocation_band1_2 : 9; 54*5113495bSYour Name #endif 55*5113495bSYour Name }; 56*5113495bSYour Name 57*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_OFFSET 0x00000000 58*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_LSB 0 59*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_MSB 8 60*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_MASK 0x000001ff 61*5113495bSYour Name 62*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_OFFSET 0x00000000 63*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_LSB 9 64*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_MSB 17 65*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_MASK 0x0003fe00 66*5113495bSYour Name 67*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_0A_OFFSET 0x00000000 68*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_0A_LSB 18 69*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_0A_MSB 23 70*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_0A_MASK 0x00fc0000 71*5113495bSYour Name 72*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_OFFSET 0x00000000 73*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_LSB 24 74*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_MSB 27 75*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_MASK 0x0f000000 76*5113495bSYour Name 77*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_OFFSET 0x00000000 78*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_LSB 28 79*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_MSB 31 80*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_MASK 0xf0000000 81*5113495bSYour Name 82*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_OFFSET 0x00000004 83*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_LSB 0 84*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_MSB 8 85*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_MASK 0x000001ff 86*5113495bSYour Name 87*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_OFFSET 0x00000004 88*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_LSB 9 89*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_MSB 17 90*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_MASK 0x0003fe00 91*5113495bSYour Name 92*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_1A_OFFSET 0x00000004 93*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_1A_LSB 18 94*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_1A_MSB 31 95*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_1A_MASK 0xfffc0000 96*5113495bSYour Name 97*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_OFFSET 0x00000008 98*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_LSB 0 99*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_MSB 8 100*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_MASK 0x000001ff 101*5113495bSYour Name 102*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_OFFSET 0x00000008 103*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_LSB 9 104*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_MSB 17 105*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_MASK 0x0003fe00 106*5113495bSYour Name 107*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_2A_OFFSET 0x00000008 108*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_2A_LSB 18 109*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_2A_MSB 31 110*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_2A_MASK 0xfffc0000 111*5113495bSYour Name 112*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_OFFSET 0x0000000c 113*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_LSB 0 114*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_MSB 8 115*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_MASK 0x000001ff 116*5113495bSYour Name 117*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_OFFSET 0x0000000c 118*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_LSB 9 119*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_MSB 17 120*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_MASK 0x0003fe00 121*5113495bSYour Name 122*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_3A_OFFSET 0x0000000c 123*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_3A_LSB 18 124*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_3A_MSB 31 125*5113495bSYour Name #define RU_ALLOCATION_160_INFO_RESERVED_3A_MASK 0xfffc0000 126*5113495bSYour Name 127*5113495bSYour Name #endif 128