xref: /wlan-driver/fw-api/hw/peach/v1/tx_fes_status_start_ppdu.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 #ifndef _TX_FES_STATUS_START_PPDU_H_
19 #define _TX_FES_STATUS_START_PPDU_H_
20 
21 #define NUM_OF_DWORDS_TX_FES_STATUS_START_PPDU 4
22 
23 struct tx_fes_status_start_ppdu {
24 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
25              uint32_t ppdu_timestamp_lower_32                                 : 32;
26              uint32_t ppdu_timestamp_upper_32                                 : 32;
27              uint32_t subband_mask                                            : 16,
28                       ndp_frame                                               :  2,
29                       reserved_2b                                             :  2,
30                       coex_based_tx_bw                                        :  3,
31                       coex_based_ant_mask                                     :  8,
32                       reserved_2c                                             :  1;
33              uint32_t coex_based_tx_pwr_shared_ant                            :  8,
34                       coex_based_tx_pwr_ant                                   :  8,
35                       concurrent_bt_tx                                        :  1,
36                       concurrent_wlan_tx                                      :  1,
37                       concurrent_wan_tx                                       :  1,
38                       concurrent_wan_rx                                       :  1,
39                       coex_pwr_reduction_bt                                   :  1,
40                       coex_pwr_reduction_wlan                                 :  1,
41                       coex_pwr_reduction_wan                                  :  1,
42                       coex_result_alt_based                                   :  1,
43                       request_packet_bw                                       :  3,
44                       response_type                                           :  5;
45 #else
46              uint32_t ppdu_timestamp_lower_32                                 : 32;
47              uint32_t ppdu_timestamp_upper_32                                 : 32;
48              uint32_t reserved_2c                                             :  1,
49                       coex_based_ant_mask                                     :  8,
50                       coex_based_tx_bw                                        :  3,
51                       reserved_2b                                             :  2,
52                       ndp_frame                                               :  2,
53                       subband_mask                                            : 16;
54              uint32_t response_type                                           :  5,
55                       request_packet_bw                                       :  3,
56                       coex_result_alt_based                                   :  1,
57                       coex_pwr_reduction_wan                                  :  1,
58                       coex_pwr_reduction_wlan                                 :  1,
59                       coex_pwr_reduction_bt                                   :  1,
60                       concurrent_wan_rx                                       :  1,
61                       concurrent_wan_tx                                       :  1,
62                       concurrent_wlan_tx                                      :  1,
63                       concurrent_bt_tx                                        :  1,
64                       coex_based_tx_pwr_ant                                   :  8,
65                       coex_based_tx_pwr_shared_ant                            :  8;
66 #endif
67 };
68 
69 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_LOWER_32_OFFSET                     0x00000000
70 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_LOWER_32_LSB                        0
71 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_LOWER_32_MSB                        31
72 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_LOWER_32_MASK                       0xffffffff
73 
74 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_UPPER_32_OFFSET                     0x00000004
75 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_UPPER_32_LSB                        0
76 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_UPPER_32_MSB                        31
77 #define TX_FES_STATUS_START_PPDU_PPDU_TIMESTAMP_UPPER_32_MASK                       0xffffffff
78 
79 #define TX_FES_STATUS_START_PPDU_SUBBAND_MASK_OFFSET                                0x00000008
80 #define TX_FES_STATUS_START_PPDU_SUBBAND_MASK_LSB                                   0
81 #define TX_FES_STATUS_START_PPDU_SUBBAND_MASK_MSB                                   15
82 #define TX_FES_STATUS_START_PPDU_SUBBAND_MASK_MASK                                  0x0000ffff
83 
84 #define TX_FES_STATUS_START_PPDU_NDP_FRAME_OFFSET                                   0x00000008
85 #define TX_FES_STATUS_START_PPDU_NDP_FRAME_LSB                                      16
86 #define TX_FES_STATUS_START_PPDU_NDP_FRAME_MSB                                      17
87 #define TX_FES_STATUS_START_PPDU_NDP_FRAME_MASK                                     0x00030000
88 
89 #define TX_FES_STATUS_START_PPDU_RESERVED_2B_OFFSET                                 0x00000008
90 #define TX_FES_STATUS_START_PPDU_RESERVED_2B_LSB                                    18
91 #define TX_FES_STATUS_START_PPDU_RESERVED_2B_MSB                                    19
92 #define TX_FES_STATUS_START_PPDU_RESERVED_2B_MASK                                   0x000c0000
93 
94 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_BW_OFFSET                            0x00000008
95 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_BW_LSB                               20
96 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_BW_MSB                               22
97 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_BW_MASK                              0x00700000
98 
99 #define TX_FES_STATUS_START_PPDU_COEX_BASED_ANT_MASK_OFFSET                         0x00000008
100 #define TX_FES_STATUS_START_PPDU_COEX_BASED_ANT_MASK_LSB                            23
101 #define TX_FES_STATUS_START_PPDU_COEX_BASED_ANT_MASK_MSB                            30
102 #define TX_FES_STATUS_START_PPDU_COEX_BASED_ANT_MASK_MASK                           0x7f800000
103 
104 #define TX_FES_STATUS_START_PPDU_RESERVED_2C_OFFSET                                 0x00000008
105 #define TX_FES_STATUS_START_PPDU_RESERVED_2C_LSB                                    31
106 #define TX_FES_STATUS_START_PPDU_RESERVED_2C_MSB                                    31
107 #define TX_FES_STATUS_START_PPDU_RESERVED_2C_MASK                                   0x80000000
108 
109 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_SHARED_ANT_OFFSET                0x0000000c
110 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_SHARED_ANT_LSB                   0
111 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_SHARED_ANT_MSB                   7
112 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_SHARED_ANT_MASK                  0x000000ff
113 
114 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_ANT_OFFSET                       0x0000000c
115 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_ANT_LSB                          8
116 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_ANT_MSB                          15
117 #define TX_FES_STATUS_START_PPDU_COEX_BASED_TX_PWR_ANT_MASK                         0x0000ff00
118 
119 #define TX_FES_STATUS_START_PPDU_CONCURRENT_BT_TX_OFFSET                            0x0000000c
120 #define TX_FES_STATUS_START_PPDU_CONCURRENT_BT_TX_LSB                               16
121 #define TX_FES_STATUS_START_PPDU_CONCURRENT_BT_TX_MSB                               16
122 #define TX_FES_STATUS_START_PPDU_CONCURRENT_BT_TX_MASK                              0x00010000
123 
124 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WLAN_TX_OFFSET                          0x0000000c
125 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WLAN_TX_LSB                             17
126 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WLAN_TX_MSB                             17
127 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WLAN_TX_MASK                            0x00020000
128 
129 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_TX_OFFSET                           0x0000000c
130 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_TX_LSB                              18
131 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_TX_MSB                              18
132 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_TX_MASK                             0x00040000
133 
134 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_RX_OFFSET                           0x0000000c
135 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_RX_LSB                              19
136 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_RX_MSB                              19
137 #define TX_FES_STATUS_START_PPDU_CONCURRENT_WAN_RX_MASK                             0x00080000
138 
139 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_BT_OFFSET                       0x0000000c
140 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_BT_LSB                          20
141 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_BT_MSB                          20
142 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_BT_MASK                         0x00100000
143 
144 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WLAN_OFFSET                     0x0000000c
145 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WLAN_LSB                        21
146 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WLAN_MSB                        21
147 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WLAN_MASK                       0x00200000
148 
149 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WAN_OFFSET                      0x0000000c
150 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WAN_LSB                         22
151 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WAN_MSB                         22
152 #define TX_FES_STATUS_START_PPDU_COEX_PWR_REDUCTION_WAN_MASK                        0x00400000
153 
154 #define TX_FES_STATUS_START_PPDU_COEX_RESULT_ALT_BASED_OFFSET                       0x0000000c
155 #define TX_FES_STATUS_START_PPDU_COEX_RESULT_ALT_BASED_LSB                          23
156 #define TX_FES_STATUS_START_PPDU_COEX_RESULT_ALT_BASED_MSB                          23
157 #define TX_FES_STATUS_START_PPDU_COEX_RESULT_ALT_BASED_MASK                         0x00800000
158 
159 #define TX_FES_STATUS_START_PPDU_REQUEST_PACKET_BW_OFFSET                           0x0000000c
160 #define TX_FES_STATUS_START_PPDU_REQUEST_PACKET_BW_LSB                              24
161 #define TX_FES_STATUS_START_PPDU_REQUEST_PACKET_BW_MSB                              26
162 #define TX_FES_STATUS_START_PPDU_REQUEST_PACKET_BW_MASK                             0x07000000
163 
164 #define TX_FES_STATUS_START_PPDU_RESPONSE_TYPE_OFFSET                               0x0000000c
165 #define TX_FES_STATUS_START_PPDU_RESPONSE_TYPE_LSB                                  27
166 #define TX_FES_STATUS_START_PPDU_RESPONSE_TYPE_MSB                                  31
167 #define TX_FES_STATUS_START_PPDU_RESPONSE_TYPE_MASK                                 0xf8000000
168 
169 #endif
170