xref: /wlan-driver/fw-api/hw/peach/v1/uniform_reo_status_header.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 #ifndef _UNIFORM_REO_STATUS_HEADER_H_
19 #define _UNIFORM_REO_STATUS_HEADER_H_
20 
21 #define NUM_OF_DWORDS_UNIFORM_REO_STATUS_HEADER 2
22 
23 struct uniform_reo_status_header {
24 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
25              uint32_t reo_status_number                                       : 16,
26                       cmd_execution_time                                      : 10,
27                       reo_cmd_execution_status                                :  2,
28                       reserved_0a                                             :  4;
29              uint32_t timestamp                                               : 32;
30 #else
31              uint32_t reserved_0a                                             :  4,
32                       reo_cmd_execution_status                                :  2,
33                       cmd_execution_time                                      : 10,
34                       reo_status_number                                       : 16;
35              uint32_t timestamp                                               : 32;
36 #endif
37 };
38 
39 #define UNIFORM_REO_STATUS_HEADER_REO_STATUS_NUMBER_OFFSET                          0x00000000
40 #define UNIFORM_REO_STATUS_HEADER_REO_STATUS_NUMBER_LSB                             0
41 #define UNIFORM_REO_STATUS_HEADER_REO_STATUS_NUMBER_MSB                             15
42 #define UNIFORM_REO_STATUS_HEADER_REO_STATUS_NUMBER_MASK                            0x0000ffff
43 
44 #define UNIFORM_REO_STATUS_HEADER_CMD_EXECUTION_TIME_OFFSET                         0x00000000
45 #define UNIFORM_REO_STATUS_HEADER_CMD_EXECUTION_TIME_LSB                            16
46 #define UNIFORM_REO_STATUS_HEADER_CMD_EXECUTION_TIME_MSB                            25
47 #define UNIFORM_REO_STATUS_HEADER_CMD_EXECUTION_TIME_MASK                           0x03ff0000
48 
49 #define UNIFORM_REO_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_OFFSET                   0x00000000
50 #define UNIFORM_REO_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_LSB                      26
51 #define UNIFORM_REO_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MSB                      27
52 #define UNIFORM_REO_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MASK                     0x0c000000
53 
54 #define UNIFORM_REO_STATUS_HEADER_RESERVED_0A_OFFSET                                0x00000000
55 #define UNIFORM_REO_STATUS_HEADER_RESERVED_0A_LSB                                   28
56 #define UNIFORM_REO_STATUS_HEADER_RESERVED_0A_MSB                                   31
57 #define UNIFORM_REO_STATUS_HEADER_RESERVED_0A_MASK                                  0xf0000000
58 
59 #define UNIFORM_REO_STATUS_HEADER_TIMESTAMP_OFFSET                                  0x00000004
60 #define UNIFORM_REO_STATUS_HEADER_TIMESTAMP_LSB                                     0
61 #define UNIFORM_REO_STATUS_HEADER_TIMESTAMP_MSB                                     31
62 #define UNIFORM_REO_STATUS_HEADER_TIMESTAMP_MASK                                    0xffffffff
63 
64 #endif
65