1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name 18*5113495bSYour Name #ifndef _WBM2SW_COMPLETION_RING_RX_H_ 19*5113495bSYour Name #define _WBM2SW_COMPLETION_RING_RX_H_ 20*5113495bSYour Name 21*5113495bSYour Name #include "rx_msdu_desc_info.h" 22*5113495bSYour Name #include "rx_mpdu_desc_info.h" 23*5113495bSYour Name #define NUM_OF_DWORDS_WBM2SW_COMPLETION_RING_RX 8 24*5113495bSYour Name 25*5113495bSYour Name struct wbm2sw_completion_ring_rx { 26*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 27*5113495bSYour Name uint32_t buffer_virt_addr_31_0 : 32; 28*5113495bSYour Name uint32_t buffer_virt_addr_63_32 : 32; 29*5113495bSYour Name uint32_t release_source_module : 3, 30*5113495bSYour Name bm_action : 3, 31*5113495bSYour Name buffer_or_desc_type : 3, 32*5113495bSYour Name return_buffer_manager : 4, 33*5113495bSYour Name reserved_2a : 2, 34*5113495bSYour Name cache_id : 1, 35*5113495bSYour Name cookie_conversion_status : 1, 36*5113495bSYour Name rxdma_push_reason : 2, 37*5113495bSYour Name rxdma_error_code : 5, 38*5113495bSYour Name reo_push_reason : 2, 39*5113495bSYour Name reo_error_code : 5, 40*5113495bSYour Name wbm_internal_error : 1; 41*5113495bSYour Name struct rx_mpdu_desc_info rx_mpdu_desc_info_details; 42*5113495bSYour Name struct rx_msdu_desc_info rx_msdu_desc_info_details; 43*5113495bSYour Name uint32_t buffer_phys_addr_31_0 : 32; 44*5113495bSYour Name uint32_t buffer_phys_addr_39_32 : 8, 45*5113495bSYour Name sw_buffer_cookie : 20, 46*5113495bSYour Name looping_count : 4; 47*5113495bSYour Name #else 48*5113495bSYour Name uint32_t buffer_virt_addr_31_0 : 32; 49*5113495bSYour Name uint32_t buffer_virt_addr_63_32 : 32; 50*5113495bSYour Name uint32_t wbm_internal_error : 1, 51*5113495bSYour Name reo_error_code : 5, 52*5113495bSYour Name reo_push_reason : 2, 53*5113495bSYour Name rxdma_error_code : 5, 54*5113495bSYour Name rxdma_push_reason : 2, 55*5113495bSYour Name cookie_conversion_status : 1, 56*5113495bSYour Name cache_id : 1, 57*5113495bSYour Name reserved_2a : 2, 58*5113495bSYour Name return_buffer_manager : 4, 59*5113495bSYour Name buffer_or_desc_type : 3, 60*5113495bSYour Name bm_action : 3, 61*5113495bSYour Name release_source_module : 3; 62*5113495bSYour Name struct rx_mpdu_desc_info rx_mpdu_desc_info_details; 63*5113495bSYour Name struct rx_msdu_desc_info rx_msdu_desc_info_details; 64*5113495bSYour Name uint32_t buffer_phys_addr_31_0 : 32; 65*5113495bSYour Name uint32_t looping_count : 4, 66*5113495bSYour Name sw_buffer_cookie : 20, 67*5113495bSYour Name buffer_phys_addr_39_32 : 8; 68*5113495bSYour Name #endif 69*5113495bSYour Name }; 70*5113495bSYour Name 71*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_VIRT_ADDR_31_0_OFFSET 0x00000000 72*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_VIRT_ADDR_31_0_LSB 0 73*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_VIRT_ADDR_31_0_MSB 31 74*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_VIRT_ADDR_31_0_MASK 0xffffffff 75*5113495bSYour Name 76*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_VIRT_ADDR_63_32_OFFSET 0x00000004 77*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_VIRT_ADDR_63_32_LSB 0 78*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_VIRT_ADDR_63_32_MSB 31 79*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_VIRT_ADDR_63_32_MASK 0xffffffff 80*5113495bSYour Name 81*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RELEASE_SOURCE_MODULE_OFFSET 0x00000008 82*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RELEASE_SOURCE_MODULE_LSB 0 83*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RELEASE_SOURCE_MODULE_MSB 2 84*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RELEASE_SOURCE_MODULE_MASK 0x00000007 85*5113495bSYour Name 86*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BM_ACTION_OFFSET 0x00000008 87*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BM_ACTION_LSB 3 88*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BM_ACTION_MSB 5 89*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BM_ACTION_MASK 0x00000038 90*5113495bSYour Name 91*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_OR_DESC_TYPE_OFFSET 0x00000008 92*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_OR_DESC_TYPE_LSB 6 93*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_OR_DESC_TYPE_MSB 8 94*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_OR_DESC_TYPE_MASK 0x000001c0 95*5113495bSYour Name 96*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RETURN_BUFFER_MANAGER_OFFSET 0x00000008 97*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RETURN_BUFFER_MANAGER_LSB 9 98*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RETURN_BUFFER_MANAGER_MSB 12 99*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RETURN_BUFFER_MANAGER_MASK 0x00001e00 100*5113495bSYour Name 101*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RESERVED_2A_OFFSET 0x00000008 102*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RESERVED_2A_LSB 13 103*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RESERVED_2A_MSB 14 104*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RESERVED_2A_MASK 0x00006000 105*5113495bSYour Name 106*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_CACHE_ID_OFFSET 0x00000008 107*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_CACHE_ID_LSB 15 108*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_CACHE_ID_MSB 15 109*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_CACHE_ID_MASK 0x00008000 110*5113495bSYour Name 111*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_COOKIE_CONVERSION_STATUS_OFFSET 0x00000008 112*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_COOKIE_CONVERSION_STATUS_LSB 16 113*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_COOKIE_CONVERSION_STATUS_MSB 16 114*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_COOKIE_CONVERSION_STATUS_MASK 0x00010000 115*5113495bSYour Name 116*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RXDMA_PUSH_REASON_OFFSET 0x00000008 117*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RXDMA_PUSH_REASON_LSB 17 118*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RXDMA_PUSH_REASON_MSB 18 119*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RXDMA_PUSH_REASON_MASK 0x00060000 120*5113495bSYour Name 121*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RXDMA_ERROR_CODE_OFFSET 0x00000008 122*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RXDMA_ERROR_CODE_LSB 19 123*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RXDMA_ERROR_CODE_MSB 23 124*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RXDMA_ERROR_CODE_MASK 0x00f80000 125*5113495bSYour Name 126*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_REO_PUSH_REASON_OFFSET 0x00000008 127*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_REO_PUSH_REASON_LSB 24 128*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_REO_PUSH_REASON_MSB 25 129*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_REO_PUSH_REASON_MASK 0x03000000 130*5113495bSYour Name 131*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_REO_ERROR_CODE_OFFSET 0x00000008 132*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_REO_ERROR_CODE_LSB 26 133*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_REO_ERROR_CODE_MSB 30 134*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_REO_ERROR_CODE_MASK 0x7c000000 135*5113495bSYour Name 136*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_WBM_INTERNAL_ERROR_OFFSET 0x00000008 137*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_WBM_INTERNAL_ERROR_LSB 31 138*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_WBM_INTERNAL_ERROR_MSB 31 139*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_WBM_INTERNAL_ERROR_MASK 0x80000000 140*5113495bSYour Name 141*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x0000000c 142*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB 0 143*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MSB 7 144*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK 0x000000ff 145*5113495bSYour Name 146*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x0000000c 147*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 8 148*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MSB 8 149*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00000100 150*5113495bSYour Name 151*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x0000000c 152*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 9 153*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MSB 9 154*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00000200 155*5113495bSYour Name 156*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x0000000c 157*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB 10 158*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MSB 10 159*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK 0x00000400 160*5113495bSYour Name 161*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x0000000c 162*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB 11 163*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MSB 11 164*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK 0x00000800 165*5113495bSYour Name 166*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x0000000c 167*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 12 168*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MSB 12 169*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x00001000 170*5113495bSYour Name 171*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET 0x0000000c 172*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB 13 173*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MSB 13 174*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK 0x00002000 175*5113495bSYour Name 176*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x0000000c 177*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 14 178*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MSB 14 179*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x00004000 180*5113495bSYour Name 181*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_OFFSET 0x0000000c 182*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_LSB 15 183*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_MSB 26 184*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_MASK 0x07ff8000 185*5113495bSYour Name 186*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_OFFSET 0x0000000c 187*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_LSB 27 188*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MSB 27 189*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MASK 0x08000000 190*5113495bSYour Name 191*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_TID_OFFSET 0x0000000c 192*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_TID_LSB 28 193*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_TID_MSB 31 194*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_TID_MASK 0xf0000000 195*5113495bSYour Name 196*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x00000010 197*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0 198*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MSB 31 199*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff 200*5113495bSYour Name 201*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000014 202*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_LSB 0 203*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MSB 0 204*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001 205*5113495bSYour Name 206*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000014 207*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_LSB 1 208*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MSB 1 209*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002 210*5113495bSYour Name 211*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_OFFSET 0x00000014 212*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_LSB 2 213*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MSB 2 214*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MASK 0x00000004 215*5113495bSYour Name 216*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_OFFSET 0x00000014 217*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_LSB 3 218*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MSB 16 219*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MASK 0x0001fff8 220*5113495bSYour Name 221*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_OFFSET 0x00000014 222*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_LSB 17 223*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MSB 17 224*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MASK 0x00020000 225*5113495bSYour Name 226*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000014 227*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 18 228*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MSB 18 229*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x00040000 230*5113495bSYour Name 231*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000014 232*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 19 233*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MSB 19 234*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x00080000 235*5113495bSYour Name 236*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000014 237*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 20 238*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MSB 20 239*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x00100000 240*5113495bSYour Name 241*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_OFFSET 0x00000014 242*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_LSB 21 243*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MSB 21 244*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MASK 0x00200000 245*5113495bSYour Name 246*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000014 247*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_LSB 22 248*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MSB 22 249*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MASK 0x00400000 250*5113495bSYour Name 251*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_OFFSET 0x00000014 252*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_LSB 23 253*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MSB 23 254*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MASK 0x00800000 255*5113495bSYour Name 256*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_FR_DS_OFFSET 0x00000014 257*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_FR_DS_LSB 24 258*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MSB 24 259*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MASK 0x01000000 260*5113495bSYour Name 261*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_TO_DS_OFFSET 0x00000014 262*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_TO_DS_LSB 25 263*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MSB 25 264*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MASK 0x02000000 265*5113495bSYour Name 266*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_OFFSET 0x00000014 267*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_LSB 26 268*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MSB 26 269*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MASK 0x04000000 270*5113495bSYour Name 271*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_OFFSET 0x00000014 272*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_LSB 27 273*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MSB 28 274*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MASK 0x18000000 275*5113495bSYour Name 276*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_OFFSET 0x00000014 277*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_LSB 29 278*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MSB 30 279*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MASK 0x60000000 280*5113495bSYour Name 281*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_PHYS_ADDR_31_0_OFFSET 0x00000018 282*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_PHYS_ADDR_31_0_LSB 0 283*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_PHYS_ADDR_31_0_MSB 31 284*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_PHYS_ADDR_31_0_MASK 0xffffffff 285*5113495bSYour Name 286*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_PHYS_ADDR_39_32_OFFSET 0x0000001c 287*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_PHYS_ADDR_39_32_LSB 0 288*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_PHYS_ADDR_39_32_MSB 7 289*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_BUFFER_PHYS_ADDR_39_32_MASK 0x000000ff 290*5113495bSYour Name 291*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_SW_BUFFER_COOKIE_OFFSET 0x0000001c 292*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_SW_BUFFER_COOKIE_LSB 8 293*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_SW_BUFFER_COOKIE_MSB 27 294*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_SW_BUFFER_COOKIE_MASK 0x0fffff00 295*5113495bSYour Name 296*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_LOOPING_COUNT_OFFSET 0x0000001c 297*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_LOOPING_COUNT_LSB 28 298*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_LOOPING_COUNT_MSB 31 299*5113495bSYour Name #define WBM2SW_COMPLETION_RING_RX_LOOPING_COUNT_MASK 0xf0000000 300*5113495bSYour Name 301*5113495bSYour Name #endif 302