1 /* 2 * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 #ifndef _RU_ALLOCATION_160_INFO_H_ 19 #define _RU_ALLOCATION_160_INFO_H_ 20 21 #define NUM_OF_DWORDS_RU_ALLOCATION_160_INFO 4 22 23 struct ru_allocation_160_info { 24 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 25 uint32_t ru_allocation_band0_0 : 9, 26 ru_allocation_band0_1 : 9, 27 reserved_0a : 6, 28 ru_allocations_01_subband80_mask : 4, 29 ru_allocations_23_subband80_mask : 4; 30 uint32_t ru_allocation_band0_2 : 9, 31 ru_allocation_band0_3 : 9, 32 reserved_1a : 14; 33 uint32_t ru_allocation_band1_0 : 9, 34 ru_allocation_band1_1 : 9, 35 reserved_2a : 14; 36 uint32_t ru_allocation_band1_2 : 9, 37 ru_allocation_band1_3 : 9, 38 reserved_3a : 14; 39 #else 40 uint32_t ru_allocations_23_subband80_mask : 4, 41 ru_allocations_01_subband80_mask : 4, 42 reserved_0a : 6, 43 ru_allocation_band0_1 : 9, 44 ru_allocation_band0_0 : 9; 45 uint32_t reserved_1a : 14, 46 ru_allocation_band0_3 : 9, 47 ru_allocation_band0_2 : 9; 48 uint32_t reserved_2a : 14, 49 ru_allocation_band1_1 : 9, 50 ru_allocation_band1_0 : 9; 51 uint32_t reserved_3a : 14, 52 ru_allocation_band1_3 : 9, 53 ru_allocation_band1_2 : 9; 54 #endif 55 }; 56 57 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_OFFSET 0x00000000 58 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_LSB 0 59 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_MSB 8 60 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_0_MASK 0x000001ff 61 62 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_OFFSET 0x00000000 63 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_LSB 9 64 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_MSB 17 65 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_1_MASK 0x0003fe00 66 67 #define RU_ALLOCATION_160_INFO_RESERVED_0A_OFFSET 0x00000000 68 #define RU_ALLOCATION_160_INFO_RESERVED_0A_LSB 18 69 #define RU_ALLOCATION_160_INFO_RESERVED_0A_MSB 23 70 #define RU_ALLOCATION_160_INFO_RESERVED_0A_MASK 0x00fc0000 71 72 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_OFFSET 0x00000000 73 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_LSB 24 74 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_MSB 27 75 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_01_SUBBAND80_MASK_MASK 0x0f000000 76 77 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_OFFSET 0x00000000 78 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_LSB 28 79 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_MSB 31 80 #define RU_ALLOCATION_160_INFO_RU_ALLOCATIONS_23_SUBBAND80_MASK_MASK 0xf0000000 81 82 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_OFFSET 0x00000004 83 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_LSB 0 84 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_MSB 8 85 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_2_MASK 0x000001ff 86 87 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_OFFSET 0x00000004 88 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_LSB 9 89 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_MSB 17 90 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND0_3_MASK 0x0003fe00 91 92 #define RU_ALLOCATION_160_INFO_RESERVED_1A_OFFSET 0x00000004 93 #define RU_ALLOCATION_160_INFO_RESERVED_1A_LSB 18 94 #define RU_ALLOCATION_160_INFO_RESERVED_1A_MSB 31 95 #define RU_ALLOCATION_160_INFO_RESERVED_1A_MASK 0xfffc0000 96 97 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_OFFSET 0x00000008 98 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_LSB 0 99 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_MSB 8 100 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_0_MASK 0x000001ff 101 102 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_OFFSET 0x00000008 103 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_LSB 9 104 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_MSB 17 105 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_1_MASK 0x0003fe00 106 107 #define RU_ALLOCATION_160_INFO_RESERVED_2A_OFFSET 0x00000008 108 #define RU_ALLOCATION_160_INFO_RESERVED_2A_LSB 18 109 #define RU_ALLOCATION_160_INFO_RESERVED_2A_MSB 31 110 #define RU_ALLOCATION_160_INFO_RESERVED_2A_MASK 0xfffc0000 111 112 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_OFFSET 0x0000000c 113 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_LSB 0 114 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_MSB 8 115 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_2_MASK 0x000001ff 116 117 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_OFFSET 0x0000000c 118 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_LSB 9 119 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_MSB 17 120 #define RU_ALLOCATION_160_INFO_RU_ALLOCATION_BAND1_3_MASK 0x0003fe00 121 122 #define RU_ALLOCATION_160_INFO_RESERVED_3A_OFFSET 0x0000000c 123 #define RU_ALLOCATION_160_INFO_RESERVED_3A_LSB 18 124 #define RU_ALLOCATION_160_INFO_RESERVED_3A_MSB 31 125 #define RU_ALLOCATION_160_INFO_RESERVED_3A_MASK 0xfffc0000 126 127 #endif 128