1 /* 2 * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 #ifndef _RX_FRAME_1K_BITMAP_ACK_H_ 19 #define _RX_FRAME_1K_BITMAP_ACK_H_ 20 21 #define NUM_OF_DWORDS_RX_FRAME_1K_BITMAP_ACK 37 22 23 struct rx_frame_1k_bitmap_ack { 24 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 25 uint32_t reserved_0a : 5, 26 ba_bitmap_size : 2, 27 reserved_0b : 3, 28 ba_tid : 4, 29 sta_full_aid : 13, 30 reserved_0c : 5; 31 uint32_t addr1_31_0 : 32; 32 uint32_t addr1_47_32 : 16, 33 addr2_15_0 : 16; 34 uint32_t addr2_47_16 : 32; 35 uint32_t ba_ts_ctrl : 16, 36 ba_ts_seq : 16; 37 uint32_t ba_ts_bitmap_31_0 : 32; 38 uint32_t ba_ts_bitmap_63_32 : 32; 39 uint32_t ba_ts_bitmap_95_64 : 32; 40 uint32_t ba_ts_bitmap_127_96 : 32; 41 uint32_t ba_ts_bitmap_159_128 : 32; 42 uint32_t ba_ts_bitmap_191_160 : 32; 43 uint32_t ba_ts_bitmap_223_192 : 32; 44 uint32_t ba_ts_bitmap_255_224 : 32; 45 uint32_t ba_ts_bitmap_287_256 : 32; 46 uint32_t ba_ts_bitmap_319_288 : 32; 47 uint32_t ba_ts_bitmap_351_320 : 32; 48 uint32_t ba_ts_bitmap_383_352 : 32; 49 uint32_t ba_ts_bitmap_415_384 : 32; 50 uint32_t ba_ts_bitmap_447_416 : 32; 51 uint32_t ba_ts_bitmap_479_448 : 32; 52 uint32_t ba_ts_bitmap_511_480 : 32; 53 uint32_t ba_ts_bitmap_543_512 : 32; 54 uint32_t ba_ts_bitmap_575_544 : 32; 55 uint32_t ba_ts_bitmap_607_576 : 32; 56 uint32_t ba_ts_bitmap_639_608 : 32; 57 uint32_t ba_ts_bitmap_671_640 : 32; 58 uint32_t ba_ts_bitmap_703_672 : 32; 59 uint32_t ba_ts_bitmap_735_704 : 32; 60 uint32_t ba_ts_bitmap_767_736 : 32; 61 uint32_t ba_ts_bitmap_799_768 : 32; 62 uint32_t ba_ts_bitmap_831_800 : 32; 63 uint32_t ba_ts_bitmap_863_832 : 32; 64 uint32_t ba_ts_bitmap_895_864 : 32; 65 uint32_t ba_ts_bitmap_927_896 : 32; 66 uint32_t ba_ts_bitmap_959_928 : 32; 67 uint32_t ba_ts_bitmap_991_960 : 32; 68 uint32_t ba_ts_bitmap_1023_992 : 32; 69 #else 70 uint32_t reserved_0c : 5, 71 sta_full_aid : 13, 72 ba_tid : 4, 73 reserved_0b : 3, 74 ba_bitmap_size : 2, 75 reserved_0a : 5; 76 uint32_t addr1_31_0 : 32; 77 uint32_t addr2_15_0 : 16, 78 addr1_47_32 : 16; 79 uint32_t addr2_47_16 : 32; 80 uint32_t ba_ts_seq : 16, 81 ba_ts_ctrl : 16; 82 uint32_t ba_ts_bitmap_31_0 : 32; 83 uint32_t ba_ts_bitmap_63_32 : 32; 84 uint32_t ba_ts_bitmap_95_64 : 32; 85 uint32_t ba_ts_bitmap_127_96 : 32; 86 uint32_t ba_ts_bitmap_159_128 : 32; 87 uint32_t ba_ts_bitmap_191_160 : 32; 88 uint32_t ba_ts_bitmap_223_192 : 32; 89 uint32_t ba_ts_bitmap_255_224 : 32; 90 uint32_t ba_ts_bitmap_287_256 : 32; 91 uint32_t ba_ts_bitmap_319_288 : 32; 92 uint32_t ba_ts_bitmap_351_320 : 32; 93 uint32_t ba_ts_bitmap_383_352 : 32; 94 uint32_t ba_ts_bitmap_415_384 : 32; 95 uint32_t ba_ts_bitmap_447_416 : 32; 96 uint32_t ba_ts_bitmap_479_448 : 32; 97 uint32_t ba_ts_bitmap_511_480 : 32; 98 uint32_t ba_ts_bitmap_543_512 : 32; 99 uint32_t ba_ts_bitmap_575_544 : 32; 100 uint32_t ba_ts_bitmap_607_576 : 32; 101 uint32_t ba_ts_bitmap_639_608 : 32; 102 uint32_t ba_ts_bitmap_671_640 : 32; 103 uint32_t ba_ts_bitmap_703_672 : 32; 104 uint32_t ba_ts_bitmap_735_704 : 32; 105 uint32_t ba_ts_bitmap_767_736 : 32; 106 uint32_t ba_ts_bitmap_799_768 : 32; 107 uint32_t ba_ts_bitmap_831_800 : 32; 108 uint32_t ba_ts_bitmap_863_832 : 32; 109 uint32_t ba_ts_bitmap_895_864 : 32; 110 uint32_t ba_ts_bitmap_927_896 : 32; 111 uint32_t ba_ts_bitmap_959_928 : 32; 112 uint32_t ba_ts_bitmap_991_960 : 32; 113 uint32_t ba_ts_bitmap_1023_992 : 32; 114 #endif 115 }; 116 117 #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0A_OFFSET 0x00000000 118 #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0A_LSB 0 119 #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0A_MSB 4 120 #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0A_MASK 0x0000001f 121 122 #define RX_FRAME_1K_BITMAP_ACK_BA_BITMAP_SIZE_OFFSET 0x00000000 123 #define RX_FRAME_1K_BITMAP_ACK_BA_BITMAP_SIZE_LSB 5 124 #define RX_FRAME_1K_BITMAP_ACK_BA_BITMAP_SIZE_MSB 6 125 #define RX_FRAME_1K_BITMAP_ACK_BA_BITMAP_SIZE_MASK 0x00000060 126 127 #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0B_OFFSET 0x00000000 128 #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0B_LSB 7 129 #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0B_MSB 9 130 #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0B_MASK 0x00000380 131 132 #define RX_FRAME_1K_BITMAP_ACK_BA_TID_OFFSET 0x00000000 133 #define RX_FRAME_1K_BITMAP_ACK_BA_TID_LSB 10 134 #define RX_FRAME_1K_BITMAP_ACK_BA_TID_MSB 13 135 #define RX_FRAME_1K_BITMAP_ACK_BA_TID_MASK 0x00003c00 136 137 #define RX_FRAME_1K_BITMAP_ACK_STA_FULL_AID_OFFSET 0x00000000 138 #define RX_FRAME_1K_BITMAP_ACK_STA_FULL_AID_LSB 14 139 #define RX_FRAME_1K_BITMAP_ACK_STA_FULL_AID_MSB 26 140 #define RX_FRAME_1K_BITMAP_ACK_STA_FULL_AID_MASK 0x07ffc000 141 142 #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0C_OFFSET 0x00000000 143 #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0C_LSB 27 144 #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0C_MSB 31 145 #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0C_MASK 0xf8000000 146 147 #define RX_FRAME_1K_BITMAP_ACK_ADDR1_31_0_OFFSET 0x00000004 148 #define RX_FRAME_1K_BITMAP_ACK_ADDR1_31_0_LSB 0 149 #define RX_FRAME_1K_BITMAP_ACK_ADDR1_31_0_MSB 31 150 #define RX_FRAME_1K_BITMAP_ACK_ADDR1_31_0_MASK 0xffffffff 151 152 #define RX_FRAME_1K_BITMAP_ACK_ADDR1_47_32_OFFSET 0x00000008 153 #define RX_FRAME_1K_BITMAP_ACK_ADDR1_47_32_LSB 0 154 #define RX_FRAME_1K_BITMAP_ACK_ADDR1_47_32_MSB 15 155 #define RX_FRAME_1K_BITMAP_ACK_ADDR1_47_32_MASK 0x0000ffff 156 157 #define RX_FRAME_1K_BITMAP_ACK_ADDR2_15_0_OFFSET 0x00000008 158 #define RX_FRAME_1K_BITMAP_ACK_ADDR2_15_0_LSB 16 159 #define RX_FRAME_1K_BITMAP_ACK_ADDR2_15_0_MSB 31 160 #define RX_FRAME_1K_BITMAP_ACK_ADDR2_15_0_MASK 0xffff0000 161 162 #define RX_FRAME_1K_BITMAP_ACK_ADDR2_47_16_OFFSET 0x0000000c 163 #define RX_FRAME_1K_BITMAP_ACK_ADDR2_47_16_LSB 0 164 #define RX_FRAME_1K_BITMAP_ACK_ADDR2_47_16_MSB 31 165 #define RX_FRAME_1K_BITMAP_ACK_ADDR2_47_16_MASK 0xffffffff 166 167 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_CTRL_OFFSET 0x00000010 168 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_CTRL_LSB 0 169 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_CTRL_MSB 15 170 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_CTRL_MASK 0x0000ffff 171 172 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_SEQ_OFFSET 0x00000010 173 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_SEQ_LSB 16 174 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_SEQ_MSB 31 175 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_SEQ_MASK 0xffff0000 176 177 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_31_0_OFFSET 0x00000014 178 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_31_0_LSB 0 179 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_31_0_MSB 31 180 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_31_0_MASK 0xffffffff 181 182 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_63_32_OFFSET 0x00000018 183 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_63_32_LSB 0 184 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_63_32_MSB 31 185 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_63_32_MASK 0xffffffff 186 187 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_95_64_OFFSET 0x0000001c 188 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_95_64_LSB 0 189 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_95_64_MSB 31 190 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_95_64_MASK 0xffffffff 191 192 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_127_96_OFFSET 0x00000020 193 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_127_96_LSB 0 194 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_127_96_MSB 31 195 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_127_96_MASK 0xffffffff 196 197 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_159_128_OFFSET 0x00000024 198 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_159_128_LSB 0 199 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_159_128_MSB 31 200 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_159_128_MASK 0xffffffff 201 202 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_191_160_OFFSET 0x00000028 203 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_191_160_LSB 0 204 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_191_160_MSB 31 205 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_191_160_MASK 0xffffffff 206 207 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_223_192_OFFSET 0x0000002c 208 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_223_192_LSB 0 209 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_223_192_MSB 31 210 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_223_192_MASK 0xffffffff 211 212 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_255_224_OFFSET 0x00000030 213 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_255_224_LSB 0 214 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_255_224_MSB 31 215 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_255_224_MASK 0xffffffff 216 217 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_287_256_OFFSET 0x00000034 218 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_287_256_LSB 0 219 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_287_256_MSB 31 220 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_287_256_MASK 0xffffffff 221 222 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_319_288_OFFSET 0x00000038 223 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_319_288_LSB 0 224 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_319_288_MSB 31 225 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_319_288_MASK 0xffffffff 226 227 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_351_320_OFFSET 0x0000003c 228 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_351_320_LSB 0 229 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_351_320_MSB 31 230 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_351_320_MASK 0xffffffff 231 232 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_383_352_OFFSET 0x00000040 233 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_383_352_LSB 0 234 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_383_352_MSB 31 235 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_383_352_MASK 0xffffffff 236 237 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_415_384_OFFSET 0x00000044 238 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_415_384_LSB 0 239 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_415_384_MSB 31 240 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_415_384_MASK 0xffffffff 241 242 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_447_416_OFFSET 0x00000048 243 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_447_416_LSB 0 244 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_447_416_MSB 31 245 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_447_416_MASK 0xffffffff 246 247 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_479_448_OFFSET 0x0000004c 248 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_479_448_LSB 0 249 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_479_448_MSB 31 250 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_479_448_MASK 0xffffffff 251 252 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_511_480_OFFSET 0x00000050 253 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_511_480_LSB 0 254 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_511_480_MSB 31 255 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_511_480_MASK 0xffffffff 256 257 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_543_512_OFFSET 0x00000054 258 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_543_512_LSB 0 259 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_543_512_MSB 31 260 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_543_512_MASK 0xffffffff 261 262 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_575_544_OFFSET 0x00000058 263 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_575_544_LSB 0 264 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_575_544_MSB 31 265 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_575_544_MASK 0xffffffff 266 267 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_607_576_OFFSET 0x0000005c 268 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_607_576_LSB 0 269 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_607_576_MSB 31 270 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_607_576_MASK 0xffffffff 271 272 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_639_608_OFFSET 0x00000060 273 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_639_608_LSB 0 274 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_639_608_MSB 31 275 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_639_608_MASK 0xffffffff 276 277 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_671_640_OFFSET 0x00000064 278 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_671_640_LSB 0 279 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_671_640_MSB 31 280 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_671_640_MASK 0xffffffff 281 282 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_703_672_OFFSET 0x00000068 283 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_703_672_LSB 0 284 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_703_672_MSB 31 285 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_703_672_MASK 0xffffffff 286 287 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_735_704_OFFSET 0x0000006c 288 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_735_704_LSB 0 289 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_735_704_MSB 31 290 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_735_704_MASK 0xffffffff 291 292 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_767_736_OFFSET 0x00000070 293 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_767_736_LSB 0 294 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_767_736_MSB 31 295 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_767_736_MASK 0xffffffff 296 297 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_799_768_OFFSET 0x00000074 298 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_799_768_LSB 0 299 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_799_768_MSB 31 300 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_799_768_MASK 0xffffffff 301 302 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_831_800_OFFSET 0x00000078 303 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_831_800_LSB 0 304 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_831_800_MSB 31 305 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_831_800_MASK 0xffffffff 306 307 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_863_832_OFFSET 0x0000007c 308 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_863_832_LSB 0 309 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_863_832_MSB 31 310 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_863_832_MASK 0xffffffff 311 312 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_895_864_OFFSET 0x00000080 313 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_895_864_LSB 0 314 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_895_864_MSB 31 315 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_895_864_MASK 0xffffffff 316 317 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_927_896_OFFSET 0x00000084 318 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_927_896_LSB 0 319 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_927_896_MSB 31 320 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_927_896_MASK 0xffffffff 321 322 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_959_928_OFFSET 0x00000088 323 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_959_928_LSB 0 324 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_959_928_MSB 31 325 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_959_928_MASK 0xffffffff 326 327 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_991_960_OFFSET 0x0000008c 328 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_991_960_LSB 0 329 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_991_960_MSB 31 330 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_991_960_MASK 0xffffffff 331 332 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_1023_992_OFFSET 0x00000090 333 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_1023_992_LSB 0 334 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_1023_992_MSB 31 335 #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_1023_992_MASK 0xffffffff 336 337 #endif 338