1 /* 2 * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 #ifndef _RX_MSDU_DESC_INFO_H_ 19 #define _RX_MSDU_DESC_INFO_H_ 20 21 #define NUM_OF_DWORDS_RX_MSDU_DESC_INFO 1 22 23 struct rx_msdu_desc_info { 24 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 25 uint32_t first_msdu_in_mpdu_flag : 1, 26 last_msdu_in_mpdu_flag : 1, 27 msdu_continuation : 1, 28 msdu_length : 14, 29 msdu_drop : 1, 30 sa_is_valid : 1, 31 da_is_valid : 1, 32 da_is_mcbc : 1, 33 l3_header_padding_msb : 1, 34 tcp_udp_chksum_fail : 1, 35 ip_chksum_fail : 1, 36 fr_ds : 1, 37 to_ds : 1, 38 intra_bss : 1, 39 dest_chip_id : 2, 40 decap_format : 2, 41 __reserved_g_0015 : 1; 42 #else 43 uint32_t __reserved_g_0015 : 1, 44 decap_format : 2, 45 dest_chip_id : 2, 46 intra_bss : 1, 47 to_ds : 1, 48 fr_ds : 1, 49 ip_chksum_fail : 1, 50 tcp_udp_chksum_fail : 1, 51 l3_header_padding_msb : 1, 52 da_is_mcbc : 1, 53 da_is_valid : 1, 54 sa_is_valid : 1, 55 msdu_drop : 1, 56 msdu_length : 14, 57 msdu_continuation : 1, 58 last_msdu_in_mpdu_flag : 1, 59 first_msdu_in_mpdu_flag : 1; 60 #endif 61 }; 62 63 #define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000 64 #define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_LSB 0 65 #define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_MSB 0 66 #define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001 67 68 #define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000 69 #define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_LSB 1 70 #define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_MSB 1 71 #define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002 72 73 #define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_OFFSET 0x00000000 74 #define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_LSB 2 75 #define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_MSB 2 76 #define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_MASK 0x00000004 77 78 #define RX_MSDU_DESC_INFO_MSDU_LENGTH_OFFSET 0x00000000 79 #define RX_MSDU_DESC_INFO_MSDU_LENGTH_LSB 3 80 #define RX_MSDU_DESC_INFO_MSDU_LENGTH_MSB 16 81 #define RX_MSDU_DESC_INFO_MSDU_LENGTH_MASK 0x0001fff8 82 83 #define RX_MSDU_DESC_INFO_MSDU_DROP_OFFSET 0x00000000 84 #define RX_MSDU_DESC_INFO_MSDU_DROP_LSB 17 85 #define RX_MSDU_DESC_INFO_MSDU_DROP_MSB 17 86 #define RX_MSDU_DESC_INFO_MSDU_DROP_MASK 0x00020000 87 88 #define RX_MSDU_DESC_INFO_SA_IS_VALID_OFFSET 0x00000000 89 #define RX_MSDU_DESC_INFO_SA_IS_VALID_LSB 18 90 #define RX_MSDU_DESC_INFO_SA_IS_VALID_MSB 18 91 #define RX_MSDU_DESC_INFO_SA_IS_VALID_MASK 0x00040000 92 93 #define RX_MSDU_DESC_INFO_DA_IS_VALID_OFFSET 0x00000000 94 #define RX_MSDU_DESC_INFO_DA_IS_VALID_LSB 19 95 #define RX_MSDU_DESC_INFO_DA_IS_VALID_MSB 19 96 #define RX_MSDU_DESC_INFO_DA_IS_VALID_MASK 0x00080000 97 98 #define RX_MSDU_DESC_INFO_DA_IS_MCBC_OFFSET 0x00000000 99 #define RX_MSDU_DESC_INFO_DA_IS_MCBC_LSB 20 100 #define RX_MSDU_DESC_INFO_DA_IS_MCBC_MSB 20 101 #define RX_MSDU_DESC_INFO_DA_IS_MCBC_MASK 0x00100000 102 103 #define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_OFFSET 0x00000000 104 #define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_LSB 21 105 #define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_MSB 21 106 #define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_MASK 0x00200000 107 108 #define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000000 109 #define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_LSB 22 110 #define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_MSB 22 111 #define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_MASK 0x00400000 112 113 #define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_OFFSET 0x00000000 114 #define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_LSB 23 115 #define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_MSB 23 116 #define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_MASK 0x00800000 117 118 #define RX_MSDU_DESC_INFO_FR_DS_OFFSET 0x00000000 119 #define RX_MSDU_DESC_INFO_FR_DS_LSB 24 120 #define RX_MSDU_DESC_INFO_FR_DS_MSB 24 121 #define RX_MSDU_DESC_INFO_FR_DS_MASK 0x01000000 122 123 #define RX_MSDU_DESC_INFO_TO_DS_OFFSET 0x00000000 124 #define RX_MSDU_DESC_INFO_TO_DS_LSB 25 125 #define RX_MSDU_DESC_INFO_TO_DS_MSB 25 126 #define RX_MSDU_DESC_INFO_TO_DS_MASK 0x02000000 127 128 #define RX_MSDU_DESC_INFO_INTRA_BSS_OFFSET 0x00000000 129 #define RX_MSDU_DESC_INFO_INTRA_BSS_LSB 26 130 #define RX_MSDU_DESC_INFO_INTRA_BSS_MSB 26 131 #define RX_MSDU_DESC_INFO_INTRA_BSS_MASK 0x04000000 132 133 #define RX_MSDU_DESC_INFO_DEST_CHIP_ID_OFFSET 0x00000000 134 #define RX_MSDU_DESC_INFO_DEST_CHIP_ID_LSB 27 135 #define RX_MSDU_DESC_INFO_DEST_CHIP_ID_MSB 28 136 #define RX_MSDU_DESC_INFO_DEST_CHIP_ID_MASK 0x18000000 137 138 #define RX_MSDU_DESC_INFO_DECAP_FORMAT_OFFSET 0x00000000 139 #define RX_MSDU_DESC_INFO_DECAP_FORMAT_LSB 29 140 #define RX_MSDU_DESC_INFO_DECAP_FORMAT_MSB 30 141 #define RX_MSDU_DESC_INFO_DECAP_FORMAT_MASK 0x60000000 142 143 #endif 144