1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name 18*5113495bSYour Name #ifndef _RX_REO_QUEUE_1K_H_ 19*5113495bSYour Name #define _RX_REO_QUEUE_1K_H_ 20*5113495bSYour Name 21*5113495bSYour Name #include "uniform_descriptor_header.h" 22*5113495bSYour Name #define NUM_OF_DWORDS_RX_REO_QUEUE_1K 32 23*5113495bSYour Name 24*5113495bSYour Name struct rx_reo_queue_1k { 25*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 26*5113495bSYour Name struct uniform_descriptor_header descriptor_header; 27*5113495bSYour Name uint32_t rx_bitmap_319_288 : 32; 28*5113495bSYour Name uint32_t rx_bitmap_351_320 : 32; 29*5113495bSYour Name uint32_t rx_bitmap_383_352 : 32; 30*5113495bSYour Name uint32_t rx_bitmap_415_384 : 32; 31*5113495bSYour Name uint32_t rx_bitmap_447_416 : 32; 32*5113495bSYour Name uint32_t rx_bitmap_479_448 : 32; 33*5113495bSYour Name uint32_t rx_bitmap_511_480 : 32; 34*5113495bSYour Name uint32_t rx_bitmap_543_512 : 32; 35*5113495bSYour Name uint32_t rx_bitmap_575_544 : 32; 36*5113495bSYour Name uint32_t rx_bitmap_607_576 : 32; 37*5113495bSYour Name uint32_t rx_bitmap_639_608 : 32; 38*5113495bSYour Name uint32_t rx_bitmap_671_640 : 32; 39*5113495bSYour Name uint32_t rx_bitmap_703_672 : 32; 40*5113495bSYour Name uint32_t rx_bitmap_735_704 : 32; 41*5113495bSYour Name uint32_t rx_bitmap_767_736 : 32; 42*5113495bSYour Name uint32_t rx_bitmap_799_768 : 32; 43*5113495bSYour Name uint32_t rx_bitmap_831_800 : 32; 44*5113495bSYour Name uint32_t rx_bitmap_863_832 : 32; 45*5113495bSYour Name uint32_t rx_bitmap_895_864 : 32; 46*5113495bSYour Name uint32_t rx_bitmap_927_896 : 32; 47*5113495bSYour Name uint32_t rx_bitmap_959_928 : 32; 48*5113495bSYour Name uint32_t rx_bitmap_991_960 : 32; 49*5113495bSYour Name uint32_t rx_bitmap_1023_992 : 32; 50*5113495bSYour Name uint32_t reserved_24 : 32; 51*5113495bSYour Name uint32_t reserved_25 : 32; 52*5113495bSYour Name uint32_t reserved_26 : 32; 53*5113495bSYour Name uint32_t reserved_27 : 32; 54*5113495bSYour Name uint32_t reserved_28 : 32; 55*5113495bSYour Name uint32_t reserved_29 : 32; 56*5113495bSYour Name uint32_t reserved_30 : 32; 57*5113495bSYour Name uint32_t reserved_31 : 32; 58*5113495bSYour Name #else 59*5113495bSYour Name struct uniform_descriptor_header descriptor_header; 60*5113495bSYour Name uint32_t rx_bitmap_319_288 : 32; 61*5113495bSYour Name uint32_t rx_bitmap_351_320 : 32; 62*5113495bSYour Name uint32_t rx_bitmap_383_352 : 32; 63*5113495bSYour Name uint32_t rx_bitmap_415_384 : 32; 64*5113495bSYour Name uint32_t rx_bitmap_447_416 : 32; 65*5113495bSYour Name uint32_t rx_bitmap_479_448 : 32; 66*5113495bSYour Name uint32_t rx_bitmap_511_480 : 32; 67*5113495bSYour Name uint32_t rx_bitmap_543_512 : 32; 68*5113495bSYour Name uint32_t rx_bitmap_575_544 : 32; 69*5113495bSYour Name uint32_t rx_bitmap_607_576 : 32; 70*5113495bSYour Name uint32_t rx_bitmap_639_608 : 32; 71*5113495bSYour Name uint32_t rx_bitmap_671_640 : 32; 72*5113495bSYour Name uint32_t rx_bitmap_703_672 : 32; 73*5113495bSYour Name uint32_t rx_bitmap_735_704 : 32; 74*5113495bSYour Name uint32_t rx_bitmap_767_736 : 32; 75*5113495bSYour Name uint32_t rx_bitmap_799_768 : 32; 76*5113495bSYour Name uint32_t rx_bitmap_831_800 : 32; 77*5113495bSYour Name uint32_t rx_bitmap_863_832 : 32; 78*5113495bSYour Name uint32_t rx_bitmap_895_864 : 32; 79*5113495bSYour Name uint32_t rx_bitmap_927_896 : 32; 80*5113495bSYour Name uint32_t rx_bitmap_959_928 : 32; 81*5113495bSYour Name uint32_t rx_bitmap_991_960 : 32; 82*5113495bSYour Name uint32_t rx_bitmap_1023_992 : 32; 83*5113495bSYour Name uint32_t reserved_24 : 32; 84*5113495bSYour Name uint32_t reserved_25 : 32; 85*5113495bSYour Name uint32_t reserved_26 : 32; 86*5113495bSYour Name uint32_t reserved_27 : 32; 87*5113495bSYour Name uint32_t reserved_28 : 32; 88*5113495bSYour Name uint32_t reserved_29 : 32; 89*5113495bSYour Name uint32_t reserved_30 : 32; 90*5113495bSYour Name uint32_t reserved_31 : 32; 91*5113495bSYour Name #endif 92*5113495bSYour Name }; 93*5113495bSYour Name 94*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_OWNER_OFFSET 0x00000000 95*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_OWNER_LSB 0 96*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_OWNER_MSB 3 97*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_OWNER_MASK 0x0000000f 98*5113495bSYour Name 99*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_BUFFER_TYPE_OFFSET 0x00000000 100*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_BUFFER_TYPE_LSB 4 101*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_BUFFER_TYPE_MSB 7 102*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_BUFFER_TYPE_MASK 0x000000f0 103*5113495bSYour Name 104*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_OFFSET 0x00000000 105*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_LSB 8 106*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_MSB 27 107*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_MASK 0x0fffff00 108*5113495bSYour Name 109*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_RESERVED_0A_OFFSET 0x00000000 110*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_RESERVED_0A_LSB 28 111*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_RESERVED_0A_MSB 31 112*5113495bSYour Name #define RX_REO_QUEUE_1K_DESCRIPTOR_HEADER_RESERVED_0A_MASK 0xf0000000 113*5113495bSYour Name 114*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_319_288_OFFSET 0x00000004 115*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_319_288_LSB 0 116*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_319_288_MSB 31 117*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_319_288_MASK 0xffffffff 118*5113495bSYour Name 119*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_351_320_OFFSET 0x00000008 120*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_351_320_LSB 0 121*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_351_320_MSB 31 122*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_351_320_MASK 0xffffffff 123*5113495bSYour Name 124*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_383_352_OFFSET 0x0000000c 125*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_383_352_LSB 0 126*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_383_352_MSB 31 127*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_383_352_MASK 0xffffffff 128*5113495bSYour Name 129*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_415_384_OFFSET 0x00000010 130*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_415_384_LSB 0 131*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_415_384_MSB 31 132*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_415_384_MASK 0xffffffff 133*5113495bSYour Name 134*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_447_416_OFFSET 0x00000014 135*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_447_416_LSB 0 136*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_447_416_MSB 31 137*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_447_416_MASK 0xffffffff 138*5113495bSYour Name 139*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_479_448_OFFSET 0x00000018 140*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_479_448_LSB 0 141*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_479_448_MSB 31 142*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_479_448_MASK 0xffffffff 143*5113495bSYour Name 144*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_511_480_OFFSET 0x0000001c 145*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_511_480_LSB 0 146*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_511_480_MSB 31 147*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_511_480_MASK 0xffffffff 148*5113495bSYour Name 149*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_543_512_OFFSET 0x00000020 150*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_543_512_LSB 0 151*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_543_512_MSB 31 152*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_543_512_MASK 0xffffffff 153*5113495bSYour Name 154*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_575_544_OFFSET 0x00000024 155*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_575_544_LSB 0 156*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_575_544_MSB 31 157*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_575_544_MASK 0xffffffff 158*5113495bSYour Name 159*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_607_576_OFFSET 0x00000028 160*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_607_576_LSB 0 161*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_607_576_MSB 31 162*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_607_576_MASK 0xffffffff 163*5113495bSYour Name 164*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_639_608_OFFSET 0x0000002c 165*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_639_608_LSB 0 166*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_639_608_MSB 31 167*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_639_608_MASK 0xffffffff 168*5113495bSYour Name 169*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_671_640_OFFSET 0x00000030 170*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_671_640_LSB 0 171*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_671_640_MSB 31 172*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_671_640_MASK 0xffffffff 173*5113495bSYour Name 174*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_703_672_OFFSET 0x00000034 175*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_703_672_LSB 0 176*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_703_672_MSB 31 177*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_703_672_MASK 0xffffffff 178*5113495bSYour Name 179*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_735_704_OFFSET 0x00000038 180*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_735_704_LSB 0 181*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_735_704_MSB 31 182*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_735_704_MASK 0xffffffff 183*5113495bSYour Name 184*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_767_736_OFFSET 0x0000003c 185*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_767_736_LSB 0 186*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_767_736_MSB 31 187*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_767_736_MASK 0xffffffff 188*5113495bSYour Name 189*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_799_768_OFFSET 0x00000040 190*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_799_768_LSB 0 191*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_799_768_MSB 31 192*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_799_768_MASK 0xffffffff 193*5113495bSYour Name 194*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_831_800_OFFSET 0x00000044 195*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_831_800_LSB 0 196*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_831_800_MSB 31 197*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_831_800_MASK 0xffffffff 198*5113495bSYour Name 199*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_863_832_OFFSET 0x00000048 200*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_863_832_LSB 0 201*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_863_832_MSB 31 202*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_863_832_MASK 0xffffffff 203*5113495bSYour Name 204*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_895_864_OFFSET 0x0000004c 205*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_895_864_LSB 0 206*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_895_864_MSB 31 207*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_895_864_MASK 0xffffffff 208*5113495bSYour Name 209*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_927_896_OFFSET 0x00000050 210*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_927_896_LSB 0 211*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_927_896_MSB 31 212*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_927_896_MASK 0xffffffff 213*5113495bSYour Name 214*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_959_928_OFFSET 0x00000054 215*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_959_928_LSB 0 216*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_959_928_MSB 31 217*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_959_928_MASK 0xffffffff 218*5113495bSYour Name 219*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_991_960_OFFSET 0x00000058 220*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_991_960_LSB 0 221*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_991_960_MSB 31 222*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_991_960_MASK 0xffffffff 223*5113495bSYour Name 224*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_1023_992_OFFSET 0x0000005c 225*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_1023_992_LSB 0 226*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_1023_992_MSB 31 227*5113495bSYour Name #define RX_REO_QUEUE_1K_RX_BITMAP_1023_992_MASK 0xffffffff 228*5113495bSYour Name 229*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_24_OFFSET 0x00000060 230*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_24_LSB 0 231*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_24_MSB 31 232*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_24_MASK 0xffffffff 233*5113495bSYour Name 234*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_25_OFFSET 0x00000064 235*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_25_LSB 0 236*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_25_MSB 31 237*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_25_MASK 0xffffffff 238*5113495bSYour Name 239*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_26_OFFSET 0x00000068 240*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_26_LSB 0 241*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_26_MSB 31 242*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_26_MASK 0xffffffff 243*5113495bSYour Name 244*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_27_OFFSET 0x0000006c 245*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_27_LSB 0 246*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_27_MSB 31 247*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_27_MASK 0xffffffff 248*5113495bSYour Name 249*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_28_OFFSET 0x00000070 250*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_28_LSB 0 251*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_28_MSB 31 252*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_28_MASK 0xffffffff 253*5113495bSYour Name 254*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_29_OFFSET 0x00000074 255*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_29_LSB 0 256*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_29_MSB 31 257*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_29_MASK 0xffffffff 258*5113495bSYour Name 259*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_30_OFFSET 0x00000078 260*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_30_LSB 0 261*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_30_MSB 31 262*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_30_MASK 0xffffffff 263*5113495bSYour Name 264*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_31_OFFSET 0x0000007c 265*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_31_LSB 0 266*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_31_MSB 31 267*5113495bSYour Name #define RX_REO_QUEUE_1K_RESERVED_31_MASK 0xffffffff 268*5113495bSYour Name 269*5113495bSYour Name #endif 270