1 /* 2 * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 #ifndef _RX_RESPONSE_REQUIRED_INFO_H_ 19 #define _RX_RESPONSE_REQUIRED_INFO_H_ 20 21 #include "mlo_sta_id_details.h" 22 #define NUM_OF_DWORDS_RX_RESPONSE_REQUIRED_INFO 15 23 24 struct rx_response_required_info { 25 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 26 uint32_t phy_ppdu_id : 16, 27 su_or_uplink_mu_reception : 1, 28 trigger_frame_received : 1, 29 __reserved_g_0012 : 2, 30 tb___reserved_g_0005_response_required : 2, 31 mac_security : 1, 32 filter_pass_monitor_ovrd : 1, 33 ast_search_incomplete : 1, 34 r2r_end_status_to_follow : 1, 35 __reserved_g_0016_listen_cca_check_at_phy_desc : 1, 36 __reserved_g_0016_listen_indication : 1, 37 three_or_more_type_subtypes : 1, 38 wait_sifs_config_valid : 1, 39 wait_sifs : 2; 40 uint32_t general_frame_control : 16, 41 second_frame_control : 16; 42 uint32_t duration : 16, 43 pkt_type : 4, 44 dot11ax_su_extended : 1, 45 rate_mcs : 4, 46 sgi : 2, 47 stbc : 1, 48 ldpc : 1, 49 ampdu : 1, 50 vht_ack : 1, 51 rts_ta_grp_bit : 1; 52 uint32_t ctrl_frame_soliciting_resp : 1, 53 ast_fail_for_dot11ax_su_ext : 1, 54 service_dynamic : 1, 55 m_pkt : 1, 56 sta_partial_aid : 12, 57 group_id : 6, 58 ctrl_resp_pwr_mgmt : 1, 59 response_indication : 2, 60 ndp_indication : 1, 61 ndp_frame_type : 3, 62 second_frame_control_valid : 1, 63 ack_ba_resp_more_data : 1, 64 reserved_3a : 1; 65 uint32_t ack_id : 16, 66 ack_id_ext : 10, 67 agc_cbw : 3, 68 service_cbw : 3; 69 uint32_t response_sta_count : 7, 70 reserved : 4, 71 ht_vht_sig_cbw : 3, 72 cts_cbw : 3, 73 response_ack_count : 7, 74 response_assoc_ack_count : 7, 75 txop_duration_all_ones : 1; 76 uint32_t response_ba32_count : 7, 77 response_ba64_count : 7, 78 response_ba128_count : 7, 79 response_ba256_count : 7, 80 multi_tid : 1, 81 sw_response_tlv_from_crypto : 1, 82 dot11ax_dl_ul_flag : 1, 83 emlsr_main_tlv_if : 1; 84 uint32_t sw_response_frame_length : 16, 85 response_ba512_count : 7, 86 response_ba1024_count : 7, 87 reserved_7a : 2; 88 uint32_t addr1_31_0 : 32; 89 uint32_t addr1_47_32 : 16, 90 addr2_15_0 : 16; 91 uint32_t addr2_47_16 : 32; 92 uint32_t dot11ax_received_format_indication : 1, 93 dot11ax_received_dl_ul_flag : 1, 94 dot11ax_received_bss_color_id : 6, 95 dot11ax_received_spatial_reuse : 4, 96 dot11ax_received_cp_size : 2, 97 dot11ax_received_ltf_size : 2, 98 dot11ax_received_coding : 1, 99 dot11ax_received_dcm : 1, 100 dot11ax_received_doppler_indication : 1, 101 dot11ax_received_ext_ru_size : 4, 102 ftm_fields_valid : 1, 103 ftm_pe_nss : 3, 104 ftm_pe_ltf_size : 2, 105 ftm_pe_content : 1, 106 ftm_chain_csd_en : 1, 107 ftm_pe_chain_csd_en : 1; 108 uint32_t dot11ax_response_rate_source : 8, 109 dot11ax_ext_response_rate_source : 8, 110 sw_peer_id : 16; 111 uint32_t dot11be_puncture_bitmap : 16, 112 dot11be_response : 1, 113 punctured_response : 1, 114 eht_duplicate_mode : 2, 115 force_extra_symbol : 1, 116 reserved_13a : 5, 117 u_sig_puncture_pattern_encoding : 6; 118 struct mlo_sta_id_details mlo_sta_id_details_rx; 119 uint16_t he_a_control_response_time : 12, 120 reserved_after_struct16 : 4; 121 #else 122 uint32_t wait_sifs : 2, 123 wait_sifs_config_valid : 1, 124 three_or_more_type_subtypes : 1, 125 __reserved_g_0016_listen_indication : 1, 126 __reserved_g_0016_listen_cca_check_at_phy_desc : 1, 127 r2r_end_status_to_follow : 1, 128 ast_search_incomplete : 1, 129 filter_pass_monitor_ovrd : 1, 130 mac_security : 1, 131 tb___reserved_g_0005_response_required : 2, 132 __reserved_g_0012 : 2, 133 trigger_frame_received : 1, 134 su_or_uplink_mu_reception : 1, 135 phy_ppdu_id : 16; 136 uint32_t second_frame_control : 16, 137 general_frame_control : 16; 138 uint32_t rts_ta_grp_bit : 1, 139 vht_ack : 1, 140 ampdu : 1, 141 ldpc : 1, 142 stbc : 1, 143 sgi : 2, 144 rate_mcs : 4, 145 dot11ax_su_extended : 1, 146 pkt_type : 4, 147 duration : 16; 148 uint32_t reserved_3a : 1, 149 ack_ba_resp_more_data : 1, 150 second_frame_control_valid : 1, 151 ndp_frame_type : 3, 152 ndp_indication : 1, 153 response_indication : 2, 154 ctrl_resp_pwr_mgmt : 1, 155 group_id : 6, 156 sta_partial_aid : 12, 157 m_pkt : 1, 158 service_dynamic : 1, 159 ast_fail_for_dot11ax_su_ext : 1, 160 ctrl_frame_soliciting_resp : 1; 161 uint32_t service_cbw : 3, 162 agc_cbw : 3, 163 ack_id_ext : 10, 164 ack_id : 16; 165 uint32_t txop_duration_all_ones : 1, 166 response_assoc_ack_count : 7, 167 response_ack_count : 7, 168 cts_cbw : 3, 169 ht_vht_sig_cbw : 3, 170 reserved : 4, 171 response_sta_count : 7; 172 uint32_t emlsr_main_tlv_if : 1, 173 dot11ax_dl_ul_flag : 1, 174 sw_response_tlv_from_crypto : 1, 175 multi_tid : 1, 176 response_ba256_count : 7, 177 response_ba128_count : 7, 178 response_ba64_count : 7, 179 response_ba32_count : 7; 180 uint32_t reserved_7a : 2, 181 response_ba1024_count : 7, 182 response_ba512_count : 7, 183 sw_response_frame_length : 16; 184 uint32_t addr1_31_0 : 32; 185 uint32_t addr2_15_0 : 16, 186 addr1_47_32 : 16; 187 uint32_t addr2_47_16 : 32; 188 uint32_t ftm_pe_chain_csd_en : 1, 189 ftm_chain_csd_en : 1, 190 ftm_pe_content : 1, 191 ftm_pe_ltf_size : 2, 192 ftm_pe_nss : 3, 193 ftm_fields_valid : 1, 194 dot11ax_received_ext_ru_size : 4, 195 dot11ax_received_doppler_indication : 1, 196 dot11ax_received_dcm : 1, 197 dot11ax_received_coding : 1, 198 dot11ax_received_ltf_size : 2, 199 dot11ax_received_cp_size : 2, 200 dot11ax_received_spatial_reuse : 4, 201 dot11ax_received_bss_color_id : 6, 202 dot11ax_received_dl_ul_flag : 1, 203 dot11ax_received_format_indication : 1; 204 uint32_t sw_peer_id : 16, 205 dot11ax_ext_response_rate_source : 8, 206 dot11ax_response_rate_source : 8; 207 uint32_t u_sig_puncture_pattern_encoding : 6, 208 reserved_13a : 5, 209 force_extra_symbol : 1, 210 eht_duplicate_mode : 2, 211 punctured_response : 1, 212 dot11be_response : 1, 213 dot11be_puncture_bitmap : 16; 214 uint32_t reserved_after_struct16 : 4, 215 he_a_control_response_time : 12; 216 struct mlo_sta_id_details mlo_sta_id_details_rx; 217 #endif 218 }; 219 220 #define RX_RESPONSE_REQUIRED_INFO_PHY_PPDU_ID_OFFSET 0x00000000 221 #define RX_RESPONSE_REQUIRED_INFO_PHY_PPDU_ID_LSB 0 222 #define RX_RESPONSE_REQUIRED_INFO_PHY_PPDU_ID_MSB 15 223 #define RX_RESPONSE_REQUIRED_INFO_PHY_PPDU_ID_MASK 0x0000ffff 224 225 #define RX_RESPONSE_REQUIRED_INFO_SU_OR_UPLINK_MU_RECEPTION_OFFSET 0x00000000 226 #define RX_RESPONSE_REQUIRED_INFO_SU_OR_UPLINK_MU_RECEPTION_LSB 16 227 #define RX_RESPONSE_REQUIRED_INFO_SU_OR_UPLINK_MU_RECEPTION_MSB 16 228 #define RX_RESPONSE_REQUIRED_INFO_SU_OR_UPLINK_MU_RECEPTION_MASK 0x00010000 229 230 #define RX_RESPONSE_REQUIRED_INFO_TRIGGER_FRAME_RECEIVED_OFFSET 0x00000000 231 #define RX_RESPONSE_REQUIRED_INFO_TRIGGER_FRAME_RECEIVED_LSB 17 232 #define RX_RESPONSE_REQUIRED_INFO_TRIGGER_FRAME_RECEIVED_MSB 17 233 #define RX_RESPONSE_REQUIRED_INFO_TRIGGER_FRAME_RECEIVED_MASK 0x00020000 234 235 #define RX_RESPONSE_REQUIRED_INFO_TB_RANGING_RESPONSE_REQUIRED_OFFSET 0x00000000 236 #define RX_RESPONSE_REQUIRED_INFO_TB_RANGING_RESPONSE_REQUIRED_LSB 20 237 #define RX_RESPONSE_REQUIRED_INFO_TB_RANGING_RESPONSE_REQUIRED_MSB 21 238 #define RX_RESPONSE_REQUIRED_INFO_TB_RANGING_RESPONSE_REQUIRED_MASK 0x00300000 239 240 #define RX_RESPONSE_REQUIRED_INFO_MAC_SECURITY_OFFSET 0x00000000 241 #define RX_RESPONSE_REQUIRED_INFO_MAC_SECURITY_LSB 22 242 #define RX_RESPONSE_REQUIRED_INFO_MAC_SECURITY_MSB 22 243 #define RX_RESPONSE_REQUIRED_INFO_MAC_SECURITY_MASK 0x00400000 244 245 #define RX_RESPONSE_REQUIRED_INFO_FILTER_PASS_MONITOR_OVRD_OFFSET 0x00000000 246 #define RX_RESPONSE_REQUIRED_INFO_FILTER_PASS_MONITOR_OVRD_LSB 23 247 #define RX_RESPONSE_REQUIRED_INFO_FILTER_PASS_MONITOR_OVRD_MSB 23 248 #define RX_RESPONSE_REQUIRED_INFO_FILTER_PASS_MONITOR_OVRD_MASK 0x00800000 249 250 #define RX_RESPONSE_REQUIRED_INFO_AST_SEARCH_INCOMPLETE_OFFSET 0x00000000 251 #define RX_RESPONSE_REQUIRED_INFO_AST_SEARCH_INCOMPLETE_LSB 24 252 #define RX_RESPONSE_REQUIRED_INFO_AST_SEARCH_INCOMPLETE_MSB 24 253 #define RX_RESPONSE_REQUIRED_INFO_AST_SEARCH_INCOMPLETE_MASK 0x01000000 254 255 #define RX_RESPONSE_REQUIRED_INFO_R2R_END_STATUS_TO_FOLLOW_OFFSET 0x00000000 256 #define RX_RESPONSE_REQUIRED_INFO_R2R_END_STATUS_TO_FOLLOW_LSB 25 257 #define RX_RESPONSE_REQUIRED_INFO_R2R_END_STATUS_TO_FOLLOW_MSB 25 258 #define RX_RESPONSE_REQUIRED_INFO_R2R_END_STATUS_TO_FOLLOW_MASK 0x02000000 259 260 #define RX_RESPONSE_REQUIRED_INFO_THREE_OR_MORE_TYPE_SUBTYPES_OFFSET 0x00000000 261 #define RX_RESPONSE_REQUIRED_INFO_THREE_OR_MORE_TYPE_SUBTYPES_LSB 28 262 #define RX_RESPONSE_REQUIRED_INFO_THREE_OR_MORE_TYPE_SUBTYPES_MSB 28 263 #define RX_RESPONSE_REQUIRED_INFO_THREE_OR_MORE_TYPE_SUBTYPES_MASK 0x10000000 264 265 #define RX_RESPONSE_REQUIRED_INFO_WAIT_SIFS_CONFIG_VALID_OFFSET 0x00000000 266 #define RX_RESPONSE_REQUIRED_INFO_WAIT_SIFS_CONFIG_VALID_LSB 29 267 #define RX_RESPONSE_REQUIRED_INFO_WAIT_SIFS_CONFIG_VALID_MSB 29 268 #define RX_RESPONSE_REQUIRED_INFO_WAIT_SIFS_CONFIG_VALID_MASK 0x20000000 269 270 #define RX_RESPONSE_REQUIRED_INFO_WAIT_SIFS_OFFSET 0x00000000 271 #define RX_RESPONSE_REQUIRED_INFO_WAIT_SIFS_LSB 30 272 #define RX_RESPONSE_REQUIRED_INFO_WAIT_SIFS_MSB 31 273 #define RX_RESPONSE_REQUIRED_INFO_WAIT_SIFS_MASK 0xc0000000 274 275 #define RX_RESPONSE_REQUIRED_INFO_GENERAL_FRAME_CONTROL_OFFSET 0x00000004 276 #define RX_RESPONSE_REQUIRED_INFO_GENERAL_FRAME_CONTROL_LSB 0 277 #define RX_RESPONSE_REQUIRED_INFO_GENERAL_FRAME_CONTROL_MSB 15 278 #define RX_RESPONSE_REQUIRED_INFO_GENERAL_FRAME_CONTROL_MASK 0x0000ffff 279 280 #define RX_RESPONSE_REQUIRED_INFO_SECOND_FRAME_CONTROL_OFFSET 0x00000004 281 #define RX_RESPONSE_REQUIRED_INFO_SECOND_FRAME_CONTROL_LSB 16 282 #define RX_RESPONSE_REQUIRED_INFO_SECOND_FRAME_CONTROL_MSB 31 283 #define RX_RESPONSE_REQUIRED_INFO_SECOND_FRAME_CONTROL_MASK 0xffff0000 284 285 #define RX_RESPONSE_REQUIRED_INFO_DURATION_OFFSET 0x00000008 286 #define RX_RESPONSE_REQUIRED_INFO_DURATION_LSB 0 287 #define RX_RESPONSE_REQUIRED_INFO_DURATION_MSB 15 288 #define RX_RESPONSE_REQUIRED_INFO_DURATION_MASK 0x0000ffff 289 290 #define RX_RESPONSE_REQUIRED_INFO_PKT_TYPE_OFFSET 0x00000008 291 #define RX_RESPONSE_REQUIRED_INFO_PKT_TYPE_LSB 16 292 #define RX_RESPONSE_REQUIRED_INFO_PKT_TYPE_MSB 19 293 #define RX_RESPONSE_REQUIRED_INFO_PKT_TYPE_MASK 0x000f0000 294 295 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_SU_EXTENDED_OFFSET 0x00000008 296 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_SU_EXTENDED_LSB 20 297 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_SU_EXTENDED_MSB 20 298 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_SU_EXTENDED_MASK 0x00100000 299 300 #define RX_RESPONSE_REQUIRED_INFO_RATE_MCS_OFFSET 0x00000008 301 #define RX_RESPONSE_REQUIRED_INFO_RATE_MCS_LSB 21 302 #define RX_RESPONSE_REQUIRED_INFO_RATE_MCS_MSB 24 303 #define RX_RESPONSE_REQUIRED_INFO_RATE_MCS_MASK 0x01e00000 304 305 #define RX_RESPONSE_REQUIRED_INFO_SGI_OFFSET 0x00000008 306 #define RX_RESPONSE_REQUIRED_INFO_SGI_LSB 25 307 #define RX_RESPONSE_REQUIRED_INFO_SGI_MSB 26 308 #define RX_RESPONSE_REQUIRED_INFO_SGI_MASK 0x06000000 309 310 #define RX_RESPONSE_REQUIRED_INFO_STBC_OFFSET 0x00000008 311 #define RX_RESPONSE_REQUIRED_INFO_STBC_LSB 27 312 #define RX_RESPONSE_REQUIRED_INFO_STBC_MSB 27 313 #define RX_RESPONSE_REQUIRED_INFO_STBC_MASK 0x08000000 314 315 #define RX_RESPONSE_REQUIRED_INFO_LDPC_OFFSET 0x00000008 316 #define RX_RESPONSE_REQUIRED_INFO_LDPC_LSB 28 317 #define RX_RESPONSE_REQUIRED_INFO_LDPC_MSB 28 318 #define RX_RESPONSE_REQUIRED_INFO_LDPC_MASK 0x10000000 319 320 #define RX_RESPONSE_REQUIRED_INFO_AMPDU_OFFSET 0x00000008 321 #define RX_RESPONSE_REQUIRED_INFO_AMPDU_LSB 29 322 #define RX_RESPONSE_REQUIRED_INFO_AMPDU_MSB 29 323 #define RX_RESPONSE_REQUIRED_INFO_AMPDU_MASK 0x20000000 324 325 #define RX_RESPONSE_REQUIRED_INFO_VHT_ACK_OFFSET 0x00000008 326 #define RX_RESPONSE_REQUIRED_INFO_VHT_ACK_LSB 30 327 #define RX_RESPONSE_REQUIRED_INFO_VHT_ACK_MSB 30 328 #define RX_RESPONSE_REQUIRED_INFO_VHT_ACK_MASK 0x40000000 329 330 #define RX_RESPONSE_REQUIRED_INFO_RTS_TA_GRP_BIT_OFFSET 0x00000008 331 #define RX_RESPONSE_REQUIRED_INFO_RTS_TA_GRP_BIT_LSB 31 332 #define RX_RESPONSE_REQUIRED_INFO_RTS_TA_GRP_BIT_MSB 31 333 #define RX_RESPONSE_REQUIRED_INFO_RTS_TA_GRP_BIT_MASK 0x80000000 334 335 #define RX_RESPONSE_REQUIRED_INFO_CTRL_FRAME_SOLICITING_RESP_OFFSET 0x0000000c 336 #define RX_RESPONSE_REQUIRED_INFO_CTRL_FRAME_SOLICITING_RESP_LSB 0 337 #define RX_RESPONSE_REQUIRED_INFO_CTRL_FRAME_SOLICITING_RESP_MSB 0 338 #define RX_RESPONSE_REQUIRED_INFO_CTRL_FRAME_SOLICITING_RESP_MASK 0x00000001 339 340 #define RX_RESPONSE_REQUIRED_INFO_AST_FAIL_FOR_DOT11AX_SU_EXT_OFFSET 0x0000000c 341 #define RX_RESPONSE_REQUIRED_INFO_AST_FAIL_FOR_DOT11AX_SU_EXT_LSB 1 342 #define RX_RESPONSE_REQUIRED_INFO_AST_FAIL_FOR_DOT11AX_SU_EXT_MSB 1 343 #define RX_RESPONSE_REQUIRED_INFO_AST_FAIL_FOR_DOT11AX_SU_EXT_MASK 0x00000002 344 345 #define RX_RESPONSE_REQUIRED_INFO_SERVICE_DYNAMIC_OFFSET 0x0000000c 346 #define RX_RESPONSE_REQUIRED_INFO_SERVICE_DYNAMIC_LSB 2 347 #define RX_RESPONSE_REQUIRED_INFO_SERVICE_DYNAMIC_MSB 2 348 #define RX_RESPONSE_REQUIRED_INFO_SERVICE_DYNAMIC_MASK 0x00000004 349 350 #define RX_RESPONSE_REQUIRED_INFO_M_PKT_OFFSET 0x0000000c 351 #define RX_RESPONSE_REQUIRED_INFO_M_PKT_LSB 3 352 #define RX_RESPONSE_REQUIRED_INFO_M_PKT_MSB 3 353 #define RX_RESPONSE_REQUIRED_INFO_M_PKT_MASK 0x00000008 354 355 #define RX_RESPONSE_REQUIRED_INFO_STA_PARTIAL_AID_OFFSET 0x0000000c 356 #define RX_RESPONSE_REQUIRED_INFO_STA_PARTIAL_AID_LSB 4 357 #define RX_RESPONSE_REQUIRED_INFO_STA_PARTIAL_AID_MSB 15 358 #define RX_RESPONSE_REQUIRED_INFO_STA_PARTIAL_AID_MASK 0x0000fff0 359 360 #define RX_RESPONSE_REQUIRED_INFO_GROUP_ID_OFFSET 0x0000000c 361 #define RX_RESPONSE_REQUIRED_INFO_GROUP_ID_LSB 16 362 #define RX_RESPONSE_REQUIRED_INFO_GROUP_ID_MSB 21 363 #define RX_RESPONSE_REQUIRED_INFO_GROUP_ID_MASK 0x003f0000 364 365 #define RX_RESPONSE_REQUIRED_INFO_CTRL_RESP_PWR_MGMT_OFFSET 0x0000000c 366 #define RX_RESPONSE_REQUIRED_INFO_CTRL_RESP_PWR_MGMT_LSB 22 367 #define RX_RESPONSE_REQUIRED_INFO_CTRL_RESP_PWR_MGMT_MSB 22 368 #define RX_RESPONSE_REQUIRED_INFO_CTRL_RESP_PWR_MGMT_MASK 0x00400000 369 370 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_INDICATION_OFFSET 0x0000000c 371 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_INDICATION_LSB 23 372 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_INDICATION_MSB 24 373 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_INDICATION_MASK 0x01800000 374 375 #define RX_RESPONSE_REQUIRED_INFO_NDP_INDICATION_OFFSET 0x0000000c 376 #define RX_RESPONSE_REQUIRED_INFO_NDP_INDICATION_LSB 25 377 #define RX_RESPONSE_REQUIRED_INFO_NDP_INDICATION_MSB 25 378 #define RX_RESPONSE_REQUIRED_INFO_NDP_INDICATION_MASK 0x02000000 379 380 #define RX_RESPONSE_REQUIRED_INFO_NDP_FRAME_TYPE_OFFSET 0x0000000c 381 #define RX_RESPONSE_REQUIRED_INFO_NDP_FRAME_TYPE_LSB 26 382 #define RX_RESPONSE_REQUIRED_INFO_NDP_FRAME_TYPE_MSB 28 383 #define RX_RESPONSE_REQUIRED_INFO_NDP_FRAME_TYPE_MASK 0x1c000000 384 385 #define RX_RESPONSE_REQUIRED_INFO_SECOND_FRAME_CONTROL_VALID_OFFSET 0x0000000c 386 #define RX_RESPONSE_REQUIRED_INFO_SECOND_FRAME_CONTROL_VALID_LSB 29 387 #define RX_RESPONSE_REQUIRED_INFO_SECOND_FRAME_CONTROL_VALID_MSB 29 388 #define RX_RESPONSE_REQUIRED_INFO_SECOND_FRAME_CONTROL_VALID_MASK 0x20000000 389 390 #define RX_RESPONSE_REQUIRED_INFO_ACK_BA_RESP_MORE_DATA_OFFSET 0x0000000c 391 #define RX_RESPONSE_REQUIRED_INFO_ACK_BA_RESP_MORE_DATA_LSB 30 392 #define RX_RESPONSE_REQUIRED_INFO_ACK_BA_RESP_MORE_DATA_MSB 30 393 #define RX_RESPONSE_REQUIRED_INFO_ACK_BA_RESP_MORE_DATA_MASK 0x40000000 394 395 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_3A_OFFSET 0x0000000c 396 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_3A_LSB 31 397 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_3A_MSB 31 398 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_3A_MASK 0x80000000 399 400 #define RX_RESPONSE_REQUIRED_INFO_ACK_ID_OFFSET 0x00000010 401 #define RX_RESPONSE_REQUIRED_INFO_ACK_ID_LSB 0 402 #define RX_RESPONSE_REQUIRED_INFO_ACK_ID_MSB 15 403 #define RX_RESPONSE_REQUIRED_INFO_ACK_ID_MASK 0x0000ffff 404 405 #define RX_RESPONSE_REQUIRED_INFO_ACK_ID_EXT_OFFSET 0x00000010 406 #define RX_RESPONSE_REQUIRED_INFO_ACK_ID_EXT_LSB 16 407 #define RX_RESPONSE_REQUIRED_INFO_ACK_ID_EXT_MSB 25 408 #define RX_RESPONSE_REQUIRED_INFO_ACK_ID_EXT_MASK 0x03ff0000 409 410 #define RX_RESPONSE_REQUIRED_INFO_AGC_CBW_OFFSET 0x00000010 411 #define RX_RESPONSE_REQUIRED_INFO_AGC_CBW_LSB 26 412 #define RX_RESPONSE_REQUIRED_INFO_AGC_CBW_MSB 28 413 #define RX_RESPONSE_REQUIRED_INFO_AGC_CBW_MASK 0x1c000000 414 415 #define RX_RESPONSE_REQUIRED_INFO_SERVICE_CBW_OFFSET 0x00000010 416 #define RX_RESPONSE_REQUIRED_INFO_SERVICE_CBW_LSB 29 417 #define RX_RESPONSE_REQUIRED_INFO_SERVICE_CBW_MSB 31 418 #define RX_RESPONSE_REQUIRED_INFO_SERVICE_CBW_MASK 0xe0000000 419 420 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_STA_COUNT_OFFSET 0x00000014 421 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_STA_COUNT_LSB 0 422 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_STA_COUNT_MSB 6 423 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_STA_COUNT_MASK 0x0000007f 424 425 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_OFFSET 0x00000014 426 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_LSB 7 427 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_MSB 10 428 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_MASK 0x00000780 429 430 #define RX_RESPONSE_REQUIRED_INFO_HT_VHT_SIG_CBW_OFFSET 0x00000014 431 #define RX_RESPONSE_REQUIRED_INFO_HT_VHT_SIG_CBW_LSB 11 432 #define RX_RESPONSE_REQUIRED_INFO_HT_VHT_SIG_CBW_MSB 13 433 #define RX_RESPONSE_REQUIRED_INFO_HT_VHT_SIG_CBW_MASK 0x00003800 434 435 #define RX_RESPONSE_REQUIRED_INFO_CTS_CBW_OFFSET 0x00000014 436 #define RX_RESPONSE_REQUIRED_INFO_CTS_CBW_LSB 14 437 #define RX_RESPONSE_REQUIRED_INFO_CTS_CBW_MSB 16 438 #define RX_RESPONSE_REQUIRED_INFO_CTS_CBW_MASK 0x0001c000 439 440 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_ACK_COUNT_OFFSET 0x00000014 441 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_ACK_COUNT_LSB 17 442 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_ACK_COUNT_MSB 23 443 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_ACK_COUNT_MASK 0x00fe0000 444 445 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_ASSOC_ACK_COUNT_OFFSET 0x00000014 446 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_ASSOC_ACK_COUNT_LSB 24 447 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_ASSOC_ACK_COUNT_MSB 30 448 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_ASSOC_ACK_COUNT_MASK 0x7f000000 449 450 #define RX_RESPONSE_REQUIRED_INFO_TXOP_DURATION_ALL_ONES_OFFSET 0x00000014 451 #define RX_RESPONSE_REQUIRED_INFO_TXOP_DURATION_ALL_ONES_LSB 31 452 #define RX_RESPONSE_REQUIRED_INFO_TXOP_DURATION_ALL_ONES_MSB 31 453 #define RX_RESPONSE_REQUIRED_INFO_TXOP_DURATION_ALL_ONES_MASK 0x80000000 454 455 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA32_COUNT_OFFSET 0x00000018 456 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA32_COUNT_LSB 0 457 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA32_COUNT_MSB 6 458 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA32_COUNT_MASK 0x0000007f 459 460 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA64_COUNT_OFFSET 0x00000018 461 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA64_COUNT_LSB 7 462 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA64_COUNT_MSB 13 463 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA64_COUNT_MASK 0x00003f80 464 465 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA128_COUNT_OFFSET 0x00000018 466 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA128_COUNT_LSB 14 467 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA128_COUNT_MSB 20 468 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA128_COUNT_MASK 0x001fc000 469 470 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA256_COUNT_OFFSET 0x00000018 471 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA256_COUNT_LSB 21 472 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA256_COUNT_MSB 27 473 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA256_COUNT_MASK 0x0fe00000 474 475 #define RX_RESPONSE_REQUIRED_INFO_MULTI_TID_OFFSET 0x00000018 476 #define RX_RESPONSE_REQUIRED_INFO_MULTI_TID_LSB 28 477 #define RX_RESPONSE_REQUIRED_INFO_MULTI_TID_MSB 28 478 #define RX_RESPONSE_REQUIRED_INFO_MULTI_TID_MASK 0x10000000 479 480 #define RX_RESPONSE_REQUIRED_INFO_SW_RESPONSE_TLV_FROM_CRYPTO_OFFSET 0x00000018 481 #define RX_RESPONSE_REQUIRED_INFO_SW_RESPONSE_TLV_FROM_CRYPTO_LSB 29 482 #define RX_RESPONSE_REQUIRED_INFO_SW_RESPONSE_TLV_FROM_CRYPTO_MSB 29 483 #define RX_RESPONSE_REQUIRED_INFO_SW_RESPONSE_TLV_FROM_CRYPTO_MASK 0x20000000 484 485 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_DL_UL_FLAG_OFFSET 0x00000018 486 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_DL_UL_FLAG_LSB 30 487 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_DL_UL_FLAG_MSB 30 488 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_DL_UL_FLAG_MASK 0x40000000 489 490 #define RX_RESPONSE_REQUIRED_INFO_EMLSR_MAIN_TLV_IF_OFFSET 0x00000018 491 #define RX_RESPONSE_REQUIRED_INFO_EMLSR_MAIN_TLV_IF_LSB 31 492 #define RX_RESPONSE_REQUIRED_INFO_EMLSR_MAIN_TLV_IF_MSB 31 493 #define RX_RESPONSE_REQUIRED_INFO_EMLSR_MAIN_TLV_IF_MASK 0x80000000 494 495 #define RX_RESPONSE_REQUIRED_INFO_SW_RESPONSE_FRAME_LENGTH_OFFSET 0x0000001c 496 #define RX_RESPONSE_REQUIRED_INFO_SW_RESPONSE_FRAME_LENGTH_LSB 0 497 #define RX_RESPONSE_REQUIRED_INFO_SW_RESPONSE_FRAME_LENGTH_MSB 15 498 #define RX_RESPONSE_REQUIRED_INFO_SW_RESPONSE_FRAME_LENGTH_MASK 0x0000ffff 499 500 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA512_COUNT_OFFSET 0x0000001c 501 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA512_COUNT_LSB 16 502 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA512_COUNT_MSB 22 503 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA512_COUNT_MASK 0x007f0000 504 505 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA1024_COUNT_OFFSET 0x0000001c 506 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA1024_COUNT_LSB 23 507 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA1024_COUNT_MSB 29 508 #define RX_RESPONSE_REQUIRED_INFO_RESPONSE_BA1024_COUNT_MASK 0x3f800000 509 510 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_7A_OFFSET 0x0000001c 511 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_7A_LSB 30 512 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_7A_MSB 31 513 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_7A_MASK 0xc0000000 514 515 #define RX_RESPONSE_REQUIRED_INFO_ADDR1_31_0_OFFSET 0x00000020 516 #define RX_RESPONSE_REQUIRED_INFO_ADDR1_31_0_LSB 0 517 #define RX_RESPONSE_REQUIRED_INFO_ADDR1_31_0_MSB 31 518 #define RX_RESPONSE_REQUIRED_INFO_ADDR1_31_0_MASK 0xffffffff 519 520 #define RX_RESPONSE_REQUIRED_INFO_ADDR1_47_32_OFFSET 0x00000024 521 #define RX_RESPONSE_REQUIRED_INFO_ADDR1_47_32_LSB 0 522 #define RX_RESPONSE_REQUIRED_INFO_ADDR1_47_32_MSB 15 523 #define RX_RESPONSE_REQUIRED_INFO_ADDR1_47_32_MASK 0x0000ffff 524 525 #define RX_RESPONSE_REQUIRED_INFO_ADDR2_15_0_OFFSET 0x00000024 526 #define RX_RESPONSE_REQUIRED_INFO_ADDR2_15_0_LSB 16 527 #define RX_RESPONSE_REQUIRED_INFO_ADDR2_15_0_MSB 31 528 #define RX_RESPONSE_REQUIRED_INFO_ADDR2_15_0_MASK 0xffff0000 529 530 #define RX_RESPONSE_REQUIRED_INFO_ADDR2_47_16_OFFSET 0x00000028 531 #define RX_RESPONSE_REQUIRED_INFO_ADDR2_47_16_LSB 0 532 #define RX_RESPONSE_REQUIRED_INFO_ADDR2_47_16_MSB 31 533 #define RX_RESPONSE_REQUIRED_INFO_ADDR2_47_16_MASK 0xffffffff 534 535 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_FORMAT_INDICATION_OFFSET 0x0000002c 536 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_FORMAT_INDICATION_LSB 0 537 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_FORMAT_INDICATION_MSB 0 538 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_FORMAT_INDICATION_MASK 0x00000001 539 540 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_DL_UL_FLAG_OFFSET 0x0000002c 541 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_DL_UL_FLAG_LSB 1 542 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_DL_UL_FLAG_MSB 1 543 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_DL_UL_FLAG_MASK 0x00000002 544 545 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_BSS_COLOR_ID_OFFSET 0x0000002c 546 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_BSS_COLOR_ID_LSB 2 547 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_BSS_COLOR_ID_MSB 7 548 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_BSS_COLOR_ID_MASK 0x000000fc 549 550 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_SPATIAL_REUSE_OFFSET 0x0000002c 551 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_SPATIAL_REUSE_LSB 8 552 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_SPATIAL_REUSE_MSB 11 553 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_SPATIAL_REUSE_MASK 0x00000f00 554 555 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_CP_SIZE_OFFSET 0x0000002c 556 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_CP_SIZE_LSB 12 557 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_CP_SIZE_MSB 13 558 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_CP_SIZE_MASK 0x00003000 559 560 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_LTF_SIZE_OFFSET 0x0000002c 561 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_LTF_SIZE_LSB 14 562 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_LTF_SIZE_MSB 15 563 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_LTF_SIZE_MASK 0x0000c000 564 565 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_CODING_OFFSET 0x0000002c 566 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_CODING_LSB 16 567 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_CODING_MSB 16 568 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_CODING_MASK 0x00010000 569 570 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_DCM_OFFSET 0x0000002c 571 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_DCM_LSB 17 572 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_DCM_MSB 17 573 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_DCM_MASK 0x00020000 574 575 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_DOPPLER_INDICATION_OFFSET 0x0000002c 576 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_DOPPLER_INDICATION_LSB 18 577 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_DOPPLER_INDICATION_MSB 18 578 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_DOPPLER_INDICATION_MASK 0x00040000 579 580 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_EXT_RU_SIZE_OFFSET 0x0000002c 581 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_EXT_RU_SIZE_LSB 19 582 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_EXT_RU_SIZE_MSB 22 583 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RECEIVED_EXT_RU_SIZE_MASK 0x00780000 584 585 #define RX_RESPONSE_REQUIRED_INFO_FTM_FIELDS_VALID_OFFSET 0x0000002c 586 #define RX_RESPONSE_REQUIRED_INFO_FTM_FIELDS_VALID_LSB 23 587 #define RX_RESPONSE_REQUIRED_INFO_FTM_FIELDS_VALID_MSB 23 588 #define RX_RESPONSE_REQUIRED_INFO_FTM_FIELDS_VALID_MASK 0x00800000 589 590 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_NSS_OFFSET 0x0000002c 591 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_NSS_LSB 24 592 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_NSS_MSB 26 593 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_NSS_MASK 0x07000000 594 595 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_LTF_SIZE_OFFSET 0x0000002c 596 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_LTF_SIZE_LSB 27 597 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_LTF_SIZE_MSB 28 598 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_LTF_SIZE_MASK 0x18000000 599 600 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_CONTENT_OFFSET 0x0000002c 601 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_CONTENT_LSB 29 602 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_CONTENT_MSB 29 603 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_CONTENT_MASK 0x20000000 604 605 #define RX_RESPONSE_REQUIRED_INFO_FTM_CHAIN_CSD_EN_OFFSET 0x0000002c 606 #define RX_RESPONSE_REQUIRED_INFO_FTM_CHAIN_CSD_EN_LSB 30 607 #define RX_RESPONSE_REQUIRED_INFO_FTM_CHAIN_CSD_EN_MSB 30 608 #define RX_RESPONSE_REQUIRED_INFO_FTM_CHAIN_CSD_EN_MASK 0x40000000 609 610 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_CHAIN_CSD_EN_OFFSET 0x0000002c 611 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_CHAIN_CSD_EN_LSB 31 612 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_CHAIN_CSD_EN_MSB 31 613 #define RX_RESPONSE_REQUIRED_INFO_FTM_PE_CHAIN_CSD_EN_MASK 0x80000000 614 615 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RESPONSE_RATE_SOURCE_OFFSET 0x00000030 616 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RESPONSE_RATE_SOURCE_LSB 0 617 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RESPONSE_RATE_SOURCE_MSB 7 618 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_RESPONSE_RATE_SOURCE_MASK 0x000000ff 619 620 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_EXT_RESPONSE_RATE_SOURCE_OFFSET 0x00000030 621 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_EXT_RESPONSE_RATE_SOURCE_LSB 8 622 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_EXT_RESPONSE_RATE_SOURCE_MSB 15 623 #define RX_RESPONSE_REQUIRED_INFO_DOT11AX_EXT_RESPONSE_RATE_SOURCE_MASK 0x0000ff00 624 625 #define RX_RESPONSE_REQUIRED_INFO_SW_PEER_ID_OFFSET 0x00000030 626 #define RX_RESPONSE_REQUIRED_INFO_SW_PEER_ID_LSB 16 627 #define RX_RESPONSE_REQUIRED_INFO_SW_PEER_ID_MSB 31 628 #define RX_RESPONSE_REQUIRED_INFO_SW_PEER_ID_MASK 0xffff0000 629 630 #define RX_RESPONSE_REQUIRED_INFO_DOT11BE_PUNCTURE_BITMAP_OFFSET 0x00000034 631 #define RX_RESPONSE_REQUIRED_INFO_DOT11BE_PUNCTURE_BITMAP_LSB 0 632 #define RX_RESPONSE_REQUIRED_INFO_DOT11BE_PUNCTURE_BITMAP_MSB 15 633 #define RX_RESPONSE_REQUIRED_INFO_DOT11BE_PUNCTURE_BITMAP_MASK 0x0000ffff 634 635 #define RX_RESPONSE_REQUIRED_INFO_DOT11BE_RESPONSE_OFFSET 0x00000034 636 #define RX_RESPONSE_REQUIRED_INFO_DOT11BE_RESPONSE_LSB 16 637 #define RX_RESPONSE_REQUIRED_INFO_DOT11BE_RESPONSE_MSB 16 638 #define RX_RESPONSE_REQUIRED_INFO_DOT11BE_RESPONSE_MASK 0x00010000 639 640 #define RX_RESPONSE_REQUIRED_INFO_PUNCTURED_RESPONSE_OFFSET 0x00000034 641 #define RX_RESPONSE_REQUIRED_INFO_PUNCTURED_RESPONSE_LSB 17 642 #define RX_RESPONSE_REQUIRED_INFO_PUNCTURED_RESPONSE_MSB 17 643 #define RX_RESPONSE_REQUIRED_INFO_PUNCTURED_RESPONSE_MASK 0x00020000 644 645 #define RX_RESPONSE_REQUIRED_INFO_EHT_DUPLICATE_MODE_OFFSET 0x00000034 646 #define RX_RESPONSE_REQUIRED_INFO_EHT_DUPLICATE_MODE_LSB 18 647 #define RX_RESPONSE_REQUIRED_INFO_EHT_DUPLICATE_MODE_MSB 19 648 #define RX_RESPONSE_REQUIRED_INFO_EHT_DUPLICATE_MODE_MASK 0x000c0000 649 650 #define RX_RESPONSE_REQUIRED_INFO_FORCE_EXTRA_SYMBOL_OFFSET 0x00000034 651 #define RX_RESPONSE_REQUIRED_INFO_FORCE_EXTRA_SYMBOL_LSB 20 652 #define RX_RESPONSE_REQUIRED_INFO_FORCE_EXTRA_SYMBOL_MSB 20 653 #define RX_RESPONSE_REQUIRED_INFO_FORCE_EXTRA_SYMBOL_MASK 0x00100000 654 655 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_13A_OFFSET 0x00000034 656 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_13A_LSB 21 657 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_13A_MSB 25 658 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_13A_MASK 0x03e00000 659 660 #define RX_RESPONSE_REQUIRED_INFO_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x00000034 661 #define RX_RESPONSE_REQUIRED_INFO_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26 662 #define RX_RESPONSE_REQUIRED_INFO_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31 663 #define RX_RESPONSE_REQUIRED_INFO_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc000000 664 665 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x00000038 666 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0 667 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9 668 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff 669 670 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x00000038 671 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10 672 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10 673 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x00000400 674 675 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x00000038 676 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11 677 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11 678 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x00000800 679 680 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x00000038 681 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12 682 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12 683 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x00001000 684 685 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x00000038 686 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13 687 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15 688 #define RX_RESPONSE_REQUIRED_INFO_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e000 689 690 #define RX_RESPONSE_REQUIRED_INFO_HE_A_CONTROL_RESPONSE_TIME_OFFSET 0x00000038 691 #define RX_RESPONSE_REQUIRED_INFO_HE_A_CONTROL_RESPONSE_TIME_LSB 16 692 #define RX_RESPONSE_REQUIRED_INFO_HE_A_CONTROL_RESPONSE_TIME_MSB 27 693 #define RX_RESPONSE_REQUIRED_INFO_HE_A_CONTROL_RESPONSE_TIME_MASK 0x0fff0000 694 695 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_AFTER_STRUCT16_OFFSET 0x00000038 696 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_AFTER_STRUCT16_LSB 28 697 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_AFTER_STRUCT16_MSB 31 698 #define RX_RESPONSE_REQUIRED_INFO_RESERVED_AFTER_STRUCT16_MASK 0xf0000000 699 700 #endif 701