1 /* 2 * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 #ifndef _TCL_DATA_CMD_H_ 19 #define _TCL_DATA_CMD_H_ 20 21 #include "buffer_addr_info.h" 22 #define NUM_OF_DWORDS_TCL_DATA_CMD 8 23 24 struct tcl_data_cmd { 25 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 26 struct buffer_addr_info buf_addr_info; 27 uint32_t tcl_cmd_type : 1, 28 buf_or_ext_desc_type : 1, 29 bank_id : 6, 30 tx_notify_frame : 3, 31 header_length_read_sel : 1, 32 buffer_timestamp : 19, 33 buffer_timestamp_valid : 1; 34 uint32_t reserved_3a : 16, 35 tcl_cmd_number : 16; 36 uint32_t data_length : 16, 37 ipv4_checksum_en : 1, 38 udp_over_ipv4_checksum_en : 1, 39 udp_over_ipv6_checksum_en : 1, 40 tcp_over_ipv4_checksum_en : 1, 41 tcp_over_ipv6_checksum_en : 1, 42 to_fw : 1, 43 reserved_4a : 1, 44 packet_offset : 9; 45 uint32_t hlos_tid_overwrite : 1, 46 flow_override_enable : 1, 47 who_classify_info_sel : 2, 48 hlos_tid : 4, 49 flow_override : 1, 50 pmac_id : 2, 51 msdu_color : 2, 52 reserved_5a : 11, 53 vdev_id : 8; 54 uint32_t search_index : 20, 55 cache_set_num : 4, 56 index_lookup_override : 1, 57 reserved_6a : 7; 58 uint32_t reserved_7a : 20, 59 ring_id : 8, 60 looping_count : 4; 61 #else 62 struct buffer_addr_info buf_addr_info; 63 uint32_t buffer_timestamp_valid : 1, 64 buffer_timestamp : 19, 65 header_length_read_sel : 1, 66 tx_notify_frame : 3, 67 bank_id : 6, 68 buf_or_ext_desc_type : 1, 69 tcl_cmd_type : 1; 70 uint32_t tcl_cmd_number : 16, 71 reserved_3a : 16; 72 uint32_t packet_offset : 9, 73 reserved_4a : 1, 74 to_fw : 1, 75 tcp_over_ipv6_checksum_en : 1, 76 tcp_over_ipv4_checksum_en : 1, 77 udp_over_ipv6_checksum_en : 1, 78 udp_over_ipv4_checksum_en : 1, 79 ipv4_checksum_en : 1, 80 data_length : 16; 81 uint32_t vdev_id : 8, 82 reserved_5a : 11, 83 msdu_color : 2, 84 pmac_id : 2, 85 flow_override : 1, 86 hlos_tid : 4, 87 who_classify_info_sel : 2, 88 flow_override_enable : 1, 89 hlos_tid_overwrite : 1; 90 uint32_t reserved_6a : 7, 91 index_lookup_override : 1, 92 cache_set_num : 4, 93 search_index : 20; 94 uint32_t looping_count : 4, 95 ring_id : 8, 96 reserved_7a : 20; 97 #endif 98 }; 99 100 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000 101 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0 102 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_31_0_MSB 31 103 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff 104 105 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004 106 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0 107 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_39_32_MSB 7 108 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff 109 110 #define TCL_DATA_CMD_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004 111 #define TCL_DATA_CMD_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8 112 #define TCL_DATA_CMD_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB 11 113 #define TCL_DATA_CMD_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000f00 114 115 #define TCL_DATA_CMD_BUF_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004 116 #define TCL_DATA_CMD_BUF_ADDR_INFO_SW_BUFFER_COOKIE_LSB 12 117 #define TCL_DATA_CMD_BUF_ADDR_INFO_SW_BUFFER_COOKIE_MSB 31 118 #define TCL_DATA_CMD_BUF_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff000 119 120 #define TCL_DATA_CMD_TCL_CMD_TYPE_OFFSET 0x00000008 121 #define TCL_DATA_CMD_TCL_CMD_TYPE_LSB 0 122 #define TCL_DATA_CMD_TCL_CMD_TYPE_MSB 0 123 #define TCL_DATA_CMD_TCL_CMD_TYPE_MASK 0x00000001 124 125 #define TCL_DATA_CMD_BUF_OR_EXT_DESC_TYPE_OFFSET 0x00000008 126 #define TCL_DATA_CMD_BUF_OR_EXT_DESC_TYPE_LSB 1 127 #define TCL_DATA_CMD_BUF_OR_EXT_DESC_TYPE_MSB 1 128 #define TCL_DATA_CMD_BUF_OR_EXT_DESC_TYPE_MASK 0x00000002 129 130 #define TCL_DATA_CMD_BANK_ID_OFFSET 0x00000008 131 #define TCL_DATA_CMD_BANK_ID_LSB 2 132 #define TCL_DATA_CMD_BANK_ID_MSB 7 133 #define TCL_DATA_CMD_BANK_ID_MASK 0x000000fc 134 135 #define TCL_DATA_CMD_TX_NOTIFY_FRAME_OFFSET 0x00000008 136 #define TCL_DATA_CMD_TX_NOTIFY_FRAME_LSB 8 137 #define TCL_DATA_CMD_TX_NOTIFY_FRAME_MSB 10 138 #define TCL_DATA_CMD_TX_NOTIFY_FRAME_MASK 0x00000700 139 140 #define TCL_DATA_CMD_HEADER_LENGTH_READ_SEL_OFFSET 0x00000008 141 #define TCL_DATA_CMD_HEADER_LENGTH_READ_SEL_LSB 11 142 #define TCL_DATA_CMD_HEADER_LENGTH_READ_SEL_MSB 11 143 #define TCL_DATA_CMD_HEADER_LENGTH_READ_SEL_MASK 0x00000800 144 145 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_OFFSET 0x00000008 146 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_LSB 12 147 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_MSB 30 148 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_MASK 0x7ffff000 149 150 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_VALID_OFFSET 0x00000008 151 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_VALID_LSB 31 152 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_VALID_MSB 31 153 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_VALID_MASK 0x80000000 154 155 #define TCL_DATA_CMD_RESERVED_3A_OFFSET 0x0000000c 156 #define TCL_DATA_CMD_RESERVED_3A_LSB 0 157 #define TCL_DATA_CMD_RESERVED_3A_MSB 15 158 #define TCL_DATA_CMD_RESERVED_3A_MASK 0x0000ffff 159 160 #define TCL_DATA_CMD_TCL_CMD_NUMBER_OFFSET 0x0000000c 161 #define TCL_DATA_CMD_TCL_CMD_NUMBER_LSB 16 162 #define TCL_DATA_CMD_TCL_CMD_NUMBER_MSB 31 163 #define TCL_DATA_CMD_TCL_CMD_NUMBER_MASK 0xffff0000 164 165 #define TCL_DATA_CMD_DATA_LENGTH_OFFSET 0x00000010 166 #define TCL_DATA_CMD_DATA_LENGTH_LSB 0 167 #define TCL_DATA_CMD_DATA_LENGTH_MSB 15 168 #define TCL_DATA_CMD_DATA_LENGTH_MASK 0x0000ffff 169 170 #define TCL_DATA_CMD_IPV4_CHECKSUM_EN_OFFSET 0x00000010 171 #define TCL_DATA_CMD_IPV4_CHECKSUM_EN_LSB 16 172 #define TCL_DATA_CMD_IPV4_CHECKSUM_EN_MSB 16 173 #define TCL_DATA_CMD_IPV4_CHECKSUM_EN_MASK 0x00010000 174 175 #define TCL_DATA_CMD_UDP_OVER_IPV4_CHECKSUM_EN_OFFSET 0x00000010 176 #define TCL_DATA_CMD_UDP_OVER_IPV4_CHECKSUM_EN_LSB 17 177 #define TCL_DATA_CMD_UDP_OVER_IPV4_CHECKSUM_EN_MSB 17 178 #define TCL_DATA_CMD_UDP_OVER_IPV4_CHECKSUM_EN_MASK 0x00020000 179 180 #define TCL_DATA_CMD_UDP_OVER_IPV6_CHECKSUM_EN_OFFSET 0x00000010 181 #define TCL_DATA_CMD_UDP_OVER_IPV6_CHECKSUM_EN_LSB 18 182 #define TCL_DATA_CMD_UDP_OVER_IPV6_CHECKSUM_EN_MSB 18 183 #define TCL_DATA_CMD_UDP_OVER_IPV6_CHECKSUM_EN_MASK 0x00040000 184 185 #define TCL_DATA_CMD_TCP_OVER_IPV4_CHECKSUM_EN_OFFSET 0x00000010 186 #define TCL_DATA_CMD_TCP_OVER_IPV4_CHECKSUM_EN_LSB 19 187 #define TCL_DATA_CMD_TCP_OVER_IPV4_CHECKSUM_EN_MSB 19 188 #define TCL_DATA_CMD_TCP_OVER_IPV4_CHECKSUM_EN_MASK 0x00080000 189 190 #define TCL_DATA_CMD_TCP_OVER_IPV6_CHECKSUM_EN_OFFSET 0x00000010 191 #define TCL_DATA_CMD_TCP_OVER_IPV6_CHECKSUM_EN_LSB 20 192 #define TCL_DATA_CMD_TCP_OVER_IPV6_CHECKSUM_EN_MSB 20 193 #define TCL_DATA_CMD_TCP_OVER_IPV6_CHECKSUM_EN_MASK 0x00100000 194 195 #define TCL_DATA_CMD_TO_FW_OFFSET 0x00000010 196 #define TCL_DATA_CMD_TO_FW_LSB 21 197 #define TCL_DATA_CMD_TO_FW_MSB 21 198 #define TCL_DATA_CMD_TO_FW_MASK 0x00200000 199 200 #define TCL_DATA_CMD_RESERVED_4A_OFFSET 0x00000010 201 #define TCL_DATA_CMD_RESERVED_4A_LSB 22 202 #define TCL_DATA_CMD_RESERVED_4A_MSB 22 203 #define TCL_DATA_CMD_RESERVED_4A_MASK 0x00400000 204 205 #define TCL_DATA_CMD_PACKET_OFFSET_OFFSET 0x00000010 206 #define TCL_DATA_CMD_PACKET_OFFSET_LSB 23 207 #define TCL_DATA_CMD_PACKET_OFFSET_MSB 31 208 #define TCL_DATA_CMD_PACKET_OFFSET_MASK 0xff800000 209 210 #define TCL_DATA_CMD_HLOS_TID_OVERWRITE_OFFSET 0x00000014 211 #define TCL_DATA_CMD_HLOS_TID_OVERWRITE_LSB 0 212 #define TCL_DATA_CMD_HLOS_TID_OVERWRITE_MSB 0 213 #define TCL_DATA_CMD_HLOS_TID_OVERWRITE_MASK 0x00000001 214 215 #define TCL_DATA_CMD_FLOW_OVERRIDE_ENABLE_OFFSET 0x00000014 216 #define TCL_DATA_CMD_FLOW_OVERRIDE_ENABLE_LSB 1 217 #define TCL_DATA_CMD_FLOW_OVERRIDE_ENABLE_MSB 1 218 #define TCL_DATA_CMD_FLOW_OVERRIDE_ENABLE_MASK 0x00000002 219 220 #define TCL_DATA_CMD_WHO_CLASSIFY_INFO_SEL_OFFSET 0x00000014 221 #define TCL_DATA_CMD_WHO_CLASSIFY_INFO_SEL_LSB 2 222 #define TCL_DATA_CMD_WHO_CLASSIFY_INFO_SEL_MSB 3 223 #define TCL_DATA_CMD_WHO_CLASSIFY_INFO_SEL_MASK 0x0000000c 224 225 #define TCL_DATA_CMD_HLOS_TID_OFFSET 0x00000014 226 #define TCL_DATA_CMD_HLOS_TID_LSB 4 227 #define TCL_DATA_CMD_HLOS_TID_MSB 7 228 #define TCL_DATA_CMD_HLOS_TID_MASK 0x000000f0 229 230 #define TCL_DATA_CMD_FLOW_OVERRIDE_OFFSET 0x00000014 231 #define TCL_DATA_CMD_FLOW_OVERRIDE_LSB 8 232 #define TCL_DATA_CMD_FLOW_OVERRIDE_MSB 8 233 #define TCL_DATA_CMD_FLOW_OVERRIDE_MASK 0x00000100 234 235 #define TCL_DATA_CMD_PMAC_ID_OFFSET 0x00000014 236 #define TCL_DATA_CMD_PMAC_ID_LSB 9 237 #define TCL_DATA_CMD_PMAC_ID_MSB 10 238 #define TCL_DATA_CMD_PMAC_ID_MASK 0x00000600 239 240 #define TCL_DATA_CMD_MSDU_COLOR_OFFSET 0x00000014 241 #define TCL_DATA_CMD_MSDU_COLOR_LSB 11 242 #define TCL_DATA_CMD_MSDU_COLOR_MSB 12 243 #define TCL_DATA_CMD_MSDU_COLOR_MASK 0x00001800 244 245 #define TCL_DATA_CMD_RESERVED_5A_OFFSET 0x00000014 246 #define TCL_DATA_CMD_RESERVED_5A_LSB 13 247 #define TCL_DATA_CMD_RESERVED_5A_MSB 23 248 #define TCL_DATA_CMD_RESERVED_5A_MASK 0x00ffe000 249 250 #define TCL_DATA_CMD_VDEV_ID_OFFSET 0x00000014 251 #define TCL_DATA_CMD_VDEV_ID_LSB 24 252 #define TCL_DATA_CMD_VDEV_ID_MSB 31 253 #define TCL_DATA_CMD_VDEV_ID_MASK 0xff000000 254 255 #define TCL_DATA_CMD_SEARCH_INDEX_OFFSET 0x00000018 256 #define TCL_DATA_CMD_SEARCH_INDEX_LSB 0 257 #define TCL_DATA_CMD_SEARCH_INDEX_MSB 19 258 #define TCL_DATA_CMD_SEARCH_INDEX_MASK 0x000fffff 259 260 #define TCL_DATA_CMD_CACHE_SET_NUM_OFFSET 0x00000018 261 #define TCL_DATA_CMD_CACHE_SET_NUM_LSB 20 262 #define TCL_DATA_CMD_CACHE_SET_NUM_MSB 23 263 #define TCL_DATA_CMD_CACHE_SET_NUM_MASK 0x00f00000 264 265 #define TCL_DATA_CMD_INDEX_LOOKUP_OVERRIDE_OFFSET 0x00000018 266 #define TCL_DATA_CMD_INDEX_LOOKUP_OVERRIDE_LSB 24 267 #define TCL_DATA_CMD_INDEX_LOOKUP_OVERRIDE_MSB 24 268 #define TCL_DATA_CMD_INDEX_LOOKUP_OVERRIDE_MASK 0x01000000 269 270 #define TCL_DATA_CMD_RESERVED_6A_OFFSET 0x00000018 271 #define TCL_DATA_CMD_RESERVED_6A_LSB 25 272 #define TCL_DATA_CMD_RESERVED_6A_MSB 31 273 #define TCL_DATA_CMD_RESERVED_6A_MASK 0xfe000000 274 275 #define TCL_DATA_CMD_RESERVED_7A_OFFSET 0x0000001c 276 #define TCL_DATA_CMD_RESERVED_7A_LSB 0 277 #define TCL_DATA_CMD_RESERVED_7A_MSB 19 278 #define TCL_DATA_CMD_RESERVED_7A_MASK 0x000fffff 279 280 #define TCL_DATA_CMD_RING_ID_OFFSET 0x0000001c 281 #define TCL_DATA_CMD_RING_ID_LSB 20 282 #define TCL_DATA_CMD_RING_ID_MSB 27 283 #define TCL_DATA_CMD_RING_ID_MASK 0x0ff00000 284 285 #define TCL_DATA_CMD_LOOPING_COUNT_OFFSET 0x0000001c 286 #define TCL_DATA_CMD_LOOPING_COUNT_LSB 28 287 #define TCL_DATA_CMD_LOOPING_COUNT_MSB 31 288 #define TCL_DATA_CMD_LOOPING_COUNT_MASK 0xf0000000 289 290 #endif 291