1 /* 2 * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 #ifndef _TX_FES_STATUS_1K_BA_H_ 19 #define _TX_FES_STATUS_1K_BA_H_ 20 21 #define NUM_OF_DWORDS_TX_FES_STATUS_1K_BA 34 22 23 struct tx_fes_status_1k_ba { 24 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 25 uint32_t ack_ba_status_type : 1, 26 ba_type : 1, 27 ba_tid : 4, 28 unexpected_ack_or_ba : 1, 29 response_timeout : 1, 30 ack_frame_rssi : 8, 31 ssn : 12, 32 reserved_0b : 4; 33 uint32_t sw_peer_id : 16, 34 reserved_1a : 16; 35 uint32_t ba_bitmap_31_0 : 32; 36 uint32_t ba_bitmap_63_32 : 32; 37 uint32_t ba_bitmap_95_64 : 32; 38 uint32_t ba_bitmap_127_96 : 32; 39 uint32_t ba_bitmap_159_128 : 32; 40 uint32_t ba_bitmap_191_160 : 32; 41 uint32_t ba_bitmap_223_192 : 32; 42 uint32_t ba_bitmap_255_224 : 32; 43 uint32_t ba_bitmap_287_256 : 32; 44 uint32_t ba_bitmap_319_288 : 32; 45 uint32_t ba_bitmap_351_320 : 32; 46 uint32_t ba_bitmap_383_352 : 32; 47 uint32_t ba_bitmap_415_384 : 32; 48 uint32_t ba_bitmap_447_416 : 32; 49 uint32_t ba_bitmap_479_448 : 32; 50 uint32_t ba_bitmap_511_480 : 32; 51 uint32_t ba_bitmap_543_512 : 32; 52 uint32_t ba_bitmap_575_544 : 32; 53 uint32_t ba_bitmap_607_576 : 32; 54 uint32_t ba_bitmap_639_608 : 32; 55 uint32_t ba_bitmap_671_640 : 32; 56 uint32_t ba_bitmap_703_672 : 32; 57 uint32_t ba_bitmap_735_704 : 32; 58 uint32_t ba_bitmap_767_736 : 32; 59 uint32_t ba_bitmap_799_768 : 32; 60 uint32_t ba_bitmap_831_800 : 32; 61 uint32_t ba_bitmap_863_832 : 32; 62 uint32_t ba_bitmap_895_864 : 32; 63 uint32_t ba_bitmap_927_896 : 32; 64 uint32_t ba_bitmap_959_928 : 32; 65 uint32_t ba_bitmap_991_960 : 32; 66 uint32_t ba_bitmap_1023_992 : 32; 67 #else 68 uint32_t reserved_0b : 4, 69 ssn : 12, 70 ack_frame_rssi : 8, 71 response_timeout : 1, 72 unexpected_ack_or_ba : 1, 73 ba_tid : 4, 74 ba_type : 1, 75 ack_ba_status_type : 1; 76 uint32_t reserved_1a : 16, 77 sw_peer_id : 16; 78 uint32_t ba_bitmap_31_0 : 32; 79 uint32_t ba_bitmap_63_32 : 32; 80 uint32_t ba_bitmap_95_64 : 32; 81 uint32_t ba_bitmap_127_96 : 32; 82 uint32_t ba_bitmap_159_128 : 32; 83 uint32_t ba_bitmap_191_160 : 32; 84 uint32_t ba_bitmap_223_192 : 32; 85 uint32_t ba_bitmap_255_224 : 32; 86 uint32_t ba_bitmap_287_256 : 32; 87 uint32_t ba_bitmap_319_288 : 32; 88 uint32_t ba_bitmap_351_320 : 32; 89 uint32_t ba_bitmap_383_352 : 32; 90 uint32_t ba_bitmap_415_384 : 32; 91 uint32_t ba_bitmap_447_416 : 32; 92 uint32_t ba_bitmap_479_448 : 32; 93 uint32_t ba_bitmap_511_480 : 32; 94 uint32_t ba_bitmap_543_512 : 32; 95 uint32_t ba_bitmap_575_544 : 32; 96 uint32_t ba_bitmap_607_576 : 32; 97 uint32_t ba_bitmap_639_608 : 32; 98 uint32_t ba_bitmap_671_640 : 32; 99 uint32_t ba_bitmap_703_672 : 32; 100 uint32_t ba_bitmap_735_704 : 32; 101 uint32_t ba_bitmap_767_736 : 32; 102 uint32_t ba_bitmap_799_768 : 32; 103 uint32_t ba_bitmap_831_800 : 32; 104 uint32_t ba_bitmap_863_832 : 32; 105 uint32_t ba_bitmap_895_864 : 32; 106 uint32_t ba_bitmap_927_896 : 32; 107 uint32_t ba_bitmap_959_928 : 32; 108 uint32_t ba_bitmap_991_960 : 32; 109 uint32_t ba_bitmap_1023_992 : 32; 110 #endif 111 }; 112 113 #define TX_FES_STATUS_1K_BA_ACK_BA_STATUS_TYPE_OFFSET 0x00000000 114 #define TX_FES_STATUS_1K_BA_ACK_BA_STATUS_TYPE_LSB 0 115 #define TX_FES_STATUS_1K_BA_ACK_BA_STATUS_TYPE_MSB 0 116 #define TX_FES_STATUS_1K_BA_ACK_BA_STATUS_TYPE_MASK 0x00000001 117 118 #define TX_FES_STATUS_1K_BA_BA_TYPE_OFFSET 0x00000000 119 #define TX_FES_STATUS_1K_BA_BA_TYPE_LSB 1 120 #define TX_FES_STATUS_1K_BA_BA_TYPE_MSB 1 121 #define TX_FES_STATUS_1K_BA_BA_TYPE_MASK 0x00000002 122 123 #define TX_FES_STATUS_1K_BA_BA_TID_OFFSET 0x00000000 124 #define TX_FES_STATUS_1K_BA_BA_TID_LSB 2 125 #define TX_FES_STATUS_1K_BA_BA_TID_MSB 5 126 #define TX_FES_STATUS_1K_BA_BA_TID_MASK 0x0000003c 127 128 #define TX_FES_STATUS_1K_BA_UNEXPECTED_ACK_OR_BA_OFFSET 0x00000000 129 #define TX_FES_STATUS_1K_BA_UNEXPECTED_ACK_OR_BA_LSB 6 130 #define TX_FES_STATUS_1K_BA_UNEXPECTED_ACK_OR_BA_MSB 6 131 #define TX_FES_STATUS_1K_BA_UNEXPECTED_ACK_OR_BA_MASK 0x00000040 132 133 #define TX_FES_STATUS_1K_BA_RESPONSE_TIMEOUT_OFFSET 0x00000000 134 #define TX_FES_STATUS_1K_BA_RESPONSE_TIMEOUT_LSB 7 135 #define TX_FES_STATUS_1K_BA_RESPONSE_TIMEOUT_MSB 7 136 #define TX_FES_STATUS_1K_BA_RESPONSE_TIMEOUT_MASK 0x00000080 137 138 #define TX_FES_STATUS_1K_BA_ACK_FRAME_RSSI_OFFSET 0x00000000 139 #define TX_FES_STATUS_1K_BA_ACK_FRAME_RSSI_LSB 8 140 #define TX_FES_STATUS_1K_BA_ACK_FRAME_RSSI_MSB 15 141 #define TX_FES_STATUS_1K_BA_ACK_FRAME_RSSI_MASK 0x0000ff00 142 143 #define TX_FES_STATUS_1K_BA_SSN_OFFSET 0x00000000 144 #define TX_FES_STATUS_1K_BA_SSN_LSB 16 145 #define TX_FES_STATUS_1K_BA_SSN_MSB 27 146 #define TX_FES_STATUS_1K_BA_SSN_MASK 0x0fff0000 147 148 #define TX_FES_STATUS_1K_BA_RESERVED_0B_OFFSET 0x00000000 149 #define TX_FES_STATUS_1K_BA_RESERVED_0B_LSB 28 150 #define TX_FES_STATUS_1K_BA_RESERVED_0B_MSB 31 151 #define TX_FES_STATUS_1K_BA_RESERVED_0B_MASK 0xf0000000 152 153 #define TX_FES_STATUS_1K_BA_SW_PEER_ID_OFFSET 0x00000004 154 #define TX_FES_STATUS_1K_BA_SW_PEER_ID_LSB 0 155 #define TX_FES_STATUS_1K_BA_SW_PEER_ID_MSB 15 156 #define TX_FES_STATUS_1K_BA_SW_PEER_ID_MASK 0x0000ffff 157 158 #define TX_FES_STATUS_1K_BA_RESERVED_1A_OFFSET 0x00000004 159 #define TX_FES_STATUS_1K_BA_RESERVED_1A_LSB 16 160 #define TX_FES_STATUS_1K_BA_RESERVED_1A_MSB 31 161 #define TX_FES_STATUS_1K_BA_RESERVED_1A_MASK 0xffff0000 162 163 #define TX_FES_STATUS_1K_BA_BA_BITMAP_31_0_OFFSET 0x00000008 164 #define TX_FES_STATUS_1K_BA_BA_BITMAP_31_0_LSB 0 165 #define TX_FES_STATUS_1K_BA_BA_BITMAP_31_0_MSB 31 166 #define TX_FES_STATUS_1K_BA_BA_BITMAP_31_0_MASK 0xffffffff 167 168 #define TX_FES_STATUS_1K_BA_BA_BITMAP_63_32_OFFSET 0x0000000c 169 #define TX_FES_STATUS_1K_BA_BA_BITMAP_63_32_LSB 0 170 #define TX_FES_STATUS_1K_BA_BA_BITMAP_63_32_MSB 31 171 #define TX_FES_STATUS_1K_BA_BA_BITMAP_63_32_MASK 0xffffffff 172 173 #define TX_FES_STATUS_1K_BA_BA_BITMAP_95_64_OFFSET 0x00000010 174 #define TX_FES_STATUS_1K_BA_BA_BITMAP_95_64_LSB 0 175 #define TX_FES_STATUS_1K_BA_BA_BITMAP_95_64_MSB 31 176 #define TX_FES_STATUS_1K_BA_BA_BITMAP_95_64_MASK 0xffffffff 177 178 #define TX_FES_STATUS_1K_BA_BA_BITMAP_127_96_OFFSET 0x00000014 179 #define TX_FES_STATUS_1K_BA_BA_BITMAP_127_96_LSB 0 180 #define TX_FES_STATUS_1K_BA_BA_BITMAP_127_96_MSB 31 181 #define TX_FES_STATUS_1K_BA_BA_BITMAP_127_96_MASK 0xffffffff 182 183 #define TX_FES_STATUS_1K_BA_BA_BITMAP_159_128_OFFSET 0x00000018 184 #define TX_FES_STATUS_1K_BA_BA_BITMAP_159_128_LSB 0 185 #define TX_FES_STATUS_1K_BA_BA_BITMAP_159_128_MSB 31 186 #define TX_FES_STATUS_1K_BA_BA_BITMAP_159_128_MASK 0xffffffff 187 188 #define TX_FES_STATUS_1K_BA_BA_BITMAP_191_160_OFFSET 0x0000001c 189 #define TX_FES_STATUS_1K_BA_BA_BITMAP_191_160_LSB 0 190 #define TX_FES_STATUS_1K_BA_BA_BITMAP_191_160_MSB 31 191 #define TX_FES_STATUS_1K_BA_BA_BITMAP_191_160_MASK 0xffffffff 192 193 #define TX_FES_STATUS_1K_BA_BA_BITMAP_223_192_OFFSET 0x00000020 194 #define TX_FES_STATUS_1K_BA_BA_BITMAP_223_192_LSB 0 195 #define TX_FES_STATUS_1K_BA_BA_BITMAP_223_192_MSB 31 196 #define TX_FES_STATUS_1K_BA_BA_BITMAP_223_192_MASK 0xffffffff 197 198 #define TX_FES_STATUS_1K_BA_BA_BITMAP_255_224_OFFSET 0x00000024 199 #define TX_FES_STATUS_1K_BA_BA_BITMAP_255_224_LSB 0 200 #define TX_FES_STATUS_1K_BA_BA_BITMAP_255_224_MSB 31 201 #define TX_FES_STATUS_1K_BA_BA_BITMAP_255_224_MASK 0xffffffff 202 203 #define TX_FES_STATUS_1K_BA_BA_BITMAP_287_256_OFFSET 0x00000028 204 #define TX_FES_STATUS_1K_BA_BA_BITMAP_287_256_LSB 0 205 #define TX_FES_STATUS_1K_BA_BA_BITMAP_287_256_MSB 31 206 #define TX_FES_STATUS_1K_BA_BA_BITMAP_287_256_MASK 0xffffffff 207 208 #define TX_FES_STATUS_1K_BA_BA_BITMAP_319_288_OFFSET 0x0000002c 209 #define TX_FES_STATUS_1K_BA_BA_BITMAP_319_288_LSB 0 210 #define TX_FES_STATUS_1K_BA_BA_BITMAP_319_288_MSB 31 211 #define TX_FES_STATUS_1K_BA_BA_BITMAP_319_288_MASK 0xffffffff 212 213 #define TX_FES_STATUS_1K_BA_BA_BITMAP_351_320_OFFSET 0x00000030 214 #define TX_FES_STATUS_1K_BA_BA_BITMAP_351_320_LSB 0 215 #define TX_FES_STATUS_1K_BA_BA_BITMAP_351_320_MSB 31 216 #define TX_FES_STATUS_1K_BA_BA_BITMAP_351_320_MASK 0xffffffff 217 218 #define TX_FES_STATUS_1K_BA_BA_BITMAP_383_352_OFFSET 0x00000034 219 #define TX_FES_STATUS_1K_BA_BA_BITMAP_383_352_LSB 0 220 #define TX_FES_STATUS_1K_BA_BA_BITMAP_383_352_MSB 31 221 #define TX_FES_STATUS_1K_BA_BA_BITMAP_383_352_MASK 0xffffffff 222 223 #define TX_FES_STATUS_1K_BA_BA_BITMAP_415_384_OFFSET 0x00000038 224 #define TX_FES_STATUS_1K_BA_BA_BITMAP_415_384_LSB 0 225 #define TX_FES_STATUS_1K_BA_BA_BITMAP_415_384_MSB 31 226 #define TX_FES_STATUS_1K_BA_BA_BITMAP_415_384_MASK 0xffffffff 227 228 #define TX_FES_STATUS_1K_BA_BA_BITMAP_447_416_OFFSET 0x0000003c 229 #define TX_FES_STATUS_1K_BA_BA_BITMAP_447_416_LSB 0 230 #define TX_FES_STATUS_1K_BA_BA_BITMAP_447_416_MSB 31 231 #define TX_FES_STATUS_1K_BA_BA_BITMAP_447_416_MASK 0xffffffff 232 233 #define TX_FES_STATUS_1K_BA_BA_BITMAP_479_448_OFFSET 0x00000040 234 #define TX_FES_STATUS_1K_BA_BA_BITMAP_479_448_LSB 0 235 #define TX_FES_STATUS_1K_BA_BA_BITMAP_479_448_MSB 31 236 #define TX_FES_STATUS_1K_BA_BA_BITMAP_479_448_MASK 0xffffffff 237 238 #define TX_FES_STATUS_1K_BA_BA_BITMAP_511_480_OFFSET 0x00000044 239 #define TX_FES_STATUS_1K_BA_BA_BITMAP_511_480_LSB 0 240 #define TX_FES_STATUS_1K_BA_BA_BITMAP_511_480_MSB 31 241 #define TX_FES_STATUS_1K_BA_BA_BITMAP_511_480_MASK 0xffffffff 242 243 #define TX_FES_STATUS_1K_BA_BA_BITMAP_543_512_OFFSET 0x00000048 244 #define TX_FES_STATUS_1K_BA_BA_BITMAP_543_512_LSB 0 245 #define TX_FES_STATUS_1K_BA_BA_BITMAP_543_512_MSB 31 246 #define TX_FES_STATUS_1K_BA_BA_BITMAP_543_512_MASK 0xffffffff 247 248 #define TX_FES_STATUS_1K_BA_BA_BITMAP_575_544_OFFSET 0x0000004c 249 #define TX_FES_STATUS_1K_BA_BA_BITMAP_575_544_LSB 0 250 #define TX_FES_STATUS_1K_BA_BA_BITMAP_575_544_MSB 31 251 #define TX_FES_STATUS_1K_BA_BA_BITMAP_575_544_MASK 0xffffffff 252 253 #define TX_FES_STATUS_1K_BA_BA_BITMAP_607_576_OFFSET 0x00000050 254 #define TX_FES_STATUS_1K_BA_BA_BITMAP_607_576_LSB 0 255 #define TX_FES_STATUS_1K_BA_BA_BITMAP_607_576_MSB 31 256 #define TX_FES_STATUS_1K_BA_BA_BITMAP_607_576_MASK 0xffffffff 257 258 #define TX_FES_STATUS_1K_BA_BA_BITMAP_639_608_OFFSET 0x00000054 259 #define TX_FES_STATUS_1K_BA_BA_BITMAP_639_608_LSB 0 260 #define TX_FES_STATUS_1K_BA_BA_BITMAP_639_608_MSB 31 261 #define TX_FES_STATUS_1K_BA_BA_BITMAP_639_608_MASK 0xffffffff 262 263 #define TX_FES_STATUS_1K_BA_BA_BITMAP_671_640_OFFSET 0x00000058 264 #define TX_FES_STATUS_1K_BA_BA_BITMAP_671_640_LSB 0 265 #define TX_FES_STATUS_1K_BA_BA_BITMAP_671_640_MSB 31 266 #define TX_FES_STATUS_1K_BA_BA_BITMAP_671_640_MASK 0xffffffff 267 268 #define TX_FES_STATUS_1K_BA_BA_BITMAP_703_672_OFFSET 0x0000005c 269 #define TX_FES_STATUS_1K_BA_BA_BITMAP_703_672_LSB 0 270 #define TX_FES_STATUS_1K_BA_BA_BITMAP_703_672_MSB 31 271 #define TX_FES_STATUS_1K_BA_BA_BITMAP_703_672_MASK 0xffffffff 272 273 #define TX_FES_STATUS_1K_BA_BA_BITMAP_735_704_OFFSET 0x00000060 274 #define TX_FES_STATUS_1K_BA_BA_BITMAP_735_704_LSB 0 275 #define TX_FES_STATUS_1K_BA_BA_BITMAP_735_704_MSB 31 276 #define TX_FES_STATUS_1K_BA_BA_BITMAP_735_704_MASK 0xffffffff 277 278 #define TX_FES_STATUS_1K_BA_BA_BITMAP_767_736_OFFSET 0x00000064 279 #define TX_FES_STATUS_1K_BA_BA_BITMAP_767_736_LSB 0 280 #define TX_FES_STATUS_1K_BA_BA_BITMAP_767_736_MSB 31 281 #define TX_FES_STATUS_1K_BA_BA_BITMAP_767_736_MASK 0xffffffff 282 283 #define TX_FES_STATUS_1K_BA_BA_BITMAP_799_768_OFFSET 0x00000068 284 #define TX_FES_STATUS_1K_BA_BA_BITMAP_799_768_LSB 0 285 #define TX_FES_STATUS_1K_BA_BA_BITMAP_799_768_MSB 31 286 #define TX_FES_STATUS_1K_BA_BA_BITMAP_799_768_MASK 0xffffffff 287 288 #define TX_FES_STATUS_1K_BA_BA_BITMAP_831_800_OFFSET 0x0000006c 289 #define TX_FES_STATUS_1K_BA_BA_BITMAP_831_800_LSB 0 290 #define TX_FES_STATUS_1K_BA_BA_BITMAP_831_800_MSB 31 291 #define TX_FES_STATUS_1K_BA_BA_BITMAP_831_800_MASK 0xffffffff 292 293 #define TX_FES_STATUS_1K_BA_BA_BITMAP_863_832_OFFSET 0x00000070 294 #define TX_FES_STATUS_1K_BA_BA_BITMAP_863_832_LSB 0 295 #define TX_FES_STATUS_1K_BA_BA_BITMAP_863_832_MSB 31 296 #define TX_FES_STATUS_1K_BA_BA_BITMAP_863_832_MASK 0xffffffff 297 298 #define TX_FES_STATUS_1K_BA_BA_BITMAP_895_864_OFFSET 0x00000074 299 #define TX_FES_STATUS_1K_BA_BA_BITMAP_895_864_LSB 0 300 #define TX_FES_STATUS_1K_BA_BA_BITMAP_895_864_MSB 31 301 #define TX_FES_STATUS_1K_BA_BA_BITMAP_895_864_MASK 0xffffffff 302 303 #define TX_FES_STATUS_1K_BA_BA_BITMAP_927_896_OFFSET 0x00000078 304 #define TX_FES_STATUS_1K_BA_BA_BITMAP_927_896_LSB 0 305 #define TX_FES_STATUS_1K_BA_BA_BITMAP_927_896_MSB 31 306 #define TX_FES_STATUS_1K_BA_BA_BITMAP_927_896_MASK 0xffffffff 307 308 #define TX_FES_STATUS_1K_BA_BA_BITMAP_959_928_OFFSET 0x0000007c 309 #define TX_FES_STATUS_1K_BA_BA_BITMAP_959_928_LSB 0 310 #define TX_FES_STATUS_1K_BA_BA_BITMAP_959_928_MSB 31 311 #define TX_FES_STATUS_1K_BA_BA_BITMAP_959_928_MASK 0xffffffff 312 313 #define TX_FES_STATUS_1K_BA_BA_BITMAP_991_960_OFFSET 0x00000080 314 #define TX_FES_STATUS_1K_BA_BA_BITMAP_991_960_LSB 0 315 #define TX_FES_STATUS_1K_BA_BA_BITMAP_991_960_MSB 31 316 #define TX_FES_STATUS_1K_BA_BA_BITMAP_991_960_MASK 0xffffffff 317 318 #define TX_FES_STATUS_1K_BA_BA_BITMAP_1023_992_OFFSET 0x00000084 319 #define TX_FES_STATUS_1K_BA_BA_BITMAP_1023_992_LSB 0 320 #define TX_FES_STATUS_1K_BA_BA_BITMAP_1023_992_MSB 31 321 #define TX_FES_STATUS_1K_BA_BA_BITMAP_1023_992_MASK 0xffffffff 322 323 #endif 324