xref: /wlan-driver/fw-api/hw/peach/v2/tx_fes_status_end.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 #ifndef _TX_FES_STATUS_END_H_
19 #define _TX_FES_STATUS_END_H_
20 
21 #include "phytx_abort_request_info.h"
22 #define NUM_OF_DWORDS_TX_FES_STATUS_END 11
23 
24 struct tx_fes_status_end {
25 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
26              uint32_t prot_coex_bt_tx_while_wlan_tx                           :  1,
27                       prot_coex_bt_tx_while_wlan_rx                           :  1,
28                       prot_coex_wan_tx_while_wlan_tx                          :  1,
29                       prot_coex_wan_tx_while_wlan_rx                          :  1,
30                       prot_coex_wlan_tx_while_wlan_tx                         :  1,
31                       prot_coex_wlan_tx_while_wlan_rx                         :  1,
32                       coex_bt_tx_while_wlan_tx                                :  1,
33                       coex_bt_tx_while_wlan_rx                                :  1,
34                       coex_wan_tx_while_wlan_tx                               :  1,
35                       coex_wan_tx_while_wlan_rx                               :  1,
36                       coex_wlan_tx_while_wlan_tx                              :  1,
37                       coex_wlan_tx_while_wlan_rx                              :  1,
38                       global_data_underflow_warning                           :  1,
39                       global_fes_transmit_result                              :  4,
40                       cbf_bw_received_valid                                   :  1,
41                       cbf_bw_received                                         :  3,
42                       actual_received_ack_type                                :  4,
43                       sta_response_count                                      :  6,
44                       more_data_received                                      :  1;
45              struct   phytx_abort_request_info                                  phytx_abort_request_info_details;
46              uint16_t reserved_after_struct16                                 :  4,
47                       brp_info_valid                                          :  1,
48                       qos_null_switch_done_for_eosp                           :  1,
49                       reserved_1a                                             :  5,
50                       phytx_pkt_end_info_valid                                :  1,
51                       phytx_abort_request_info_valid                          :  1,
52                       fes_in_11ax_trigger_response_config                     :  1,
53                       null_delim_inserted_before_mpdus                        :  1,
54                       only_null_delim_sent                                    :  1;
55              uint32_t terminate___reserved_g_0005_sequence                              :  1,
56                       reserved_2b                                             :  5,
57                       response_type                                           :  5,
58                       r2r_end_status_to_follow                                :  1,
59                       reserved_5a                                             :  3,
60                       prot_coex_lte_tx_while_wlan_tx                          :  1,
61                       prot_coex_lte_tx_while_wlan_rx                          :  1,
62                       reserved_2c                                             : 15;
63              uint32_t beamform_masked_user_bitmap_15_0                        : 16,
64                       beamform_masked_user_bitmap_31_16                       : 16;
65              uint32_t cbf_segment_request_mask                                :  8,
66                       cbf_segment_sent_mask                                   :  8,
67                       highest_achieved_data_null_ratio                        :  5,
68                       use_alt_power_sr                                        :  1,
69                       static_2_pwr_mode_status                                :  1,
70                       obss_srg_opport_transmit_status                         :  1,
71                       srp_based_transmit_status                               :  1,
72                       obss_pd_based_transmit_status                           :  1,
73                       beamform_masked_user_bitmap_36_32                       :  5,
74                       pdg_mpdu_ready                                          :  1;
75              uint32_t pdg_mpdu_count                                          : 16,
76                       pdg_est_mpdu_tx_count                                   : 16;
77              uint32_t pdg_overview_length                                     : 24,
78                       txop_duration                                           :  7,
79                       pdg_dropped_mpdu_warning                                :  1;
80              uint32_t packet_extension_a_factor                               :  2,
81                       packet_extension_pe_disambiguity                        :  1,
82                       packet_extension                                        :  3,
83                       fec_type                                                :  1,
84                       stbc                                                    :  1,
85                       num_data_symbols                                        : 16,
86                       ru_size                                                 :  4,
87                       reserved_17a                                            :  4;
88              uint32_t num_ltf_symbols                                         :  3,
89                       ltf_size                                                :  2,
90                       cp_setting                                              :  2,
91                       reserved_18a                                            :  5,
92                       dcm                                                     :  1,
93                       ldpc_extra_symbol                                       :  1,
94                       force_extra_symbol                                      :  1,
95                       reserved_18b                                            :  1,
96                       tx_pwr_shared                                           :  8,
97                       tx_pwr_unshared                                         :  8;
98              uint32_t __reserved_g_0005_active_user_map                                 : 16,
99                       __reserved_g_0005_sent_dummy_tx                                   :  1,
100                       __reserved_g_0005_ftm_frame_sent                                  :  1,
101                       coex_uwb_tx_while_wlan_tx                               :  1,
102                       coex_uwb_tx_while_wlan_rx                               :  1,
103                       prot_coex_uwb_tx_while_wlan_tx                          :  1,
104                       prot_coex_uwb_tx_while_wlan_rx                          :  1,
105                       coex_lte_tx_while_wlan_tx                               :  1,
106                       coex_lte_tx_while_wlan_rx                               :  1,
107                       cv_corr_status                                          :  8;
108              uint32_t current_tx_duration                                     : 16,
109                       reserved_21a                                            :  4,
110                       hw_qos_null_bitmap                                      :  8,
111                       hw_qos_null_setup_missing                               :  1,
112                       reserved_21b                                            :  3;
113 #else
114              uint32_t more_data_received                                      :  1,
115                       sta_response_count                                      :  6,
116                       actual_received_ack_type                                :  4,
117                       cbf_bw_received                                         :  3,
118                       cbf_bw_received_valid                                   :  1,
119                       global_fes_transmit_result                              :  4,
120                       global_data_underflow_warning                           :  1,
121                       coex_wlan_tx_while_wlan_rx                              :  1,
122                       coex_wlan_tx_while_wlan_tx                              :  1,
123                       coex_wan_tx_while_wlan_rx                               :  1,
124                       coex_wan_tx_while_wlan_tx                               :  1,
125                       coex_bt_tx_while_wlan_rx                                :  1,
126                       coex_bt_tx_while_wlan_tx                                :  1,
127                       prot_coex_wlan_tx_while_wlan_rx                         :  1,
128                       prot_coex_wlan_tx_while_wlan_tx                         :  1,
129                       prot_coex_wan_tx_while_wlan_rx                          :  1,
130                       prot_coex_wan_tx_while_wlan_tx                          :  1,
131                       prot_coex_bt_tx_while_wlan_rx                           :  1,
132                       prot_coex_bt_tx_while_wlan_tx                           :  1;
133              uint32_t only_null_delim_sent                                    :  1,
134                       null_delim_inserted_before_mpdus                        :  1,
135                       fes_in_11ax_trigger_response_config                     :  1,
136                       phytx_abort_request_info_valid                          :  1,
137                       phytx_pkt_end_info_valid                                :  1,
138                       reserved_1a                                             :  5,
139                       qos_null_switch_done_for_eosp                           :  1,
140                       brp_info_valid                                          :  1,
141                       reserved_after_struct16                                 :  4;
142              struct   phytx_abort_request_info                                  phytx_abort_request_info_details;
143              uint32_t reserved_2c                                             : 15,
144                       prot_coex_lte_tx_while_wlan_rx                          :  1,
145                       prot_coex_lte_tx_while_wlan_tx                          :  1,
146                       reserved_5a                                             :  3,
147                       r2r_end_status_to_follow                                :  1,
148                       response_type                                           :  5,
149                       reserved_2b                                             :  5,
150                       terminate___reserved_g_0005_sequence                              :  1;
151              uint32_t beamform_masked_user_bitmap_31_16                       : 16,
152                       beamform_masked_user_bitmap_15_0                        : 16;
153              uint32_t pdg_mpdu_ready                                          :  1,
154                       beamform_masked_user_bitmap_36_32                       :  5,
155                       obss_pd_based_transmit_status                           :  1,
156                       srp_based_transmit_status                               :  1,
157                       obss_srg_opport_transmit_status                         :  1,
158                       static_2_pwr_mode_status                                :  1,
159                       use_alt_power_sr                                        :  1,
160                       highest_achieved_data_null_ratio                        :  5,
161                       cbf_segment_sent_mask                                   :  8,
162                       cbf_segment_request_mask                                :  8;
163              uint32_t pdg_est_mpdu_tx_count                                   : 16,
164                       pdg_mpdu_count                                          : 16;
165              uint32_t pdg_dropped_mpdu_warning                                :  1,
166                       txop_duration                                           :  7,
167                       pdg_overview_length                                     : 24;
168              uint32_t reserved_17a                                            :  4,
169                       ru_size                                                 :  4,
170                       num_data_symbols                                        : 16,
171                       stbc                                                    :  1,
172                       fec_type                                                :  1,
173                       packet_extension                                        :  3,
174                       packet_extension_pe_disambiguity                        :  1,
175                       packet_extension_a_factor                               :  2;
176              uint32_t tx_pwr_unshared                                         :  8,
177                       tx_pwr_shared                                           :  8,
178                       reserved_18b                                            :  1,
179                       force_extra_symbol                                      :  1,
180                       ldpc_extra_symbol                                       :  1,
181                       dcm                                                     :  1,
182                       reserved_18a                                            :  5,
183                       cp_setting                                              :  2,
184                       ltf_size                                                :  2,
185                       num_ltf_symbols                                         :  3;
186              uint32_t cv_corr_status                                          :  8,
187                       coex_lte_tx_while_wlan_rx                               :  1,
188                       coex_lte_tx_while_wlan_tx                               :  1,
189                       prot_coex_uwb_tx_while_wlan_rx                          :  1,
190                       prot_coex_uwb_tx_while_wlan_tx                          :  1,
191                       coex_uwb_tx_while_wlan_rx                               :  1,
192                       coex_uwb_tx_while_wlan_tx                               :  1,
193                       __reserved_g_0005_ftm_frame_sent                                  :  1,
194                       __reserved_g_0005_sent_dummy_tx                                   :  1,
195                       __reserved_g_0005_active_user_map                                 : 16;
196              uint32_t reserved_21b                                            :  3,
197                       hw_qos_null_setup_missing                               :  1,
198                       hw_qos_null_bitmap                                      :  8,
199                       reserved_21a                                            :  4,
200                       current_tx_duration                                     : 16;
201 #endif
202 };
203 
204 #define TX_FES_STATUS_END_PROT_COEX_BT_TX_WHILE_WLAN_TX_OFFSET                      0x00000000
205 #define TX_FES_STATUS_END_PROT_COEX_BT_TX_WHILE_WLAN_TX_LSB                         0
206 #define TX_FES_STATUS_END_PROT_COEX_BT_TX_WHILE_WLAN_TX_MSB                         0
207 #define TX_FES_STATUS_END_PROT_COEX_BT_TX_WHILE_WLAN_TX_MASK                        0x00000001
208 
209 #define TX_FES_STATUS_END_PROT_COEX_BT_TX_WHILE_WLAN_RX_OFFSET                      0x00000000
210 #define TX_FES_STATUS_END_PROT_COEX_BT_TX_WHILE_WLAN_RX_LSB                         1
211 #define TX_FES_STATUS_END_PROT_COEX_BT_TX_WHILE_WLAN_RX_MSB                         1
212 #define TX_FES_STATUS_END_PROT_COEX_BT_TX_WHILE_WLAN_RX_MASK                        0x00000002
213 
214 #define TX_FES_STATUS_END_PROT_COEX_WAN_TX_WHILE_WLAN_TX_OFFSET                     0x00000000
215 #define TX_FES_STATUS_END_PROT_COEX_WAN_TX_WHILE_WLAN_TX_LSB                        2
216 #define TX_FES_STATUS_END_PROT_COEX_WAN_TX_WHILE_WLAN_TX_MSB                        2
217 #define TX_FES_STATUS_END_PROT_COEX_WAN_TX_WHILE_WLAN_TX_MASK                       0x00000004
218 
219 #define TX_FES_STATUS_END_PROT_COEX_WAN_TX_WHILE_WLAN_RX_OFFSET                     0x00000000
220 #define TX_FES_STATUS_END_PROT_COEX_WAN_TX_WHILE_WLAN_RX_LSB                        3
221 #define TX_FES_STATUS_END_PROT_COEX_WAN_TX_WHILE_WLAN_RX_MSB                        3
222 #define TX_FES_STATUS_END_PROT_COEX_WAN_TX_WHILE_WLAN_RX_MASK                       0x00000008
223 
224 #define TX_FES_STATUS_END_PROT_COEX_WLAN_TX_WHILE_WLAN_TX_OFFSET                    0x00000000
225 #define TX_FES_STATUS_END_PROT_COEX_WLAN_TX_WHILE_WLAN_TX_LSB                       4
226 #define TX_FES_STATUS_END_PROT_COEX_WLAN_TX_WHILE_WLAN_TX_MSB                       4
227 #define TX_FES_STATUS_END_PROT_COEX_WLAN_TX_WHILE_WLAN_TX_MASK                      0x00000010
228 
229 #define TX_FES_STATUS_END_PROT_COEX_WLAN_TX_WHILE_WLAN_RX_OFFSET                    0x00000000
230 #define TX_FES_STATUS_END_PROT_COEX_WLAN_TX_WHILE_WLAN_RX_LSB                       5
231 #define TX_FES_STATUS_END_PROT_COEX_WLAN_TX_WHILE_WLAN_RX_MSB                       5
232 #define TX_FES_STATUS_END_PROT_COEX_WLAN_TX_WHILE_WLAN_RX_MASK                      0x00000020
233 
234 #define TX_FES_STATUS_END_COEX_BT_TX_WHILE_WLAN_TX_OFFSET                           0x00000000
235 #define TX_FES_STATUS_END_COEX_BT_TX_WHILE_WLAN_TX_LSB                              6
236 #define TX_FES_STATUS_END_COEX_BT_TX_WHILE_WLAN_TX_MSB                              6
237 #define TX_FES_STATUS_END_COEX_BT_TX_WHILE_WLAN_TX_MASK                             0x00000040
238 
239 #define TX_FES_STATUS_END_COEX_BT_TX_WHILE_WLAN_RX_OFFSET                           0x00000000
240 #define TX_FES_STATUS_END_COEX_BT_TX_WHILE_WLAN_RX_LSB                              7
241 #define TX_FES_STATUS_END_COEX_BT_TX_WHILE_WLAN_RX_MSB                              7
242 #define TX_FES_STATUS_END_COEX_BT_TX_WHILE_WLAN_RX_MASK                             0x00000080
243 
244 #define TX_FES_STATUS_END_COEX_WAN_TX_WHILE_WLAN_TX_OFFSET                          0x00000000
245 #define TX_FES_STATUS_END_COEX_WAN_TX_WHILE_WLAN_TX_LSB                             8
246 #define TX_FES_STATUS_END_COEX_WAN_TX_WHILE_WLAN_TX_MSB                             8
247 #define TX_FES_STATUS_END_COEX_WAN_TX_WHILE_WLAN_TX_MASK                            0x00000100
248 
249 #define TX_FES_STATUS_END_COEX_WAN_TX_WHILE_WLAN_RX_OFFSET                          0x00000000
250 #define TX_FES_STATUS_END_COEX_WAN_TX_WHILE_WLAN_RX_LSB                             9
251 #define TX_FES_STATUS_END_COEX_WAN_TX_WHILE_WLAN_RX_MSB                             9
252 #define TX_FES_STATUS_END_COEX_WAN_TX_WHILE_WLAN_RX_MASK                            0x00000200
253 
254 #define TX_FES_STATUS_END_COEX_WLAN_TX_WHILE_WLAN_TX_OFFSET                         0x00000000
255 #define TX_FES_STATUS_END_COEX_WLAN_TX_WHILE_WLAN_TX_LSB                            10
256 #define TX_FES_STATUS_END_COEX_WLAN_TX_WHILE_WLAN_TX_MSB                            10
257 #define TX_FES_STATUS_END_COEX_WLAN_TX_WHILE_WLAN_TX_MASK                           0x00000400
258 
259 #define TX_FES_STATUS_END_COEX_WLAN_TX_WHILE_WLAN_RX_OFFSET                         0x00000000
260 #define TX_FES_STATUS_END_COEX_WLAN_TX_WHILE_WLAN_RX_LSB                            11
261 #define TX_FES_STATUS_END_COEX_WLAN_TX_WHILE_WLAN_RX_MSB                            11
262 #define TX_FES_STATUS_END_COEX_WLAN_TX_WHILE_WLAN_RX_MASK                           0x00000800
263 
264 #define TX_FES_STATUS_END_GLOBAL_DATA_UNDERFLOW_WARNING_OFFSET                      0x00000000
265 #define TX_FES_STATUS_END_GLOBAL_DATA_UNDERFLOW_WARNING_LSB                         12
266 #define TX_FES_STATUS_END_GLOBAL_DATA_UNDERFLOW_WARNING_MSB                         12
267 #define TX_FES_STATUS_END_GLOBAL_DATA_UNDERFLOW_WARNING_MASK                        0x00001000
268 
269 #define TX_FES_STATUS_END_GLOBAL_FES_TRANSMIT_RESULT_OFFSET                         0x00000000
270 #define TX_FES_STATUS_END_GLOBAL_FES_TRANSMIT_RESULT_LSB                            13
271 #define TX_FES_STATUS_END_GLOBAL_FES_TRANSMIT_RESULT_MSB                            16
272 #define TX_FES_STATUS_END_GLOBAL_FES_TRANSMIT_RESULT_MASK                           0x0001e000
273 
274 #define TX_FES_STATUS_END_CBF_BW_RECEIVED_VALID_OFFSET                              0x00000000
275 #define TX_FES_STATUS_END_CBF_BW_RECEIVED_VALID_LSB                                 17
276 #define TX_FES_STATUS_END_CBF_BW_RECEIVED_VALID_MSB                                 17
277 #define TX_FES_STATUS_END_CBF_BW_RECEIVED_VALID_MASK                                0x00020000
278 
279 #define TX_FES_STATUS_END_CBF_BW_RECEIVED_OFFSET                                    0x00000000
280 #define TX_FES_STATUS_END_CBF_BW_RECEIVED_LSB                                       18
281 #define TX_FES_STATUS_END_CBF_BW_RECEIVED_MSB                                       20
282 #define TX_FES_STATUS_END_CBF_BW_RECEIVED_MASK                                      0x001c0000
283 
284 #define TX_FES_STATUS_END_ACTUAL_RECEIVED_ACK_TYPE_OFFSET                           0x00000000
285 #define TX_FES_STATUS_END_ACTUAL_RECEIVED_ACK_TYPE_LSB                              21
286 #define TX_FES_STATUS_END_ACTUAL_RECEIVED_ACK_TYPE_MSB                              24
287 #define TX_FES_STATUS_END_ACTUAL_RECEIVED_ACK_TYPE_MASK                             0x01e00000
288 
289 #define TX_FES_STATUS_END_STA_RESPONSE_COUNT_OFFSET                                 0x00000000
290 #define TX_FES_STATUS_END_STA_RESPONSE_COUNT_LSB                                    25
291 #define TX_FES_STATUS_END_STA_RESPONSE_COUNT_MSB                                    30
292 #define TX_FES_STATUS_END_STA_RESPONSE_COUNT_MASK                                   0x7e000000
293 
294 #define TX_FES_STATUS_END_MORE_DATA_RECEIVED_OFFSET                                 0x00000000
295 #define TX_FES_STATUS_END_MORE_DATA_RECEIVED_LSB                                    31
296 #define TX_FES_STATUS_END_MORE_DATA_RECEIVED_MSB                                    31
297 #define TX_FES_STATUS_END_MORE_DATA_RECEIVED_MASK                                   0x80000000
298 
299 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_DETAILS_PHYTX_ABORT_REASON_OFFSET 0x00000004
300 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_DETAILS_PHYTX_ABORT_REASON_LSB   0
301 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_DETAILS_PHYTX_ABORT_REASON_MSB   7
302 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_DETAILS_PHYTX_ABORT_REASON_MASK  0x000000ff
303 
304 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_DETAILS_USER_NUMBER_OFFSET       0x00000004
305 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_DETAILS_USER_NUMBER_LSB          8
306 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_DETAILS_USER_NUMBER_MSB          13
307 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_DETAILS_USER_NUMBER_MASK         0x00003f00
308 
309 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_DETAILS_RESERVED_OFFSET          0x00000004
310 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_DETAILS_RESERVED_LSB             14
311 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_DETAILS_RESERVED_MSB             15
312 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_DETAILS_RESERVED_MASK            0x0000c000
313 
314 #define TX_FES_STATUS_END_RESERVED_AFTER_STRUCT16_OFFSET                            0x00000004
315 #define TX_FES_STATUS_END_RESERVED_AFTER_STRUCT16_LSB                               16
316 #define TX_FES_STATUS_END_RESERVED_AFTER_STRUCT16_MSB                               19
317 #define TX_FES_STATUS_END_RESERVED_AFTER_STRUCT16_MASK                              0x000f0000
318 
319 #define TX_FES_STATUS_END_BRP_INFO_VALID_OFFSET                                     0x00000004
320 #define TX_FES_STATUS_END_BRP_INFO_VALID_LSB                                        20
321 #define TX_FES_STATUS_END_BRP_INFO_VALID_MSB                                        20
322 #define TX_FES_STATUS_END_BRP_INFO_VALID_MASK                                       0x00100000
323 
324 #define TX_FES_STATUS_END_QOS_NULL_SWITCH_DONE_FOR_EOSP_OFFSET                      0x00000004
325 #define TX_FES_STATUS_END_QOS_NULL_SWITCH_DONE_FOR_EOSP_LSB                         21
326 #define TX_FES_STATUS_END_QOS_NULL_SWITCH_DONE_FOR_EOSP_MSB                         21
327 #define TX_FES_STATUS_END_QOS_NULL_SWITCH_DONE_FOR_EOSP_MASK                        0x00200000
328 
329 #define TX_FES_STATUS_END_RESERVED_1A_OFFSET                                        0x00000004
330 #define TX_FES_STATUS_END_RESERVED_1A_LSB                                           22
331 #define TX_FES_STATUS_END_RESERVED_1A_MSB                                           26
332 #define TX_FES_STATUS_END_RESERVED_1A_MASK                                          0x07c00000
333 
334 #define TX_FES_STATUS_END_PHYTX_PKT_END_INFO_VALID_OFFSET                           0x00000004
335 #define TX_FES_STATUS_END_PHYTX_PKT_END_INFO_VALID_LSB                              27
336 #define TX_FES_STATUS_END_PHYTX_PKT_END_INFO_VALID_MSB                              27
337 #define TX_FES_STATUS_END_PHYTX_PKT_END_INFO_VALID_MASK                             0x08000000
338 
339 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_VALID_OFFSET                     0x00000004
340 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_VALID_LSB                        28
341 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_VALID_MSB                        28
342 #define TX_FES_STATUS_END_PHYTX_ABORT_REQUEST_INFO_VALID_MASK                       0x10000000
343 
344 #define TX_FES_STATUS_END_FES_IN_11AX_TRIGGER_RESPONSE_CONFIG_OFFSET                0x00000004
345 #define TX_FES_STATUS_END_FES_IN_11AX_TRIGGER_RESPONSE_CONFIG_LSB                   29
346 #define TX_FES_STATUS_END_FES_IN_11AX_TRIGGER_RESPONSE_CONFIG_MSB                   29
347 #define TX_FES_STATUS_END_FES_IN_11AX_TRIGGER_RESPONSE_CONFIG_MASK                  0x20000000
348 
349 #define TX_FES_STATUS_END_NULL_DELIM_INSERTED_BEFORE_MPDUS_OFFSET                   0x00000004
350 #define TX_FES_STATUS_END_NULL_DELIM_INSERTED_BEFORE_MPDUS_LSB                      30
351 #define TX_FES_STATUS_END_NULL_DELIM_INSERTED_BEFORE_MPDUS_MSB                      30
352 #define TX_FES_STATUS_END_NULL_DELIM_INSERTED_BEFORE_MPDUS_MASK                     0x40000000
353 
354 #define TX_FES_STATUS_END_ONLY_NULL_DELIM_SENT_OFFSET                               0x00000004
355 #define TX_FES_STATUS_END_ONLY_NULL_DELIM_SENT_LSB                                  31
356 #define TX_FES_STATUS_END_ONLY_NULL_DELIM_SENT_MSB                                  31
357 #define TX_FES_STATUS_END_ONLY_NULL_DELIM_SENT_MASK                                 0x80000000
358 
359 #define TX_FES_STATUS_END_TERMINATE_RANGING_SEQUENCE_OFFSET                         0x00000008
360 #define TX_FES_STATUS_END_TERMINATE_RANGING_SEQUENCE_LSB                            0
361 #define TX_FES_STATUS_END_TERMINATE_RANGING_SEQUENCE_MSB                            0
362 #define TX_FES_STATUS_END_TERMINATE_RANGING_SEQUENCE_MASK                           0x00000001
363 
364 #define TX_FES_STATUS_END_RESERVED_2B_OFFSET                                        0x00000008
365 #define TX_FES_STATUS_END_RESERVED_2B_LSB                                           1
366 #define TX_FES_STATUS_END_RESERVED_2B_MSB                                           5
367 #define TX_FES_STATUS_END_RESERVED_2B_MASK                                          0x0000003e
368 
369 #define TX_FES_STATUS_END_RESPONSE_TYPE_OFFSET                                      0x00000008
370 #define TX_FES_STATUS_END_RESPONSE_TYPE_LSB                                         6
371 #define TX_FES_STATUS_END_RESPONSE_TYPE_MSB                                         10
372 #define TX_FES_STATUS_END_RESPONSE_TYPE_MASK                                        0x000007c0
373 
374 #define TX_FES_STATUS_END_R2R_END_STATUS_TO_FOLLOW_OFFSET                           0x00000008
375 #define TX_FES_STATUS_END_R2R_END_STATUS_TO_FOLLOW_LSB                              11
376 #define TX_FES_STATUS_END_R2R_END_STATUS_TO_FOLLOW_MSB                              11
377 #define TX_FES_STATUS_END_R2R_END_STATUS_TO_FOLLOW_MASK                             0x00000800
378 
379 #define TX_FES_STATUS_END_RESERVED_5A_OFFSET                                        0x00000008
380 #define TX_FES_STATUS_END_RESERVED_5A_LSB                                           12
381 #define TX_FES_STATUS_END_RESERVED_5A_MSB                                           14
382 #define TX_FES_STATUS_END_RESERVED_5A_MASK                                          0x00007000
383 
384 #define TX_FES_STATUS_END_PROT_COEX_LTE_TX_WHILE_WLAN_TX_OFFSET                     0x00000008
385 #define TX_FES_STATUS_END_PROT_COEX_LTE_TX_WHILE_WLAN_TX_LSB                        15
386 #define TX_FES_STATUS_END_PROT_COEX_LTE_TX_WHILE_WLAN_TX_MSB                        15
387 #define TX_FES_STATUS_END_PROT_COEX_LTE_TX_WHILE_WLAN_TX_MASK                       0x00008000
388 
389 #define TX_FES_STATUS_END_PROT_COEX_LTE_TX_WHILE_WLAN_RX_OFFSET                     0x00000008
390 #define TX_FES_STATUS_END_PROT_COEX_LTE_TX_WHILE_WLAN_RX_LSB                        16
391 #define TX_FES_STATUS_END_PROT_COEX_LTE_TX_WHILE_WLAN_RX_MSB                        16
392 #define TX_FES_STATUS_END_PROT_COEX_LTE_TX_WHILE_WLAN_RX_MASK                       0x00010000
393 
394 #define TX_FES_STATUS_END_RESERVED_2C_OFFSET                                        0x00000008
395 #define TX_FES_STATUS_END_RESERVED_2C_LSB                                           17
396 #define TX_FES_STATUS_END_RESERVED_2C_MSB                                           31
397 #define TX_FES_STATUS_END_RESERVED_2C_MASK                                          0xfffe0000
398 
399 #define TX_FES_STATUS_END_BEAMFORM_MASKED_USER_BITMAP_15_0_OFFSET                   0x0000000c
400 #define TX_FES_STATUS_END_BEAMFORM_MASKED_USER_BITMAP_15_0_LSB                      0
401 #define TX_FES_STATUS_END_BEAMFORM_MASKED_USER_BITMAP_15_0_MSB                      15
402 #define TX_FES_STATUS_END_BEAMFORM_MASKED_USER_BITMAP_15_0_MASK                     0x0000ffff
403 
404 #define TX_FES_STATUS_END_BEAMFORM_MASKED_USER_BITMAP_31_16_OFFSET                  0x0000000c
405 #define TX_FES_STATUS_END_BEAMFORM_MASKED_USER_BITMAP_31_16_LSB                     16
406 #define TX_FES_STATUS_END_BEAMFORM_MASKED_USER_BITMAP_31_16_MSB                     31
407 #define TX_FES_STATUS_END_BEAMFORM_MASKED_USER_BITMAP_31_16_MASK                    0xffff0000
408 
409 #define TX_FES_STATUS_END_CBF_SEGMENT_REQUEST_MASK_OFFSET                           0x00000010
410 #define TX_FES_STATUS_END_CBF_SEGMENT_REQUEST_MASK_LSB                              0
411 #define TX_FES_STATUS_END_CBF_SEGMENT_REQUEST_MASK_MSB                              7
412 #define TX_FES_STATUS_END_CBF_SEGMENT_REQUEST_MASK_MASK                             0x000000ff
413 
414 #define TX_FES_STATUS_END_CBF_SEGMENT_SENT_MASK_OFFSET                              0x00000010
415 #define TX_FES_STATUS_END_CBF_SEGMENT_SENT_MASK_LSB                                 8
416 #define TX_FES_STATUS_END_CBF_SEGMENT_SENT_MASK_MSB                                 15
417 #define TX_FES_STATUS_END_CBF_SEGMENT_SENT_MASK_MASK                                0x0000ff00
418 
419 #define TX_FES_STATUS_END_HIGHEST_ACHIEVED_DATA_NULL_RATIO_OFFSET                   0x00000010
420 #define TX_FES_STATUS_END_HIGHEST_ACHIEVED_DATA_NULL_RATIO_LSB                      16
421 #define TX_FES_STATUS_END_HIGHEST_ACHIEVED_DATA_NULL_RATIO_MSB                      20
422 #define TX_FES_STATUS_END_HIGHEST_ACHIEVED_DATA_NULL_RATIO_MASK                     0x001f0000
423 
424 #define TX_FES_STATUS_END_USE_ALT_POWER_SR_OFFSET                                   0x00000010
425 #define TX_FES_STATUS_END_USE_ALT_POWER_SR_LSB                                      21
426 #define TX_FES_STATUS_END_USE_ALT_POWER_SR_MSB                                      21
427 #define TX_FES_STATUS_END_USE_ALT_POWER_SR_MASK                                     0x00200000
428 
429 #define TX_FES_STATUS_END_STATIC_2_PWR_MODE_STATUS_OFFSET                           0x00000010
430 #define TX_FES_STATUS_END_STATIC_2_PWR_MODE_STATUS_LSB                              22
431 #define TX_FES_STATUS_END_STATIC_2_PWR_MODE_STATUS_MSB                              22
432 #define TX_FES_STATUS_END_STATIC_2_PWR_MODE_STATUS_MASK                             0x00400000
433 
434 #define TX_FES_STATUS_END_OBSS_SRG_OPPORT_TRANSMIT_STATUS_OFFSET                    0x00000010
435 #define TX_FES_STATUS_END_OBSS_SRG_OPPORT_TRANSMIT_STATUS_LSB                       23
436 #define TX_FES_STATUS_END_OBSS_SRG_OPPORT_TRANSMIT_STATUS_MSB                       23
437 #define TX_FES_STATUS_END_OBSS_SRG_OPPORT_TRANSMIT_STATUS_MASK                      0x00800000
438 
439 #define TX_FES_STATUS_END_SRP_BASED_TRANSMIT_STATUS_OFFSET                          0x00000010
440 #define TX_FES_STATUS_END_SRP_BASED_TRANSMIT_STATUS_LSB                             24
441 #define TX_FES_STATUS_END_SRP_BASED_TRANSMIT_STATUS_MSB                             24
442 #define TX_FES_STATUS_END_SRP_BASED_TRANSMIT_STATUS_MASK                            0x01000000
443 
444 #define TX_FES_STATUS_END_OBSS_PD_BASED_TRANSMIT_STATUS_OFFSET                      0x00000010
445 #define TX_FES_STATUS_END_OBSS_PD_BASED_TRANSMIT_STATUS_LSB                         25
446 #define TX_FES_STATUS_END_OBSS_PD_BASED_TRANSMIT_STATUS_MSB                         25
447 #define TX_FES_STATUS_END_OBSS_PD_BASED_TRANSMIT_STATUS_MASK                        0x02000000
448 
449 #define TX_FES_STATUS_END_BEAMFORM_MASKED_USER_BITMAP_36_32_OFFSET                  0x00000010
450 #define TX_FES_STATUS_END_BEAMFORM_MASKED_USER_BITMAP_36_32_LSB                     26
451 #define TX_FES_STATUS_END_BEAMFORM_MASKED_USER_BITMAP_36_32_MSB                     30
452 #define TX_FES_STATUS_END_BEAMFORM_MASKED_USER_BITMAP_36_32_MASK                    0x7c000000
453 
454 #define TX_FES_STATUS_END_PDG_MPDU_READY_OFFSET                                     0x00000010
455 #define TX_FES_STATUS_END_PDG_MPDU_READY_LSB                                        31
456 #define TX_FES_STATUS_END_PDG_MPDU_READY_MSB                                        31
457 #define TX_FES_STATUS_END_PDG_MPDU_READY_MASK                                       0x80000000
458 
459 #define TX_FES_STATUS_END_PDG_MPDU_COUNT_OFFSET                                     0x00000014
460 #define TX_FES_STATUS_END_PDG_MPDU_COUNT_LSB                                        0
461 #define TX_FES_STATUS_END_PDG_MPDU_COUNT_MSB                                        15
462 #define TX_FES_STATUS_END_PDG_MPDU_COUNT_MASK                                       0x0000ffff
463 
464 #define TX_FES_STATUS_END_PDG_EST_MPDU_TX_COUNT_OFFSET                              0x00000014
465 #define TX_FES_STATUS_END_PDG_EST_MPDU_TX_COUNT_LSB                                 16
466 #define TX_FES_STATUS_END_PDG_EST_MPDU_TX_COUNT_MSB                                 31
467 #define TX_FES_STATUS_END_PDG_EST_MPDU_TX_COUNT_MASK                                0xffff0000
468 
469 #define TX_FES_STATUS_END_PDG_OVERVIEW_LENGTH_OFFSET                                0x00000018
470 #define TX_FES_STATUS_END_PDG_OVERVIEW_LENGTH_LSB                                   0
471 #define TX_FES_STATUS_END_PDG_OVERVIEW_LENGTH_MSB                                   23
472 #define TX_FES_STATUS_END_PDG_OVERVIEW_LENGTH_MASK                                  0x00ffffff
473 
474 #define TX_FES_STATUS_END_TXOP_DURATION_OFFSET                                      0x00000018
475 #define TX_FES_STATUS_END_TXOP_DURATION_LSB                                         24
476 #define TX_FES_STATUS_END_TXOP_DURATION_MSB                                         30
477 #define TX_FES_STATUS_END_TXOP_DURATION_MASK                                        0x7f000000
478 
479 #define TX_FES_STATUS_END_PDG_DROPPED_MPDU_WARNING_OFFSET                           0x00000018
480 #define TX_FES_STATUS_END_PDG_DROPPED_MPDU_WARNING_LSB                              31
481 #define TX_FES_STATUS_END_PDG_DROPPED_MPDU_WARNING_MSB                              31
482 #define TX_FES_STATUS_END_PDG_DROPPED_MPDU_WARNING_MASK                             0x80000000
483 
484 #define TX_FES_STATUS_END_PACKET_EXTENSION_A_FACTOR_OFFSET                          0x0000001c
485 #define TX_FES_STATUS_END_PACKET_EXTENSION_A_FACTOR_LSB                             0
486 #define TX_FES_STATUS_END_PACKET_EXTENSION_A_FACTOR_MSB                             1
487 #define TX_FES_STATUS_END_PACKET_EXTENSION_A_FACTOR_MASK                            0x00000003
488 
489 #define TX_FES_STATUS_END_PACKET_EXTENSION_PE_DISAMBIGUITY_OFFSET                   0x0000001c
490 #define TX_FES_STATUS_END_PACKET_EXTENSION_PE_DISAMBIGUITY_LSB                      2
491 #define TX_FES_STATUS_END_PACKET_EXTENSION_PE_DISAMBIGUITY_MSB                      2
492 #define TX_FES_STATUS_END_PACKET_EXTENSION_PE_DISAMBIGUITY_MASK                     0x00000004
493 
494 #define TX_FES_STATUS_END_PACKET_EXTENSION_OFFSET                                   0x0000001c
495 #define TX_FES_STATUS_END_PACKET_EXTENSION_LSB                                      3
496 #define TX_FES_STATUS_END_PACKET_EXTENSION_MSB                                      5
497 #define TX_FES_STATUS_END_PACKET_EXTENSION_MASK                                     0x00000038
498 
499 #define TX_FES_STATUS_END_FEC_TYPE_OFFSET                                           0x0000001c
500 #define TX_FES_STATUS_END_FEC_TYPE_LSB                                              6
501 #define TX_FES_STATUS_END_FEC_TYPE_MSB                                              6
502 #define TX_FES_STATUS_END_FEC_TYPE_MASK                                             0x00000040
503 
504 #define TX_FES_STATUS_END_STBC_OFFSET                                               0x0000001c
505 #define TX_FES_STATUS_END_STBC_LSB                                                  7
506 #define TX_FES_STATUS_END_STBC_MSB                                                  7
507 #define TX_FES_STATUS_END_STBC_MASK                                                 0x00000080
508 
509 #define TX_FES_STATUS_END_NUM_DATA_SYMBOLS_OFFSET                                   0x0000001c
510 #define TX_FES_STATUS_END_NUM_DATA_SYMBOLS_LSB                                      8
511 #define TX_FES_STATUS_END_NUM_DATA_SYMBOLS_MSB                                      23
512 #define TX_FES_STATUS_END_NUM_DATA_SYMBOLS_MASK                                     0x00ffff00
513 
514 #define TX_FES_STATUS_END_RU_SIZE_OFFSET                                            0x0000001c
515 #define TX_FES_STATUS_END_RU_SIZE_LSB                                               24
516 #define TX_FES_STATUS_END_RU_SIZE_MSB                                               27
517 #define TX_FES_STATUS_END_RU_SIZE_MASK                                              0x0f000000
518 
519 #define TX_FES_STATUS_END_RESERVED_17A_OFFSET                                       0x0000001c
520 #define TX_FES_STATUS_END_RESERVED_17A_LSB                                          28
521 #define TX_FES_STATUS_END_RESERVED_17A_MSB                                          31
522 #define TX_FES_STATUS_END_RESERVED_17A_MASK                                         0xf0000000
523 
524 #define TX_FES_STATUS_END_NUM_LTF_SYMBOLS_OFFSET                                    0x00000020
525 #define TX_FES_STATUS_END_NUM_LTF_SYMBOLS_LSB                                       0
526 #define TX_FES_STATUS_END_NUM_LTF_SYMBOLS_MSB                                       2
527 #define TX_FES_STATUS_END_NUM_LTF_SYMBOLS_MASK                                      0x00000007
528 
529 #define TX_FES_STATUS_END_LTF_SIZE_OFFSET                                           0x00000020
530 #define TX_FES_STATUS_END_LTF_SIZE_LSB                                              3
531 #define TX_FES_STATUS_END_LTF_SIZE_MSB                                              4
532 #define TX_FES_STATUS_END_LTF_SIZE_MASK                                             0x00000018
533 
534 #define TX_FES_STATUS_END_CP_SETTING_OFFSET                                         0x00000020
535 #define TX_FES_STATUS_END_CP_SETTING_LSB                                            5
536 #define TX_FES_STATUS_END_CP_SETTING_MSB                                            6
537 #define TX_FES_STATUS_END_CP_SETTING_MASK                                           0x00000060
538 
539 #define TX_FES_STATUS_END_RESERVED_18A_OFFSET                                       0x00000020
540 #define TX_FES_STATUS_END_RESERVED_18A_LSB                                          7
541 #define TX_FES_STATUS_END_RESERVED_18A_MSB                                          11
542 #define TX_FES_STATUS_END_RESERVED_18A_MASK                                         0x00000f80
543 
544 #define TX_FES_STATUS_END_DCM_OFFSET                                                0x00000020
545 #define TX_FES_STATUS_END_DCM_LSB                                                   12
546 #define TX_FES_STATUS_END_DCM_MSB                                                   12
547 #define TX_FES_STATUS_END_DCM_MASK                                                  0x00001000
548 
549 #define TX_FES_STATUS_END_LDPC_EXTRA_SYMBOL_OFFSET                                  0x00000020
550 #define TX_FES_STATUS_END_LDPC_EXTRA_SYMBOL_LSB                                     13
551 #define TX_FES_STATUS_END_LDPC_EXTRA_SYMBOL_MSB                                     13
552 #define TX_FES_STATUS_END_LDPC_EXTRA_SYMBOL_MASK                                    0x00002000
553 
554 #define TX_FES_STATUS_END_FORCE_EXTRA_SYMBOL_OFFSET                                 0x00000020
555 #define TX_FES_STATUS_END_FORCE_EXTRA_SYMBOL_LSB                                    14
556 #define TX_FES_STATUS_END_FORCE_EXTRA_SYMBOL_MSB                                    14
557 #define TX_FES_STATUS_END_FORCE_EXTRA_SYMBOL_MASK                                   0x00004000
558 
559 #define TX_FES_STATUS_END_RESERVED_18B_OFFSET                                       0x00000020
560 #define TX_FES_STATUS_END_RESERVED_18B_LSB                                          15
561 #define TX_FES_STATUS_END_RESERVED_18B_MSB                                          15
562 #define TX_FES_STATUS_END_RESERVED_18B_MASK                                         0x00008000
563 
564 #define TX_FES_STATUS_END_TX_PWR_SHARED_OFFSET                                      0x00000020
565 #define TX_FES_STATUS_END_TX_PWR_SHARED_LSB                                         16
566 #define TX_FES_STATUS_END_TX_PWR_SHARED_MSB                                         23
567 #define TX_FES_STATUS_END_TX_PWR_SHARED_MASK                                        0x00ff0000
568 
569 #define TX_FES_STATUS_END_TX_PWR_UNSHARED_OFFSET                                    0x00000020
570 #define TX_FES_STATUS_END_TX_PWR_UNSHARED_LSB                                       24
571 #define TX_FES_STATUS_END_TX_PWR_UNSHARED_MSB                                       31
572 #define TX_FES_STATUS_END_TX_PWR_UNSHARED_MASK                                      0xff000000
573 
574 #define TX_FES_STATUS_END_RANGING_ACTIVE_USER_MAP_OFFSET                            0x00000024
575 #define TX_FES_STATUS_END_RANGING_ACTIVE_USER_MAP_LSB                               0
576 #define TX_FES_STATUS_END_RANGING_ACTIVE_USER_MAP_MSB                               15
577 #define TX_FES_STATUS_END_RANGING_ACTIVE_USER_MAP_MASK                              0x0000ffff
578 
579 #define TX_FES_STATUS_END_RANGING_SENT_DUMMY_TX_OFFSET                              0x00000024
580 #define TX_FES_STATUS_END_RANGING_SENT_DUMMY_TX_LSB                                 16
581 #define TX_FES_STATUS_END_RANGING_SENT_DUMMY_TX_MSB                                 16
582 #define TX_FES_STATUS_END_RANGING_SENT_DUMMY_TX_MASK                                0x00010000
583 
584 #define TX_FES_STATUS_END_RANGING_FTM_FRAME_SENT_OFFSET                             0x00000024
585 #define TX_FES_STATUS_END_RANGING_FTM_FRAME_SENT_LSB                                17
586 #define TX_FES_STATUS_END_RANGING_FTM_FRAME_SENT_MSB                                17
587 #define TX_FES_STATUS_END_RANGING_FTM_FRAME_SENT_MASK                               0x00020000
588 
589 #define TX_FES_STATUS_END_COEX_UWB_TX_WHILE_WLAN_TX_OFFSET                          0x00000024
590 #define TX_FES_STATUS_END_COEX_UWB_TX_WHILE_WLAN_TX_LSB                             18
591 #define TX_FES_STATUS_END_COEX_UWB_TX_WHILE_WLAN_TX_MSB                             18
592 #define TX_FES_STATUS_END_COEX_UWB_TX_WHILE_WLAN_TX_MASK                            0x00040000
593 
594 #define TX_FES_STATUS_END_COEX_UWB_TX_WHILE_WLAN_RX_OFFSET                          0x00000024
595 #define TX_FES_STATUS_END_COEX_UWB_TX_WHILE_WLAN_RX_LSB                             19
596 #define TX_FES_STATUS_END_COEX_UWB_TX_WHILE_WLAN_RX_MSB                             19
597 #define TX_FES_STATUS_END_COEX_UWB_TX_WHILE_WLAN_RX_MASK                            0x00080000
598 
599 #define TX_FES_STATUS_END_PROT_COEX_UWB_TX_WHILE_WLAN_TX_OFFSET                     0x00000024
600 #define TX_FES_STATUS_END_PROT_COEX_UWB_TX_WHILE_WLAN_TX_LSB                        20
601 #define TX_FES_STATUS_END_PROT_COEX_UWB_TX_WHILE_WLAN_TX_MSB                        20
602 #define TX_FES_STATUS_END_PROT_COEX_UWB_TX_WHILE_WLAN_TX_MASK                       0x00100000
603 
604 #define TX_FES_STATUS_END_PROT_COEX_UWB_TX_WHILE_WLAN_RX_OFFSET                     0x00000024
605 #define TX_FES_STATUS_END_PROT_COEX_UWB_TX_WHILE_WLAN_RX_LSB                        21
606 #define TX_FES_STATUS_END_PROT_COEX_UWB_TX_WHILE_WLAN_RX_MSB                        21
607 #define TX_FES_STATUS_END_PROT_COEX_UWB_TX_WHILE_WLAN_RX_MASK                       0x00200000
608 
609 #define TX_FES_STATUS_END_COEX_LTE_TX_WHILE_WLAN_TX_OFFSET                          0x00000024
610 #define TX_FES_STATUS_END_COEX_LTE_TX_WHILE_WLAN_TX_LSB                             22
611 #define TX_FES_STATUS_END_COEX_LTE_TX_WHILE_WLAN_TX_MSB                             22
612 #define TX_FES_STATUS_END_COEX_LTE_TX_WHILE_WLAN_TX_MASK                            0x00400000
613 
614 #define TX_FES_STATUS_END_COEX_LTE_TX_WHILE_WLAN_RX_OFFSET                          0x00000024
615 #define TX_FES_STATUS_END_COEX_LTE_TX_WHILE_WLAN_RX_LSB                             23
616 #define TX_FES_STATUS_END_COEX_LTE_TX_WHILE_WLAN_RX_MSB                             23
617 #define TX_FES_STATUS_END_COEX_LTE_TX_WHILE_WLAN_RX_MASK                            0x00800000
618 
619 #define TX_FES_STATUS_END_CV_CORR_STATUS_OFFSET                                     0x00000024
620 #define TX_FES_STATUS_END_CV_CORR_STATUS_LSB                                        24
621 #define TX_FES_STATUS_END_CV_CORR_STATUS_MSB                                        31
622 #define TX_FES_STATUS_END_CV_CORR_STATUS_MASK                                       0xff000000
623 
624 #define TX_FES_STATUS_END_CURRENT_TX_DURATION_OFFSET                                0x00000028
625 #define TX_FES_STATUS_END_CURRENT_TX_DURATION_LSB                                   0
626 #define TX_FES_STATUS_END_CURRENT_TX_DURATION_MSB                                   15
627 #define TX_FES_STATUS_END_CURRENT_TX_DURATION_MASK                                  0x0000ffff
628 
629 #define TX_FES_STATUS_END_RESERVED_21A_OFFSET                                       0x00000028
630 #define TX_FES_STATUS_END_RESERVED_21A_LSB                                          16
631 #define TX_FES_STATUS_END_RESERVED_21A_MSB                                          19
632 #define TX_FES_STATUS_END_RESERVED_21A_MASK                                         0x000f0000
633 
634 #define TX_FES_STATUS_END_HW_QOS_NULL_BITMAP_OFFSET                                 0x00000028
635 #define TX_FES_STATUS_END_HW_QOS_NULL_BITMAP_LSB                                    20
636 #define TX_FES_STATUS_END_HW_QOS_NULL_BITMAP_MSB                                    27
637 #define TX_FES_STATUS_END_HW_QOS_NULL_BITMAP_MASK                                   0x0ff00000
638 
639 #define TX_FES_STATUS_END_HW_QOS_NULL_SETUP_MISSING_OFFSET                          0x00000028
640 #define TX_FES_STATUS_END_HW_QOS_NULL_SETUP_MISSING_LSB                             28
641 #define TX_FES_STATUS_END_HW_QOS_NULL_SETUP_MISSING_MSB                             28
642 #define TX_FES_STATUS_END_HW_QOS_NULL_SETUP_MISSING_MASK                            0x10000000
643 
644 #define TX_FES_STATUS_END_RESERVED_21B_OFFSET                                       0x00000028
645 #define TX_FES_STATUS_END_RESERVED_21B_LSB                                          29
646 #define TX_FES_STATUS_END_RESERVED_21B_MSB                                          31
647 #define TX_FES_STATUS_END_RESERVED_21B_MASK                                         0xe0000000
648 
649 #endif
650