1 /* 2 * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 #ifndef _TXPCU_BUFFER_STATUS_H_ 19 #define _TXPCU_BUFFER_STATUS_H_ 20 21 #include "txpcu_buffer_basics.h" 22 #define NUM_OF_DWORDS_TXPCU_BUFFER_STATUS 2 23 24 struct txpcu_buffer_status { 25 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 26 struct txpcu_buffer_basics txpcu_basix_buffer_info; 27 uint32_t reserved : 15, 28 msdu_end : 1, 29 tx_data_sync_value : 16; 30 #else 31 struct txpcu_buffer_basics txpcu_basix_buffer_info; 32 uint32_t tx_data_sync_value : 16, 33 msdu_end : 1, 34 reserved : 15; 35 #endif 36 }; 37 38 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_OFFSET 0x00000000 39 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_LSB 0 40 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_MSB 7 41 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_AVAILABLE_MEMORY_MASK 0x000000ff 42 43 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_OFFSET 0x00000000 44 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_LSB 8 45 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_MSB 15 46 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_PARTIAL_TX_DATA_TLV_COUNT_MASK 0x0000ff00 47 48 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_OFFSET 0x00000000 49 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_LSB 16 50 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_MSB 31 51 #define TXPCU_BUFFER_STATUS_TXPCU_BASIX_BUFFER_INFO_TX_DATA_TLV_COUNT_MASK 0xffff0000 52 53 #define TXPCU_BUFFER_STATUS_RESERVED_OFFSET 0x00000004 54 #define TXPCU_BUFFER_STATUS_RESERVED_LSB 0 55 #define TXPCU_BUFFER_STATUS_RESERVED_MSB 14 56 #define TXPCU_BUFFER_STATUS_RESERVED_MASK 0x00007fff 57 58 #define TXPCU_BUFFER_STATUS_MSDU_END_OFFSET 0x00000004 59 #define TXPCU_BUFFER_STATUS_MSDU_END_LSB 15 60 #define TXPCU_BUFFER_STATUS_MSDU_END_MSB 15 61 #define TXPCU_BUFFER_STATUS_MSDU_END_MASK 0x00008000 62 63 #define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_OFFSET 0x00000004 64 #define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_LSB 16 65 #define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_MSB 31 66 #define TXPCU_BUFFER_STATUS_TX_DATA_SYNC_VALUE_MASK 0xffff0000 67 68 #endif 69