xref: /wlan-driver/fw-api/hw/qca5018/reo_update_rx_reo_queue_status.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _REO_UPDATE_RX_REO_QUEUE_STATUS_H_
18 #define _REO_UPDATE_RX_REO_QUEUE_STATUS_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 #include "uniform_reo_status_header.h"
23 
24 // ################ START SUMMARY #################
25 //
26 //	Dword	Fields
27 //	0-1	struct uniform_reo_status_header status_header;
28 //	2	reserved_2a[31:0]
29 //	3	reserved_3a[31:0]
30 //	4	reserved_4a[31:0]
31 //	5	reserved_5a[31:0]
32 //	6	reserved_6a[31:0]
33 //	7	reserved_7a[31:0]
34 //	8	reserved_8a[31:0]
35 //	9	reserved_9a[31:0]
36 //	10	reserved_10a[31:0]
37 //	11	reserved_11a[31:0]
38 //	12	reserved_12a[31:0]
39 //	13	reserved_13a[31:0]
40 //	14	reserved_14a[31:0]
41 //	15	reserved_15a[31:0]
42 //	16	reserved_16a[31:0]
43 //	17	reserved_17a[31:0]
44 //	18	reserved_18a[31:0]
45 //	19	reserved_19a[31:0]
46 //	20	reserved_20a[31:0]
47 //	21	reserved_21a[31:0]
48 //	22	reserved_22a[31:0]
49 //	23	reserved_23a[31:0]
50 //	24	reserved_24a[27:0], looping_count[31:28]
51 //
52 // ################ END SUMMARY #################
53 
54 #define NUM_OF_DWORDS_REO_UPDATE_RX_REO_QUEUE_STATUS 25
55 
56 struct reo_update_rx_reo_queue_status {
57     struct            uniform_reo_status_header                       status_header;
58              uint32_t reserved_2a                     : 32; //[31:0]
59              uint32_t reserved_3a                     : 32; //[31:0]
60              uint32_t reserved_4a                     : 32; //[31:0]
61              uint32_t reserved_5a                     : 32; //[31:0]
62              uint32_t reserved_6a                     : 32; //[31:0]
63              uint32_t reserved_7a                     : 32; //[31:0]
64              uint32_t reserved_8a                     : 32; //[31:0]
65              uint32_t reserved_9a                     : 32; //[31:0]
66              uint32_t reserved_10a                    : 32; //[31:0]
67              uint32_t reserved_11a                    : 32; //[31:0]
68              uint32_t reserved_12a                    : 32; //[31:0]
69              uint32_t reserved_13a                    : 32; //[31:0]
70              uint32_t reserved_14a                    : 32; //[31:0]
71              uint32_t reserved_15a                    : 32; //[31:0]
72              uint32_t reserved_16a                    : 32; //[31:0]
73              uint32_t reserved_17a                    : 32; //[31:0]
74              uint32_t reserved_18a                    : 32; //[31:0]
75              uint32_t reserved_19a                    : 32; //[31:0]
76              uint32_t reserved_20a                    : 32; //[31:0]
77              uint32_t reserved_21a                    : 32; //[31:0]
78              uint32_t reserved_22a                    : 32; //[31:0]
79              uint32_t reserved_23a                    : 32; //[31:0]
80              uint32_t reserved_24a                    : 28, //[27:0]
81                       looping_count                   :  4; //[31:28]
82 };
83 
84 /*
85 
86 struct uniform_reo_status_header status_header
87 
88 			Consumer: SW
89 
90 			Producer: REO
91 
92 
93 
94 			Details that can link this status with the original
95 			command. It also contains info on how long REO took to
96 			execute this command.
97 
98 reserved_2a
99 
100 			<legal 0>
101 
102 reserved_3a
103 
104 			<legal 0>
105 
106 reserved_4a
107 
108 			<legal 0>
109 
110 reserved_5a
111 
112 			<legal 0>
113 
114 reserved_6a
115 
116 			<legal 0>
117 
118 reserved_7a
119 
120 			<legal 0>
121 
122 reserved_8a
123 
124 			<legal 0>
125 
126 reserved_9a
127 
128 			<legal 0>
129 
130 reserved_10a
131 
132 			<legal 0>
133 
134 reserved_11a
135 
136 			<legal 0>
137 
138 reserved_12a
139 
140 			<legal 0>
141 
142 reserved_13a
143 
144 			<legal 0>
145 
146 reserved_14a
147 
148 			<legal 0>
149 
150 reserved_15a
151 
152 			<legal 0>
153 
154 reserved_16a
155 
156 			<legal 0>
157 
158 reserved_17a
159 
160 			<legal 0>
161 
162 reserved_18a
163 
164 			<legal 0>
165 
166 reserved_19a
167 
168 			<legal 0>
169 
170 reserved_20a
171 
172 			<legal 0>
173 
174 reserved_21a
175 
176 			<legal 0>
177 
178 reserved_22a
179 
180 			<legal 0>
181 
182 reserved_23a
183 
184 			<legal 0>
185 
186 reserved_24a
187 
188 			<legal 0>
189 
190 looping_count
191 
192 			A count value that indicates the number of times the
193 			producer of entries into this Ring has looped around the
194 			ring.
195 
196 			At initialization time, this value is set to 0. On the
197 			first loop, this value is set to 1. After the max value is
198 			reached allowed by the number of bits for this field, the
199 			count value continues with 0 again.
200 
201 
202 
203 			In case SW is the consumer of the ring entries, it can
204 			use this field to figure out up to where the producer of
205 			entries has created new entries. This eliminates the need to
206 			check where the head pointer' of the ring is located once
207 			the SW starts processing an interrupt indicating that new
208 			entries have been put into this ring...
209 
210 
211 
212 			Also note that SW if it wants only needs to look at the
213 			LSB bit of this count value.
214 
215 			<legal all>
216 */
217 
218 
219  /* EXTERNAL REFERENCE : struct uniform_reo_status_header status_header */
220 
221 
222 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER
223 
224 			Consumer: SW , DEBUG
225 
226 			Producer: REO
227 
228 
229 
230 			The value in this field is equal to value of the
231 			'REO_CMD_Number' field the REO command
232 
233 
234 
235 			This field helps to correlate the statuses with the REO
236 			commands.
237 
238 
239 
240 			<legal all>
241 */
242 #define REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_OFFSET 0x00000000
243 #define REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_LSB 0
244 #define REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_MASK 0x0000ffff
245 
246 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME
247 
248 			Consumer: DEBUG
249 
250 			Producer: REO
251 
252 
253 
254 			The amount of time REO took to excecute the command.
255 			Note that this time does not include the duration of the
256 			command waiting in the command ring, before the execution
257 			started.
258 
259 
260 
261 			In us.
262 
263 
264 
265 			<legal all>
266 */
267 #define REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_OFFSET 0x00000000
268 #define REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_LSB 16
269 #define REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_MASK 0x03ff0000
270 
271 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS
272 
273 			Consumer: DEBUG
274 
275 			Producer: REO
276 
277 
278 
279 			Execution status of the command.
280 
281 
282 
283 			<enum 0 reo_successful_execution> Command has
284 			successfully be executed
285 
286 			<enum 1 reo_blocked_execution> Command could not be
287 			executed as the queue or cache was blocked
288 
289 			<enum 2 reo_failed_execution> Command has encountered
290 			problems when executing, like the queue descriptor not being
291 			valid. None of the status fields in the entire STATUS TLV
292 			are valid.
293 
294 			<enum 3 reo_resource_blocked> Command is NOT  executed
295 			because one or more descriptors were blocked. This is SW
296 			programming mistake.
297 
298 			None of the status fields in the entire STATUS TLV are
299 			valid.
300 
301 
302 
303 			<legal  0-3>
304 */
305 #define REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_OFFSET 0x00000000
306 #define REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_LSB 26
307 #define REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MASK 0x0c000000
308 
309 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_RESERVED_0A
310 
311 			<legal 0>
312 */
313 #define REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_RESERVED_0A_OFFSET 0x00000000
314 #define REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_RESERVED_0A_LSB 28
315 #define REO_UPDATE_RX_REO_QUEUE_STATUS_0_STATUS_HEADER_RESERVED_0A_MASK 0xf0000000
316 
317 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_1_STATUS_HEADER_TIMESTAMP
318 
319 			Timestamp at the moment that this status report is
320 			written.
321 
322 
323 
324 			<legal all>
325 */
326 #define REO_UPDATE_RX_REO_QUEUE_STATUS_1_STATUS_HEADER_TIMESTAMP_OFFSET 0x00000004
327 #define REO_UPDATE_RX_REO_QUEUE_STATUS_1_STATUS_HEADER_TIMESTAMP_LSB 0
328 #define REO_UPDATE_RX_REO_QUEUE_STATUS_1_STATUS_HEADER_TIMESTAMP_MASK 0xffffffff
329 
330 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_2_RESERVED_2A
331 
332 			<legal 0>
333 */
334 #define REO_UPDATE_RX_REO_QUEUE_STATUS_2_RESERVED_2A_OFFSET          0x00000008
335 #define REO_UPDATE_RX_REO_QUEUE_STATUS_2_RESERVED_2A_LSB             0
336 #define REO_UPDATE_RX_REO_QUEUE_STATUS_2_RESERVED_2A_MASK            0xffffffff
337 
338 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_3_RESERVED_3A
339 
340 			<legal 0>
341 */
342 #define REO_UPDATE_RX_REO_QUEUE_STATUS_3_RESERVED_3A_OFFSET          0x0000000c
343 #define REO_UPDATE_RX_REO_QUEUE_STATUS_3_RESERVED_3A_LSB             0
344 #define REO_UPDATE_RX_REO_QUEUE_STATUS_3_RESERVED_3A_MASK            0xffffffff
345 
346 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_4_RESERVED_4A
347 
348 			<legal 0>
349 */
350 #define REO_UPDATE_RX_REO_QUEUE_STATUS_4_RESERVED_4A_OFFSET          0x00000010
351 #define REO_UPDATE_RX_REO_QUEUE_STATUS_4_RESERVED_4A_LSB             0
352 #define REO_UPDATE_RX_REO_QUEUE_STATUS_4_RESERVED_4A_MASK            0xffffffff
353 
354 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_5_RESERVED_5A
355 
356 			<legal 0>
357 */
358 #define REO_UPDATE_RX_REO_QUEUE_STATUS_5_RESERVED_5A_OFFSET          0x00000014
359 #define REO_UPDATE_RX_REO_QUEUE_STATUS_5_RESERVED_5A_LSB             0
360 #define REO_UPDATE_RX_REO_QUEUE_STATUS_5_RESERVED_5A_MASK            0xffffffff
361 
362 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_6_RESERVED_6A
363 
364 			<legal 0>
365 */
366 #define REO_UPDATE_RX_REO_QUEUE_STATUS_6_RESERVED_6A_OFFSET          0x00000018
367 #define REO_UPDATE_RX_REO_QUEUE_STATUS_6_RESERVED_6A_LSB             0
368 #define REO_UPDATE_RX_REO_QUEUE_STATUS_6_RESERVED_6A_MASK            0xffffffff
369 
370 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_7_RESERVED_7A
371 
372 			<legal 0>
373 */
374 #define REO_UPDATE_RX_REO_QUEUE_STATUS_7_RESERVED_7A_OFFSET          0x0000001c
375 #define REO_UPDATE_RX_REO_QUEUE_STATUS_7_RESERVED_7A_LSB             0
376 #define REO_UPDATE_RX_REO_QUEUE_STATUS_7_RESERVED_7A_MASK            0xffffffff
377 
378 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_8_RESERVED_8A
379 
380 			<legal 0>
381 */
382 #define REO_UPDATE_RX_REO_QUEUE_STATUS_8_RESERVED_8A_OFFSET          0x00000020
383 #define REO_UPDATE_RX_REO_QUEUE_STATUS_8_RESERVED_8A_LSB             0
384 #define REO_UPDATE_RX_REO_QUEUE_STATUS_8_RESERVED_8A_MASK            0xffffffff
385 
386 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_9_RESERVED_9A
387 
388 			<legal 0>
389 */
390 #define REO_UPDATE_RX_REO_QUEUE_STATUS_9_RESERVED_9A_OFFSET          0x00000024
391 #define REO_UPDATE_RX_REO_QUEUE_STATUS_9_RESERVED_9A_LSB             0
392 #define REO_UPDATE_RX_REO_QUEUE_STATUS_9_RESERVED_9A_MASK            0xffffffff
393 
394 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_10_RESERVED_10A
395 
396 			<legal 0>
397 */
398 #define REO_UPDATE_RX_REO_QUEUE_STATUS_10_RESERVED_10A_OFFSET        0x00000028
399 #define REO_UPDATE_RX_REO_QUEUE_STATUS_10_RESERVED_10A_LSB           0
400 #define REO_UPDATE_RX_REO_QUEUE_STATUS_10_RESERVED_10A_MASK          0xffffffff
401 
402 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_11_RESERVED_11A
403 
404 			<legal 0>
405 */
406 #define REO_UPDATE_RX_REO_QUEUE_STATUS_11_RESERVED_11A_OFFSET        0x0000002c
407 #define REO_UPDATE_RX_REO_QUEUE_STATUS_11_RESERVED_11A_LSB           0
408 #define REO_UPDATE_RX_REO_QUEUE_STATUS_11_RESERVED_11A_MASK          0xffffffff
409 
410 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_12_RESERVED_12A
411 
412 			<legal 0>
413 */
414 #define REO_UPDATE_RX_REO_QUEUE_STATUS_12_RESERVED_12A_OFFSET        0x00000030
415 #define REO_UPDATE_RX_REO_QUEUE_STATUS_12_RESERVED_12A_LSB           0
416 #define REO_UPDATE_RX_REO_QUEUE_STATUS_12_RESERVED_12A_MASK          0xffffffff
417 
418 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_13_RESERVED_13A
419 
420 			<legal 0>
421 */
422 #define REO_UPDATE_RX_REO_QUEUE_STATUS_13_RESERVED_13A_OFFSET        0x00000034
423 #define REO_UPDATE_RX_REO_QUEUE_STATUS_13_RESERVED_13A_LSB           0
424 #define REO_UPDATE_RX_REO_QUEUE_STATUS_13_RESERVED_13A_MASK          0xffffffff
425 
426 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_14_RESERVED_14A
427 
428 			<legal 0>
429 */
430 #define REO_UPDATE_RX_REO_QUEUE_STATUS_14_RESERVED_14A_OFFSET        0x00000038
431 #define REO_UPDATE_RX_REO_QUEUE_STATUS_14_RESERVED_14A_LSB           0
432 #define REO_UPDATE_RX_REO_QUEUE_STATUS_14_RESERVED_14A_MASK          0xffffffff
433 
434 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_15_RESERVED_15A
435 
436 			<legal 0>
437 */
438 #define REO_UPDATE_RX_REO_QUEUE_STATUS_15_RESERVED_15A_OFFSET        0x0000003c
439 #define REO_UPDATE_RX_REO_QUEUE_STATUS_15_RESERVED_15A_LSB           0
440 #define REO_UPDATE_RX_REO_QUEUE_STATUS_15_RESERVED_15A_MASK          0xffffffff
441 
442 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_16_RESERVED_16A
443 
444 			<legal 0>
445 */
446 #define REO_UPDATE_RX_REO_QUEUE_STATUS_16_RESERVED_16A_OFFSET        0x00000040
447 #define REO_UPDATE_RX_REO_QUEUE_STATUS_16_RESERVED_16A_LSB           0
448 #define REO_UPDATE_RX_REO_QUEUE_STATUS_16_RESERVED_16A_MASK          0xffffffff
449 
450 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_17_RESERVED_17A
451 
452 			<legal 0>
453 */
454 #define REO_UPDATE_RX_REO_QUEUE_STATUS_17_RESERVED_17A_OFFSET        0x00000044
455 #define REO_UPDATE_RX_REO_QUEUE_STATUS_17_RESERVED_17A_LSB           0
456 #define REO_UPDATE_RX_REO_QUEUE_STATUS_17_RESERVED_17A_MASK          0xffffffff
457 
458 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_18_RESERVED_18A
459 
460 			<legal 0>
461 */
462 #define REO_UPDATE_RX_REO_QUEUE_STATUS_18_RESERVED_18A_OFFSET        0x00000048
463 #define REO_UPDATE_RX_REO_QUEUE_STATUS_18_RESERVED_18A_LSB           0
464 #define REO_UPDATE_RX_REO_QUEUE_STATUS_18_RESERVED_18A_MASK          0xffffffff
465 
466 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_19_RESERVED_19A
467 
468 			<legal 0>
469 */
470 #define REO_UPDATE_RX_REO_QUEUE_STATUS_19_RESERVED_19A_OFFSET        0x0000004c
471 #define REO_UPDATE_RX_REO_QUEUE_STATUS_19_RESERVED_19A_LSB           0
472 #define REO_UPDATE_RX_REO_QUEUE_STATUS_19_RESERVED_19A_MASK          0xffffffff
473 
474 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_20_RESERVED_20A
475 
476 			<legal 0>
477 */
478 #define REO_UPDATE_RX_REO_QUEUE_STATUS_20_RESERVED_20A_OFFSET        0x00000050
479 #define REO_UPDATE_RX_REO_QUEUE_STATUS_20_RESERVED_20A_LSB           0
480 #define REO_UPDATE_RX_REO_QUEUE_STATUS_20_RESERVED_20A_MASK          0xffffffff
481 
482 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_21_RESERVED_21A
483 
484 			<legal 0>
485 */
486 #define REO_UPDATE_RX_REO_QUEUE_STATUS_21_RESERVED_21A_OFFSET        0x00000054
487 #define REO_UPDATE_RX_REO_QUEUE_STATUS_21_RESERVED_21A_LSB           0
488 #define REO_UPDATE_RX_REO_QUEUE_STATUS_21_RESERVED_21A_MASK          0xffffffff
489 
490 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_22_RESERVED_22A
491 
492 			<legal 0>
493 */
494 #define REO_UPDATE_RX_REO_QUEUE_STATUS_22_RESERVED_22A_OFFSET        0x00000058
495 #define REO_UPDATE_RX_REO_QUEUE_STATUS_22_RESERVED_22A_LSB           0
496 #define REO_UPDATE_RX_REO_QUEUE_STATUS_22_RESERVED_22A_MASK          0xffffffff
497 
498 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_23_RESERVED_23A
499 
500 			<legal 0>
501 */
502 #define REO_UPDATE_RX_REO_QUEUE_STATUS_23_RESERVED_23A_OFFSET        0x0000005c
503 #define REO_UPDATE_RX_REO_QUEUE_STATUS_23_RESERVED_23A_LSB           0
504 #define REO_UPDATE_RX_REO_QUEUE_STATUS_23_RESERVED_23A_MASK          0xffffffff
505 
506 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_24_RESERVED_24A
507 
508 			<legal 0>
509 */
510 #define REO_UPDATE_RX_REO_QUEUE_STATUS_24_RESERVED_24A_OFFSET        0x00000060
511 #define REO_UPDATE_RX_REO_QUEUE_STATUS_24_RESERVED_24A_LSB           0
512 #define REO_UPDATE_RX_REO_QUEUE_STATUS_24_RESERVED_24A_MASK          0x0fffffff
513 
514 /* Description		REO_UPDATE_RX_REO_QUEUE_STATUS_24_LOOPING_COUNT
515 
516 			A count value that indicates the number of times the
517 			producer of entries into this Ring has looped around the
518 			ring.
519 
520 			At initialization time, this value is set to 0. On the
521 			first loop, this value is set to 1. After the max value is
522 			reached allowed by the number of bits for this field, the
523 			count value continues with 0 again.
524 
525 
526 
527 			In case SW is the consumer of the ring entries, it can
528 			use this field to figure out up to where the producer of
529 			entries has created new entries. This eliminates the need to
530 			check where the head pointer' of the ring is located once
531 			the SW starts processing an interrupt indicating that new
532 			entries have been put into this ring...
533 
534 
535 
536 			Also note that SW if it wants only needs to look at the
537 			LSB bit of this count value.
538 
539 			<legal all>
540 */
541 #define REO_UPDATE_RX_REO_QUEUE_STATUS_24_LOOPING_COUNT_OFFSET       0x00000060
542 #define REO_UPDATE_RX_REO_QUEUE_STATUS_24_LOOPING_COUNT_LSB          28
543 #define REO_UPDATE_RX_REO_QUEUE_STATUS_24_LOOPING_COUNT_MASK         0xf0000000
544 
545 
546 #endif // _REO_UPDATE_RX_REO_QUEUE_STATUS_H_
547