1 /* 2 * Copyright (c) 2020, The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _WBM_BUFFER_RING_H_ 18 #define _WBM_BUFFER_RING_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #include "buffer_addr_info.h" 23 24 // ################ START SUMMARY ################# 25 // 26 // Dword Fields 27 // 0-1 struct buffer_addr_info buf_addr_info; 28 // 29 // ################ END SUMMARY ################# 30 31 #define NUM_OF_DWORDS_WBM_BUFFER_RING 2 32 33 struct wbm_buffer_ring { 34 struct buffer_addr_info buf_addr_info; 35 }; 36 37 /* 38 39 struct buffer_addr_info buf_addr_info 40 41 Consumer: WBM 42 43 Producer: WBM 44 45 46 47 Details of the physical address of the buffer + source 48 buffer owner + some SW meta data. 49 50 All modules getting this buffer address info, shall keep 51 all the 64 bits of info in this descriptor together and 52 eventually all 64 bits shall be given back to WMB when the 53 buffer is released. 54 */ 55 56 57 /* EXTERNAL REFERENCE : struct buffer_addr_info buf_addr_info */ 58 59 60 /* Description WBM_BUFFER_RING_0_BUF_ADDR_INFO_BUFFER_ADDR_31_0 61 62 Address (lower 32 bits) of the MSDU buffer OR 63 MSDU_EXTENSION descriptor OR Link Descriptor 64 65 66 67 In case of 'NULL' pointer, this field is set to 0 68 69 <legal all> 70 */ 71 #define WBM_BUFFER_RING_0_BUF_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000 72 #define WBM_BUFFER_RING_0_BUF_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0 73 #define WBM_BUFFER_RING_0_BUF_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff 74 75 /* Description WBM_BUFFER_RING_1_BUF_ADDR_INFO_BUFFER_ADDR_39_32 76 77 Address (upper 8 bits) of the MSDU buffer OR 78 MSDU_EXTENSION descriptor OR Link Descriptor 79 80 81 82 In case of 'NULL' pointer, this field is set to 0 83 84 <legal all> 85 */ 86 #define WBM_BUFFER_RING_1_BUF_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004 87 #define WBM_BUFFER_RING_1_BUF_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0 88 #define WBM_BUFFER_RING_1_BUF_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff 89 90 /* Description WBM_BUFFER_RING_1_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER 91 92 Consumer: WBM 93 94 Producer: SW/FW 95 96 97 98 In case of 'NULL' pointer, this field is set to 0 99 100 101 102 Indicates to which buffer manager the buffer OR 103 MSDU_EXTENSION descriptor OR link descriptor that is being 104 pointed to shall be returned after the frame has been 105 processed. It is used by WBM for routing purposes. 106 107 108 109 <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned 110 to the WMB buffer idle list 111 112 <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be 113 returned to the WMB idle link descriptor idle list 114 115 <enum 2 FW_BM> This buffer shall be returned to the FW 116 117 <enum 3 SW0_BM> This buffer shall be returned to the SW, 118 ring 0 119 120 <enum 4 SW1_BM> This buffer shall be returned to the SW, 121 ring 1 122 123 <enum 5 SW2_BM> This buffer shall be returned to the SW, 124 ring 2 125 126 <enum 6 SW3_BM> This buffer shall be returned to the SW, 127 ring 3 128 129 <enum 7 SW4_BM> This buffer shall be returned to the SW, 130 ring 4 131 132 133 134 <legal all> 135 */ 136 #define WBM_BUFFER_RING_1_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004 137 #define WBM_BUFFER_RING_1_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8 138 #define WBM_BUFFER_RING_1_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700 139 140 /* Description WBM_BUFFER_RING_1_BUF_ADDR_INFO_SW_BUFFER_COOKIE 141 142 Cookie field exclusively used by SW. 143 144 145 146 In case of 'NULL' pointer, this field is set to 0 147 148 149 150 HW ignores the contents, accept that it passes the 151 programmed value on to other descriptors together with the 152 physical address 153 154 155 156 Field can be used by SW to for example associate the 157 buffers physical address with the virtual address 158 159 The bit definitions as used by SW are within SW HLD 160 specification 161 162 163 164 NOTE1: 165 166 The three most significant bits can have a special 167 meaning in case this struct is embedded in a TX_MPDU_DETAILS 168 STRUCT, and field transmit_bw_restriction is set 169 170 171 172 In case of NON punctured transmission: 173 174 Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only 175 176 Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only 177 178 Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only 179 180 Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only 181 182 183 184 In case of punctured transmission: 185 186 Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only 187 188 Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only 189 190 Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only 191 192 Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only 193 194 Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only 195 196 Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only 197 198 Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only 199 200 Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only 201 202 203 204 Note: a punctured transmission is indicated by the 205 presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler 206 TLV 207 208 209 210 NOTE 2:The five most significant bits can have a special 211 meaning in case this struct is embedded in an 212 RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is 213 configured for passing on the additional info 214 from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV 215 (FR56821). This is not supported in HastingsPrime, Pine or 216 Moselle. 217 218 219 220 Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS 221 control field 222 223 224 225 Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field 226 indicates MPDUs with a QoS control field. 227 228 229 230 231 232 <legal all> 233 */ 234 #define WBM_BUFFER_RING_1_BUF_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004 235 #define WBM_BUFFER_RING_1_BUF_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11 236 #define WBM_BUFFER_RING_1_BUF_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800 237 238 239 #endif // _WBM_BUFFER_RING_H_ 240