1 /* 2 * Copyright (c) 2020, The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _WBM_RELEASE_RING_H_ 18 #define _WBM_RELEASE_RING_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #include "buffer_addr_info.h" 23 #include "tx_rate_stats_info.h" 24 25 // ################ START SUMMARY ################# 26 // 27 // Dword Fields 28 // 0-1 struct buffer_addr_info released_buff_or_desc_addr_info; 29 // 2 release_source_module[2:0], bm_action[5:3], buffer_or_desc_type[8:6], first_msdu_index[12:9], tqm_release_reason[16:13], rxdma_push_reason[18:17], rxdma_error_code[23:19], reo_push_reason[25:24], reo_error_code[30:26], wbm_internal_error[31] 30 // 3 tqm_status_number[23:0], transmit_count[30:24], msdu_continuation[31] 31 // 4 ack_frame_rssi[7:0], sw_release_details_valid[8], first_msdu[9], last_msdu[10], msdu_part_of_amsdu[11], fw_tx_notify_frame[12], buffer_timestamp[31:13] 32 // 5-6 struct tx_rate_stats_info tx_rate_stats; 33 // 7 sw_peer_id[15:0], tid[19:16], ring_id[27:20], looping_count[31:28] 34 // 35 // ################ END SUMMARY ################# 36 37 #define NUM_OF_DWORDS_WBM_RELEASE_RING 8 38 39 struct wbm_release_ring { 40 struct buffer_addr_info released_buff_or_desc_addr_info; 41 uint32_t release_source_module : 3, //[2:0] 42 bm_action : 3, //[5:3] 43 buffer_or_desc_type : 3, //[8:6] 44 first_msdu_index : 4, //[12:9] 45 tqm_release_reason : 4, //[16:13] 46 rxdma_push_reason : 2, //[18:17] 47 rxdma_error_code : 5, //[23:19] 48 reo_push_reason : 2, //[25:24] 49 reo_error_code : 5, //[30:26] 50 wbm_internal_error : 1; //[31] 51 uint32_t tqm_status_number : 24, //[23:0] 52 transmit_count : 7, //[30:24] 53 msdu_continuation : 1; //[31] 54 uint32_t ack_frame_rssi : 8, //[7:0] 55 sw_release_details_valid : 1, //[8] 56 first_msdu : 1, //[9] 57 last_msdu : 1, //[10] 58 msdu_part_of_amsdu : 1, //[11] 59 fw_tx_notify_frame : 1, //[12] 60 buffer_timestamp : 19; //[31:13] 61 struct tx_rate_stats_info tx_rate_stats; 62 uint32_t sw_peer_id : 16, //[15:0] 63 tid : 4, //[19:16] 64 ring_id : 8, //[27:20] 65 looping_count : 4; //[31:28] 66 }; 67 68 /* 69 70 struct buffer_addr_info released_buff_or_desc_addr_info 71 72 Consumer: WBM/SW/FW 73 74 Producer: SW/TQM/RXDMA/REO/SWITCH 75 76 77 78 Details of the physical address of the buffer or link 79 descriptor that is being released. Note that within this 80 descriptor, WBM will look at the 'owner' of the released 81 buffer/descriptor and forward it to SW/FW is WBM is not the 82 owner. 83 84 85 86 In case of TQM releasing Tx MSDU link descriptors with 87 Tqm_release_reason set to 'tqm_fw_reason3,' HastingsPrime 88 WBM can optionally release the MSDU buffers pointed to by 89 the MSDU link descriptors to FW and override the 90 tx_rate_stats field, for FW reinjection of these MSDUs 91 (FR54309). This is not supported in Pine. 92 93 release_source_module 94 95 Indicates which module initiated the release of this 96 buffer or descriptor 97 98 99 100 <enum 0 release_source_TQM> TQM released this buffer or 101 descriptor 102 103 <enum 1 release_source_RXDMA> RXDMA released this buffer 104 or descriptor 105 106 <enum 2 release_source_REO> REO released this buffer or 107 descriptor 108 109 <enum 3 release_source_FW> FW released this buffer or 110 descriptor 111 112 <enum 4 release_source_SW> SW released this buffer or 113 descriptor 114 115 <legal 0-4> 116 117 bm_action 118 119 Consumer: WBM/SW/FW 120 121 Producer: SW/TQM/RXDMA/REO/SWITCH 122 123 124 125 Field only valid when the field return_buffer_manager in 126 the Released_buff_or_desc_addr_info indicates: 127 128 WBM_IDLE_BUF_LIST or 129 130 WBM_IDLE_DESC_LIST 131 132 133 134 An MSDU extension descriptor shall never be marked as 135 136 137 138 <enum 0 Put_in_idle_list> Put the buffer or descriptor 139 back in the idle list. In case of MSDU or MDPU link 140 descriptor, BM does not need to check to release any 141 individual MSDU buffers 142 143 144 145 <enum 1 release_msdu_list > This BM action can only be 146 used in combination with buffer_or_desc_type being 147 msdu_link_descriptor. Field first_msdu_index points out 148 which MSDU pointer in the MSDU link descriptor is the first 149 of an MPDU that is released. 150 151 BM shall release all the MSDU buffers linked to this 152 first MSDU buffer pointer. All related MSDU buffer pointer 153 entries shall be set to value 0, which represents the 'NULL 154 pointer. When all MSDU buffer pointers in the MSDU link 155 descriptor are 'NULL', the MSDU link descriptor itself shall 156 also be released. 157 158 159 160 <enum 2 Put_in_idle_list_expanded> CURRENTLY NOT 161 IMPLEMENTED.... 162 163 Put the buffer or descriptor back in the idle list. Only 164 valid in combination with buffer_or_desc_type indicating 165 MDPU_link_descriptor. 166 167 BM shall release the MPDU link descriptor as well as all 168 MSDUs that are linked to the MPDUs in this descriptor. 169 170 171 172 <legal 0-2> 173 174 buffer_or_desc_type 175 176 Consumer: WBM/SW/FW 177 178 Producer: SW/TQM/RXDMA/REO/SWITCH 179 180 181 182 Field only valid when WBM is marked as the 183 return_buffer_manager in the Released_Buffer_address_info 184 185 186 187 Indicates that type of buffer or descriptor is being 188 released 189 190 191 192 <enum 0 MSDU_rel_buffer> The address points to an MSDU 193 buffer 194 195 <enum 1 msdu_link_descriptor> The address points to an 196 TX MSDU link descriptor 197 198 <enum 2 mpdu_link_descriptor> The address points to an 199 MPDU link descriptor 200 201 <enum 3 msdu_ext_descriptor > The address points to an 202 MSDU extension descriptor. 203 204 In case BM finds this one in a release ring, it passes 205 it on to FW... 206 207 <enum 4 queue_ext_descriptor> The address points to an 208 TQM queue extension descriptor. WBM should treat this is the 209 same way as a link descriptor. That is, put the 128 byte 210 buffer back in the link buffer idle list. 211 212 213 214 <legal 0-4> 215 216 first_msdu_index 217 218 Consumer: WBM/SW/FW 219 220 Producer: SW/TQM/RXDMA/REO/SWITCH 221 222 223 224 Field only valid for the bm_action release_msdu_list. 225 226 227 228 The index of the first MSDU in an MSDU link descriptor 229 all belonging to the same MPDU. 230 231 232 233 <legal 0-6> 234 235 tqm_release_reason 236 237 Consumer: WBM/SW/FW 238 239 Producer: TQM 240 241 242 243 Field only valid when Release_source_module is set to 244 release_source_TQM 245 246 247 248 (rr = Release Reason) 249 250 <enum 0 tqm_rr_frame_acked> frame is removed because an 251 ACK of BA for it was received 252 253 <enum 1 tqm_rr_rem_cmd_rem> frame is removed because a 254 remove command of type Remove_mpdus initiated by SW 255 256 <enum 2 tqm_rr_rem_cmd_tx> frame is removed because a 257 remove command of type Remove_transmitted_mpdus initiated by 258 SW 259 260 <enum 3 tqm_rr_rem_cmd_notx> frame is removed because a 261 remove command of type Remove_untransmitted_mpdus initiated 262 by SW 263 264 <enum 4 tqm_rr_rem_cmd_aged> frame is removed because a 265 remove command of type Remove_aged_mpdus or 266 Remove_aged_msdus initiated by SW 267 268 <enum 5 tqm_fw_reason1> frame is removed because a 269 remove command where fw indicated that remove reason is 270 fw_reason1 271 272 <enum 6 tqm_fw_reason2> frame is removed because a 273 remove command where fw indicated that remove reason is 274 fw_reason1 275 276 <enum 7 tqm_fw_reason3> frame is removed because a 277 remove command where fw indicated that remove reason is 278 fw_reason1 279 280 <enum 8 tqm_rr_rem_cmd_disable_queue> frame is removed 281 because a remove command of type 282 remove_mpdus_and_disable_queue or 283 remove_msdus_and_disable_flow initiated by SW 284 285 286 287 <legal 0-8> 288 289 290 291 In case of TQM releasing Tx MSDU link descriptors with 292 Tqm_release_reason set to 'tqm_fw_reason3,' HastingsPrime 293 WBM can optionally release the MSDU buffers pointed to by 294 the MSDU link descriptors to FW and override the 295 tx_rate_stats field, for FW reinjection of these MSDUs 296 (FR54309). This is not supported in Pine. 297 298 rxdma_push_reason 299 300 Field only valid when Release_source_module is set to 301 release_source_RXDMA 302 303 304 305 Indicates why rxdma pushed the frame to this ring 306 307 308 309 <enum 0 rxdma_error_detected> RXDMA detected an error an 310 pushed this frame to this queue 311 312 <enum 1 rxdma_routing_instruction> RXDMA pushed the 313 frame to this queue per received routing instructions. No 314 error within RXDMA was detected 315 316 <enum 2 rxdma_rx_flush> RXDMA received an RX_FLUSH. As a 317 result the MSDU link descriptor might not have the 318 last_msdu_in_mpdu_flag set, but instead WBM might just see a 319 NULL pointer in the MSDU link descriptor. This is to be 320 considered a normal condition for this scenario. 321 322 323 324 <legal 0 - 2> 325 326 327 328 In case of RXDMA releasing Rx MSDU link descriptors,' 329 Maple/Spruce WBM can optionally override the tx_rate_stats 330 field with Rx_msdu_desc_info_details (FR59859). This is not 331 supported in HastingsPrime, Pine or Moselle. 332 333 rxdma_error_code 334 335 Field only valid when 'rxdma_push_reason' set to 336 'rxdma_error_detected'. 337 338 339 340 <enum 0 rxdma_overflow_err>MPDU frame is not complete 341 due to a FIFO overflow error in RXPCU. 342 343 <enum 1 rxdma_mpdu_length_err>MPDU frame is not complete 344 due to receiving incomplete MPDU from the PHY 345 346 347 <enum 3 rxdma_decrypt_err>CRYPTO reported a decryption 348 error or CRYPTO received an encrypted frame, but did not get 349 a valid corresponding key id in the peer entry. 350 351 <enum 4 rxdma_tkip_mic_err>CRYPTO reported a TKIP MIC 352 error 353 354 <enum 5 rxdma_unecrypted_err>CRYPTO reported an 355 unencrypted frame error when encrypted was expected 356 357 <enum 6 rxdma_msdu_len_err>RX OLE reported an MSDU 358 length error 359 360 <enum 7 rxdma_msdu_limit_err>RX OLE reported that max 361 number of MSDUs allowed in an MPDU got exceeded 362 363 <enum 8 rxdma_wifi_parse_err>RX OLE reported a parsing 364 error 365 366 <enum 9 rxdma_amsdu_parse_err>RX OLE reported an A-MSDU 367 parsing error 368 369 <enum 10 rxdma_sa_timeout_err>RX OLE reported a timeout 370 during SA search 371 372 <enum 11 rxdma_da_timeout_err>RX OLE reported a timeout 373 during DA search 374 375 <enum 12 rxdma_flow_timeout_err>RX OLE reported a 376 timeout during flow search 377 378 <enum 13 rxdma_flush_request>RXDMA received a flush 379 request 380 381 <enum 14 rxdma_amsdu_fragment_err>Rx PCU reported A-MSDU 382 present as well as a fragmented MPDU. A-MSDU defragmentation 383 is not supported in Lithium SW so this is treated as an 384 error. 385 386 reo_push_reason 387 388 Field only valid when Release_source_module is set to 389 release_source_REO 390 391 392 393 Indicates why REO pushed the frame to this release ring 394 395 396 397 <enum 0 reo_error_detected> Reo detected an error an 398 pushed this frame to this queue 399 400 <enum 1 reo_routing_instruction> Reo pushed the frame to 401 this queue per received routing instructions. No error 402 within REO was detected 403 404 405 406 <legal 0 - 1> 407 408 409 410 In case of REO releasing Rx MSDU link descriptors,' 411 Maple/Spruce WBM can optionally override 412 the tx_rate_stats field with 413 Rx_msdu_desc_info_details (FR59859). This is not supported 414 in HastingsPrime, Pine or Moselle. 415 416 reo_error_code 417 418 Field only valid when 'Reo_push_reason' set to 419 'reo_error_detected'. 420 421 422 423 <enum 0 reo_queue_desc_addr_zero> Reo queue descriptor 424 provided in the REO_ENTRANCE ring is set to 0 425 426 <enum 1 reo_queue_desc_not_valid> Reo queue descriptor 427 valid bit is NOT set 428 429 <enum 2 ampdu_in_non_ba> AMPDU frame received without BA 430 session having been setup. 431 432 <enum 3 non_ba_duplicate> Non-BA session, SN equal to 433 SSN, Retry bit set: duplicate frame 434 435 <enum 4 ba_duplicate> BA session, duplicate frame 436 437 <enum 5 regular_frame_2k_jump> A normal (management/data 438 frame) received with 2K jump in SN 439 440 <enum 6 bar_frame_2k_jump> A bar received with 2K jump 441 in SSN 442 443 <enum 7 regular_frame_OOR> A normal (management/data 444 frame) received with SN falling within the OOR window 445 446 <enum 8 bar_frame_OOR> A bar received with SSN falling 447 within the OOR window 448 449 <enum 9 bar_frame_no_ba_session> A bar received without 450 a BA session 451 452 <enum 10 bar_frame_sn_equals_ssn> A bar received with 453 SSN equal to SN 454 455 <enum 11 pn_check_failed> PN Check Failed packet. 456 457 <enum 12 2k_error_handling_flag_set> Frame is forwarded 458 as a result of the 'Seq_2k_error_detected_flag' been set in 459 the REO Queue descriptor 460 461 <enum 13 pn_error_handling_flag_set> Frame is forwarded 462 as a result of the 'pn_error_detected_flag' been set in the 463 REO Queue descriptor 464 465 <enum 14 queue_descriptor_blocked_set> Frame is 466 forwarded as a result of the queue descriptor(address) being 467 blocked as SW/FW seems to be currently in the process of 468 making updates to this descriptor... 469 470 471 472 <legal 0-14> 473 474 wbm_internal_error 475 476 Can only be set by WBM. 477 478 479 480 Is set when WBM got a buffer pointer but the action was 481 to push it to the idle link descriptor ring or do link 482 related activity 483 484 OR 485 486 Is set when WBM got a link buffer pointer but the action 487 was to push it to the buffer descriptor ring 488 489 490 491 <legal all> 492 493 tqm_status_number 494 495 Field only valid when Release_source_module is set to 496 release_source_TQM 497 498 499 500 The value in this field is equal to value of the 501 'TQM_CMD_Number' field the TQM command or the 502 'TQM_add_cmd_Number' field from the TQM entrance ring 503 descriptor 504 505 506 507 This field helps to correlate the statuses with the TQM 508 commands. 509 510 511 512 NOTE that SW could program this number to be equal to 513 the PPDU_ID number in case direct correlation with the PPDU 514 ID is desired 515 516 517 518 <legal all> 519 520 transmit_count 521 522 Field only valid when Release_source_module is set to 523 release_source_TQM 524 525 526 527 The number of times this frame has been transmitted 528 529 msdu_continuation 530 531 FR53947 requests MSDU_continuation reporting for Rx 532 MSDUs in Pine and HastingsPrime for which 533 SW_release_details_valid may not be set. 534 535 <legal all> 536 537 ack_frame_rssi 538 539 This field is only valid when the source is TQM. 540 541 542 543 If this frame is removed as the result of the reception 544 of an ACK or BA, this field indicates the RSSI of the 545 received ACK or BA frame. 546 547 548 549 When the frame is removed as result of a direct remove 550 command from the SW, this field is set to 0x0 (which is 551 never a valid value when real RSSI is available) 552 553 554 555 <legal all> 556 557 sw_release_details_valid 558 559 Consumer: SW 560 561 Producer: WBM 562 563 564 565 When set, some WBM specific release info for SW is 566 valid. 567 568 This is set when WMB got a 'release_msdu_list' command 569 from TQM and the return buffer manager is not WMB. WBM will 570 then de-aggregate all the MSDUs and pass them one at a time 571 on to the 'buffer owner' 572 573 574 575 <legal all> 576 577 first_msdu 578 579 Field only valid when SW_release_details_valid is set. 580 581 582 583 Consumer: SW 584 585 Producer: WBM 586 587 588 589 When set, this MSDU is the first MSDU pointed to in the 590 'release_msdu_list' command. 591 592 593 594 FR53947 extends this to Rx MSDUs in Pine and 595 HastingsPrime for which SW_release_details_valid may not be 596 set. 597 598 <legal all> 599 600 last_msdu 601 602 Field only valid when SW_release_details_valid is set. 603 604 605 606 Consumer: SW 607 608 Producer: WBM 609 610 611 612 When set, this MSDU is the last MSDU pointed to in the 613 'release_msdu_list' command. 614 615 616 617 FR53947 extends this to Rx MSDUs in Pine and 618 HastingsPrime for which SW_release_details_valid may not be 619 set. 620 621 <legal all> 622 623 msdu_part_of_amsdu 624 625 Field only valid when SW_release_details_valid is set. 626 627 628 629 Consumer: SW 630 631 Producer: WBM 632 633 634 635 When set, this MSDU was part of an A-MSDU in MPDU 636 637 <legal all> 638 639 fw_tx_notify_frame 640 641 Field only valid when SW_release_details_valid is set. 642 643 644 645 Consumer: SW 646 647 Producer: WBM 648 649 650 651 This is the FW_tx_notify_frame field from the 652 653 <legal all> 654 655 buffer_timestamp 656 657 Field only valid when SW_release_details_valid is set. 658 659 660 661 Consumer: SW 662 663 Producer: WBM 664 665 666 667 This is the Buffer_timestamp field from the 668 TX_MSDU_DETAILS for this frame from the MSDU link 669 descriptor. 670 671 672 673 Timestamp in units of 1024 µs 674 675 <legal all> 676 677 struct tx_rate_stats_info tx_rate_stats 678 679 Consumer: TQM/SW 680 681 Producer: SW/SCH(from TXPCU, PDG) /WBM (from RXDMA) 682 683 684 685 Details for command execution tracking purposes. 686 687 688 689 In case of TQM releasing Tx MSDU link descriptors with 690 Tqm_release_reason set to 'tqm_fw_reason3,' HastingsPrime 691 WBM can optionally release the MSDU buffers pointed to by 692 the MSDU link descriptors to FW and override the 693 tx_rate_stats field with words 2 and 3 of the 694 'TX_MSDU_DETAILS' structure, for FW reinjection of these 695 MSDUs (FR54309). This is not supported in Pine. 696 697 698 699 In case of RXDMA or REO releasing Rx MSDU link 700 descriptors,' Maple/Spruce WBM can optionally override 701 the tx_rate_stats field 702 with Rx_msdu_desc_info_details (FR59859). This is not 703 supported in HastingsPrime, Pine or Moselle. 704 705 sw_peer_id 706 707 Field only valid when Release_source_module is set to 708 release_source_TQM 709 710 711 712 1) Release of msdu buffer due to drop_frame = 1. Flow is 713 not fetched and hence sw_peer_id and tid = 0 714 715 buffer_or_desc_type = e_num 0 716 MSDU_rel_buffertqm_release_reason = e_num 1 717 tqm_rr_rem_cmd_rem 718 719 720 721 722 723 2) Release of msdu buffer due to Flow is not fetched and 724 hence sw_peer_id and tid = 0 725 726 buffer_or_desc_type = e_num 0 727 MSDU_rel_buffertqm_release_reason = e_num 1 728 tqm_rr_rem_cmd_rem 729 730 731 732 733 734 3) Release of msdu link due to remove_mpdu or acked_mpdu 735 command. 736 737 buffer_or_desc_type = e_num1 738 msdu_link_descriptortqm_release_reason can be:e_num 1 739 tqm_rr_rem_cmd_reme_num 2 tqm_rr_rem_cmd_tx 740 741 e_num 3 tqm_rr_rem_cmd_notxe_num 4 tqm_rr_rem_cmd_aged 742 743 744 745 Sw_peer_id from the TX_MSDU_FLOW descriptor or 746 TX_MPDU_QUEUE descriptor 747 748 <legal all> 749 750 tid 751 752 Field only valid when Release_source_module is set to 753 release_source_TQM 754 755 756 757 1) Release of msdu buffer due to drop_frame = 1. Flow is 758 not fetched and hence sw_peer_id and tid = 0 759 760 buffer_or_desc_type = e_num 0 761 MSDU_rel_buffertqm_release_reason = e_num 1 762 tqm_rr_rem_cmd_rem 763 764 765 766 767 768 2) Release of msdu buffer due to Flow is not fetched and 769 hence sw_peer_id and tid = 0 770 771 buffer_or_desc_type = e_num 0 772 MSDU_rel_buffertqm_release_reason = e_num 1 773 tqm_rr_rem_cmd_rem 774 775 776 777 778 779 3) Release of msdu link due to remove_mpdu or acked_mpdu 780 command. 781 782 buffer_or_desc_type = e_num1 783 msdu_link_descriptortqm_release_reason can be:e_num 1 784 tqm_rr_rem_cmd_reme_num 2 tqm_rr_rem_cmd_tx 785 786 e_num 3 tqm_rr_rem_cmd_notxe_num 4 tqm_rr_rem_cmd_aged 787 788 789 790 791 792 This field represents the TID from the TX_MSDU_FLOW 793 descriptor or TX_MPDU_QUEUE descriptor 794 795 796 797 <legal all> 798 799 ring_id 800 801 Consumer: TQM/REO/RXDMA/SW 802 803 Producer: SRNG (of RXDMA) 804 805 806 807 For debugging. 808 809 This field is filled in by the SRNG module. 810 811 It help to identify the ring that is being looked <legal 812 all> 813 814 looping_count 815 816 Consumer: WBM/SW/FW 817 818 Producer: SW/TQM/RXDMA/REO/SWITCH 819 820 821 822 A count value that indicates the number of times the 823 producer of entries into the Buffer Manager Ring has looped 824 around the ring. 825 826 At initialization time, this value is set to 0. On the 827 first loop, this value is set to 1. After the max value is 828 reached allowed by the number of bits for this field, the 829 count value continues with 0 again. 830 831 832 833 In case SW is the consumer of the ring entries, it can 834 use this field to figure out up to where the producer of 835 entries has created new entries. This eliminates the need to 836 check where the head pointer' of the ring is located once 837 the SW starts processing an interrupt indicating that new 838 entries have been put into this ring... 839 840 841 842 Also note that SW if it wants only needs to look at the 843 LSB bit of this count value. 844 845 <legal all> 846 */ 847 848 849 /* EXTERNAL REFERENCE : struct buffer_addr_info released_buff_or_desc_addr_info */ 850 851 852 /* Description WBM_RELEASE_RING_0_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0 853 854 Address (lower 32 bits) of the MSDU buffer OR 855 MSDU_EXTENSION descriptor OR Link Descriptor 856 857 858 859 In case of 'NULL' pointer, this field is set to 0 860 861 <legal all> 862 */ 863 #define WBM_RELEASE_RING_0_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000 864 #define WBM_RELEASE_RING_0_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0 865 #define WBM_RELEASE_RING_0_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff 866 867 /* Description WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32 868 869 Address (upper 8 bits) of the MSDU buffer OR 870 MSDU_EXTENSION descriptor OR Link Descriptor 871 872 873 874 In case of 'NULL' pointer, this field is set to 0 875 876 <legal all> 877 */ 878 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004 879 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0 880 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff 881 882 /* Description WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER 883 884 Consumer: WBM 885 886 Producer: SW/FW 887 888 889 890 In case of 'NULL' pointer, this field is set to 0 891 892 893 894 Indicates to which buffer manager the buffer OR 895 MSDU_EXTENSION descriptor OR link descriptor that is being 896 pointed to shall be returned after the frame has been 897 processed. It is used by WBM for routing purposes. 898 899 900 901 <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned 902 to the WMB buffer idle list 903 904 <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be 905 returned to the WMB idle link descriptor idle list 906 907 <enum 2 FW_BM> This buffer shall be returned to the FW 908 909 <enum 3 SW0_BM> This buffer shall be returned to the SW, 910 ring 0 911 912 <enum 4 SW1_BM> This buffer shall be returned to the SW, 913 ring 1 914 915 <enum 5 SW2_BM> This buffer shall be returned to the SW, 916 ring 2 917 918 <enum 6 SW3_BM> This buffer shall be returned to the SW, 919 ring 3 920 921 <enum 7 SW4_BM> This buffer shall be returned to the SW, 922 ring 4 923 924 925 926 <legal all> 927 */ 928 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004 929 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8 930 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700 931 932 /* Description WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE 933 934 Cookie field exclusively used by SW. 935 936 937 938 In case of 'NULL' pointer, this field is set to 0 939 940 941 942 HW ignores the contents, accept that it passes the 943 programmed value on to other descriptors together with the 944 physical address 945 946 947 948 Field can be used by SW to for example associate the 949 buffers physical address with the virtual address 950 951 The bit definitions as used by SW are within SW HLD 952 specification 953 954 955 956 NOTE1: 957 958 The three most significant bits can have a special 959 meaning in case this struct is embedded in a TX_MPDU_DETAILS 960 STRUCT, and field transmit_bw_restriction is set 961 962 963 964 In case of NON punctured transmission: 965 966 Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only 967 968 Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only 969 970 Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only 971 972 Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only 973 974 975 976 In case of punctured transmission: 977 978 Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only 979 980 Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only 981 982 Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only 983 984 Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only 985 986 Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only 987 988 Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only 989 990 Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only 991 992 Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only 993 994 995 996 Note: a punctured transmission is indicated by the 997 presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler 998 TLV 999 1000 1001 1002 NOTE 2:The five most significant bits can have a special 1003 meaning in case this struct is embedded in an 1004 RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is 1005 configured for passing on the additional info 1006 from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV 1007 (FR56821). This is not supported in HastingsPrime, Pine or 1008 Moselle. 1009 1010 1011 1012 Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS 1013 control field 1014 1015 1016 1017 Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field 1018 indicates MPDUs with a QoS control field. 1019 1020 1021 1022 1023 1024 <legal all> 1025 */ 1026 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004 1027 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11 1028 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800 1029 1030 /* Description WBM_RELEASE_RING_2_RELEASE_SOURCE_MODULE 1031 1032 Indicates which module initiated the release of this 1033 buffer or descriptor 1034 1035 1036 1037 <enum 0 release_source_TQM> TQM released this buffer or 1038 descriptor 1039 1040 <enum 1 release_source_RXDMA> RXDMA released this buffer 1041 or descriptor 1042 1043 <enum 2 release_source_REO> REO released this buffer or 1044 descriptor 1045 1046 <enum 3 release_source_FW> FW released this buffer or 1047 descriptor 1048 1049 <enum 4 release_source_SW> SW released this buffer or 1050 descriptor 1051 1052 <legal 0-4> 1053 */ 1054 #define WBM_RELEASE_RING_2_RELEASE_SOURCE_MODULE_OFFSET 0x00000008 1055 #define WBM_RELEASE_RING_2_RELEASE_SOURCE_MODULE_LSB 0 1056 #define WBM_RELEASE_RING_2_RELEASE_SOURCE_MODULE_MASK 0x00000007 1057 1058 /* Description WBM_RELEASE_RING_2_BM_ACTION 1059 1060 Consumer: WBM/SW/FW 1061 1062 Producer: SW/TQM/RXDMA/REO/SWITCH 1063 1064 1065 1066 Field only valid when the field return_buffer_manager in 1067 the Released_buff_or_desc_addr_info indicates: 1068 1069 WBM_IDLE_BUF_LIST or 1070 1071 WBM_IDLE_DESC_LIST 1072 1073 1074 1075 An MSDU extension descriptor shall never be marked as 1076 1077 1078 1079 <enum 0 Put_in_idle_list> Put the buffer or descriptor 1080 back in the idle list. In case of MSDU or MDPU link 1081 descriptor, BM does not need to check to release any 1082 individual MSDU buffers 1083 1084 1085 1086 <enum 1 release_msdu_list > This BM action can only be 1087 used in combination with buffer_or_desc_type being 1088 msdu_link_descriptor. Field first_msdu_index points out 1089 which MSDU pointer in the MSDU link descriptor is the first 1090 of an MPDU that is released. 1091 1092 BM shall release all the MSDU buffers linked to this 1093 first MSDU buffer pointer. All related MSDU buffer pointer 1094 entries shall be set to value 0, which represents the 'NULL 1095 pointer. When all MSDU buffer pointers in the MSDU link 1096 descriptor are 'NULL', the MSDU link descriptor itself shall 1097 also be released. 1098 1099 1100 1101 <enum 2 Put_in_idle_list_expanded> CURRENTLY NOT 1102 IMPLEMENTED.... 1103 1104 Put the buffer or descriptor back in the idle list. Only 1105 valid in combination with buffer_or_desc_type indicating 1106 MDPU_link_descriptor. 1107 1108 BM shall release the MPDU link descriptor as well as all 1109 MSDUs that are linked to the MPDUs in this descriptor. 1110 1111 1112 1113 <legal 0-2> 1114 */ 1115 #define WBM_RELEASE_RING_2_BM_ACTION_OFFSET 0x00000008 1116 #define WBM_RELEASE_RING_2_BM_ACTION_LSB 3 1117 #define WBM_RELEASE_RING_2_BM_ACTION_MASK 0x00000038 1118 1119 /* Description WBM_RELEASE_RING_2_BUFFER_OR_DESC_TYPE 1120 1121 Consumer: WBM/SW/FW 1122 1123 Producer: SW/TQM/RXDMA/REO/SWITCH 1124 1125 1126 1127 Field only valid when WBM is marked as the 1128 return_buffer_manager in the Released_Buffer_address_info 1129 1130 1131 1132 Indicates that type of buffer or descriptor is being 1133 released 1134 1135 1136 1137 <enum 0 MSDU_rel_buffer> The address points to an MSDU 1138 buffer 1139 1140 <enum 1 msdu_link_descriptor> The address points to an 1141 TX MSDU link descriptor 1142 1143 <enum 2 mpdu_link_descriptor> The address points to an 1144 MPDU link descriptor 1145 1146 <enum 3 msdu_ext_descriptor > The address points to an 1147 MSDU extension descriptor. 1148 1149 In case BM finds this one in a release ring, it passes 1150 it on to FW... 1151 1152 <enum 4 queue_ext_descriptor> The address points to an 1153 TQM queue extension descriptor. WBM should treat this is the 1154 same way as a link descriptor. That is, put the 128 byte 1155 buffer back in the link buffer idle list. 1156 1157 1158 1159 <legal 0-4> 1160 */ 1161 #define WBM_RELEASE_RING_2_BUFFER_OR_DESC_TYPE_OFFSET 0x00000008 1162 #define WBM_RELEASE_RING_2_BUFFER_OR_DESC_TYPE_LSB 6 1163 #define WBM_RELEASE_RING_2_BUFFER_OR_DESC_TYPE_MASK 0x000001c0 1164 1165 /* Description WBM_RELEASE_RING_2_FIRST_MSDU_INDEX 1166 1167 Consumer: WBM/SW/FW 1168 1169 Producer: SW/TQM/RXDMA/REO/SWITCH 1170 1171 1172 1173 Field only valid for the bm_action release_msdu_list. 1174 1175 1176 1177 The index of the first MSDU in an MSDU link descriptor 1178 all belonging to the same MPDU. 1179 1180 1181 1182 <legal 0-6> 1183 */ 1184 #define WBM_RELEASE_RING_2_FIRST_MSDU_INDEX_OFFSET 0x00000008 1185 #define WBM_RELEASE_RING_2_FIRST_MSDU_INDEX_LSB 9 1186 #define WBM_RELEASE_RING_2_FIRST_MSDU_INDEX_MASK 0x00001e00 1187 1188 /* Description WBM_RELEASE_RING_2_TQM_RELEASE_REASON 1189 1190 Consumer: WBM/SW/FW 1191 1192 Producer: TQM 1193 1194 1195 1196 Field only valid when Release_source_module is set to 1197 release_source_TQM 1198 1199 1200 1201 (rr = Release Reason) 1202 1203 <enum 0 tqm_rr_frame_acked> frame is removed because an 1204 ACK of BA for it was received 1205 1206 <enum 1 tqm_rr_rem_cmd_rem> frame is removed because a 1207 remove command of type Remove_mpdus initiated by SW 1208 1209 <enum 2 tqm_rr_rem_cmd_tx> frame is removed because a 1210 remove command of type Remove_transmitted_mpdus initiated by 1211 SW 1212 1213 <enum 3 tqm_rr_rem_cmd_notx> frame is removed because a 1214 remove command of type Remove_untransmitted_mpdus initiated 1215 by SW 1216 1217 <enum 4 tqm_rr_rem_cmd_aged> frame is removed because a 1218 remove command of type Remove_aged_mpdus or 1219 Remove_aged_msdus initiated by SW 1220 1221 <enum 5 tqm_fw_reason1> frame is removed because a 1222 remove command where fw indicated that remove reason is 1223 fw_reason1 1224 1225 <enum 6 tqm_fw_reason2> frame is removed because a 1226 remove command where fw indicated that remove reason is 1227 fw_reason1 1228 1229 <enum 7 tqm_fw_reason3> frame is removed because a 1230 remove command where fw indicated that remove reason is 1231 fw_reason1 1232 1233 <enum 8 tqm_rr_rem_cmd_disable_queue> frame is removed 1234 because a remove command of type 1235 remove_mpdus_and_disable_queue or 1236 remove_msdus_and_disable_flow initiated by SW 1237 1238 1239 1240 <legal 0-8> 1241 1242 1243 1244 In case of TQM releasing Tx MSDU link descriptors with 1245 Tqm_release_reason set to 'tqm_fw_reason3,' HastingsPrime 1246 WBM can optionally release the MSDU buffers pointed to by 1247 the MSDU link descriptors to FW and override the 1248 tx_rate_stats field, for FW reinjection of these MSDUs 1249 (FR54309). This is not supported in Pine. 1250 */ 1251 #define WBM_RELEASE_RING_2_TQM_RELEASE_REASON_OFFSET 0x00000008 1252 #define WBM_RELEASE_RING_2_TQM_RELEASE_REASON_LSB 13 1253 #define WBM_RELEASE_RING_2_TQM_RELEASE_REASON_MASK 0x0001e000 1254 1255 /* Description WBM_RELEASE_RING_2_RXDMA_PUSH_REASON 1256 1257 Field only valid when Release_source_module is set to 1258 release_source_RXDMA 1259 1260 1261 1262 Indicates why rxdma pushed the frame to this ring 1263 1264 1265 1266 <enum 0 rxdma_error_detected> RXDMA detected an error an 1267 pushed this frame to this queue 1268 1269 <enum 1 rxdma_routing_instruction> RXDMA pushed the 1270 frame to this queue per received routing instructions. No 1271 error within RXDMA was detected 1272 1273 <enum 2 rxdma_rx_flush> RXDMA received an RX_FLUSH. As a 1274 result the MSDU link descriptor might not have the 1275 last_msdu_in_mpdu_flag set, but instead WBM might just see a 1276 NULL pointer in the MSDU link descriptor. This is to be 1277 considered a normal condition for this scenario. 1278 1279 1280 1281 <legal 0 - 2> 1282 1283 1284 1285 In case of RXDMA releasing Rx MSDU link descriptors,' 1286 Maple/Spruce WBM can optionally override the tx_rate_stats 1287 field with Rx_msdu_desc_info_details (FR59859). This is not 1288 supported in HastingsPrime, Pine or Moselle. 1289 */ 1290 #define WBM_RELEASE_RING_2_RXDMA_PUSH_REASON_OFFSET 0x00000008 1291 #define WBM_RELEASE_RING_2_RXDMA_PUSH_REASON_LSB 17 1292 #define WBM_RELEASE_RING_2_RXDMA_PUSH_REASON_MASK 0x00060000 1293 1294 /* Description WBM_RELEASE_RING_2_RXDMA_ERROR_CODE 1295 1296 Field only valid when 'rxdma_push_reason' set to 1297 'rxdma_error_detected'. 1298 1299 1300 1301 <enum 0 rxdma_overflow_err>MPDU frame is not complete 1302 due to a FIFO overflow error in RXPCU. 1303 1304 <enum 1 rxdma_mpdu_length_err>MPDU frame is not complete 1305 due to receiving incomplete MPDU from the PHY 1306 1307 1308 <enum 3 rxdma_decrypt_err>CRYPTO reported a decryption 1309 error or CRYPTO received an encrypted frame, but did not get 1310 a valid corresponding key id in the peer entry. 1311 1312 <enum 4 rxdma_tkip_mic_err>CRYPTO reported a TKIP MIC 1313 error 1314 1315 <enum 5 rxdma_unecrypted_err>CRYPTO reported an 1316 unencrypted frame error when encrypted was expected 1317 1318 <enum 6 rxdma_msdu_len_err>RX OLE reported an MSDU 1319 length error 1320 1321 <enum 7 rxdma_msdu_limit_err>RX OLE reported that max 1322 number of MSDUs allowed in an MPDU got exceeded 1323 1324 <enum 8 rxdma_wifi_parse_err>RX OLE reported a parsing 1325 error 1326 1327 <enum 9 rxdma_amsdu_parse_err>RX OLE reported an A-MSDU 1328 parsing error 1329 1330 <enum 10 rxdma_sa_timeout_err>RX OLE reported a timeout 1331 during SA search 1332 1333 <enum 11 rxdma_da_timeout_err>RX OLE reported a timeout 1334 during DA search 1335 1336 <enum 12 rxdma_flow_timeout_err>RX OLE reported a 1337 timeout during flow search 1338 1339 <enum 13 rxdma_flush_request>RXDMA received a flush 1340 request 1341 1342 <enum 14 rxdma_amsdu_fragment_err>Rx PCU reported A-MSDU 1343 present as well as a fragmented MPDU. A-MSDU defragmentation 1344 is not supported in Lithium SW so this is treated as an 1345 error. 1346 */ 1347 #define WBM_RELEASE_RING_2_RXDMA_ERROR_CODE_OFFSET 0x00000008 1348 #define WBM_RELEASE_RING_2_RXDMA_ERROR_CODE_LSB 19 1349 #define WBM_RELEASE_RING_2_RXDMA_ERROR_CODE_MASK 0x00f80000 1350 1351 /* Description WBM_RELEASE_RING_2_REO_PUSH_REASON 1352 1353 Field only valid when Release_source_module is set to 1354 release_source_REO 1355 1356 1357 1358 Indicates why REO pushed the frame to this release ring 1359 1360 1361 1362 <enum 0 reo_error_detected> Reo detected an error an 1363 pushed this frame to this queue 1364 1365 <enum 1 reo_routing_instruction> Reo pushed the frame to 1366 this queue per received routing instructions. No error 1367 within REO was detected 1368 1369 1370 1371 <legal 0 - 1> 1372 1373 1374 1375 In case of REO releasing Rx MSDU link descriptors,' 1376 Maple/Spruce WBM can optionally override 1377 the tx_rate_stats field with 1378 Rx_msdu_desc_info_details (FR59859). This is not supported 1379 in HastingsPrime, Pine or Moselle. 1380 */ 1381 #define WBM_RELEASE_RING_2_REO_PUSH_REASON_OFFSET 0x00000008 1382 #define WBM_RELEASE_RING_2_REO_PUSH_REASON_LSB 24 1383 #define WBM_RELEASE_RING_2_REO_PUSH_REASON_MASK 0x03000000 1384 1385 /* Description WBM_RELEASE_RING_2_REO_ERROR_CODE 1386 1387 Field only valid when 'Reo_push_reason' set to 1388 'reo_error_detected'. 1389 1390 1391 1392 <enum 0 reo_queue_desc_addr_zero> Reo queue descriptor 1393 provided in the REO_ENTRANCE ring is set to 0 1394 1395 <enum 1 reo_queue_desc_not_valid> Reo queue descriptor 1396 valid bit is NOT set 1397 1398 <enum 2 ampdu_in_non_ba> AMPDU frame received without BA 1399 session having been setup. 1400 1401 <enum 3 non_ba_duplicate> Non-BA session, SN equal to 1402 SSN, Retry bit set: duplicate frame 1403 1404 <enum 4 ba_duplicate> BA session, duplicate frame 1405 1406 <enum 5 regular_frame_2k_jump> A normal (management/data 1407 frame) received with 2K jump in SN 1408 1409 <enum 6 bar_frame_2k_jump> A bar received with 2K jump 1410 in SSN 1411 1412 <enum 7 regular_frame_OOR> A normal (management/data 1413 frame) received with SN falling within the OOR window 1414 1415 <enum 8 bar_frame_OOR> A bar received with SSN falling 1416 within the OOR window 1417 1418 <enum 9 bar_frame_no_ba_session> A bar received without 1419 a BA session 1420 1421 <enum 10 bar_frame_sn_equals_ssn> A bar received with 1422 SSN equal to SN 1423 1424 <enum 11 pn_check_failed> PN Check Failed packet. 1425 1426 <enum 12 2k_error_handling_flag_set> Frame is forwarded 1427 as a result of the 'Seq_2k_error_detected_flag' been set in 1428 the REO Queue descriptor 1429 1430 <enum 13 pn_error_handling_flag_set> Frame is forwarded 1431 as a result of the 'pn_error_detected_flag' been set in the 1432 REO Queue descriptor 1433 1434 <enum 14 queue_descriptor_blocked_set> Frame is 1435 forwarded as a result of the queue descriptor(address) being 1436 blocked as SW/FW seems to be currently in the process of 1437 making updates to this descriptor... 1438 1439 1440 1441 <legal 0-14> 1442 */ 1443 #define WBM_RELEASE_RING_2_REO_ERROR_CODE_OFFSET 0x00000008 1444 #define WBM_RELEASE_RING_2_REO_ERROR_CODE_LSB 26 1445 #define WBM_RELEASE_RING_2_REO_ERROR_CODE_MASK 0x7c000000 1446 1447 /* Description WBM_RELEASE_RING_2_WBM_INTERNAL_ERROR 1448 1449 Can only be set by WBM. 1450 1451 1452 1453 Is set when WBM got a buffer pointer but the action was 1454 to push it to the idle link descriptor ring or do link 1455 related activity 1456 1457 OR 1458 1459 Is set when WBM got a link buffer pointer but the action 1460 was to push it to the buffer descriptor ring 1461 1462 1463 1464 <legal all> 1465 */ 1466 #define WBM_RELEASE_RING_2_WBM_INTERNAL_ERROR_OFFSET 0x00000008 1467 #define WBM_RELEASE_RING_2_WBM_INTERNAL_ERROR_LSB 31 1468 #define WBM_RELEASE_RING_2_WBM_INTERNAL_ERROR_MASK 0x80000000 1469 1470 /* Description WBM_RELEASE_RING_3_TQM_STATUS_NUMBER 1471 1472 Field only valid when Release_source_module is set to 1473 release_source_TQM 1474 1475 1476 1477 The value in this field is equal to value of the 1478 'TQM_CMD_Number' field the TQM command or the 1479 'TQM_add_cmd_Number' field from the TQM entrance ring 1480 descriptor 1481 1482 1483 1484 This field helps to correlate the statuses with the TQM 1485 commands. 1486 1487 1488 1489 NOTE that SW could program this number to be equal to 1490 the PPDU_ID number in case direct correlation with the PPDU 1491 ID is desired 1492 1493 1494 1495 <legal all> 1496 */ 1497 #define WBM_RELEASE_RING_3_TQM_STATUS_NUMBER_OFFSET 0x0000000c 1498 #define WBM_RELEASE_RING_3_TQM_STATUS_NUMBER_LSB 0 1499 #define WBM_RELEASE_RING_3_TQM_STATUS_NUMBER_MASK 0x00ffffff 1500 1501 /* Description WBM_RELEASE_RING_3_TRANSMIT_COUNT 1502 1503 Field only valid when Release_source_module is set to 1504 release_source_TQM 1505 1506 1507 1508 The number of times this frame has been transmitted 1509 */ 1510 #define WBM_RELEASE_RING_3_TRANSMIT_COUNT_OFFSET 0x0000000c 1511 #define WBM_RELEASE_RING_3_TRANSMIT_COUNT_LSB 24 1512 #define WBM_RELEASE_RING_3_TRANSMIT_COUNT_MASK 0x7f000000 1513 1514 /* Description WBM_RELEASE_RING_3_MSDU_CONTINUATION 1515 1516 FR53947 requests MSDU_continuation reporting for Rx 1517 MSDUs in Pine and HastingsPrime for which 1518 SW_release_details_valid may not be set. 1519 1520 <legal all> 1521 */ 1522 #define WBM_RELEASE_RING_3_MSDU_CONTINUATION_OFFSET 0x0000000c 1523 #define WBM_RELEASE_RING_3_MSDU_CONTINUATION_LSB 31 1524 #define WBM_RELEASE_RING_3_MSDU_CONTINUATION_MASK 0x80000000 1525 1526 /* Description WBM_RELEASE_RING_4_ACK_FRAME_RSSI 1527 1528 This field is only valid when the source is TQM. 1529 1530 1531 1532 If this frame is removed as the result of the reception 1533 of an ACK or BA, this field indicates the RSSI of the 1534 received ACK or BA frame. 1535 1536 1537 1538 When the frame is removed as result of a direct remove 1539 command from the SW, this field is set to 0x0 (which is 1540 never a valid value when real RSSI is available) 1541 1542 1543 1544 <legal all> 1545 */ 1546 #define WBM_RELEASE_RING_4_ACK_FRAME_RSSI_OFFSET 0x00000010 1547 #define WBM_RELEASE_RING_4_ACK_FRAME_RSSI_LSB 0 1548 #define WBM_RELEASE_RING_4_ACK_FRAME_RSSI_MASK 0x000000ff 1549 1550 /* Description WBM_RELEASE_RING_4_SW_RELEASE_DETAILS_VALID 1551 1552 Consumer: SW 1553 1554 Producer: WBM 1555 1556 1557 1558 When set, some WBM specific release info for SW is 1559 valid. 1560 1561 This is set when WMB got a 'release_msdu_list' command 1562 from TQM and the return buffer manager is not WMB. WBM will 1563 then de-aggregate all the MSDUs and pass them one at a time 1564 on to the 'buffer owner' 1565 1566 1567 1568 <legal all> 1569 */ 1570 #define WBM_RELEASE_RING_4_SW_RELEASE_DETAILS_VALID_OFFSET 0x00000010 1571 #define WBM_RELEASE_RING_4_SW_RELEASE_DETAILS_VALID_LSB 8 1572 #define WBM_RELEASE_RING_4_SW_RELEASE_DETAILS_VALID_MASK 0x00000100 1573 1574 /* Description WBM_RELEASE_RING_4_FIRST_MSDU 1575 1576 Field only valid when SW_release_details_valid is set. 1577 1578 1579 1580 Consumer: SW 1581 1582 Producer: WBM 1583 1584 1585 1586 When set, this MSDU is the first MSDU pointed to in the 1587 'release_msdu_list' command. 1588 1589 1590 1591 FR53947 extends this to Rx MSDUs in Pine and 1592 HastingsPrime for which SW_release_details_valid may not be 1593 set. 1594 1595 <legal all> 1596 */ 1597 #define WBM_RELEASE_RING_4_FIRST_MSDU_OFFSET 0x00000010 1598 #define WBM_RELEASE_RING_4_FIRST_MSDU_LSB 9 1599 #define WBM_RELEASE_RING_4_FIRST_MSDU_MASK 0x00000200 1600 1601 /* Description WBM_RELEASE_RING_4_LAST_MSDU 1602 1603 Field only valid when SW_release_details_valid is set. 1604 1605 1606 1607 Consumer: SW 1608 1609 Producer: WBM 1610 1611 1612 1613 When set, this MSDU is the last MSDU pointed to in the 1614 'release_msdu_list' command. 1615 1616 1617 1618 FR53947 extends this to Rx MSDUs in Pine and 1619 HastingsPrime for which SW_release_details_valid may not be 1620 set. 1621 1622 <legal all> 1623 */ 1624 #define WBM_RELEASE_RING_4_LAST_MSDU_OFFSET 0x00000010 1625 #define WBM_RELEASE_RING_4_LAST_MSDU_LSB 10 1626 #define WBM_RELEASE_RING_4_LAST_MSDU_MASK 0x00000400 1627 1628 /* Description WBM_RELEASE_RING_4_MSDU_PART_OF_AMSDU 1629 1630 Field only valid when SW_release_details_valid is set. 1631 1632 1633 1634 Consumer: SW 1635 1636 Producer: WBM 1637 1638 1639 1640 When set, this MSDU was part of an A-MSDU in MPDU 1641 1642 <legal all> 1643 */ 1644 #define WBM_RELEASE_RING_4_MSDU_PART_OF_AMSDU_OFFSET 0x00000010 1645 #define WBM_RELEASE_RING_4_MSDU_PART_OF_AMSDU_LSB 11 1646 #define WBM_RELEASE_RING_4_MSDU_PART_OF_AMSDU_MASK 0x00000800 1647 1648 /* Description WBM_RELEASE_RING_4_FW_TX_NOTIFY_FRAME 1649 1650 Field only valid when SW_release_details_valid is set. 1651 1652 1653 1654 Consumer: SW 1655 1656 Producer: WBM 1657 1658 1659 1660 This is the FW_tx_notify_frame field from the 1661 1662 <legal all> 1663 */ 1664 #define WBM_RELEASE_RING_4_FW_TX_NOTIFY_FRAME_OFFSET 0x00000010 1665 #define WBM_RELEASE_RING_4_FW_TX_NOTIFY_FRAME_LSB 12 1666 #define WBM_RELEASE_RING_4_FW_TX_NOTIFY_FRAME_MASK 0x00001000 1667 1668 /* Description WBM_RELEASE_RING_4_BUFFER_TIMESTAMP 1669 1670 Field only valid when SW_release_details_valid is set. 1671 1672 1673 1674 Consumer: SW 1675 1676 Producer: WBM 1677 1678 1679 1680 This is the Buffer_timestamp field from the 1681 TX_MSDU_DETAILS for this frame from the MSDU link 1682 descriptor. 1683 1684 1685 1686 Timestamp in units of 1024 µs 1687 1688 <legal all> 1689 */ 1690 #define WBM_RELEASE_RING_4_BUFFER_TIMESTAMP_OFFSET 0x00000010 1691 #define WBM_RELEASE_RING_4_BUFFER_TIMESTAMP_LSB 13 1692 #define WBM_RELEASE_RING_4_BUFFER_TIMESTAMP_MASK 0xffffe000 1693 1694 /* EXTERNAL REFERENCE : struct tx_rate_stats_info tx_rate_stats */ 1695 1696 1697 /* Description WBM_RELEASE_RING_5_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID 1698 1699 When set all other fields in this STRUCT contain valid 1700 info. 1701 1702 1703 1704 1705 <legal all> 1706 */ 1707 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_OFFSET 0x00000014 1708 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_LSB 0 1709 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_MASK 0x00000001 1710 1711 /* Description WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_BW 1712 1713 Field only valid when Tx_rate_stats_info_valid is set 1714 1715 1716 1717 Indicates the BW of the upcoming transmission that shall 1718 likely start in about 3 -4 us on the medium 1719 1720 1721 1722 <enum 0 transmit_bw_20_MHz> 1723 1724 <enum 1 transmit_bw_40_MHz> 1725 1726 <enum 2 transmit_bw_80_MHz> 1727 1728 <enum 3 transmit_bw_160_MHz> 1729 1730 1731 1732 <legal all> 1733 */ 1734 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_BW_OFFSET 0x00000014 1735 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_BW_LSB 1 1736 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_BW_MASK 0x00000006 1737 1738 /* Description WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_PKT_TYPE 1739 1740 Field only valid when Tx_rate_stats_info_valid is set 1741 1742 1743 1744 Field filled in by PDG. 1745 1746 Not valid when in SW transmit mode 1747 1748 1749 1750 The packet type 1751 1752 <enum 0 dot11a>802.11a PPDU type 1753 1754 <enum 1 dot11b>802.11b PPDU type 1755 1756 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 1757 1758 <enum 3 dot11ac>802.11ac PPDU type 1759 1760 <enum 4 dot11ax>802.11ax PPDU type 1761 1762 <enum 5 dot11ba>802.11ba (WUR) PPDU type 1763 */ 1764 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_PKT_TYPE_OFFSET 0x00000014 1765 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_PKT_TYPE_LSB 3 1766 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_PKT_TYPE_MASK 0x00000078 1767 1768 /* Description WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_STBC 1769 1770 Field only valid when Tx_rate_stats_info_valid is set 1771 1772 1773 1774 Field filled in by PDG. 1775 1776 Not valid when in SW transmit mode 1777 1778 1779 1780 When set, STBC transmission rate was used. 1781 */ 1782 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_STBC_OFFSET 0x00000014 1783 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_STBC_LSB 7 1784 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_STBC_MASK 0x00000080 1785 1786 /* Description WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_LDPC 1787 1788 Field only valid when Tx_rate_stats_info_valid is set 1789 1790 1791 1792 Field filled in by PDG. 1793 1794 Not valid when in SW transmit mode 1795 1796 1797 1798 When set, use LDPC transmission rates 1799 */ 1800 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_LDPC_OFFSET 0x00000014 1801 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_LDPC_LSB 8 1802 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_LDPC_MASK 0x00000100 1803 1804 /* Description WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_SGI 1805 1806 Field only valid when Tx_rate_stats_info_valid is set 1807 1808 1809 1810 Field filled in by PDG. 1811 1812 Not valid when in SW transmit mode 1813 1814 1815 1816 <enum 0 0_8_us_sgi > Legacy normal GI. Can also be 1817 used for HE 1818 1819 <enum 1 0_4_us_sgi > Legacy short GI. Can also be 1820 used for HE 1821 1822 <enum 2 1_6_us_sgi > HE related GI 1823 1824 <enum 3 3_2_us_sgi > HE related GI 1825 1826 <legal 0 - 3> 1827 */ 1828 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_SGI_OFFSET 0x00000014 1829 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_SGI_LSB 9 1830 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_SGI_MASK 0x00000600 1831 1832 /* Description WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_MCS 1833 1834 Field only valid when Tx_rate_stats_info_valid is set 1835 1836 1837 1838 Field filled in by PDG. 1839 1840 Not valid when in SW transmit mode 1841 1842 1843 1844 For details, refer to MCS_TYPE description 1845 1846 <legal all> 1847 */ 1848 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_MCS_OFFSET 0x00000014 1849 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_MCS_LSB 11 1850 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_MCS_MASK 0x00007800 1851 1852 /* Description WBM_RELEASE_RING_5_TX_RATE_STATS_OFDMA_TRANSMISSION 1853 1854 Field only valid when Tx_rate_stats_info_valid is set 1855 1856 1857 1858 Field filled in by PDG. 1859 1860 1861 1862 Set when the transmission was an OFDMA transmission (DL 1863 or UL). 1864 1865 <legal all> 1866 */ 1867 #define WBM_RELEASE_RING_5_TX_RATE_STATS_OFDMA_TRANSMISSION_OFFSET 0x00000014 1868 #define WBM_RELEASE_RING_5_TX_RATE_STATS_OFDMA_TRANSMISSION_LSB 15 1869 #define WBM_RELEASE_RING_5_TX_RATE_STATS_OFDMA_TRANSMISSION_MASK 0x00008000 1870 1871 /* Description WBM_RELEASE_RING_5_TX_RATE_STATS_TONES_IN_RU 1872 1873 Field only valid when Tx_rate_stats_info_valid is set 1874 1875 1876 1877 Field filled in by PDG. 1878 1879 Not valid when in SW transmit mode 1880 1881 1882 1883 The number of tones in the RU used. 1884 1885 <legal all> 1886 */ 1887 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TONES_IN_RU_OFFSET 0x00000014 1888 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TONES_IN_RU_LSB 16 1889 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TONES_IN_RU_MASK 0x0fff0000 1890 1891 /* Description WBM_RELEASE_RING_5_TX_RATE_STATS_RESERVED_0A 1892 1893 <legal 0> 1894 */ 1895 #define WBM_RELEASE_RING_5_TX_RATE_STATS_RESERVED_0A_OFFSET 0x00000014 1896 #define WBM_RELEASE_RING_5_TX_RATE_STATS_RESERVED_0A_LSB 28 1897 #define WBM_RELEASE_RING_5_TX_RATE_STATS_RESERVED_0A_MASK 0xf0000000 1898 1899 /* Description WBM_RELEASE_RING_6_TX_RATE_STATS_PPDU_TRANSMISSION_TSF 1900 1901 Field only valid when Tx_rate_stats_info_valid is set 1902 1903 1904 1905 Based on a HWSCH configuration register setting, this 1906 field either contains: 1907 1908 1909 1910 Lower 32 bits of the TSF, snapshot of this value when 1911 transmission of the PPDU containing the frame finished. 1912 1913 OR 1914 1915 Lower 32 bits of the TSF, snapshot of this value when 1916 transmission of the PPDU containing the frame started 1917 1918 1919 1920 <legal all> 1921 */ 1922 #define WBM_RELEASE_RING_6_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_OFFSET 0x00000018 1923 #define WBM_RELEASE_RING_6_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_LSB 0 1924 #define WBM_RELEASE_RING_6_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_MASK 0xffffffff 1925 1926 /* Description WBM_RELEASE_RING_7_SW_PEER_ID 1927 1928 Field only valid when Release_source_module is set to 1929 release_source_TQM 1930 1931 1932 1933 1) Release of msdu buffer due to drop_frame = 1. Flow is 1934 not fetched and hence sw_peer_id and tid = 0 1935 1936 buffer_or_desc_type = e_num 0 1937 MSDU_rel_buffertqm_release_reason = e_num 1 1938 tqm_rr_rem_cmd_rem 1939 1940 1941 1942 1943 1944 2) Release of msdu buffer due to Flow is not fetched and 1945 hence sw_peer_id and tid = 0 1946 1947 buffer_or_desc_type = e_num 0 1948 MSDU_rel_buffertqm_release_reason = e_num 1 1949 tqm_rr_rem_cmd_rem 1950 1951 1952 1953 1954 1955 3) Release of msdu link due to remove_mpdu or acked_mpdu 1956 command. 1957 1958 buffer_or_desc_type = e_num1 1959 msdu_link_descriptortqm_release_reason can be:e_num 1 1960 tqm_rr_rem_cmd_reme_num 2 tqm_rr_rem_cmd_tx 1961 1962 e_num 3 tqm_rr_rem_cmd_notxe_num 4 tqm_rr_rem_cmd_aged 1963 1964 1965 1966 Sw_peer_id from the TX_MSDU_FLOW descriptor or 1967 TX_MPDU_QUEUE descriptor 1968 1969 <legal all> 1970 */ 1971 #define WBM_RELEASE_RING_7_SW_PEER_ID_OFFSET 0x0000001c 1972 #define WBM_RELEASE_RING_7_SW_PEER_ID_LSB 0 1973 #define WBM_RELEASE_RING_7_SW_PEER_ID_MASK 0x0000ffff 1974 1975 /* Description WBM_RELEASE_RING_7_TID 1976 1977 Field only valid when Release_source_module is set to 1978 release_source_TQM 1979 1980 1981 1982 1) Release of msdu buffer due to drop_frame = 1. Flow is 1983 not fetched and hence sw_peer_id and tid = 0 1984 1985 buffer_or_desc_type = e_num 0 1986 MSDU_rel_buffertqm_release_reason = e_num 1 1987 tqm_rr_rem_cmd_rem 1988 1989 1990 1991 1992 1993 2) Release of msdu buffer due to Flow is not fetched and 1994 hence sw_peer_id and tid = 0 1995 1996 buffer_or_desc_type = e_num 0 1997 MSDU_rel_buffertqm_release_reason = e_num 1 1998 tqm_rr_rem_cmd_rem 1999 2000 2001 2002 2003 2004 3) Release of msdu link due to remove_mpdu or acked_mpdu 2005 command. 2006 2007 buffer_or_desc_type = e_num1 2008 msdu_link_descriptortqm_release_reason can be:e_num 1 2009 tqm_rr_rem_cmd_reme_num 2 tqm_rr_rem_cmd_tx 2010 2011 e_num 3 tqm_rr_rem_cmd_notxe_num 4 tqm_rr_rem_cmd_aged 2012 2013 2014 2015 2016 2017 This field represents the TID from the TX_MSDU_FLOW 2018 descriptor or TX_MPDU_QUEUE descriptor 2019 2020 2021 2022 <legal all> 2023 */ 2024 #define WBM_RELEASE_RING_7_TID_OFFSET 0x0000001c 2025 #define WBM_RELEASE_RING_7_TID_LSB 16 2026 #define WBM_RELEASE_RING_7_TID_MASK 0x000f0000 2027 2028 /* Description WBM_RELEASE_RING_7_RING_ID 2029 2030 Consumer: TQM/REO/RXDMA/SW 2031 2032 Producer: SRNG (of RXDMA) 2033 2034 2035 2036 For debugging. 2037 2038 This field is filled in by the SRNG module. 2039 2040 It help to identify the ring that is being looked <legal 2041 all> 2042 */ 2043 #define WBM_RELEASE_RING_7_RING_ID_OFFSET 0x0000001c 2044 #define WBM_RELEASE_RING_7_RING_ID_LSB 20 2045 #define WBM_RELEASE_RING_7_RING_ID_MASK 0x0ff00000 2046 2047 /* Description WBM_RELEASE_RING_7_LOOPING_COUNT 2048 2049 Consumer: WBM/SW/FW 2050 2051 Producer: SW/TQM/RXDMA/REO/SWITCH 2052 2053 2054 2055 A count value that indicates the number of times the 2056 producer of entries into the Buffer Manager Ring has looped 2057 around the ring. 2058 2059 At initialization time, this value is set to 0. On the 2060 first loop, this value is set to 1. After the max value is 2061 reached allowed by the number of bits for this field, the 2062 count value continues with 0 again. 2063 2064 2065 2066 In case SW is the consumer of the ring entries, it can 2067 use this field to figure out up to where the producer of 2068 entries has created new entries. This eliminates the need to 2069 check where the head pointer' of the ring is located once 2070 the SW starts processing an interrupt indicating that new 2071 entries have been put into this ring... 2072 2073 2074 2075 Also note that SW if it wants only needs to look at the 2076 LSB bit of this count value. 2077 2078 <legal all> 2079 */ 2080 #define WBM_RELEASE_RING_7_LOOPING_COUNT_OFFSET 0x0000001c 2081 #define WBM_RELEASE_RING_7_LOOPING_COUNT_LSB 28 2082 #define WBM_RELEASE_RING_7_LOOPING_COUNT_MASK 0xf0000000 2083 2084 2085 #endif // _WBM_RELEASE_RING_H_ 2086