1*5113495bSYour Name /* 2*5113495bSYour Name * Copyright (c) 2020, The Linux Foundation. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 18*5113495bSYour Name // 19*5113495bSYour Name // wcss_seq_hwiobase.h : automatically generated by Autoseq 3.8 2/21/2020 20*5113495bSYour Name // User Name:c_landav 21*5113495bSYour Name // 22*5113495bSYour Name // !! WARNING !! DO NOT MANUALLY EDIT THIS FILE. 23*5113495bSYour Name // 24*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 25*5113495bSYour Name 26*5113495bSYour Name #ifndef __WCSS_SEQ_BASE_H__ 27*5113495bSYour Name #define __WCSS_SEQ_BASE_H__ 28*5113495bSYour Name 29*5113495bSYour Name #ifdef SCALE_INCLUDES 30*5113495bSYour Name #include "HALhwio.h" 31*5113495bSYour Name #else 32*5113495bSYour Name #include "msmhwio.h" 33*5113495bSYour Name #endif 34*5113495bSYour Name 35*5113495bSYour Name 36*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 37*5113495bSYour Name // Instance Relative Offsets from Block wcss 38*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 39*5113495bSYour Name 40*5113495bSYour Name #define SEQ_WCSS_ECAHB_OFFSET 0x00008400 41*5113495bSYour Name #define SEQ_WCSS_ECAHB_TSLV_OFFSET 0x00009000 42*5113495bSYour Name #define SEQ_WCSS_UMAC_NOC_OFFSET 0x00140000 43*5113495bSYour Name #define SEQ_WCSS_PHYA_OFFSET 0x00300000 44*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_PDMEM_REG_MAP_OFFSET 0x00300000 45*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_REG_MAP_OFFSET 0x00380000 46*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC0_REG_MAP_OFFSET 0x00380400 47*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC1_REG_MAP_OFFSET 0x00380800 48*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC2_REG_MAP_OFFSET 0x00380c00 49*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC3_REG_MAP_OFFSET 0x00381000 50*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DMAC4_REG_MAP_OFFSET 0x00381400 51*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_DUAL_TIMER_REG_MAP_OFFSET 0x00381800 52*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_WATCHDOG_REG_MAP_OFFSET 0x00381c00 53*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_XDMAC5_REG_MAP_OFFSET 0x00382c00 54*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PCSS_XDMAC6_REG_MAP_OFFSET 0x00383000 55*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_NOC_REG_MAP_OFFSET 0x00388000 56*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXFD_REG_MAP_OFFSET 0x00390000 57*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_RXTD_REG_MAP_OFFSET 0x003a0000 58*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXTD_REG_MAP_OFFSET 0x003b0000 59*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_TXBF_REG_MAP_OFFSET 0x003c0000 60*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_DEMFRONT_REG_MAP_OFFSET 0x00400000 61*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_PHYRF_REG_MAP_OFFSET 0x00480000 62*5113495bSYour Name #define SEQ_WCSS_PHYA_WFAX_ROBE_REG_MAP_OFFSET 0x004b0000 63*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_OFFSET 0x004c0000 64*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x004d4000 65*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x004d4000 66*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_XFEM_OFFSET 0x004d4240 67*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_OFFSET 0x004d42c0 68*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_CAL_OFFSET 0x004d42e0 69*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x004d4300 70*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_SHD_OTP_OFFSET 0x004d4400 71*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_RFA_OTP_OFFSET 0x004d4480 72*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x004d4800 73*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_DPLL_OFFSET 0x004d4c00 74*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x004d6000 75*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x004d6040 76*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x004d6100 77*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x004d6140 78*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x004d6180 79*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x004d61c0 80*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x004d6240 81*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x004d7c00 82*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_PMU_OFFSET 0x004da000 83*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_PMU_PMU_OFFSET 0x004da000 84*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_BT_OFFSET 0x004dc000 85*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_BT_BT_CH2_OFFSET 0x004dc000 86*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_BT_HLS_BT_REGFILE_OFFSET 0x004dc400 87*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BS_OFFSET 0x004dc800 88*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_BIST_OFFSET 0x004dc840 89*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_PC_OFFSET 0x004dc880 90*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_BT_BT_SYNTH_AC_OFFSET 0x004dc8c0 91*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x004e0000 92*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH0_OFFSET 0x004e0000 93*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH0_OFFSET 0x004e0400 94*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH0_OFFSET 0x004e0800 95*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE2_CH0_OFFSET 0x004e1000 96*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE2_CH0_OFFSET 0x004e1300 97*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_PAL_CH0_OFFSET 0x004e1600 98*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_CH0_OFFSET 0x004e1640 99*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_CH0_OFFSET 0x004e2000 100*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_CH0_OFFSET 0x004e4000 101*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH1_OFFSET 0x004e8000 102*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH1_OFFSET 0x004e8400 103*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXBB_CH1_OFFSET 0x004e8800 104*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXFE2_CH1_OFFSET 0x004e9000 105*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TXFE2_CH1_OFFSET 0x004e9300 106*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_PAL_CH1_OFFSET 0x004e9600 107*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_LO_CH1_OFFSET 0x004e9640 108*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_TPC_CH1_OFFSET 0x004ea000 109*5113495bSYour Name #define SEQ_WCSS_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_CH1_OFFSET 0x004ec000 110*5113495bSYour Name #define SEQ_WCSS_UMAC_OFFSET 0x00a00000 111*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_OFFSET 0x00a20000 112*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00a20000 113*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00a22000 114*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00a24000 115*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00a26000 116*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00a28000 117*5113495bSYour Name #define SEQ_WCSS_UMAC_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x00a2a000 118*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_TRACER_REG_OFFSET 0x00a30000 119*5113495bSYour Name #define SEQ_WCSS_UMAC_WBM_REG_OFFSET 0x00a34000 120*5113495bSYour Name #define SEQ_WCSS_UMAC_REO_REG_OFFSET 0x00a38000 121*5113495bSYour Name #define SEQ_WCSS_UMAC_TQM_REG_OFFSET 0x00a3c000 122*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_UMCMN_REG_OFFSET 0x00a40000 123*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET 0x00a44000 124*5113495bSYour Name #define SEQ_WCSS_UMAC_MAC_CMN_PARSER_REG_OFFSET 0x00a47000 125*5113495bSYour Name #define SEQ_WCSS_WMAC0_OFFSET 0x00a80000 126*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_PDG_REG_OFFSET 0x00a80000 127*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXDMA_REG_OFFSET 0x00a83000 128*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXDMA_REG_OFFSET 0x00a86000 129*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_MCMN_REG_OFFSET 0x00a89000 130*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXPCU_REG_OFFSET 0x00a8c000 131*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXPCU_REG_OFFSET 0x00a8f000 132*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_AMPI_REG_OFFSET 0x00a92000 133*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXOLE_REG_OFFSET 0x00a95000 134*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXOLE_PARSER_REG_OFFSET 0x00a98000 135*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_CCE_REG_OFFSET 0x00a9b000 136*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXOLE_REG_OFFSET 0x00a9e000 137*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_TXOLE_PARSER_REG_OFFSET 0x00aa1000 138*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RRI_REG_OFFSET 0x00aa4000 139*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_CRYPTO_REG_OFFSET 0x00aa7000 140*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_HWSCH_REG_OFFSET 0x00aaa000 141*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_MXI_REG_OFFSET 0x00ab0000 142*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_SFM_REG_OFFSET 0x00ab3000 143*5113495bSYour Name #define SEQ_WCSS_WMAC0_MAC_RXDMA1_REG_OFFSET 0x00ab6000 144*5113495bSYour Name #define SEQ_WCSS_APB_TSLV_OFFSET 0x00b40000 145*5113495bSYour Name #define SEQ_WCSS_TOP_CMN_OFFSET 0x00b50000 146*5113495bSYour Name #define SEQ_WCSS_WCMN_CORE_OFFSET 0x00b58000 147*5113495bSYour Name #define SEQ_WCSS_WFSS_PMM_OFFSET 0x00b60000 148*5113495bSYour Name #define SEQ_WCSS_PMM_TOP_OFFSET 0x00b70000 149*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_OFFSET 0x00b80000 150*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_RBIST_TX_CH0_OFFSET 0x00b80000 151*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_CH0_OFFSET 0x00b80180 152*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_CALIB_CH0_OFFSET 0x00b80190 153*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_REGARRAY_CH0_OFFSET 0x00b80200 154*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_BBCLKGEN_CH0_OFFSET 0x00b802c0 155*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_CH0_OFFSET 0x00b80400 156*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_BBCLKGEN_CH0_OFFSET 0x00b80428 157*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_RBIST_TX_CH1_OFFSET 0x00b81000 158*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_CH1_OFFSET 0x00b81180 159*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_CALIB_CH1_OFFSET 0x00b81190 160*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_REGARRAY_CH1_OFFSET 0x00b81200 161*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_DAC_BBCLKGEN_CH1_OFFSET 0x00b812c0 162*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_CH1_OFFSET 0x00b81400 163*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_ADC_BBCLKGEN_CH1_OFFSET 0x00b81428 164*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_MSIP_TMUX_OFFSET 0x00b8d000 165*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_MSIP_OTP_OFFSET 0x00b8d080 166*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_MSIP_LDO_CTRL_OFFSET 0x00b8d0ac 167*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_MSIP_CLKGEN_OFFSET 0x00b8d100 168*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_MSIP_BIAS_OFFSET 0x00b8e000 169*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_BBPLL_OFFSET 0x00b8f000 170*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_WL_TOP_CLKGEN_OFFSET 0x00b8f100 171*5113495bSYour Name #define SEQ_WCSS_WL_MSIP_MSIP_DRM_REG_OFFSET 0x00b8fc00 172*5113495bSYour Name #define SEQ_WCSS_DBG_OFFSET 0x00b90000 173*5113495bSYour Name #define SEQ_WCSS_DBG_WCSS_DBG_DAPROM_OFFSET 0x00b90000 174*5113495bSYour Name #define SEQ_WCSS_DBG_CSR_WCSS_DBG_CSR_OFFSET 0x00b91000 175*5113495bSYour Name #define SEQ_WCSS_DBG_TSGEN_CXTSGEN_OFFSET 0x00b92000 176*5113495bSYour Name #define SEQ_WCSS_DBG_CTIDBG_QC_CTI_32T_8CH_OFFSET 0x00b94000 177*5113495bSYour Name #define SEQ_WCSS_DBG_CTINOC_QC_CTI_8T_8CH_OFFSET 0x00b95000 178*5113495bSYour Name #define SEQ_WCSS_DBG_CTIIRQ_QC_CTI_32T_8CH_OFFSET 0x00b96000 179*5113495bSYour Name #define SEQ_WCSS_DBG_EVENT_MACEVENT_OFFSET 0x00bb0000 180*5113495bSYour Name #define SEQ_WCSS_DBG_EVENTFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00bb1000 181*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_MACTLV_OFFSET 0x00bb2000 182*5113495bSYour Name #define SEQ_WCSS_DBG_TLVFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00bb3000 183*5113495bSYour Name #define SEQ_WCSS_DBG_TBUS_MACTBUS_OFFSET 0x00bb4000 184*5113495bSYour Name #define SEQ_WCSS_DBG_TBUSFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00bb5000 185*5113495bSYour Name #define SEQ_WCSS_DBG_CTIMAC_QC_CTI_12T_8CH_OFFSET 0x00bb6000 186*5113495bSYour Name #define SEQ_WCSS_DBG_WCSS_DBG_TSTMP_INJCTR_OFFSET 0x00bb8000 187*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_OFFSET 0x00bb9000 188*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00bb9280 189*5113495bSYour Name #define SEQ_WCSS_DBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00bb9000 190*5113495bSYour Name #define SEQ_WCSS_DBG_TPDA_OFFSET 0x00bba000 191*5113495bSYour Name #define SEQ_WCSS_DBG_CXATBFUNNEL_128W8SP_OFFSET 0x00bbb000 192*5113495bSYour Name #define SEQ_WCSS_DBG_TMC_CXTMC_F128W32K_OFFSET 0x00bbc000 193*5113495bSYour Name #define SEQ_WCSS_DBG_OUTFUN_CXATBFUNNEL_128W2SP_OFFSET 0x00bbe000 194*5113495bSYour Name #define SEQ_WCSS_DBG_PHYFUN_CXATBFUNNEL_128W2SP_OFFSET 0x00bbf000 195*5113495bSYour Name #define SEQ_WCSS_DBG_OUTDMUX_ATB_DEMUX_OFFSET 0x00bc0000 196*5113495bSYour Name #define SEQ_WCSS_DBG_TRCCNTRS_OFFSET 0x00bc1000 197*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_TPDM_ATB128_CMB64_OFFSET 0x00bc2000 198*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00bc2280 199*5113495bSYour Name #define SEQ_WCSS_DBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00bc2000 200*5113495bSYour Name #define SEQ_WCSS_DBG_MISC_TPDM_ATB128_CMB64_OFFSET 0x00bc3000 201*5113495bSYour Name #define SEQ_WCSS_DBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00bc3280 202*5113495bSYour Name #define SEQ_WCSS_DBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00bc3000 203*5113495bSYour Name #define SEQ_WCSS_DBG_QC_TGU_APCLK_CSAE4EA8E3_OFFSET 0x00bc4000 204*5113495bSYour Name #define SEQ_WCSS_DBG_CTITGU_QC_CTI_4T_8CH_OFFSET 0x00bc5000 205*5113495bSYour Name #define SEQ_WCSS_DBG_PHYADMUX_ATB_DEMUX_OFFSET 0x00bc6000 206*5113495bSYour Name #define SEQ_WCSS_DBG_MISCFUN_CXATBFUNNEL_64W8SP_OFFSET 0x00bc8000 207*5113495bSYour Name #define SEQ_WCSS_DBG_UNOC_UMAC_NOC_OFFSET 0x00bd0000 208*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYB_DBG_OFFSET 0x00be0000 209*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYB_DBG_PHYB_NOC_OFFSET 0x00be0000 210*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYB_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00be4000 211*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYB_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00be5000 212*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYB_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00be6000 213*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYB_DBG_ITM_OFFSET 0x00be8000 214*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYB_DBG_DWT_OFFSET 0x00be9000 215*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYB_DBG_FPB_OFFSET 0x00bea000 216*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYB_DBG_SCS_OFFSET 0x00beb000 217*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYB_DBG_ETM_OFFSET 0x00bec000 218*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYB_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x00bed000 219*5113495bSYour Name #define SEQ_WCSS_DBG_PHYA_PHYB_DBG_CPU0_M3_AHB_AP_OFFSET 0x00bee000 220*5113495bSYour Name #define SEQ_WCSS_DBG_BUS_TIMEOUT_OFFSET 0x00c31000 221*5113495bSYour Name #define SEQ_WCSS_RET_AHB_OFFSET 0x00c90000 222*5113495bSYour Name #define SEQ_WCSS_WCSS_ACMT_OFFSET 0x00c9f000 223*5113495bSYour Name #define SEQ_WCSS_WAHB_TSLV_OFFSET 0x00ca0000 224*5113495bSYour Name #define SEQ_WCSS_CC_OFFSET 0x00cb0000 225*5113495bSYour Name #define SEQ_WCSS_UMAC_ACMT_OFFSET 0x00cc0000 226*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_OFFSET 0x00d00000 227*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_OFFSET 0x00d00000 228*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PUBLIC_OFFSET 0x00d00000 229*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PUBLIC_QDSP6V67SS_PUB_OFFSET 0x00d00000 230*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_OFFSET 0x00d80000 231*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_CSR_OFFSET 0x00d80000 232*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_L2VIC_OFFSET 0x00d90000 233*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6SS_QTMR_AC_OFFSET 0x00da0000 234*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F0_OFFSET 0x00da1000 235*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F1_OFFSET 0x00da2000 236*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F2_OFFSET 0x00da3000 237*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_OFFSET 0x00db0000 238*5113495bSYour Name #define SEQ_WCSS_Q6SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_RSCC_RSC_OFFSET 0x00db0000 239*5113495bSYour Name 240*5113495bSYour Name 241*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 242*5113495bSYour Name // Instance Relative Offsets from Block wfax_top 243*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 244*5113495bSYour Name 245*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_PDMEM_REG_MAP_OFFSET 0x00000000 246*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_REG_MAP_OFFSET 0x00080000 247*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC0_REG_MAP_OFFSET 0x00080400 248*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC1_REG_MAP_OFFSET 0x00080800 249*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC2_REG_MAP_OFFSET 0x00080c00 250*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC3_REG_MAP_OFFSET 0x00081000 251*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DMAC4_REG_MAP_OFFSET 0x00081400 252*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_DUAL_TIMER_REG_MAP_OFFSET 0x00081800 253*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_WATCHDOG_REG_MAP_OFFSET 0x00081c00 254*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_XDMAC5_REG_MAP_OFFSET 0x00082c00 255*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PCSS_XDMAC6_REG_MAP_OFFSET 0x00083000 256*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_NOC_REG_MAP_OFFSET 0x00088000 257*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXFD_REG_MAP_OFFSET 0x00090000 258*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_RXTD_REG_MAP_OFFSET 0x000a0000 259*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXTD_REG_MAP_OFFSET 0x000b0000 260*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_TXBF_REG_MAP_OFFSET 0x000c0000 261*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_DEMFRONT_REG_MAP_OFFSET 0x00100000 262*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_PHYRF_REG_MAP_OFFSET 0x00180000 263*5113495bSYour Name #define SEQ_WFAX_TOP_WFAX_ROBE_REG_MAP_OFFSET 0x001b0000 264*5113495bSYour Name 265*5113495bSYour Name 266*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 267*5113495bSYour Name // Instance Relative Offsets from Block rfa_from_wsi 268*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 269*5113495bSYour Name 270*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_OFFSET 0x00014000 271*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_OFFSET 0x00014000 272*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_XFEM_OFFSET 0x00014240 273*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_COEX_OFFSET 0x000142c0 274*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_COEX_CAL_OFFSET 0x000142e0 275*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFFE_M_OFFSET 0x00014300 276*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFA_SHD_OTP_OFFSET 0x00014400 277*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_RFA_OTP_OFFSET 0x00014480 278*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_CLKGEN_OFFSET 0x00014800 279*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_DPLL_OFFSET 0x00014c00 280*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00016000 281*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00016040 282*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x00016100 283*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x00016140 284*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x00016180 285*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x000161c0 286*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x00016240 287*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x00017c00 288*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_PMU_OFFSET 0x0001a000 289*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_PMU_PMU_OFFSET 0x0001a000 290*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_OFFSET 0x0001c000 291*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_CH2_OFFSET 0x0001c000 292*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_HLS_BT_REGFILE_OFFSET 0x0001c400 293*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_BS_OFFSET 0x0001c800 294*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_BIST_OFFSET 0x0001c840 295*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_PC_OFFSET 0x0001c880 296*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_BT_BT_SYNTH_AC_OFFSET 0x0001c8c0 297*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_OFFSET 0x00020000 298*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_CH0_OFFSET 0x00020000 299*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_CH0_OFFSET 0x00020400 300*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_CH0_OFFSET 0x00020800 301*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE2_CH0_OFFSET 0x00021000 302*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE2_CH0_OFFSET 0x00021300 303*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_PAL_CH0_OFFSET 0x00021600 304*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_CH0_OFFSET 0x00021640 305*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_CH0_OFFSET 0x00022000 306*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_CH0_OFFSET 0x00024000 307*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MC_CH1_OFFSET 0x00028000 308*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXBB_CH1_OFFSET 0x00028400 309*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXBB_CH1_OFFSET 0x00028800 310*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_RXFE2_CH1_OFFSET 0x00029000 311*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TXFE2_CH1_OFFSET 0x00029300 312*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_PAL_CH1_OFFSET 0x00029600 313*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_LO_CH1_OFFSET 0x00029640 314*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_TPC_CH1_OFFSET 0x0002a000 315*5113495bSYour Name #define SEQ_RFA_FROM_WSI_RFA_WL_WL_MEM_CH1_OFFSET 0x0002c000 316*5113495bSYour Name 317*5113495bSYour Name 318*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 319*5113495bSYour Name // Instance Relative Offsets from Block rfa_cmn 320*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 321*5113495bSYour Name 322*5113495bSYour Name #define SEQ_RFA_CMN_AON_OFFSET 0x00000000 323*5113495bSYour Name #define SEQ_RFA_CMN_AON_XFEM_OFFSET 0x00000240 324*5113495bSYour Name #define SEQ_RFA_CMN_AON_COEX_OFFSET 0x000002c0 325*5113495bSYour Name #define SEQ_RFA_CMN_AON_COEX_CAL_OFFSET 0x000002e0 326*5113495bSYour Name #define SEQ_RFA_CMN_RFFE_M_OFFSET 0x00000300 327*5113495bSYour Name #define SEQ_RFA_CMN_RFA_SHD_OTP_OFFSET 0x00000400 328*5113495bSYour Name #define SEQ_RFA_CMN_RFA_OTP_OFFSET 0x00000480 329*5113495bSYour Name #define SEQ_RFA_CMN_CLKGEN_OFFSET 0x00000800 330*5113495bSYour Name #define SEQ_RFA_CMN_DPLL_OFFSET 0x00000c00 331*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00002000 332*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00002040 333*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x00002100 334*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_PC_OFFSET 0x00002140 335*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_KVCO_OFFSET 0x00002180 336*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_AC_OFFSET 0x000021c0 337*5113495bSYour Name #define SEQ_RFA_CMN_WL_SYNTH0_LO_OFFSET 0x00002240 338*5113495bSYour Name #define SEQ_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x00003c00 339*5113495bSYour Name 340*5113495bSYour Name 341*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 342*5113495bSYour Name // Instance Relative Offsets from Block rfa_pmu 343*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 344*5113495bSYour Name 345*5113495bSYour Name #define SEQ_RFA_PMU_PMU_OFFSET 0x00000000 346*5113495bSYour Name 347*5113495bSYour Name 348*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 349*5113495bSYour Name // Instance Relative Offsets from Block rfa_bt 350*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 351*5113495bSYour Name 352*5113495bSYour Name #define SEQ_RFA_BT_BT_CH2_OFFSET 0x00000000 353*5113495bSYour Name #define SEQ_RFA_BT_HLS_BT_REGFILE_OFFSET 0x00000400 354*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_BS_OFFSET 0x00000800 355*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_BIST_OFFSET 0x00000840 356*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_PC_OFFSET 0x00000880 357*5113495bSYour Name #define SEQ_RFA_BT_BT_SYNTH_AC_OFFSET 0x000008c0 358*5113495bSYour Name 359*5113495bSYour Name 360*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 361*5113495bSYour Name // Instance Relative Offsets from Block rfa_wl 362*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 363*5113495bSYour Name 364*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_CH0_OFFSET 0x00000000 365*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_CH0_OFFSET 0x00000400 366*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_CH0_OFFSET 0x00000800 367*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE2_CH0_OFFSET 0x00001000 368*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE2_CH0_OFFSET 0x00001300 369*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_PAL_CH0_OFFSET 0x00001600 370*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_CH0_OFFSET 0x00001640 371*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_CH0_OFFSET 0x00002000 372*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_CH0_OFFSET 0x00004000 373*5113495bSYour Name #define SEQ_RFA_WL_WL_MC_CH1_OFFSET 0x00008000 374*5113495bSYour Name #define SEQ_RFA_WL_WL_RXBB_CH1_OFFSET 0x00008400 375*5113495bSYour Name #define SEQ_RFA_WL_WL_TXBB_CH1_OFFSET 0x00008800 376*5113495bSYour Name #define SEQ_RFA_WL_WL_RXFE2_CH1_OFFSET 0x00009000 377*5113495bSYour Name #define SEQ_RFA_WL_WL_TXFE2_CH1_OFFSET 0x00009300 378*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_PAL_CH1_OFFSET 0x00009600 379*5113495bSYour Name #define SEQ_RFA_WL_WL_LO_CH1_OFFSET 0x00009640 380*5113495bSYour Name #define SEQ_RFA_WL_WL_TPC_CH1_OFFSET 0x0000a000 381*5113495bSYour Name #define SEQ_RFA_WL_WL_MEM_CH1_OFFSET 0x0000c000 382*5113495bSYour Name 383*5113495bSYour Name 384*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 385*5113495bSYour Name // Instance Relative Offsets from Block umac_top_reg 386*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 387*5113495bSYour Name 388*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_OFFSET 0x00020000 389*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00020000 390*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00022000 391*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00024000 392*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00026000 393*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00028000 394*5113495bSYour Name #define SEQ_UMAC_TOP_REG_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x0002a000 395*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_TRACER_REG_OFFSET 0x00030000 396*5113495bSYour Name #define SEQ_UMAC_TOP_REG_WBM_REG_OFFSET 0x00034000 397*5113495bSYour Name #define SEQ_UMAC_TOP_REG_REO_REG_OFFSET 0x00038000 398*5113495bSYour Name #define SEQ_UMAC_TOP_REG_TQM_REG_OFFSET 0x0003c000 399*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_UMCMN_REG_OFFSET 0x00040000 400*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_TCL_REG_OFFSET 0x00044000 401*5113495bSYour Name #define SEQ_UMAC_TOP_REG_MAC_CMN_PARSER_REG_OFFSET 0x00047000 402*5113495bSYour Name 403*5113495bSYour Name 404*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 405*5113495bSYour Name // Instance Relative Offsets from Block cxc_top_reg 406*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 407*5113495bSYour Name 408*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_BMH_REG_OFFSET 0x00000000 409*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_LCMH_REG_OFFSET 0x00002000 410*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_MCIBASIC_REG_OFFSET 0x00004000 411*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_LMH_REG_OFFSET 0x00006000 412*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_SMH_REG_OFFSET 0x00008000 413*5113495bSYour Name #define SEQ_CXC_TOP_REG_CXC_PMH_REG_OFFSET 0x0000a000 414*5113495bSYour Name 415*5113495bSYour Name 416*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 417*5113495bSYour Name // Instance Relative Offsets from Block wmac_top_reg 418*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 419*5113495bSYour Name 420*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_PDG_REG_OFFSET 0x00000000 421*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXDMA_REG_OFFSET 0x00003000 422*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXDMA_REG_OFFSET 0x00006000 423*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_MCMN_REG_OFFSET 0x00009000 424*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXPCU_REG_OFFSET 0x0000c000 425*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXPCU_REG_OFFSET 0x0000f000 426*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_AMPI_REG_OFFSET 0x00012000 427*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXOLE_REG_OFFSET 0x00015000 428*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXOLE_PARSER_REG_OFFSET 0x00018000 429*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_CCE_REG_OFFSET 0x0001b000 430*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXOLE_REG_OFFSET 0x0001e000 431*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_TXOLE_PARSER_REG_OFFSET 0x00021000 432*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RRI_REG_OFFSET 0x00024000 433*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_CRYPTO_REG_OFFSET 0x00027000 434*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_HWSCH_REG_OFFSET 0x0002a000 435*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_MXI_REG_OFFSET 0x00030000 436*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_SFM_REG_OFFSET 0x00033000 437*5113495bSYour Name #define SEQ_WMAC_TOP_REG_MAC_RXDMA1_REG_OFFSET 0x00036000 438*5113495bSYour Name 439*5113495bSYour Name 440*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 441*5113495bSYour Name // Instance Relative Offsets from Block msip 442*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 443*5113495bSYour Name 444*5113495bSYour Name #define SEQ_MSIP_RBIST_TX_CH0_OFFSET 0x00000000 445*5113495bSYour Name #define SEQ_MSIP_WL_DAC_CH0_OFFSET 0x00000180 446*5113495bSYour Name #define SEQ_MSIP_WL_DAC_CALIB_CH0_OFFSET 0x00000190 447*5113495bSYour Name #define SEQ_MSIP_WL_DAC_REGARRAY_CH0_OFFSET 0x00000200 448*5113495bSYour Name #define SEQ_MSIP_WL_DAC_BBCLKGEN_CH0_OFFSET 0x000002c0 449*5113495bSYour Name #define SEQ_MSIP_WL_ADC_CH0_OFFSET 0x00000400 450*5113495bSYour Name #define SEQ_MSIP_WL_ADC_BBCLKGEN_CH0_OFFSET 0x00000428 451*5113495bSYour Name #define SEQ_MSIP_RBIST_TX_CH1_OFFSET 0x00001000 452*5113495bSYour Name #define SEQ_MSIP_WL_DAC_CH1_OFFSET 0x00001180 453*5113495bSYour Name #define SEQ_MSIP_WL_DAC_CALIB_CH1_OFFSET 0x00001190 454*5113495bSYour Name #define SEQ_MSIP_WL_DAC_REGARRAY_CH1_OFFSET 0x00001200 455*5113495bSYour Name #define SEQ_MSIP_WL_DAC_BBCLKGEN_CH1_OFFSET 0x000012c0 456*5113495bSYour Name #define SEQ_MSIP_WL_ADC_CH1_OFFSET 0x00001400 457*5113495bSYour Name #define SEQ_MSIP_WL_ADC_BBCLKGEN_CH1_OFFSET 0x00001428 458*5113495bSYour Name #define SEQ_MSIP_MSIP_TMUX_OFFSET 0x0000d000 459*5113495bSYour Name #define SEQ_MSIP_MSIP_OTP_OFFSET 0x0000d080 460*5113495bSYour Name #define SEQ_MSIP_MSIP_LDO_CTRL_OFFSET 0x0000d0ac 461*5113495bSYour Name #define SEQ_MSIP_MSIP_CLKGEN_OFFSET 0x0000d100 462*5113495bSYour Name #define SEQ_MSIP_MSIP_BIAS_OFFSET 0x0000e000 463*5113495bSYour Name #define SEQ_MSIP_BBPLL_OFFSET 0x0000f000 464*5113495bSYour Name #define SEQ_MSIP_WL_TOP_CLKGEN_OFFSET 0x0000f100 465*5113495bSYour Name #define SEQ_MSIP_MSIP_DRM_REG_OFFSET 0x0000fc00 466*5113495bSYour Name 467*5113495bSYour Name 468*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 469*5113495bSYour Name // Instance Relative Offsets from Block wcssdbg 470*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 471*5113495bSYour Name 472*5113495bSYour Name #define SEQ_WCSSDBG_WCSS_DBG_DAPROM_OFFSET 0x00000000 473*5113495bSYour Name #define SEQ_WCSSDBG_CSR_WCSS_DBG_CSR_OFFSET 0x00001000 474*5113495bSYour Name #define SEQ_WCSSDBG_TSGEN_CXTSGEN_OFFSET 0x00002000 475*5113495bSYour Name #define SEQ_WCSSDBG_CTIDBG_QC_CTI_32T_8CH_OFFSET 0x00004000 476*5113495bSYour Name #define SEQ_WCSSDBG_CTINOC_QC_CTI_8T_8CH_OFFSET 0x00005000 477*5113495bSYour Name #define SEQ_WCSSDBG_CTIIRQ_QC_CTI_32T_8CH_OFFSET 0x00006000 478*5113495bSYour Name #define SEQ_WCSSDBG_EVENT_MACEVENT_OFFSET 0x00020000 479*5113495bSYour Name #define SEQ_WCSSDBG_EVENTFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00021000 480*5113495bSYour Name #define SEQ_WCSSDBG_TLV_MACTLV_OFFSET 0x00022000 481*5113495bSYour Name #define SEQ_WCSSDBG_TLVFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00023000 482*5113495bSYour Name #define SEQ_WCSSDBG_TBUS_MACTBUS_OFFSET 0x00024000 483*5113495bSYour Name #define SEQ_WCSSDBG_TBUSFUN_CXATBFUNNEL_32W8SP_OFFSET 0x00025000 484*5113495bSYour Name #define SEQ_WCSSDBG_CTIMAC_QC_CTI_12T_8CH_OFFSET 0x00026000 485*5113495bSYour Name #define SEQ_WCSSDBG_WCSS_DBG_TSTMP_INJCTR_OFFSET 0x00028000 486*5113495bSYour Name #define SEQ_WCSSDBG_TPDM_OFFSET 0x00029000 487*5113495bSYour Name #define SEQ_WCSSDBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00029280 488*5113495bSYour Name #define SEQ_WCSSDBG_TPDM_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00029000 489*5113495bSYour Name #define SEQ_WCSSDBG_TPDA_OFFSET 0x0002a000 490*5113495bSYour Name #define SEQ_WCSSDBG_CXATBFUNNEL_128W8SP_OFFSET 0x0002b000 491*5113495bSYour Name #define SEQ_WCSSDBG_TMC_CXTMC_F128W32K_OFFSET 0x0002c000 492*5113495bSYour Name #define SEQ_WCSSDBG_OUTFUN_CXATBFUNNEL_128W2SP_OFFSET 0x0002e000 493*5113495bSYour Name #define SEQ_WCSSDBG_PHYFUN_CXATBFUNNEL_128W2SP_OFFSET 0x0002f000 494*5113495bSYour Name #define SEQ_WCSSDBG_OUTDMUX_ATB_DEMUX_OFFSET 0x00030000 495*5113495bSYour Name #define SEQ_WCSSDBG_TRCCNTRS_OFFSET 0x00031000 496*5113495bSYour Name #define SEQ_WCSSDBG_TLV_TPDM_ATB128_CMB64_OFFSET 0x00032000 497*5113495bSYour Name #define SEQ_WCSSDBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00032280 498*5113495bSYour Name #define SEQ_WCSSDBG_TLV_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00032000 499*5113495bSYour Name #define SEQ_WCSSDBG_MISC_TPDM_ATB128_CMB64_OFFSET 0x00033000 500*5113495bSYour Name #define SEQ_WCSSDBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00033280 501*5113495bSYour Name #define SEQ_WCSSDBG_MISC_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00033000 502*5113495bSYour Name #define SEQ_WCSSDBG_QC_TGU_APCLK_CSAE4EA8E3_OFFSET 0x00034000 503*5113495bSYour Name #define SEQ_WCSSDBG_CTITGU_QC_CTI_4T_8CH_OFFSET 0x00035000 504*5113495bSYour Name #define SEQ_WCSSDBG_PHYADMUX_ATB_DEMUX_OFFSET 0x00036000 505*5113495bSYour Name #define SEQ_WCSSDBG_MISCFUN_CXATBFUNNEL_64W8SP_OFFSET 0x00038000 506*5113495bSYour Name #define SEQ_WCSSDBG_UNOC_UMAC_NOC_OFFSET 0x00040000 507*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYB_DBG_OFFSET 0x00050000 508*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYB_DBG_PHYB_NOC_OFFSET 0x00050000 509*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYB_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00054000 510*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYB_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00055000 511*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYB_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00056000 512*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYB_DBG_ITM_OFFSET 0x00058000 513*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYB_DBG_DWT_OFFSET 0x00059000 514*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYB_DBG_FPB_OFFSET 0x0005a000 515*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYB_DBG_SCS_OFFSET 0x0005b000 516*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYB_DBG_ETM_OFFSET 0x0005c000 517*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYB_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x0005d000 518*5113495bSYour Name #define SEQ_WCSSDBG_PHYA_PHYB_DBG_CPU0_M3_AHB_AP_OFFSET 0x0005e000 519*5113495bSYour Name #define SEQ_WCSSDBG_BUS_TIMEOUT_OFFSET 0x000a1000 520*5113495bSYour Name 521*5113495bSYour Name 522*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 523*5113495bSYour Name // Instance Relative Offsets from Block tpdm_atb64_cmb40_dsb256_csbe6c04f7 524*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 525*5113495bSYour Name 526*5113495bSYour Name #define SEQ_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_SUB_OFFSET 0x00000280 527*5113495bSYour Name #define SEQ_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_TPDM_ATB64_CMB40_DSB256_CSBE6C04F7_GPR_OFFSET 0x00000000 528*5113495bSYour Name 529*5113495bSYour Name 530*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 531*5113495bSYour Name // Instance Relative Offsets from Block tpdm_atb128_cmb64 532*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 533*5113495bSYour Name 534*5113495bSYour Name #define SEQ_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_SUB_OFFSET 0x00000280 535*5113495bSYour Name #define SEQ_TPDM_ATB128_CMB64_TPDM_ATB128_CMB64_GPR_OFFSET 0x00000000 536*5113495bSYour Name 537*5113495bSYour Name 538*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 539*5113495bSYour Name // Instance Relative Offsets from Block phyb_dbg 540*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 541*5113495bSYour Name 542*5113495bSYour Name #define SEQ_PHYB_DBG_PHYB_NOC_OFFSET 0x00000000 543*5113495bSYour Name #define SEQ_PHYB_DBG_FUN_CXATBFUNNEL_64W8SP_OFFSET 0x00004000 544*5113495bSYour Name #define SEQ_PHYB_DBG_CTI_QC_CTI_10T_8CH_OFFSET 0x00005000 545*5113495bSYour Name #define SEQ_PHYB_DBG_TRC_PHYTRC_CTRL_OFFSET 0x00006000 546*5113495bSYour Name #define SEQ_PHYB_DBG_ITM_OFFSET 0x00008000 547*5113495bSYour Name #define SEQ_PHYB_DBG_DWT_OFFSET 0x00009000 548*5113495bSYour Name #define SEQ_PHYB_DBG_FPB_OFFSET 0x0000a000 549*5113495bSYour Name #define SEQ_PHYB_DBG_SCS_OFFSET 0x0000b000 550*5113495bSYour Name #define SEQ_PHYB_DBG_ETM_OFFSET 0x0000c000 551*5113495bSYour Name #define SEQ_PHYB_DBG_M3CTI_QC_CTI_8T_8CH_OFFSET 0x0000d000 552*5113495bSYour Name #define SEQ_PHYB_DBG_CPU0_M3_AHB_AP_OFFSET 0x0000e000 553*5113495bSYour Name 554*5113495bSYour Name 555*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 556*5113495bSYour Name // Instance Relative Offsets from Block qdsp6v67ss_wlan 557*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 558*5113495bSYour Name 559*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_OFFSET 0x00000000 560*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PUBLIC_OFFSET 0x00000000 561*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PUBLIC_QDSP6V67SS_PUB_OFFSET 0x00000000 562*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_OFFSET 0x00080000 563*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_CSR_OFFSET 0x00080000 564*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_L2VIC_OFFSET 0x00090000 565*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6SS_QTMR_AC_OFFSET 0x000a0000 566*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F0_OFFSET 0x000a1000 567*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F1_OFFSET 0x000a2000 568*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F2_OFFSET 0x000a3000 569*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_OFFSET 0x000b0000 570*5113495bSYour Name #define SEQ_QDSP6V67SS_WLAN_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_RSCC_RSC_OFFSET 0x000b0000 571*5113495bSYour Name 572*5113495bSYour Name 573*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 574*5113495bSYour Name // Instance Relative Offsets from Block qdsp6v67ss 575*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 576*5113495bSYour Name 577*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PUBLIC_OFFSET 0x00000000 578*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PUBLIC_QDSP6V67SS_PUB_OFFSET 0x00000000 579*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_OFFSET 0x00080000 580*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_CSR_OFFSET 0x00080000 581*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_L2VIC_OFFSET 0x00090000 582*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6SS_QTMR_AC_OFFSET 0x000a0000 583*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F0_OFFSET 0x000a1000 584*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F1_OFFSET 0x000a2000 585*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QTMR_F2_OFFSET 0x000a3000 586*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_OFFSET 0x000b0000 587*5113495bSYour Name #define SEQ_QDSP6V67SS_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_RSCC_RSC_OFFSET 0x000b0000 588*5113495bSYour Name 589*5113495bSYour Name 590*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 591*5113495bSYour Name // Instance Relative Offsets from Block qdsp6v67ss_public 592*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 593*5113495bSYour Name 594*5113495bSYour Name #define SEQ_QDSP6V67SS_PUBLIC_QDSP6V67SS_PUB_OFFSET 0x00000000 595*5113495bSYour Name 596*5113495bSYour Name 597*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 598*5113495bSYour Name // Instance Relative Offsets from Block qdsp6v67ss_private 599*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 600*5113495bSYour Name 601*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QDSP6V67SS_CSR_OFFSET 0x00000000 602*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QDSP6V67SS_L2VIC_OFFSET 0x00010000 603*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QDSP6SS_QTMR_AC_OFFSET 0x00020000 604*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QTMR_F0_OFFSET 0x00021000 605*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QTMR_F1_OFFSET 0x00022000 606*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QTMR_F2_OFFSET 0x00023000 607*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_OFFSET 0x00030000 608*5113495bSYour Name #define SEQ_QDSP6V67SS_PRIVATE_QDSP6V67SS_RSCC_RSCC_RSC_OFFSET 0x00030000 609*5113495bSYour Name 610*5113495bSYour Name 611*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 612*5113495bSYour Name // Instance Relative Offsets from Block q6ss_rscc 613*5113495bSYour Name /////////////////////////////////////////////////////////////////////////////////////////////// 614*5113495bSYour Name 615*5113495bSYour Name #define SEQ_Q6SS_RSCC_RSCC_RSC_OFFSET 0x00000000 616*5113495bSYour Name 617*5113495bSYour Name 618*5113495bSYour Name #endif 619*5113495bSYour Name 620