xref: /wlan-driver/fw-api/hw/qca5332/coex_tx_status.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 
19 
20 
21 
22 
23 
24 
25 
26 #ifndef _COEX_TX_STATUS_H_
27 #define _COEX_TX_STATUS_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #define NUM_OF_DWORDS_COEX_TX_STATUS 4
32 
33 #define NUM_OF_QWORDS_COEX_TX_STATUS 2
34 
35 
36 struct coex_tx_status {
37 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
38              uint32_t reserved_0a                                             :  7, // [6:0]
39                       tx_bw                                                   :  3, // [9:7]
40                       tx_status_reason                                        :  3, // [12:10]
41                       tx_wait_ack                                             :  1, // [13:13]
42                       fes_tx_is_gen_frame                                     :  1, // [14:14]
43                       sch_tx_burst_ongoing                                    :  1, // [15:15]
44                       current_tx_duration                                     : 16; // [31:16]
45              uint32_t next_rx_active_time                                     : 16, // [15:0]
46                       remaining_fes_time                                      : 16; // [31:16]
47              uint32_t tx_antenna_mask                                         :  8, // [7:0]
48                       shared_ant_tx_pwr                                       :  8, // [15:8]
49                       other_ant_tx_pwr                                        :  8, // [23:16]
50                       reserved_2                                              :  8; // [31:24]
51              uint32_t tlv64_padding                                           : 32; // [31:0]
52 #else
53              uint32_t current_tx_duration                                     : 16, // [31:16]
54                       sch_tx_burst_ongoing                                    :  1, // [15:15]
55                       fes_tx_is_gen_frame                                     :  1, // [14:14]
56                       tx_wait_ack                                             :  1, // [13:13]
57                       tx_status_reason                                        :  3, // [12:10]
58                       tx_bw                                                   :  3, // [9:7]
59                       reserved_0a                                             :  7; // [6:0]
60              uint32_t remaining_fes_time                                      : 16, // [31:16]
61                       next_rx_active_time                                     : 16; // [15:0]
62              uint32_t reserved_2                                              :  8, // [31:24]
63                       other_ant_tx_pwr                                        :  8, // [23:16]
64                       shared_ant_tx_pwr                                       :  8, // [15:8]
65                       tx_antenna_mask                                         :  8; // [7:0]
66              uint32_t tlv64_padding                                           : 32; // [31:0]
67 #endif
68 };
69 
70 
71 /* Description		RESERVED_0A
72 
73 			<legal 0>
74 */
75 
76 #define COEX_TX_STATUS_RESERVED_0A_OFFSET                                           0x0000000000000000
77 #define COEX_TX_STATUS_RESERVED_0A_LSB                                              0
78 #define COEX_TX_STATUS_RESERVED_0A_MSB                                              6
79 #define COEX_TX_STATUS_RESERVED_0A_MASK                                             0x000000000000007f
80 
81 
82 /* Description		TX_BW
83 
84 			The BW of the upcoming transmission.
85 			Note: Coex might have changed this from the original request.
86 			See coex related fields below
87 
88 			<enum 0 20_mhz>20 Mhz BW
89 			<enum 1 40_mhz>40 Mhz BW
90 			<enum 2 80_mhz>80 Mhz BW
91 			<enum 3 160_mhz>160 Mhz BW
92 			<enum 4 320_mhz>320 Mhz BW
93 			<enum 5 240_mhz>240 Mhz BW
94 */
95 
96 #define COEX_TX_STATUS_TX_BW_OFFSET                                                 0x0000000000000000
97 #define COEX_TX_STATUS_TX_BW_LSB                                                    7
98 #define COEX_TX_STATUS_TX_BW_MSB                                                    9
99 #define COEX_TX_STATUS_TX_BW_MASK                                                   0x0000000000000380
100 
101 
102 /* Description		TX_STATUS_REASON
103 
104 			<enum 0     FES_tx_start> TXPCU sends this status at the
105 			 start of SCH initiated transmission (when the commands
106 			are given to the PHY). This includes the transmission of
107 			 RTS and CTS
108 			Note that based on field 'Fes_tx_is_gen_frame' COEX can
109 			derive if this is a protection frame or regular PPDU.
110 
111 			<enum 1     FES_tx_end> TXPCU sends this status at the end
112 			 of SCH initiated transmission (when PHY TX has confirmed
113 			 the transmit over the medium has finished)
114 
115 			<enum 2     FES_end> TXPCU sends this status at the end
116 			of of the entire frame exchange sequence. This includes
117 			reception (or lack of..) of the ACK/BA/CTS frame
118 			TXPCU sends this FES after it has sent the TX_FES_STATUS
119 			 TLV(s). This also sent in case of 11ax basic trigger response
120 			 transmissions, when an ACK/BA is expected, and that got
121 			 received.
122 			<enum 3     Response_tx_start> TXPCU sends this status at
123 			 the start of Self gen initiated response transmission (when
124 			 the commands are given to the PHY)
125 			<enum 4     Response_tx_end> TXPCU sends this status at
126 			the end of Self gen initiated response transmission (when
127 			 PHY TX has confirmed the transmit over the medium has finished)
128 
129 
130 			<enum 5     No_tx_ongoing> TXPCU sends this TLV when forced
131 			 by SW to do so. It is used to be able to get TXPCU and
132 			coex synchronized again in case of some error handling scenarios
133 
134 
135 			<legal 0-5>
136 */
137 
138 #define COEX_TX_STATUS_TX_STATUS_REASON_OFFSET                                      0x0000000000000000
139 #define COEX_TX_STATUS_TX_STATUS_REASON_LSB                                         10
140 #define COEX_TX_STATUS_TX_STATUS_REASON_MSB                                         12
141 #define COEX_TX_STATUS_TX_STATUS_REASON_MASK                                        0x0000000000001c00
142 
143 
144 /* Description		TX_WAIT_ACK
145 
146 			Field can only be set for the 'FES_tx_end' scenario.
147 			TXPCU sets this bit to 1 when it is waiting for an ACK/BA
148 			 or CTS Response.
149 */
150 
151 #define COEX_TX_STATUS_TX_WAIT_ACK_OFFSET                                           0x0000000000000000
152 #define COEX_TX_STATUS_TX_WAIT_ACK_LSB                                              13
153 #define COEX_TX_STATUS_TX_WAIT_ACK_MSB                                              13
154 #define COEX_TX_STATUS_TX_WAIT_ACK_MASK                                             0x0000000000002000
155 
156 
157 /* Description		FES_TX_IS_GEN_FRAME
158 
159 			Field only valid in case tx_status_reason indicates FES_tx_start
160 			 or FES_tx_end.
161 
162 			Field is set to 1 if the frame transmitted is a self generated
163 			 frame like RTS, CTS 2 self or NDP
164 */
165 
166 #define COEX_TX_STATUS_FES_TX_IS_GEN_FRAME_OFFSET                                   0x0000000000000000
167 #define COEX_TX_STATUS_FES_TX_IS_GEN_FRAME_LSB                                      14
168 #define COEX_TX_STATUS_FES_TX_IS_GEN_FRAME_MSB                                      14
169 #define COEX_TX_STATUS_FES_TX_IS_GEN_FRAME_MASK                                     0x0000000000004000
170 
171 
172 /* Description		SCH_TX_BURST_ONGOING
173 
174 			The proposed change by HWSCH  requires TXPCU to reflect
175 			TX_FES_SETUP.sch_tx_burst_ongoing field intoCOEX_TX_STATUS.sch_tx_burst_ongoing
176 			 field, when tx_status_reason is FES_end.
177 			SCH will overwrite this bit (that is set it to 1), when
178 			TXPCU set the tx_status_reason to FES_end, and SCH determines
179 			 that this FES is followed by other SIFS bursting based
180 			Scheduler commands.
181 			<legal all>
182 */
183 
184 #define COEX_TX_STATUS_SCH_TX_BURST_ONGOING_OFFSET                                  0x0000000000000000
185 #define COEX_TX_STATUS_SCH_TX_BURST_ONGOING_LSB                                     15
186 #define COEX_TX_STATUS_SCH_TX_BURST_ONGOING_MSB                                     15
187 #define COEX_TX_STATUS_SCH_TX_BURST_ONGOING_MASK                                    0x0000000000008000
188 
189 
190 /* Description		CURRENT_TX_DURATION
191 
192 			In case of FES related transmission:
193 			TXPCU sends current transmission time at the beginning of
194 			 transmission. This time covers the entire (PPDU) tx_frame.
195 			This field is only valid when 'tx_status_reason' is equal
196 			 to FES_tx_start or Response_tx_start. In other scenarios
197 			 it is set to 0
198 			In us units <legal all>
199 */
200 
201 #define COEX_TX_STATUS_CURRENT_TX_DURATION_OFFSET                                   0x0000000000000000
202 #define COEX_TX_STATUS_CURRENT_TX_DURATION_LSB                                      16
203 #define COEX_TX_STATUS_CURRENT_TX_DURATION_MSB                                      31
204 #define COEX_TX_STATUS_CURRENT_TX_DURATION_MASK                                     0x00000000ffff0000
205 
206 
207 /* Description		NEXT_RX_ACTIVE_TIME
208 
209 			In case of FES transmission:
210 			The expected receive duration for ACK/CTS/BA frame after
211 			 current transmission has finished. This field should be
212 			 set at both the start and end of the transmission.  When
213 			 no frame reception is expected, this field is 0
214 
215 			In case of Response transmission or Trigger Response transmission:
216 
217 			The expected receive duration for upcoming reception. This
218 			 field has the same value as the transmitted duration field.
219 
220 
221 			Note that for this scenario, there might be an other TX
222 			generated during this specified time. It is not known to
223 			 this device what the transmitter is planning to do in the
224 			 remainder of the TXOP. In other words, this value represents
225 			 the best guess, but might not be fully accurate.
226 
227 			In us units
228 			<legal all>
229 */
230 
231 #define COEX_TX_STATUS_NEXT_RX_ACTIVE_TIME_OFFSET                                   0x0000000000000000
232 #define COEX_TX_STATUS_NEXT_RX_ACTIVE_TIME_LSB                                      32
233 #define COEX_TX_STATUS_NEXT_RX_ACTIVE_TIME_MSB                                      47
234 #define COEX_TX_STATUS_NEXT_RX_ACTIVE_TIME_MASK                                     0x0000ffff00000000
235 
236 
237 /* Description		REMAINING_FES_TIME
238 
239 			In case of FES transmission:
240 			TXPCU sends the remaining FES time it expects to occupy
241 			the media.
242 			At the 'FES_tx_start', this value is the current_tx_duration
243 			 + value of inserted duration field.
244 			At the 'FES_tx_end', this value is equal to the duration
245 			 field in the just transmitted frame.
246 			At the 'FES_end', this value is the remaining FES duration
247 			 value. Note that this value should only be non zero in
248 			case of SIFS burting type of transmissions.
249 			In case of a FES failure, like reponse frame not received,
250 			this field is set to 0
251 
252 			In case of Self Gen response transmission (includes Trigger
253 			 response):
254 			At the 'Response_tx_start', this field has the same value
255 			 as the Current_tx_duration  + inserted duration field
256 			At the 'Response_tx_end', this field has the same value
257 			as the inserted duration field
258 			<legal all>
259 */
260 
261 #define COEX_TX_STATUS_REMAINING_FES_TIME_OFFSET                                    0x0000000000000000
262 #define COEX_TX_STATUS_REMAINING_FES_TIME_LSB                                       48
263 #define COEX_TX_STATUS_REMAINING_FES_TIME_MSB                                       63
264 #define COEX_TX_STATUS_REMAINING_FES_TIME_MASK                                      0xffff000000000000
265 
266 
267 /* Description		TX_ANTENNA_MASK
268 
269 			The actual used antennas for this transmission
270 
271 			For debug purpose only. PDG should not have modified the
272 			 value given by the Coex.
273 
274 			<legal all>
275 */
276 
277 #define COEX_TX_STATUS_TX_ANTENNA_MASK_OFFSET                                       0x0000000000000008
278 #define COEX_TX_STATUS_TX_ANTENNA_MASK_LSB                                          0
279 #define COEX_TX_STATUS_TX_ANTENNA_MASK_MSB                                          7
280 #define COEX_TX_STATUS_TX_ANTENNA_MASK_MASK                                         0x00000000000000ff
281 
282 
283 /* Description		SHARED_ANT_TX_PWR
284 
285 			Actual tx power on the shared antenna
286 			TXPCU sends at the beginning of transmission when tx_frame
287 			 is on.
288 
289 			For debug purpose only. PDG should not have modified the
290 			 value given by the Coex.
291 
292 			Transmit Power in s6.2 format.
293 			In units of 0.25 dBm
294 			<legal all>
295 */
296 
297 #define COEX_TX_STATUS_SHARED_ANT_TX_PWR_OFFSET                                     0x0000000000000008
298 #define COEX_TX_STATUS_SHARED_ANT_TX_PWR_LSB                                        8
299 #define COEX_TX_STATUS_SHARED_ANT_TX_PWR_MSB                                        15
300 #define COEX_TX_STATUS_SHARED_ANT_TX_PWR_MASK                                       0x000000000000ff00
301 
302 
303 /* Description		OTHER_ANT_TX_PWR
304 
305 			Actual tx power on the 'unshared' antenna(s)
306 			TXPCU sends at the beginning of transmission when tx_frame
307 			 is on.
308 
309 			For debug purpose only. PDG should not have modified the
310 			 value given by the Coex.
311 
312 			Transmit Power in s6.2 format.
313 			In units of 0.25 dBm
314 			<legal all>
315 */
316 
317 #define COEX_TX_STATUS_OTHER_ANT_TX_PWR_OFFSET                                      0x0000000000000008
318 #define COEX_TX_STATUS_OTHER_ANT_TX_PWR_LSB                                         16
319 #define COEX_TX_STATUS_OTHER_ANT_TX_PWR_MSB                                         23
320 #define COEX_TX_STATUS_OTHER_ANT_TX_PWR_MASK                                        0x0000000000ff0000
321 
322 
323 /* Description		RESERVED_2
324 
325 			Generator should set to 0, consumer shall ignore <legal
326 			0>
327 */
328 
329 #define COEX_TX_STATUS_RESERVED_2_OFFSET                                            0x0000000000000008
330 #define COEX_TX_STATUS_RESERVED_2_LSB                                               24
331 #define COEX_TX_STATUS_RESERVED_2_MSB                                               31
332 #define COEX_TX_STATUS_RESERVED_2_MASK                                              0x00000000ff000000
333 
334 
335 /* Description		TLV64_PADDING
336 
337 			Automatic DWORD padding inserted while converting TLV32
338 			to TLV64 for 64 bit ARCH
339 			<legal 0>
340 */
341 
342 #define COEX_TX_STATUS_TLV64_PADDING_OFFSET                                         0x0000000000000008
343 #define COEX_TX_STATUS_TLV64_PADDING_LSB                                            32
344 #define COEX_TX_STATUS_TLV64_PADDING_MSB                                            63
345 #define COEX_TX_STATUS_TLV64_PADDING_MASK                                           0xffffffff00000000
346 
347 
348 
349 #endif   // COEX_TX_STATUS
350