xref: /wlan-driver/fw-api/hw/qca5332/expected_response.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 
19 
20 
21 
22 
23 
24 
25 
26 #ifndef _EXPECTED_RESPONSE_H_
27 #define _EXPECTED_RESPONSE_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #define NUM_OF_DWORDS_EXPECTED_RESPONSE 6
32 
33 #define NUM_OF_QWORDS_EXPECTED_RESPONSE 3
34 
35 
36 struct expected_response {
37 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
38              uint32_t tx_ad2_31_0                                             : 32; // [31:0]
39              uint32_t tx_ad2_47_32                                            : 16, // [15:0]
40                       expected_response_type                                  :  5, // [20:16]
41                       response_to_response                                    :  3, // [23:21]
42                       su_ba_user_number                                       :  1, // [24:24]
43                       response_info_part2_required                            :  1, // [25:25]
44                       transmitted_bssid_check_en                              :  1, // [26:26]
45                       reserved_1                                              :  5; // [31:27]
46              uint32_t ndp_sta_partial_aid_2_8_0                               : 11, // [10:0]
47                       reserved_2                                              : 10, // [20:11]
48                       ndp_sta_partial_aid1_8_0                                : 11; // [31:21]
49              uint32_t ast_index                                               : 16, // [15:0]
50                       capture_ack_ba_sounding                                 :  1, // [16:16]
51                       capture_sounding_1str_20mhz                             :  1, // [17:17]
52                       capture_sounding_1str_40mhz                             :  1, // [18:18]
53                       capture_sounding_1str_80mhz                             :  1, // [19:19]
54                       capture_sounding_1str_160mhz                            :  1, // [20:20]
55                       capture_sounding_1str_240mhz                            :  1, // [21:21]
56                       capture_sounding_1str_320mhz                            :  1, // [22:22]
57                       reserved_3a                                             :  9; // [31:23]
58              uint32_t fcs                                                     :  9, // [8:0]
59                       reserved_4a                                             :  1, // [9:9]
60                       crc                                                     :  4, // [13:10]
61                       scrambler_seed                                          :  7, // [20:14]
62                       reserved_4b                                             : 11; // [31:21]
63              uint32_t tlv64_padding                                           : 32; // [31:0]
64 #else
65              uint32_t tx_ad2_31_0                                             : 32; // [31:0]
66              uint32_t reserved_1                                              :  5, // [31:27]
67                       transmitted_bssid_check_en                              :  1, // [26:26]
68                       response_info_part2_required                            :  1, // [25:25]
69                       su_ba_user_number                                       :  1, // [24:24]
70                       response_to_response                                    :  3, // [23:21]
71                       expected_response_type                                  :  5, // [20:16]
72                       tx_ad2_47_32                                            : 16; // [15:0]
73              uint32_t ndp_sta_partial_aid1_8_0                                : 11, // [31:21]
74                       reserved_2                                              : 10, // [20:11]
75                       ndp_sta_partial_aid_2_8_0                               : 11; // [10:0]
76              uint32_t reserved_3a                                             :  9, // [31:23]
77                       capture_sounding_1str_320mhz                            :  1, // [22:22]
78                       capture_sounding_1str_240mhz                            :  1, // [21:21]
79                       capture_sounding_1str_160mhz                            :  1, // [20:20]
80                       capture_sounding_1str_80mhz                             :  1, // [19:19]
81                       capture_sounding_1str_40mhz                             :  1, // [18:18]
82                       capture_sounding_1str_20mhz                             :  1, // [17:17]
83                       capture_ack_ba_sounding                                 :  1, // [16:16]
84                       ast_index                                               : 16; // [15:0]
85              uint32_t reserved_4b                                             : 11, // [31:21]
86                       scrambler_seed                                          :  7, // [20:14]
87                       crc                                                     :  4, // [13:10]
88                       reserved_4a                                             :  1, // [9:9]
89                       fcs                                                     :  9; // [8:0]
90              uint32_t tlv64_padding                                           : 32; // [31:0]
91 #endif
92 };
93 
94 
95 /* Description		TX_AD2_31_0
96 
97 			Lower 32 bits of the transmitter address (AD2) of the last
98 			 packet which was transmitted, which is used by RXPCU in
99 			 Proxy STA mode.
100 */
101 
102 #define EXPECTED_RESPONSE_TX_AD2_31_0_OFFSET                                        0x0000000000000000
103 #define EXPECTED_RESPONSE_TX_AD2_31_0_LSB                                           0
104 #define EXPECTED_RESPONSE_TX_AD2_31_0_MSB                                           31
105 #define EXPECTED_RESPONSE_TX_AD2_31_0_MASK                                          0x00000000ffffffff
106 
107 
108 /* Description		TX_AD2_47_32
109 
110 			Upper 16 bits of the transmitter address (AD2) of the last
111 			 packet which was transmitted, which is used by RXPCU in
112 			 Proxy STA mode.
113 */
114 
115 #define EXPECTED_RESPONSE_TX_AD2_47_32_OFFSET                                       0x0000000000000000
116 #define EXPECTED_RESPONSE_TX_AD2_47_32_LSB                                          32
117 #define EXPECTED_RESPONSE_TX_AD2_47_32_MSB                                          47
118 #define EXPECTED_RESPONSE_TX_AD2_47_32_MASK                                         0x0000ffff00000000
119 
120 
121 /* Description		EXPECTED_RESPONSE_TYPE
122 
123 			Provides insight for RXPCU of what type of response is expected
124 			 in the medium.
125 
126 			Mainly used for debugging purposes.
127 
128 			No matter what RXPCU receives, it shall always report it
129 			 to TXPCU.
130 
131 			Only special scenario where RXPCU will have to generate
132 			a RECEIVED_RESPONSE_INFO TLV , even when no actual MPDU
133 			with passing FCS was received is when the response_type
134 			is set to: frameless_phyrx_response_accepted
135 
136 			<enum 0 no_response_expected>After transmission of this
137 			frame, no response in SIFS time is expected
138 
139 			When TXPCU sees this setting, it shall not generated the
140 			 EXPECTED_RESPONSE TLV.
141 
142 			RXPCU should never see this setting
143 			<enum 1 ack_expected>An ACK frame is expected as response
144 
145 
146 			RXPCU is just expecting any response. It is TXPCU who checks
147 			 that the right response was received.
148 			<enum 2 ba_64_bitmap_expected>BA with 64 bitmap is expected.
149 
150 
151 			PDG DOES NOT use the size info to calculated response duration.
152 			The length of the response will have to be programmed by
153 			 SW in the per-BW 'Expected_ppdu_resp_length' field.
154 
155 			For TXPCU only the fact that it is a BA is important. Actual
156 			 received BA size is not important
157 
158 			RXPCU is just expecting any response. It is TXPCU who checks
159 			 that the right response was received.
160 			<enum 3 ba_256_expected>BA with 256 bitmap is expected.
161 
162 			PDG DOES NOT use the size info to calculated response duration.
163 			The length of the response will have to be programmed by
164 			 SW in the per-BW 'Expected_ppdu_resp_length' field.
165 
166 			For TXPCU only the fact that it is a BA is important. Actual
167 			 received BA size is not important
168 
169 			RXPCU is just expecting any response. It is TXPCU who checks
170 			 that the right response was received.
171 			<enum 4 actionnoack_expected>SW sets this after sending
172 			NDP or BR-Poll.
173 
174 			As PDG has no idea on how long the reception is going to
175 			 be, the reception time of the response will have to be
176 			programmed by SW in the 'Extend_duration_value_bw...' field
177 
178 
179 			RXPCU is just expecting any response. It is TXPCU who checks
180 			 that the right response was received.
181 			<enum 5 ack_ba_expected>PDG uses the size info and assumes
182 			 single BA format with ACK and 64 bitmap embedded.
183 			If SW expects more bitmaps in case of multi-TID, is shall
184 			 program the 'Extend_duration_value_bw...' field for additional
185 			 duration time.
186 			For TXPCU only the fact that an ACK and/or BA is received
187 			 is important. Reception of only ACK or BA is also considered
188 			 a success.
189 			SW also typically sets this when sending VHT single MPDU.
190 			Some chip vendors might send BA rather than ACK in response
191 			 to VHT single MPDU but still we want to accept BA as well.
192 
193 
194 			RXPCU is just expecting any response. It is TXPCU who checks
195 			 that the right response was received.
196 			<enum 6 cts_expected>SW sets this after queuing RTS frame
197 			 as standalone packet and sending it.
198 
199 			RXPCU is just expecting any response. It is TXPCU who checks
200 			 that the right response was received.
201 			<enum 7 ack_data_expected>SW sets this after sending PS-Poll.
202 
203 
204 			For TXPCU either ACK and/or data reception is considered
205 			 success.
206 			PDG basis it's response duration calculation on an ACK.
207 			For the data portion, SW shall program the 'Extend_duration_value_bw...'
208 			field
209 			<enum 8 ndp_ack_expected>Reserved for 11ah usage.
210 			<enum 9 ndp_modified_ack>Reserved for 11ah usage
211 			<enum 10 ndp_ba_expected>Reserved for 11ah usage.
212 			<enum 11 ndp_cts_expected>Reserved for 11ah usage
213 			<enum 12 ndp_ack_or_ndp_modified_ack_expected>Reserved for
214 			 11ah usage
215 			<enum 13 ul_mu_ba_expected>NOT SUPPORTED IN NAPIER AX AND
216 			 HASTINGS
217 
218 			TXPCU expects UL MU OFDMA or UL MU MIMO reception.
219 			As PDG does not know how RUs are assigned for the uplink
220 			 portion, PDG can not calculate the uplink duration. Therefor
221 			 SW shall program the 'Extend_duration_value_bw...' field
222 
223 
224 			RXPCU will report any frame received, irrespective of it
225 			 having been UL MU or SU It is TXPCUs responsibility to
226 			distinguish between the UL MU or SU
227 
228 			TXPCU can check in TLV RECEIVED_RESPONSE_INFO MU_Response_BA_bitmap
229 			 if indeed BA was received
230 			<enum 14 ul_mu_ba_and_data_expected>NOT SUPPORTED IN NAPIER
231 			 AX AND HASTINGS
232 
233 			TXPCU expects UL MU OFDMA or UL MU MIMO reception.
234 			As PDG does not know how RUs are assigned for the uplink
235 			 portion, PDG can not calculate the uplink duration. Therefor
236 			 SW shall program the 'Extend_duration_value_bw...' field
237 
238 
239 			RXPCU will report any frame received, irrespective of it
240 			 having been UL MU or SU It is TXPCUs responsibility to
241 			distinguish between the UL MU or SU
242 
243 			TXPCU can check in TLV RECEIVED_RESPONSE_INFO, field MU_Response_data_bitmap
244 			 and MU_Response_BA_bitmap if indeed BA and data was received
245 
246 			<enum 15 ul_mu_cbf_expected>NOT SUPPORTED IN NAPIER AX AND
247 			 HASTINGS
248 
249 			When selected, CBF frames are expected to be received in
250 			 MU reception (uplink OFDMA or uplink MIMO)
251 
252 			RXPCU is just expecting any response. It is TXPCU who checks
253 			 that the right response was received
254 			TXPCU can check in TLV RECEIVED_RESPONSE_INFO, field MU_Response_cbf_bitmap
255 			 if indeed CBF frames were received.
256 			<enum 16 ul_mu_frames_expected>When selected, MPDU frames
257 			 are expected in the MU reception (uplink OFDMA or uplink
258 			 MIMO)
259 
260 			RXPCU is just expecting any response. It is TXPCU who checks
261 			 that the right response was received
262 
263 			TXPCU can check in TLV RECEIVED_RESPONSE_INFO, field MU_Response_bitmap
264 			 if indeed frames were received.
265 			<enum 17 any_response_to_this_device>Any response expected
266 			 to be send to this device in SIFS time is acceptable.
267 
268 			RXPCU is just expecting any response. It is TXPCU who checks
269 			 that the right response was received
270 
271 			For TXPCU, UL MU or SU is both acceptable.
272 
273 			Can be used for complex OFDMA scenarios. PDG can not calculate
274 			 the uplink duration. Therefor SW shall program the 'Extend_duration_value_bw...'
275 			field
276 			<enum 18 any_response_accepted>Any frame in the medium to
277 			 this or any other device, is acceptable as response.
278 			RXPCU is just expecting any response. It is TXPCU who checks
279 			 that the right response was received
280 
281 			For TXPCU, UL MU or SU is both acceptable.
282 
283 			Can be used for complex OFDMA scenarios. PDG can not calculate
284 			 the uplink duration. Therefor SW shall program the 'Extend_duration_value_bw...'
285 			field
286 			<enum 19 frameless_phyrx_response_accepted>Any MU frameless
287 			 reception generated by the PHY is acceptable.
288 
289 			PHY indicates this type of reception explicitly in TLV PHYRX_RSSI_LEGACY,
290 			field Reception_type == reception_is_frameless
291 
292 			RXPCU will report any frame received, irrespective of it
293 			 having been UL MU or SU.
294 
295 			This can be used for complex MU-MIMO or OFDMA scenarios,
296 			like receiving MU-CTS.
297 
298 			PDG can not calculate the uplink duration. Therefor SW shall
299 			 program the 'Extend_duration_value_bw...' field
300 			<enum 20 ranging_ndp_and_lmr_expected>SW sets this after
301 			 sending ranging NDPA followed by NDP as an ISTA and NDP
302 			 and LMR (Action No Ack) are expected as back-to-back reception
303 			 in SIFS.
304 
305 			As PDG has no idea on how long the reception is going to
306 			 be, the reception time of the response will have to be
307 			programmed by SW in the 'Extend_duration_value_bw...' field
308 
309 
310 			RXPCU is just expecting any response. It is TXPCU who checks
311 			 that the right response was received.
312 			<enum 21 ba_512_expected>BA with 512 bitmap is expected.
313 
314 
315 			PDG DOES NOT use the size info to calculated response duration.
316 			The length of the response will have to be programmed by
317 			 SW in the per-BW 'Expected_ppdu_resp_length' field.
318 
319 			For TXPCU only the fact that it is a BA is important. Actual
320 			 received BA size is not important
321 
322 			RXPCU is just expecting any response. It is TXPCU who checks
323 			 that the right response was received.
324 			<enum 22 ba_1024_expected>BA with 1024 bitmap is expected.
325 
326 
327 			PDG DOES NOT use the size info to calculated response duration.
328 			The length of the response will have to be programmed by
329 			 SW in the per-BW 'Expected_ppdu_resp_length' field.
330 
331 			For TXPCU only the fact that it is a BA is important. Actual
332 			 received BA size is not important
333 
334 			RXPCU is just expecting any response. It is TXPCU who checks
335 			 that the right response was received.
336 			<enum 23 ul_mu_ranging_cts2s_expected>When selected, CTS2S
337 			 frames are expected to be received in MU reception (uplink
338 			 OFDMA)
339 
340 			RXPCU shall check each response for CTS2S and report to
341 			TXPCU.
342 
343 			TXPCU can check in the TLV 'RECEIVED_RESPONSE_INFO,' fields
344 			 'MU_Response_bitmap' and 'TB_Ranging_Resp' if indeed CTS2S
345 			 frames were received.
346 			<enum 24 ul_mu_ranging_ndp_expected>When selected, UL NDP
347 			 frames are expected to be received in MU reception (uplink
348 			 spatial multiplexing)
349 
350 			RXPCU shall check each response for NDP and report to TXPCU.
351 
352 
353 			TXPCU can check in the TLV 'RECEIVED_RESPONSE_INFO,' fields
354 			 'MU_Response_bitmap' and 'TB_Ranging_Resp' if indeed NDP
355 			 frames were received.
356 			<enum 25 ul_mu_ranging_lmr_expected>When selected, LMR frames
357 			 are expected to be received in MU reception (uplink OFDMA
358 			 or uplink MIMO)
359 
360 			RXPCU shall check each response for LMR and report to TXPCU.
361 
362 
363 			TXPCU can check in the TLV 'RECEIVED_RESPONSE_INFO,' fields
364 			 'MU_Response_bitmap' and 'TB_Ranging_Resp' if indeed LMR
365 			 frames were received.
366 */
367 
368 #define EXPECTED_RESPONSE_EXPECTED_RESPONSE_TYPE_OFFSET                             0x0000000000000000
369 #define EXPECTED_RESPONSE_EXPECTED_RESPONSE_TYPE_LSB                                48
370 #define EXPECTED_RESPONSE_EXPECTED_RESPONSE_TYPE_MSB                                52
371 #define EXPECTED_RESPONSE_EXPECTED_RESPONSE_TYPE_MASK                               0x001f000000000000
372 
373 
374 /* Description		RESPONSE_TO_RESPONSE
375 
376 			Field indicates if after receiving the PPDU response (indicated
377 			 in the field above), TXPCU is expected to generate a reponse
378 			 to the response
379 
380 			In case a response to response is expected, RXPCU shall
381 			first acknowledge the proper reception of the received frames,
382 			so that TXPCU can first wrapup that portion of the FES.
383 
384 			<enum 0 None> No response after response allowed.
385 			<enum 1 SU_BA> The response after response that TXPCU is
386 			 allowed to generate is a single BA. Even if RXPCU is indicating
387 			 that multiple users are received, TXPCU shall only send
388 			 a BA for 1 STA. Response_to_response rates can be found
389 			 in fields 'response_to_response_rate_info_bw...'
390 			<enum 2 MU_BA> The response after response that TXPCU is
391 			 allowed to generate is only Multi Destination Multi User
392 			 BA. Response_to_response rates can be found in fields 'response_to_response_rate_info_bw...'
393 
394 
395 			<enum 3 RESPONSE_TO_RESPONSE_CMD> A response to response
396 			 is expected to be generated. In other words, RXPCU will
397 			 likely indicate to TXPCU at the end of upcoming reception
398 			 that a response is needed. TXPCU is however to ignore this
399 			 indication from RXPCU, and assume for a moment that no
400 			response to response is needed, as all the details on how
401 			 to handle this is provided in the next scheduling command,
402 			which is marked as a 'response_to_response' type.
403 
404 			<legal    0-3>
405 */
406 
407 #define EXPECTED_RESPONSE_RESPONSE_TO_RESPONSE_OFFSET                               0x0000000000000000
408 #define EXPECTED_RESPONSE_RESPONSE_TO_RESPONSE_LSB                                  53
409 #define EXPECTED_RESPONSE_RESPONSE_TO_RESPONSE_MSB                                  55
410 #define EXPECTED_RESPONSE_RESPONSE_TO_RESPONSE_MASK                                 0x00e0000000000000
411 
412 
413 /* Description		SU_BA_USER_NUMBER
414 
415 			Field only valid when Response_to_response is SU_BA
416 
417 			Indicates the user number of which the BA will be send after
418 			 receiving the uplink OFDMA.
419 */
420 
421 #define EXPECTED_RESPONSE_SU_BA_USER_NUMBER_OFFSET                                  0x0000000000000000
422 #define EXPECTED_RESPONSE_SU_BA_USER_NUMBER_LSB                                     56
423 #define EXPECTED_RESPONSE_SU_BA_USER_NUMBER_MSB                                     56
424 #define EXPECTED_RESPONSE_SU_BA_USER_NUMBER_MASK                                    0x0100000000000000
425 
426 
427 /* Description		RESPONSE_INFO_PART2_REQUIRED
428 
429 			Field only valid when Response_type  is NOT set to No_response_expected
430 
431 
432 			When set to 1, RXPCU shall generate the  RECEIVED_RESPONSE_INFO_PART2
433 			 TLV after having received the response frame. TXPCU shall
434 			 wait for this TLV before sending the TX_FES_STATUS_END
435 			TLV.
436 
437 			When NOT set, RXPCU shall NOT generate the above mentioned
438 			 TLV. TXPCU shall not wait for this TLV and after having
439 			 received  RECEIVED_RESPONSE_INFO  TLV, it can immediately
440 			 generate the TX_FES_STATUS_END TLV.
441 
442 			<legal all>
443 */
444 
445 #define EXPECTED_RESPONSE_RESPONSE_INFO_PART2_REQUIRED_OFFSET                       0x0000000000000000
446 #define EXPECTED_RESPONSE_RESPONSE_INFO_PART2_REQUIRED_LSB                          57
447 #define EXPECTED_RESPONSE_RESPONSE_INFO_PART2_REQUIRED_MSB                          57
448 #define EXPECTED_RESPONSE_RESPONSE_INFO_PART2_REQUIRED_MASK                         0x0200000000000000
449 
450 
451 /* Description		TRANSMITTED_BSSID_CHECK_EN
452 
453 			When set to 1, RXPCU shall assume group addressed frame
454 			with Tx_AD2 equal to TBSSID was sent. RxPCU should properly
455 			 handle receive frame(s) from STA(s) which A1 is TBSSID
456 			or any VAPs.When NOT set, RXPCU shall compare received frame's
457 			 A1 with Tx_AD2 only.
458 			<legal all>
459 */
460 
461 #define EXPECTED_RESPONSE_TRANSMITTED_BSSID_CHECK_EN_OFFSET                         0x0000000000000000
462 #define EXPECTED_RESPONSE_TRANSMITTED_BSSID_CHECK_EN_LSB                            58
463 #define EXPECTED_RESPONSE_TRANSMITTED_BSSID_CHECK_EN_MSB                            58
464 #define EXPECTED_RESPONSE_TRANSMITTED_BSSID_CHECK_EN_MASK                           0x0400000000000000
465 
466 
467 /* Description		RESERVED_1
468 
469 			<legal 0>
470 */
471 
472 #define EXPECTED_RESPONSE_RESERVED_1_OFFSET                                         0x0000000000000000
473 #define EXPECTED_RESPONSE_RESERVED_1_LSB                                            59
474 #define EXPECTED_RESPONSE_RESERVED_1_MSB                                            63
475 #define EXPECTED_RESPONSE_RESERVED_1_MASK                                           0xf800000000000000
476 
477 
478 /* Description		NDP_STA_PARTIAL_AID_2_8_0
479 
480 			This field is applicable only in 11ah mode of operation.
481 			This field carries the information needed for RxPCU to qualify
482 			 valid NDP-CTS
483 
484 			When an RTS is being transmitted, this field  provides the
485 			 partial AID of STA/BSSID of the transmitter,so the received
486 			 RA/BSSID of the NDP CTS response frame can be compared
487 			to validate it. This value is provided by SW for valiadating
488 			 the NDP CTS.
489 
490 			This filed also carries information for TA of the NDP Modified
491 			 ACK when an NDP PS-Poll is transmitted.
492 */
493 
494 #define EXPECTED_RESPONSE_NDP_STA_PARTIAL_AID_2_8_0_OFFSET                          0x0000000000000008
495 #define EXPECTED_RESPONSE_NDP_STA_PARTIAL_AID_2_8_0_LSB                             0
496 #define EXPECTED_RESPONSE_NDP_STA_PARTIAL_AID_2_8_0_MSB                             10
497 #define EXPECTED_RESPONSE_NDP_STA_PARTIAL_AID_2_8_0_MASK                            0x00000000000007ff
498 
499 
500 /* Description		RESERVED_2
501 
502 			Reserved: Generator should set to 0, consumer shall ignore
503 			 <legal 0>
504 */
505 
506 #define EXPECTED_RESPONSE_RESERVED_2_OFFSET                                         0x0000000000000008
507 #define EXPECTED_RESPONSE_RESERVED_2_LSB                                            11
508 #define EXPECTED_RESPONSE_RESERVED_2_MSB                                            20
509 #define EXPECTED_RESPONSE_RESERVED_2_MASK                                           0x00000000001ff800
510 
511 
512 /* Description		NDP_STA_PARTIAL_AID1_8_0
513 
514 			This field is applicable only in 11ah mode of operation.
515 			This field carries the information needed for RxPCU to qualify
516 			 valid NDP Modified ACK
517 
518 			TxPCU provides the partial AID (RA) of the NDP PS-Poll frame.
519 
520 */
521 
522 #define EXPECTED_RESPONSE_NDP_STA_PARTIAL_AID1_8_0_OFFSET                           0x0000000000000008
523 #define EXPECTED_RESPONSE_NDP_STA_PARTIAL_AID1_8_0_LSB                              21
524 #define EXPECTED_RESPONSE_NDP_STA_PARTIAL_AID1_8_0_MSB                              31
525 #define EXPECTED_RESPONSE_NDP_STA_PARTIAL_AID1_8_0_MASK                             0x00000000ffe00000
526 
527 
528 /* Description		AST_INDEX
529 
530 			The AST index of the receive Ack/BA.  This information is
531 			 provided from the TXPCU to the RXPCU for receive Ack/BA.
532 
533 */
534 
535 #define EXPECTED_RESPONSE_AST_INDEX_OFFSET                                          0x0000000000000008
536 #define EXPECTED_RESPONSE_AST_INDEX_LSB                                             32
537 #define EXPECTED_RESPONSE_AST_INDEX_MSB                                             47
538 #define EXPECTED_RESPONSE_AST_INDEX_MASK                                            0x0000ffff00000000
539 
540 
541 /* Description		CAPTURE_ACK_BA_SOUNDING
542 
543 			If set enables capture of 1str and 2str sounding on Ack
544 			or BA as long as the corresponding capture_sounding_1str_##mhz
545 			 bits is set.
546 
547 			If clear the capture of sounding on Ack or BA is disabled
548 			 even if the corresponding capture_sounding_1str_##mhz is
549 			 set.
550 */
551 
552 #define EXPECTED_RESPONSE_CAPTURE_ACK_BA_SOUNDING_OFFSET                            0x0000000000000008
553 #define EXPECTED_RESPONSE_CAPTURE_ACK_BA_SOUNDING_LSB                               48
554 #define EXPECTED_RESPONSE_CAPTURE_ACK_BA_SOUNDING_MSB                               48
555 #define EXPECTED_RESPONSE_CAPTURE_ACK_BA_SOUNDING_MASK                              0x0001000000000000
556 
557 
558 /* Description		CAPTURE_SOUNDING_1STR_20MHZ
559 
560 			Capture sounding for 1 stream 20 MHz receive packets
561 */
562 
563 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_20MHZ_OFFSET                        0x0000000000000008
564 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_20MHZ_LSB                           49
565 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_20MHZ_MSB                           49
566 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_20MHZ_MASK                          0x0002000000000000
567 
568 
569 /* Description		CAPTURE_SOUNDING_1STR_40MHZ
570 
571 			Capture sounding for 1 stream 40 MHz receive packets
572 */
573 
574 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_40MHZ_OFFSET                        0x0000000000000008
575 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_40MHZ_LSB                           50
576 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_40MHZ_MSB                           50
577 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_40MHZ_MASK                          0x0004000000000000
578 
579 
580 /* Description		CAPTURE_SOUNDING_1STR_80MHZ
581 
582 			Capture sounding for 1 stream 80 MHz receive packets
583 */
584 
585 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_80MHZ_OFFSET                        0x0000000000000008
586 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_80MHZ_LSB                           51
587 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_80MHZ_MSB                           51
588 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_80MHZ_MASK                          0x0008000000000000
589 
590 
591 /* Description		CAPTURE_SOUNDING_1STR_160MHZ
592 
593 			Capture sounding for 1 stream 160 MHz receive packets
594 */
595 
596 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_160MHZ_OFFSET                       0x0000000000000008
597 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_160MHZ_LSB                          52
598 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_160MHZ_MSB                          52
599 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_160MHZ_MASK                         0x0010000000000000
600 
601 
602 /* Description		CAPTURE_SOUNDING_1STR_240MHZ
603 
604 			Capture sounding for 1 stream 240 MHz receive packets
605 */
606 
607 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_240MHZ_OFFSET                       0x0000000000000008
608 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_240MHZ_LSB                          53
609 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_240MHZ_MSB                          53
610 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_240MHZ_MASK                         0x0020000000000000
611 
612 
613 /* Description		CAPTURE_SOUNDING_1STR_320MHZ
614 
615 			Capture sounding for 1 stream 320 MHz receive packets
616 */
617 
618 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_320MHZ_OFFSET                       0x0000000000000008
619 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_320MHZ_LSB                          54
620 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_320MHZ_MSB                          54
621 #define EXPECTED_RESPONSE_CAPTURE_SOUNDING_1STR_320MHZ_MASK                         0x0040000000000000
622 
623 
624 /* Description		RESERVED_3A
625 
626 			Reserved: Generator should set to 0, consumer shall ignore
627 			 <legal 0>
628 */
629 
630 #define EXPECTED_RESPONSE_RESERVED_3A_OFFSET                                        0x0000000000000008
631 #define EXPECTED_RESPONSE_RESERVED_3A_LSB                                           55
632 #define EXPECTED_RESPONSE_RESERVED_3A_MSB                                           63
633 #define EXPECTED_RESPONSE_RESERVED_3A_MASK                                          0xff80000000000000
634 
635 
636 /* Description		FCS
637 
638 			Tx Frame's FCS[31:23]
639 
640 			TODO: describe what this is used for ...
641 
642 			For aggregates and NDP frames, this field is reserved and
643 			 TxPCU should populate this to Zero.
644 */
645 
646 #define EXPECTED_RESPONSE_FCS_OFFSET                                                0x0000000000000010
647 #define EXPECTED_RESPONSE_FCS_LSB                                                   0
648 #define EXPECTED_RESPONSE_FCS_MSB                                                   8
649 #define EXPECTED_RESPONSE_FCS_MASK                                                  0x00000000000001ff
650 
651 
652 /* Description		RESERVED_4A
653 
654 			Reserved: Generator should set to 0, consumer shall ignore
655 			 <legal 0>
656 */
657 
658 #define EXPECTED_RESPONSE_RESERVED_4A_OFFSET                                        0x0000000000000010
659 #define EXPECTED_RESPONSE_RESERVED_4A_LSB                                           9
660 #define EXPECTED_RESPONSE_RESERVED_4A_MSB                                           9
661 #define EXPECTED_RESPONSE_RESERVED_4A_MASK                                          0x0000000000000200
662 
663 
664 /* Description		CRC
665 
666 			TODO: describe what this is used for ...
667 
668 			Tx SIG's CRC[3:0]
669 */
670 
671 #define EXPECTED_RESPONSE_CRC_OFFSET                                                0x0000000000000010
672 #define EXPECTED_RESPONSE_CRC_LSB                                                   10
673 #define EXPECTED_RESPONSE_CRC_MSB                                                   13
674 #define EXPECTED_RESPONSE_CRC_MASK                                                  0x0000000000003c00
675 
676 
677 /* Description		SCRAMBLER_SEED
678 
679 			TODO: describe what this is used for ...
680 
681 			Tx Frames SERVICE[6:0]
682 */
683 
684 #define EXPECTED_RESPONSE_SCRAMBLER_SEED_OFFSET                                     0x0000000000000010
685 #define EXPECTED_RESPONSE_SCRAMBLER_SEED_LSB                                        14
686 #define EXPECTED_RESPONSE_SCRAMBLER_SEED_MSB                                        20
687 #define EXPECTED_RESPONSE_SCRAMBLER_SEED_MASK                                       0x00000000001fc000
688 
689 
690 /* Description		RESERVED_4B
691 
692 			Reserved: Generator should set to 0, consumer shall ignore
693 			 <legal 0>
694 */
695 
696 #define EXPECTED_RESPONSE_RESERVED_4B_OFFSET                                        0x0000000000000010
697 #define EXPECTED_RESPONSE_RESERVED_4B_LSB                                           21
698 #define EXPECTED_RESPONSE_RESERVED_4B_MSB                                           31
699 #define EXPECTED_RESPONSE_RESERVED_4B_MASK                                          0x00000000ffe00000
700 
701 
702 /* Description		TLV64_PADDING
703 
704 			Automatic DWORD padding inserted while converting TLV32
705 			to TLV64 for 64 bit ARCH
706 			<legal 0>
707 */
708 
709 #define EXPECTED_RESPONSE_TLV64_PADDING_OFFSET                                      0x0000000000000010
710 #define EXPECTED_RESPONSE_TLV64_PADDING_LSB                                         32
711 #define EXPECTED_RESPONSE_TLV64_PADDING_MSB                                         63
712 #define EXPECTED_RESPONSE_TLV64_PADDING_MASK                                        0xffffffff00000000
713 
714 
715 
716 #endif   // EXPECTED_RESPONSE
717