1*5113495bSYour Name 2*5113495bSYour Name /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name 18*5113495bSYour Name 19*5113495bSYour Name 20*5113495bSYour Name 21*5113495bSYour Name 22*5113495bSYour Name 23*5113495bSYour Name 24*5113495bSYour Name 25*5113495bSYour Name 26*5113495bSYour Name #ifndef _MACTX_HE_SIG_A_MU_UL_H_ 27*5113495bSYour Name #define _MACTX_HE_SIG_A_MU_UL_H_ 28*5113495bSYour Name #if !defined(__ASSEMBLER__) 29*5113495bSYour Name #endif 30*5113495bSYour Name 31*5113495bSYour Name #include "he_sig_a_mu_ul_info.h" 32*5113495bSYour Name #define NUM_OF_DWORDS_MACTX_HE_SIG_A_MU_UL 2 33*5113495bSYour Name 34*5113495bSYour Name #define NUM_OF_QWORDS_MACTX_HE_SIG_A_MU_UL 1 35*5113495bSYour Name 36*5113495bSYour Name 37*5113495bSYour Name struct mactx_he_sig_a_mu_ul { 38*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 39*5113495bSYour Name struct he_sig_a_mu_ul_info mactx_he_sig_a_mu_ul_info_details; 40*5113495bSYour Name #else 41*5113495bSYour Name struct he_sig_a_mu_ul_info mactx_he_sig_a_mu_ul_info_details; 42*5113495bSYour Name #endif 43*5113495bSYour Name }; 44*5113495bSYour Name 45*5113495bSYour Name 46*5113495bSYour Name /* Description MACTX_HE_SIG_A_MU_UL_INFO_DETAILS 47*5113495bSYour Name 48*5113495bSYour Name See detailed description of the STRUCT 49*5113495bSYour Name */ 50*5113495bSYour Name 51*5113495bSYour Name 52*5113495bSYour Name /* Description FORMAT_INDICATION 53*5113495bSYour Name 54*5113495bSYour Name Indicates whether the transmission is SU PPDU or a trigger 55*5113495bSYour Name based UL MU PDDU 56*5113495bSYour Name <enum 0 HE_SIGA_FORMAT_HE_TRIG> 57*5113495bSYour Name <enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU> 58*5113495bSYour Name <legal all> 59*5113495bSYour Name */ 60*5113495bSYour Name 61*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_FORMAT_INDICATION_OFFSET 0x0000000000000000 62*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_FORMAT_INDICATION_LSB 0 63*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_FORMAT_INDICATION_MSB 0 64*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_FORMAT_INDICATION_MASK 0x0000000000000001 65*5113495bSYour Name 66*5113495bSYour Name 67*5113495bSYour Name /* Description BSS_COLOR_ID 68*5113495bSYour Name 69*5113495bSYour Name BSS color ID 70*5113495bSYour Name <legal all> 71*5113495bSYour Name */ 72*5113495bSYour Name 73*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_BSS_COLOR_ID_OFFSET 0x0000000000000000 74*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_BSS_COLOR_ID_LSB 1 75*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_BSS_COLOR_ID_MSB 6 76*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_BSS_COLOR_ID_MASK 0x000000000000007e 77*5113495bSYour Name 78*5113495bSYour Name 79*5113495bSYour Name /* Description SPATIAL_REUSE 80*5113495bSYour Name 81*5113495bSYour Name Spatial reuse 82*5113495bSYour Name 83*5113495bSYour Name <legal all> 84*5113495bSYour Name */ 85*5113495bSYour Name 86*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_SPATIAL_REUSE_OFFSET 0x0000000000000000 87*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_SPATIAL_REUSE_LSB 7 88*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_SPATIAL_REUSE_MSB 22 89*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_SPATIAL_REUSE_MASK 0x00000000007fff80 90*5113495bSYour Name 91*5113495bSYour Name 92*5113495bSYour Name /* Description RESERVED_0A 93*5113495bSYour Name 94*5113495bSYour Name Note: spec indicates this shall be set to 1 95*5113495bSYour Name <legal 1> 96*5113495bSYour Name */ 97*5113495bSYour Name 98*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_0A_OFFSET 0x0000000000000000 99*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_0A_LSB 23 100*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_0A_MSB 23 101*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_0A_MASK 0x0000000000800000 102*5113495bSYour Name 103*5113495bSYour Name 104*5113495bSYour Name /* Description TRANSMIT_BW 105*5113495bSYour Name 106*5113495bSYour Name Bandwidth of the PPDU. 107*5113495bSYour Name 108*5113495bSYour Name <enum 0 HE_SIG_A_MU_UL_BW20> 20 Mhz 109*5113495bSYour Name <enum 1 HE_SIG_A_MU_UL_BW40> 40 Mhz 110*5113495bSYour Name <enum 2 HE_SIG_A_MU_UL_BW80> 80 Mhz 111*5113495bSYour Name <enum 3 HE_SIG_A_MU_UL_BW160> 160 MHz or 80+80 MHz 112*5113495bSYour Name 113*5113495bSYour Name On RX side, Field Used by MAC HW 114*5113495bSYour Name <legal 0-3> 115*5113495bSYour Name */ 116*5113495bSYour Name 117*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_TRANSMIT_BW_OFFSET 0x0000000000000000 118*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_TRANSMIT_BW_LSB 24 119*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_TRANSMIT_BW_MSB 25 120*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_TRANSMIT_BW_MASK 0x0000000003000000 121*5113495bSYour Name 122*5113495bSYour Name 123*5113495bSYour Name /* Description RESERVED_0B 124*5113495bSYour Name 125*5113495bSYour Name <legal 0> 126*5113495bSYour Name */ 127*5113495bSYour Name 128*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_0B_OFFSET 0x0000000000000000 129*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_0B_LSB 26 130*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_0B_MSB 31 131*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_0B_MASK 0x00000000fc000000 132*5113495bSYour Name 133*5113495bSYour Name 134*5113495bSYour Name /* Description TXOP_DURATION 135*5113495bSYour Name 136*5113495bSYour Name Indicates the remaining time in the current TXOP <legal 137*5113495bSYour Name all> 138*5113495bSYour Name */ 139*5113495bSYour Name 140*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_TXOP_DURATION_OFFSET 0x0000000000000000 141*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_TXOP_DURATION_LSB 32 142*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_TXOP_DURATION_MSB 38 143*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_TXOP_DURATION_MASK 0x0000007f00000000 144*5113495bSYour Name 145*5113495bSYour Name 146*5113495bSYour Name /* Description RESERVED_1A 147*5113495bSYour Name 148*5113495bSYour Name Set to value indicated in the trigger frame 149*5113495bSYour Name <legal 255> 150*5113495bSYour Name */ 151*5113495bSYour Name 152*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_1A_OFFSET 0x0000000000000000 153*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_1A_LSB 39 154*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_1A_MSB 47 155*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_1A_MASK 0x0000ff8000000000 156*5113495bSYour Name 157*5113495bSYour Name 158*5113495bSYour Name /* Description CRC 159*5113495bSYour Name 160*5113495bSYour Name CRC for HE-SIG-A contents. 161*5113495bSYour Name This CRC may also cover some fields of L-SIG (TBD) 162*5113495bSYour Name <legal all> 163*5113495bSYour Name */ 164*5113495bSYour Name 165*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_CRC_OFFSET 0x0000000000000000 166*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_CRC_LSB 48 167*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_CRC_MSB 51 168*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_CRC_MASK 0x000f000000000000 169*5113495bSYour Name 170*5113495bSYour Name 171*5113495bSYour Name /* Description TAIL 172*5113495bSYour Name 173*5113495bSYour Name BCC encoding (similar to VHT-SIG-A) with 6 tail bits is 174*5113495bSYour Name used 175*5113495bSYour Name <legal 0> 176*5113495bSYour Name */ 177*5113495bSYour Name 178*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_TAIL_OFFSET 0x0000000000000000 179*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_TAIL_LSB 52 180*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_TAIL_MSB 57 181*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_TAIL_MASK 0x03f0000000000000 182*5113495bSYour Name 183*5113495bSYour Name 184*5113495bSYour Name /* Description RESERVED_1B 185*5113495bSYour Name 186*5113495bSYour Name <legal 0> 187*5113495bSYour Name */ 188*5113495bSYour Name 189*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_1B_OFFSET 0x0000000000000000 190*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_1B_LSB 58 191*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_1B_MSB 62 192*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RESERVED_1B_MASK 0x7c00000000000000 193*5113495bSYour Name 194*5113495bSYour Name 195*5113495bSYour Name /* Description RX_INTEGRITY_CHECK_PASSED 196*5113495bSYour Name 197*5113495bSYour Name TX side: Set to 0 198*5113495bSYour Name RX side: Set to 1 if PHY determines the HE-SIG-A CRC check 199*5113495bSYour Name has passed, else set to 0 200*5113495bSYour Name 201*5113495bSYour Name <legal all> 202*5113495bSYour Name */ 203*5113495bSYour Name 204*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x0000000000000000 205*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB 63 206*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB 63 207*5113495bSYour Name #define MACTX_HE_SIG_A_MU_UL_MACTX_HE_SIG_A_MU_UL_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK 0x8000000000000000 208*5113495bSYour Name 209*5113495bSYour Name 210*5113495bSYour Name 211*5113495bSYour Name #endif // MACTX_HE_SIG_A_MU_UL 212