1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _MACTX_L_SIG_A_H_ 27 #define _MACTX_L_SIG_A_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #include "l_sig_a_info.h" 32 #define NUM_OF_DWORDS_MACTX_L_SIG_A 2 33 34 #define NUM_OF_QWORDS_MACTX_L_SIG_A 1 35 36 37 struct mactx_l_sig_a { 38 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 39 struct l_sig_a_info mactx_l_sig_a_info_details; 40 uint32_t tlv64_padding : 32; // [31:0] 41 #else 42 struct l_sig_a_info mactx_l_sig_a_info_details; 43 uint32_t tlv64_padding : 32; // [31:0] 44 #endif 45 }; 46 47 48 /* Description MACTX_L_SIG_A_INFO_DETAILS 49 50 See detailed description of the STRUCT 51 */ 52 53 54 /* Description RATE 55 56 This format is originally defined for OFDM as a 4 bit field 57 but the 5th bit was added to indicate 11b formatted frames. 58 In the standard bit [4] is specified as reserved. For 59 11b frames this L-SIG is transformed in the PHY into the 60 11b preamble format. The following are the rates: 61 <enum 8 ofdm_48_mbps> 64-QAM 2/3 (48 Mbps) 62 <enum 9 ofdm_24_mbps> 16-QAM 1/2 (24 Mbps) 63 <enum 10 ofdm_12_mbps> QPSK 1/2 (12 Mbps) 64 <enum 11 ofdm_6_mbps> BPSK 1/2 (6 Mbps) 65 <enum 12 ofdm_54_mbps> 64-QAM 3/4 (54 Mbps) 66 <enum 13 ofdm_36_mbps> 16-QAM 3/4 (36 Mbps) 67 <enum 14 ofdm_18_mbps> QPSK 1/2 (18 Mbps) 68 <enum 15 ofdm_9_mbps> BPSK 3/4 (9 Mbps) 69 <legal 8-15> 70 */ 71 72 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_RATE_OFFSET 0x0000000000000000 73 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_RATE_LSB 0 74 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_RATE_MSB 3 75 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_RATE_MASK 0x000000000000000f 76 77 78 /* Description LSIG_RESERVED 79 80 Reserved: Should be set to 0 by the MAC and ignored by the 81 PHY 82 <legal 0> 83 */ 84 85 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_OFFSET 0x0000000000000000 86 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_LSB 4 87 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_MSB 4 88 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_MASK 0x0000000000000010 89 90 91 /* Description LENGTH 92 93 The length indicates the number of octets in this MPDU. 94 Note that when using mixed mode .11n preamble or .11ac/.11ax/.11ba/.11be 95 this length provides the spoofed length for the PPDU. 96 This length provides part of the information (viz. PPDU 97 duration) to derive the actually PSDU length. For legacy 98 OFDM and 11B frames the maximum length is 4095. 99 <legal all> 100 */ 101 102 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_LENGTH_OFFSET 0x0000000000000000 103 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_LENGTH_LSB 5 104 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_LENGTH_MSB 16 105 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_LENGTH_MASK 0x000000000001ffe0 106 107 108 /* Description PARITY 109 110 11a/n/ac TX: This field provides even parity over the first 111 18 bits of the signal field which means that the sum of 112 1s in the signal field will always be even on transmission. 113 The value of the field is computed by the MAC. 114 11a/n/ac RX: this field contains the received parity field 115 from the L-SIG symbol for the current packet. 116 <legal 0-1> 117 */ 118 119 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_PARITY_OFFSET 0x0000000000000000 120 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_PARITY_LSB 17 121 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_PARITY_MSB 17 122 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_PARITY_MASK 0x0000000000020000 123 124 125 /* Description TAIL 126 127 The 6 bits of tail is always set to 0 is used to flush the 128 BCC encoder and decoder. <legal 0> 129 */ 130 131 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_TAIL_OFFSET 0x0000000000000000 132 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_TAIL_LSB 18 133 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_TAIL_MSB 23 134 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_TAIL_MASK 0x0000000000fc0000 135 136 137 /* Description PKT_TYPE 138 139 Only used on the RX side. 140 Note: This is not really part of L-SIG 141 142 Packet type: 143 <enum 0 dot11a>802.11a PPDU type 144 <enum 1 dot11b>802.11b PPDU type 145 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 146 <enum 3 dot11ac>802.11ac PPDU type 147 <enum 4 dot11ax>802.11ax PPDU type 148 <enum 5 dot11ba>802.11ba (WUR) PPDU type 149 <enum 6 dot11be>802.11be PPDU type 150 <enum 7 dot11az>802.11az (ranging) PPDU type 151 <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported 152 & aborted) 153 */ 154 155 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_PKT_TYPE_OFFSET 0x0000000000000000 156 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_PKT_TYPE_LSB 24 157 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_PKT_TYPE_MSB 27 158 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_PKT_TYPE_MASK 0x000000000f000000 159 160 161 /* Description CAPTURED_IMPLICIT_SOUNDING 162 163 Only used on the RX side. 164 Note: This is not really part of L-SIG 165 166 This indicates that the PHY has captured implicit sounding. 167 168 */ 169 170 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_OFFSET 0x0000000000000000 171 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_LSB 28 172 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_MSB 28 173 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_MASK 0x0000000010000000 174 175 176 /* Description RESERVED 177 178 Reserved: Should be set to 0 by the transmitting MAC and 179 ignored by the PHY <legal 0> 180 */ 181 182 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_RESERVED_OFFSET 0x0000000000000000 183 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_RESERVED_LSB 29 184 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_RESERVED_MSB 30 185 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_RESERVED_MASK 0x0000000060000000 186 187 188 /* Description RX_INTEGRITY_CHECK_PASSED 189 190 TX side: Set to 0 191 RX side: Set to 1 if PHY determines the L-SIG integrity 192 check has passed, else set to 0 193 194 <legal all> 195 */ 196 197 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x0000000000000000 198 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB 31 199 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB 31 200 #define MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK 0x0000000080000000 201 202 203 /* Description TLV64_PADDING 204 205 Automatic DWORD padding inserted while converting TLV32 206 to TLV64 for 64 bit ARCH 207 <legal 0> 208 */ 209 210 #define MACTX_L_SIG_A_TLV64_PADDING_OFFSET 0x0000000000000000 211 #define MACTX_L_SIG_A_TLV64_PADDING_LSB 32 212 #define MACTX_L_SIG_A_TLV64_PADDING_MSB 63 213 #define MACTX_L_SIG_A_TLV64_PADDING_MASK 0xffffffff00000000 214 215 216 217 #endif // MACTX_L_SIG_A 218