xref: /wlan-driver/fw-api/hw/qca5332/mactx_phy_desc.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 
19 
20 
21 
22 
23 
24 
25 
26 #ifndef _MACTX_PHY_DESC_H_
27 #define _MACTX_PHY_DESC_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #define NUM_OF_DWORDS_MACTX_PHY_DESC 4
32 
33 #define NUM_OF_QWORDS_MACTX_PHY_DESC 2
34 
35 
36 struct mactx_phy_desc {
37 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
38              uint32_t reserved_0a                                             : 16, // [15:0]
39                       bf_type                                                 :  2, // [17:16]
40                       wait_sifs                                               :  2, // [19:18]
41                       dot11b_preamble_type                                    :  1, // [20:20]
42                       pkt_type                                                :  4, // [24:21]
43                       su_or_mu                                                :  2, // [26:25]
44                       mu_type                                                 :  1, // [27:27]
45                       bandwidth                                               :  3, // [30:28]
46                       channel_capture                                         :  1; // [31:31]
47              uint32_t mcs                                                     :  4, // [3:0]
48                       global_ofdma_mimo_enable                                :  1, // [4:4]
49                       reserved_1a                                             :  1, // [5:5]
50                       stbc                                                    :  1, // [6:6]
51                       dot11ax_su_extended                                     :  1, // [7:7]
52                       dot11ax_trigger_frame_embedded                          :  1, // [8:8]
53                       tx_pwr_shared                                           :  8, // [16:9]
54                       tx_pwr_unshared                                         :  8, // [24:17]
55                       measure_power                                           :  1, // [25:25]
56                       tpc_glut_self_cal                                       :  1, // [26:26]
57                       back_to_back_transmission_expected                      :  1, // [27:27]
58                       heavy_clip_nss                                          :  3, // [30:28]
59                       txbf_per_packet_no_csd_no_walsh                         :  1; // [31:31]
60              uint32_t ndp                                                     :  2, // [1:0]
61                       ul_flag                                                 :  1, // [2:2]
62                       triggered                                               :  1, // [3:3]
63                       ap_pkt_bw                                               :  3, // [6:4]
64                       ru_position_start                                       :  8, // [14:7]
65                       pcu_ppdu_setup_start_reason                             :  3, // [17:15]
66                       tlv_source                                              :  1, // [18:18]
67                       reserved_2a                                             :  2, // [20:19]
68                       nss                                                     :  3, // [23:21]
69                       stream_offset                                           :  3, // [26:24]
70                       reserved_2b                                             :  2, // [28:27]
71                       clpc_enable                                             :  1, // [29:29]
72                       mu_ndp                                                  :  1, // [30:30]
73                       response_expected                                       :  1; // [31:31]
74              uint32_t rx_chain_mask                                           :  8, // [7:0]
75                       rx_chain_mask_valid                                     :  1, // [8:8]
76                       ant_sel_valid                                           :  1, // [9:9]
77                       ant_sel                                                 :  1, // [10:10]
78                       cp_setting                                              :  2, // [12:11]
79                       he_ppdu_subtype                                         :  2, // [14:13]
80                       active_channel                                          :  3, // [17:15]
81                       generate_phyrx_tx_start_timing                          :  1, // [18:18]
82                       ltf_size                                                :  2, // [20:19]
83                       ru_size_updated_v2                                      :  4, // [24:21]
84                       reserved_3c                                             :  1, // [25:25]
85                       u_sig_puncture_pattern_encoding                         :  6; // [31:26]
86 #else
87              uint32_t channel_capture                                         :  1, // [31:31]
88                       bandwidth                                               :  3, // [30:28]
89                       mu_type                                                 :  1, // [27:27]
90                       su_or_mu                                                :  2, // [26:25]
91                       pkt_type                                                :  4, // [24:21]
92                       dot11b_preamble_type                                    :  1, // [20:20]
93                       wait_sifs                                               :  2, // [19:18]
94                       bf_type                                                 :  2, // [17:16]
95                       reserved_0a                                             : 16; // [15:0]
96              uint32_t txbf_per_packet_no_csd_no_walsh                         :  1, // [31:31]
97                       heavy_clip_nss                                          :  3, // [30:28]
98                       back_to_back_transmission_expected                      :  1, // [27:27]
99                       tpc_glut_self_cal                                       :  1, // [26:26]
100                       measure_power                                           :  1, // [25:25]
101                       tx_pwr_unshared                                         :  8, // [24:17]
102                       tx_pwr_shared                                           :  8, // [16:9]
103                       dot11ax_trigger_frame_embedded                          :  1, // [8:8]
104                       dot11ax_su_extended                                     :  1, // [7:7]
105                       stbc                                                    :  1, // [6:6]
106                       reserved_1a                                             :  1, // [5:5]
107                       global_ofdma_mimo_enable                                :  1, // [4:4]
108                       mcs                                                     :  4; // [3:0]
109              uint32_t response_expected                                       :  1, // [31:31]
110                       mu_ndp                                                  :  1, // [30:30]
111                       clpc_enable                                             :  1, // [29:29]
112                       reserved_2b                                             :  2, // [28:27]
113                       stream_offset                                           :  3, // [26:24]
114                       nss                                                     :  3, // [23:21]
115                       reserved_2a                                             :  2, // [20:19]
116                       tlv_source                                              :  1, // [18:18]
117                       pcu_ppdu_setup_start_reason                             :  3, // [17:15]
118                       ru_position_start                                       :  8, // [14:7]
119                       ap_pkt_bw                                               :  3, // [6:4]
120                       triggered                                               :  1, // [3:3]
121                       ul_flag                                                 :  1, // [2:2]
122                       ndp                                                     :  2; // [1:0]
123              uint32_t u_sig_puncture_pattern_encoding                         :  6, // [31:26]
124                       reserved_3c                                             :  1, // [25:25]
125                       ru_size_updated_v2                                      :  4, // [24:21]
126                       ltf_size                                                :  2, // [20:19]
127                       generate_phyrx_tx_start_timing                          :  1, // [18:18]
128                       active_channel                                          :  3, // [17:15]
129                       he_ppdu_subtype                                         :  2, // [14:13]
130                       cp_setting                                              :  2, // [12:11]
131                       ant_sel                                                 :  1, // [10:10]
132                       ant_sel_valid                                           :  1, // [9:9]
133                       rx_chain_mask_valid                                     :  1, // [8:8]
134                       rx_chain_mask                                           :  8; // [7:0]
135 #endif
136 };
137 
138 
139 /* Description		RESERVED_0A
140 
141 			<legal 0>
142 */
143 
144 #define MACTX_PHY_DESC_RESERVED_0A_OFFSET                                           0x0000000000000000
145 #define MACTX_PHY_DESC_RESERVED_0A_LSB                                              0
146 #define MACTX_PHY_DESC_RESERVED_0A_MSB                                              15
147 #define MACTX_PHY_DESC_RESERVED_0A_MASK                                             0x000000000000ffff
148 
149 
150 /* Description		BF_TYPE
151 
152 			<enum 0     NO_BF> Transmit a non-beamformed packet. NOTE
153 			 that MAC might have send MACTX_BF_PARAMS... related TLVs
154 			 to the PHY for this upcoming transmission, but if this
155 			field indicates NO_BF, MAC_TX has for some reason decided
156 			 at the last moment that actual beamform transmission shall
157 			 not happen anymore...
158 			<enum 1     LEGACY_BF> Transmit a legacy beamformed packet.
159 			 This means beamforming starts at the L-STF.  The possible
160 			 preamble formats are 11a, 11n mixed mode and 11ac.  This
161 			 is used to support legacy implicit beamforming.
162 			<enum 2     SU_BF> Transmit a single-user beamformed packet
163 			 starting at the HT-STF or VHT-STF.
164 			<enum 3     MU_BF> Transmit a multi-user beamformed packet
165 			 starting at the VHT-STF. In case of an MU transmission,
166 			where maybe not all users are being transmitted in a 'beamformed'
167 			way, but at least one is, this e_num setting will be used
168 			 as well
169 			<legal all>
170 */
171 
172 #define MACTX_PHY_DESC_BF_TYPE_OFFSET                                               0x0000000000000000
173 #define MACTX_PHY_DESC_BF_TYPE_LSB                                                  16
174 #define MACTX_PHY_DESC_BF_TYPE_MSB                                                  17
175 #define MACTX_PHY_DESC_BF_TYPE_MASK                                                 0x0000000000030000
176 
177 
178 /* Description		WAIT_SIFS
179 
180 			This bit is evaluated by the PHY TX to determine if this
181 			 transmission start on the air needs to be exactly SIFS
182 			aligned compared to the end of the previous reception or
183 			 previous transmission.
184 
185 			This feature is typically required for Triggered UL response
186 			 transmissions, where SIFS accuracy is really required.
187 			For RTT this is also usefull, but not absolutely needed.
188 
189 
190 
191 			This field is filled in by TXPCU.
192 
193 			<enum 0 NO_SIFS_TIMING> Transmission shall start with the
194 			 normal delay in PHY after receiving this notification
195 			<enum 1 SIFS_TIMING_DESIRED> Transmission shall be made
196 			at the SIFS boundary. If shall never start before SIFS boundary,
197 			but if it a little later, it is not ideal and should be
198 			flagged, but transmission shall not be aborted.
199 			<enum 2 SIFS_TIMING_MANDATED> Transmission shall be made
200 			 at exactly SIFS boundary. If this notification is received
201 			 by the PHY after SIFS boundary already passed, the PHY
202 			shall abort the transmission
203 			<legal 0-2>
204 */
205 
206 #define MACTX_PHY_DESC_WAIT_SIFS_OFFSET                                             0x0000000000000000
207 #define MACTX_PHY_DESC_WAIT_SIFS_LSB                                                18
208 #define MACTX_PHY_DESC_WAIT_SIFS_MSB                                                19
209 #define MACTX_PHY_DESC_WAIT_SIFS_MASK                                               0x00000000000c0000
210 
211 
212 /* Description		DOT11B_PREAMBLE_TYPE
213 
214 			Valid for 802.11b packets only.
215 			<enum 0     short_preamble>
216 			<enum 1     long_preamble>
217 			<legal all>
218 */
219 
220 #define MACTX_PHY_DESC_DOT11B_PREAMBLE_TYPE_OFFSET                                  0x0000000000000000
221 #define MACTX_PHY_DESC_DOT11B_PREAMBLE_TYPE_LSB                                     20
222 #define MACTX_PHY_DESC_DOT11B_PREAMBLE_TYPE_MSB                                     20
223 #define MACTX_PHY_DESC_DOT11B_PREAMBLE_TYPE_MASK                                    0x0000000000100000
224 
225 
226 /* Description		PKT_TYPE
227 
228 			Packet type:
229 
230 			Note: in case of 11ax, see field he_ppdu_subtype for additional
231 			 info...
232 
233 			<enum 0 dot11a>802.11a PPDU type
234 			<enum 1 dot11b>802.11b PPDU type
235 			<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
236 			<enum 3 dot11ac>802.11ac PPDU type
237 			<enum 4 dot11ax>802.11ax PPDU type
238 			<enum 5 dot11ba>802.11ba (WUR) PPDU type
239 			<enum 6 dot11be>802.11be PPDU type
240 			<enum 7 dot11az>802.11az (ranging) PPDU type
241 			<enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
242 			 & aborted)
243 */
244 
245 #define MACTX_PHY_DESC_PKT_TYPE_OFFSET                                              0x0000000000000000
246 #define MACTX_PHY_DESC_PKT_TYPE_LSB                                                 21
247 #define MACTX_PHY_DESC_PKT_TYPE_MSB                                                 24
248 #define MACTX_PHY_DESC_PKT_TYPE_MASK                                                0x0000000001e00000
249 
250 
251 /* Description		SU_OR_MU
252 
253 			Type of transmission:
254 
255 			For 11ax:
256 			<enum 0 SU_transmission>
257 			11ax:
258 			This setting is used for the following preamble type of
259 			transmissions:
260 			11ax HE_SU PPDU
261 			11ax HE_EXT_SU PPDU
262 			11ax HE_TRIG PPDU
263 			Note that the above implies all single user transmissions
264 
265 
266 			11ac and other pkt_types:
267 			Single user transmission
268 
269 			<enum 1 MU_transmission>
270 			11ax:
271 			This setting is used for the following preamble type of
272 			transmissions:
273 			11ax HE_MU
274 			Note that this type of transmission implies multiple users
275 
276 
277 			For 11ac:
278 			Multi-user transmission
279 
280 			<enum 2 MU_SU_transmission>
281 			11ax:
282 			This setting is used for the following preamble type of
283 			transmissions:
284 			11ax HE_MU
285 			Note that this type of transmission implies a SINGLE user,
286 			but using HE_MU preamble type...
287 
288 			11ac and other pkt_types:
289 			Reserved
290 
291 			<legal 0-2>
292 */
293 
294 #define MACTX_PHY_DESC_SU_OR_MU_OFFSET                                              0x0000000000000000
295 #define MACTX_PHY_DESC_SU_OR_MU_LSB                                                 25
296 #define MACTX_PHY_DESC_SU_OR_MU_MSB                                                 26
297 #define MACTX_PHY_DESC_SU_OR_MU_MASK                                                0x0000000006000000
298 
299 
300 /* Description		MU_TYPE
301 
302 			Field only valid when
303 			SU_or_MU == MU_transmission or
304 			SU_or_MU == MU_SU_transmission
305 			<enum 0 MU_MIMO_Transmission>
306 			<enum 1 MU_OFDMA_Transmission> Note that within the RUs,
307 			there might still be MU-MIMO...
308 			<legal all>
309 */
310 
311 #define MACTX_PHY_DESC_MU_TYPE_OFFSET                                               0x0000000000000000
312 #define MACTX_PHY_DESC_MU_TYPE_LSB                                                  27
313 #define MACTX_PHY_DESC_MU_TYPE_MSB                                                  27
314 #define MACTX_PHY_DESC_MU_TYPE_MASK                                                 0x0000000008000000
315 
316 
317 /* Description		BANDWIDTH
318 
319 			Packet bandwidth:
320 
321 			The physical bandwidth that this device will be transmitting
322 			 in.
323 
324 			Note that for 11ax Trigger response transmissions (when
325 			Field triggered == is_triggered), this bandwith is min(AP_pkt_bw,
326 			STA_ch_bw)
327 
328 			<enum 0 20_mhz>20 Mhz BW
329 			<enum 1 40_mhz>40 Mhz BW
330 			<enum 2 80_mhz>80 Mhz BW
331 			<enum 3 160_mhz>160 Mhz BW
332 			<enum 4 320_mhz>320 Mhz BW
333 			<enum 5 240_mhz>240 Mhz BW
334 */
335 
336 #define MACTX_PHY_DESC_BANDWIDTH_OFFSET                                             0x0000000000000000
337 #define MACTX_PHY_DESC_BANDWIDTH_LSB                                                28
338 #define MACTX_PHY_DESC_BANDWIDTH_MSB                                                30
339 #define MACTX_PHY_DESC_BANDWIDTH_MASK                                               0x0000000070000000
340 
341 
342 /* Description		CHANNEL_CAPTURE
343 
344 			Indicates that the PHY should be armed to capture the channel
345 			 on the next received packet. This channel estimate is passed
346 			 to the MAC if the packet is successfully received.
347 			<legal 0-1>
348 			This field is not applicable for 11ah  since implicit beamforming
349 			 is not supported
350 */
351 
352 #define MACTX_PHY_DESC_CHANNEL_CAPTURE_OFFSET                                       0x0000000000000000
353 #define MACTX_PHY_DESC_CHANNEL_CAPTURE_LSB                                          31
354 #define MACTX_PHY_DESC_CHANNEL_CAPTURE_MSB                                          31
355 #define MACTX_PHY_DESC_CHANNEL_CAPTURE_MASK                                         0x0000000080000000
356 
357 
358 /* Description		MCS
359 
360 			In case of  SU_or_MU == SU_transmission
361 
362 			Note that this includes trigger response transmission
363 
364 			The MCS to be used for the upcoming transmission. It must
365 			 match the 4-bit MCS value that is sent in the appropriate
366 			 signal field for the given packet type, except that EHT
367 			 BPSK with DCM and/or duplicate is encoded as '0.'
368 
369 			In case of .11ba (WUR), this field is filled according to
370 			 what is on the MAC side defined as "MCS_TYPE".
371 
372 			In case of  SU_or_MU == MU_transmission
373 			.11ac: highest MCS of all users
374 			.11ax or .11be: highest 4-bit MCS field in all the HE_SIG_B
375 			 or EHT_SIG TLVs that MAC S/W informs to MAC H/W. Actual
376 			 highest 4-bit MCS to be sent to PHY might be lower after
377 			 MAC H/W computation.
378 
379 			For details, refer to  the SIG field, related to this pkt_type.
380 
381 			(Note that this is slightly different then what is on the
382 			 MAC side defined as "MCS_TYPE". For this reason, the 'legal
383 			 values' here are NOT defined as MCS_TYPE)
384 			<legal all>
385 */
386 
387 #define MACTX_PHY_DESC_MCS_OFFSET                                                   0x0000000000000000
388 #define MACTX_PHY_DESC_MCS_LSB                                                      32
389 #define MACTX_PHY_DESC_MCS_MSB                                                      35
390 #define MACTX_PHY_DESC_MCS_MASK                                                     0x0000000f00000000
391 
392 
393 /* Description		GLOBAL_OFDMA_MIMO_ENABLE
394 
395 			When set, this transmission contains at least 1 user for
396 			 which MU-MIMO is enabled in its RU.
397 			After per-BW/puncture pattern user disabling, in case of
398 			 pure OFDMA, PDG will clear this bit, but full BW MU-MIMO
399 			 is still possible with this bit set.
400 			<legal all>
401 */
402 
403 #define MACTX_PHY_DESC_GLOBAL_OFDMA_MIMO_ENABLE_OFFSET                              0x0000000000000000
404 #define MACTX_PHY_DESC_GLOBAL_OFDMA_MIMO_ENABLE_LSB                                 36
405 #define MACTX_PHY_DESC_GLOBAL_OFDMA_MIMO_ENABLE_MSB                                 36
406 #define MACTX_PHY_DESC_GLOBAL_OFDMA_MIMO_ENABLE_MASK                                0x0000001000000000
407 
408 
409 /* Description		RESERVED_1A
410 
411 */
412 
413 #define MACTX_PHY_DESC_RESERVED_1A_OFFSET                                           0x0000000000000000
414 #define MACTX_PHY_DESC_RESERVED_1A_LSB                                              37
415 #define MACTX_PHY_DESC_RESERVED_1A_MSB                                              37
416 #define MACTX_PHY_DESC_RESERVED_1A_MASK                                             0x0000002000000000
417 
418 
419 /* Description		STBC
420 
421 			When set, this transmission is based on stbc rates.
422 */
423 
424 #define MACTX_PHY_DESC_STBC_OFFSET                                                  0x0000000000000000
425 #define MACTX_PHY_DESC_STBC_LSB                                                     38
426 #define MACTX_PHY_DESC_STBC_MSB                                                     38
427 #define MACTX_PHY_DESC_STBC_MASK                                                    0x0000004000000000
428 
429 
430 /* Description		DOT11AX_SU_EXTENDED
431 
432 			This field is only valid for pkt_type == 11ax OR pkt_type
433 			 == 11be
434 
435 			When set, the 11ax or 11be transmission is extended range
436 			 SU
437 */
438 
439 #define MACTX_PHY_DESC_DOT11AX_SU_EXTENDED_OFFSET                                   0x0000000000000000
440 #define MACTX_PHY_DESC_DOT11AX_SU_EXTENDED_LSB                                      39
441 #define MACTX_PHY_DESC_DOT11AX_SU_EXTENDED_MSB                                      39
442 #define MACTX_PHY_DESC_DOT11AX_SU_EXTENDED_MASK                                     0x0000008000000000
443 
444 
445 /* Description		DOT11AX_TRIGGER_FRAME_EMBEDDED
446 
447 			When set, there is an 11ax trigger frame OR 11be trigger
448 			 frame embedded in this transmission. PHY shall latch the
449 			 transmit BW of this transmission and use it to select the
450 			 'MACTX_UPLINK_COMMON/USER...' TLVs parameters belonging
451 			 to this BW. Note that these 'MACTX_UPLINK_COMMON/USER...'
452 			might already have been received by the PHY, or will come
453 			 in later.
454 			<legal all>
455 */
456 
457 #define MACTX_PHY_DESC_DOT11AX_TRIGGER_FRAME_EMBEDDED_OFFSET                        0x0000000000000000
458 #define MACTX_PHY_DESC_DOT11AX_TRIGGER_FRAME_EMBEDDED_LSB                           40
459 #define MACTX_PHY_DESC_DOT11AX_TRIGGER_FRAME_EMBEDDED_MSB                           40
460 #define MACTX_PHY_DESC_DOT11AX_TRIGGER_FRAME_EMBEDDED_MASK                          0x0000010000000000
461 
462 
463 /* Description		TX_PWR_SHARED
464 
465 			Transmit Power (signed value) in units of 0.25 dBm
466 			<legal all>
467 */
468 
469 #define MACTX_PHY_DESC_TX_PWR_SHARED_OFFSET                                         0x0000000000000000
470 #define MACTX_PHY_DESC_TX_PWR_SHARED_LSB                                            41
471 #define MACTX_PHY_DESC_TX_PWR_SHARED_MSB                                            48
472 #define MACTX_PHY_DESC_TX_PWR_SHARED_MASK                                           0x0001fe0000000000
473 
474 
475 /* Description		TX_PWR_UNSHARED
476 
477 			Transmit Power (signed value) in units of 0.25 dBm <legal
478 			 all>
479 */
480 
481 #define MACTX_PHY_DESC_TX_PWR_UNSHARED_OFFSET                                       0x0000000000000000
482 #define MACTX_PHY_DESC_TX_PWR_UNSHARED_LSB                                          49
483 #define MACTX_PHY_DESC_TX_PWR_UNSHARED_MSB                                          56
484 #define MACTX_PHY_DESC_TX_PWR_UNSHARED_MASK                                         0x01fe000000000000
485 
486 
487 /* Description		MEASURE_POWER
488 
489 			This field enables the TPC to use power measurement for
490 			current packet in CLPC updates.
491 			<enum 0     measure_dis> TPC will not latch power measurement
492 			 result for current packet
493 			<enum 1     measure_en> TPC will latch power measurement
494 			 result for current packet
495 			 <legal all>
496 */
497 
498 #define MACTX_PHY_DESC_MEASURE_POWER_OFFSET                                         0x0000000000000000
499 #define MACTX_PHY_DESC_MEASURE_POWER_LSB                                            57
500 #define MACTX_PHY_DESC_MEASURE_POWER_MSB                                            57
501 #define MACTX_PHY_DESC_MEASURE_POWER_MASK                                           0x0200000000000000
502 
503 
504 /* Description		TPC_GLUT_SELF_CAL
505 
506 			Setting related to transmit power control calibration.
507 			<legal all>
508 */
509 
510 #define MACTX_PHY_DESC_TPC_GLUT_SELF_CAL_OFFSET                                     0x0000000000000000
511 #define MACTX_PHY_DESC_TPC_GLUT_SELF_CAL_LSB                                        58
512 #define MACTX_PHY_DESC_TPC_GLUT_SELF_CAL_MSB                                        58
513 #define MACTX_PHY_DESC_TPC_GLUT_SELF_CAL_MASK                                       0x0400000000000000
514 
515 
516 /* Description		BACK_TO_BACK_TRANSMISSION_EXPECTED
517 
518 			When set, the next transmission is expected to follow this
519 			 one in SIFS time (without any response reception in between).
520 
521 
522 			For example used when transmitting beacons followed by the
523 			 broadcast or multicast frames
524 			<legal all>
525 */
526 
527 #define MACTX_PHY_DESC_BACK_TO_BACK_TRANSMISSION_EXPECTED_OFFSET                    0x0000000000000000
528 #define MACTX_PHY_DESC_BACK_TO_BACK_TRANSMISSION_EXPECTED_LSB                       59
529 #define MACTX_PHY_DESC_BACK_TO_BACK_TRANSMISSION_EXPECTED_MSB                       59
530 #define MACTX_PHY_DESC_BACK_TO_BACK_TRANSMISSION_EXPECTED_MASK                      0x0800000000000000
531 
532 
533 /* Description		HEAVY_CLIP_NSS
534 
535 			Number of active spatial streams in current packet. This
536 			 parameter is used by the heavy clip function in the transmitter.
537 			In case of MU PPDU, this is total Nss of all users.
538 
539 			<enum 0 1_spatial_stream>Single spatial stream
540 			<enum 1 2_spatial_streams>2 spatial streams
541 			<enum 2 3_spatial_streams>3 spatial streams
542 			<enum 3 4_spatial_streams>4 spatial streams
543 			<enum 4 5_spatial_streams>5 spatial streams
544 			<enum 5 6_spatial_streams>6 spatial streams
545 			<enum 6 7_spatial_streams>7 spatial streams
546 			<enum 7 8_spatial_streams>8 spatial streams
547 */
548 
549 #define MACTX_PHY_DESC_HEAVY_CLIP_NSS_OFFSET                                        0x0000000000000000
550 #define MACTX_PHY_DESC_HEAVY_CLIP_NSS_LSB                                           60
551 #define MACTX_PHY_DESC_HEAVY_CLIP_NSS_MSB                                           62
552 #define MACTX_PHY_DESC_HEAVY_CLIP_NSS_MASK                                          0x7000000000000000
553 
554 
555 /* Description		TXBF_PER_PACKET_NO_CSD_NO_WALSH
556 
557 			This is a global switch that is applied to beamformed packets
558 
559 
560 			If set, no_csd and no_walsh is applied to steering packet.
561 
562 */
563 
564 #define MACTX_PHY_DESC_TXBF_PER_PACKET_NO_CSD_NO_WALSH_OFFSET                       0x0000000000000000
565 #define MACTX_PHY_DESC_TXBF_PER_PACKET_NO_CSD_NO_WALSH_LSB                          63
566 #define MACTX_PHY_DESC_TXBF_PER_PACKET_NO_CSD_NO_WALSH_MSB                          63
567 #define MACTX_PHY_DESC_TXBF_PER_PACKET_NO_CSD_NO_WALSH_MASK                         0x8000000000000000
568 
569 
570 /* Description		NDP
571 
572 			When not "0", upcoming transmission is one of the indicated
573 			 NDP types.
574 
575 			<enum 0 no_ndp>No NDP transmission
576 			<enum 1 beamforming_ndp>Beamforming NDP
577 			<enum 2 he_ranging_ndp>11az NDP (HE Ranging NDP)
578 			<enum 3 he_feedback_ndp>Short TB (HE Feedback NDP)
579 */
580 
581 #define MACTX_PHY_DESC_NDP_OFFSET                                                   0x0000000000000008
582 #define MACTX_PHY_DESC_NDP_LSB                                                      0
583 #define MACTX_PHY_DESC_NDP_MSB                                                      1
584 #define MACTX_PHY_DESC_NDP_MASK                                                     0x0000000000000003
585 
586 
587 /* Description		UL_FLAG
588 
589 			This field is only valid for pkt_type == 11ax OR pkt_type
590 			 == 11be
591 
592 
593 			Used for HE_SIGB
594 			<enum 1     uplink>
595 			<enum 0     downlink>
596 			<legal all>
597 */
598 
599 #define MACTX_PHY_DESC_UL_FLAG_OFFSET                                               0x0000000000000008
600 #define MACTX_PHY_DESC_UL_FLAG_LSB                                                  2
601 #define MACTX_PHY_DESC_UL_FLAG_MSB                                                  2
602 #define MACTX_PHY_DESC_UL_FLAG_MASK                                                 0x0000000000000004
603 
604 
605 /* Description		TRIGGERED
606 
607 			This field is only valid for pkt_type == 11ax OR pkt_type
608 			 == 11be
609 
610 
611 			Denotes whether it's a triggered uplink transmission
612 
613 			Must be set for HE-TB NDPs used in Secure Ranging NDPs (11az)
614 			and Short-NDP (HE TB Feedback NDP).
615 
616 			<enum 0     non_trigerred>
617 			<enum 1     is_triggered>
618 			<legal all>
619 */
620 
621 #define MACTX_PHY_DESC_TRIGGERED_OFFSET                                             0x0000000000000008
622 #define MACTX_PHY_DESC_TRIGGERED_LSB                                                3
623 #define MACTX_PHY_DESC_TRIGGERED_MSB                                                3
624 #define MACTX_PHY_DESC_TRIGGERED_MASK                                               0x0000000000000008
625 
626 
627 /* Description		AP_PKT_BW
628 
629 			Field only valid when triggered == is_triggered
630 
631 			This indicates the total bandwidth of the UL_TRIG packet
632 			 as indicated in the Trigger Frame.
633 
634 			<enum 0 20_mhz>20 Mhz BW
635 			<enum 1 40_mhz>40 Mhz BW
636 			<enum 2 80_mhz>80 Mhz BW
637 			<enum 3 160_mhz>160 Mhz BW
638 			<enum 4 320_mhz>320 Mhz BW
639 			<enum 5 240_mhz>240 Mhz BW
640 */
641 
642 #define MACTX_PHY_DESC_AP_PKT_BW_OFFSET                                             0x0000000000000008
643 #define MACTX_PHY_DESC_AP_PKT_BW_LSB                                                4
644 #define MACTX_PHY_DESC_AP_PKT_BW_MSB                                                6
645 #define MACTX_PHY_DESC_AP_PKT_BW_MASK                                               0x0000000000000070
646 
647 
648 /* Description		RU_POSITION_START
649 
650 			Field only valid when triggered == is_triggered
651 
652 
653 			This field indicates the start basic (26 tone) RU number
654 			 assigned to this user
655 
656 			RU Numbering is based only on the order in which the RUs
657 			 are allocated over the available BW, starting from 0 and
658 			 in increasing frequency order and not primary-secondary
659 			 order.
660 
661 			The RU number within 80 MHz is available from the RU allocation
662 			 information in the trigger. For 160 MHz transmissions,
663 			the trigger RU allocation only mentions primary/secondary
664 			 80 MHz. PDG needs to convert this to lower/higher 80 MHz.
665 
666 
667 			If in 'PCU_PPDU_SETUP_START'/'MACTX_PRE_PHY_DESC,' CCA_Subband_channel_bonding_mask
668 			 bit 0 is mapped to any of bits 4 - 7 of Freq_Subband_channel_bonding_mask,
669 			then the primary 80 MHz is the higher 80 MHz and the secondary
670 			 80 MHz is the lower one.
671 			Otherwise (if CCA_Subband_channel_bonding_mask bit 0 is
672 			mapped to any of bits 0 - 3 of Freq_Subband_channel_bonding_mask,
673 			then the primary 80 MHz is the lower 80 MHz and the secondary
674 			 80 MHz is the higher one.
675 
676 			Note: this type of encoding decouples the formatting of
677 			the trigger from from how info between MAC-PHY is exchanged
678 
679 			<legal 0- 147>
680 */
681 
682 #define MACTX_PHY_DESC_RU_POSITION_START_OFFSET                                     0x0000000000000008
683 #define MACTX_PHY_DESC_RU_POSITION_START_LSB                                        7
684 #define MACTX_PHY_DESC_RU_POSITION_START_MSB                                        14
685 #define MACTX_PHY_DESC_RU_POSITION_START_MASK                                       0x0000000000007f80
686 
687 
688 /* Description		PCU_PPDU_SETUP_START_REASON
689 
690 			PDG shall fill this with the value it fills in the setup_start_reason
691 			 in 'PCU_PPDU_SETUP_START.' It indicates what triggered
692 			the PDG to start Tx setup.
693 			Used for debugging purposes.
694 
695 			<enum 0     fes_protection_frame>  RTS or CTS-to-self transmission
696 			 preceding the regular PPDU portion of the coming FES. The
697 			 transmit is initiated by PDG_TX_REQ TLV from TXPCU
698 			<enum 1     fes_after_protection >  Regular PPDU transmission
699 			 that follows the transmission of medium protection: Either
700 			 RTS - CTS exchanges or CTS to self. The transmit is initiated
701 			 by PDG_TX_REQ TLV from TXPCU
702 			<enum 2     fes_only>  Regular PPDU transmission without
703 			 preceding medium protection frame exchanges. The transmit
704 			 is initiated by PDG_TX_REQ TLV from TXPCU
705 			<enum 3     response_frame>  response frame transmission.
706 			The transmit is initiated by PDG_RESPONSE TLV from TXPCU
707 
708 			<enum 4     trig_response_frame>  11ax triggered response
709 			 frame transmission. The transmit is initiated by PDG_TRIG_RESPONSE
710 			 TLV from TXPCU
711 			<enum 5     dynamic_protection_fes_only> Regular PPDU transmission
712 			 without preceding medium protection frame exchanges, because
713 			 the dynamic medium protection constraints were not satisfied.
714 			The transmit is initiated by PDG_TX_REQ TLV from TXPCU.
715 
716 			<legal 0-5>
717 */
718 
719 #define MACTX_PHY_DESC_PCU_PPDU_SETUP_START_REASON_OFFSET                           0x0000000000000008
720 #define MACTX_PHY_DESC_PCU_PPDU_SETUP_START_REASON_LSB                              15
721 #define MACTX_PHY_DESC_PCU_PPDU_SETUP_START_REASON_MSB                              17
722 #define MACTX_PHY_DESC_PCU_PPDU_SETUP_START_REASON_MASK                             0x0000000000038000
723 
724 
725 /* Description		TLV_SOURCE
726 
727 			<enum 1 phy_desc_from_pdg> This MACTX_PHY_DESC TLV is generated
728 			 by PDG.
729 			<enum 0 phy_desc_from_fw> PDG is in bypass mode and this
730 			 MACTX_PHY_DESC TLV is queued by firmware.
731 			<legal all>
732 */
733 
734 #define MACTX_PHY_DESC_TLV_SOURCE_OFFSET                                            0x0000000000000008
735 #define MACTX_PHY_DESC_TLV_SOURCE_LSB                                               18
736 #define MACTX_PHY_DESC_TLV_SOURCE_MSB                                               18
737 #define MACTX_PHY_DESC_TLV_SOURCE_MASK                                              0x0000000000040000
738 
739 
740 /* Description		RESERVED_2A
741 
742 			<legal 0>
743 */
744 
745 #define MACTX_PHY_DESC_RESERVED_2A_OFFSET                                           0x0000000000000008
746 #define MACTX_PHY_DESC_RESERVED_2A_LSB                                              19
747 #define MACTX_PHY_DESC_RESERVED_2A_MSB                                              20
748 #define MACTX_PHY_DESC_RESERVED_2A_MASK                                             0x0000000000180000
749 
750 
751 /* Description		NSS
752 
753 			Field only valid when triggered == is_triggered
754 
755 			Number of Spatial Streams occupied by the User
756 
757 			<enum 0 1_spatial_stream>Single spatial stream
758 			<enum 1 2_spatial_streams>2 spatial streams
759 			<enum 2 3_spatial_streams>3 spatial streams
760 			<enum 3 4_spatial_streams>4 spatial streams
761 			<enum 4 5_spatial_streams>5 spatial streams
762 			<enum 5 6_spatial_streams>6 spatial streams
763 			<enum 6 7_spatial_streams>7 spatial streams
764 			<enum 7 8_spatial_streams>8 spatial streams
765 */
766 
767 #define MACTX_PHY_DESC_NSS_OFFSET                                                   0x0000000000000008
768 #define MACTX_PHY_DESC_NSS_LSB                                                      21
769 #define MACTX_PHY_DESC_NSS_MSB                                                      23
770 #define MACTX_PHY_DESC_NSS_MASK                                                     0x0000000000e00000
771 
772 
773 /* Description		STREAM_OFFSET
774 
775 			Field only valid when triggered == is_triggered
776 
777 			Specify Stream-offset of the user for HE_TB Ranging NDP
778 			or Short-NDP
779 
780 			Stream Offset from which the User occupies the Streams
781 */
782 
783 #define MACTX_PHY_DESC_STREAM_OFFSET_OFFSET                                         0x0000000000000008
784 #define MACTX_PHY_DESC_STREAM_OFFSET_LSB                                            24
785 #define MACTX_PHY_DESC_STREAM_OFFSET_MSB                                            26
786 #define MACTX_PHY_DESC_STREAM_OFFSET_MASK                                           0x0000000007000000
787 
788 
789 /* Description		RESERVED_2B
790 
791 			<legal 0>
792 */
793 
794 #define MACTX_PHY_DESC_RESERVED_2B_OFFSET                                           0x0000000000000008
795 #define MACTX_PHY_DESC_RESERVED_2B_LSB                                              27
796 #define MACTX_PHY_DESC_RESERVED_2B_MSB                                              28
797 #define MACTX_PHY_DESC_RESERVED_2B_MASK                                             0x0000000018000000
798 
799 
800 /* Description		CLPC_ENABLE
801 
802 			This field enables closed-loop TPC operation by enabling
803 			 CLPC adjustment of DAC gain for the next packet.
804 			<enum 0     clpc_off> TPC error update disabled
805 			<enum 1     clpc_on> TPC error will be applied to DAC gain
806 			 setting for the next packet
807 			<legal 0-1>
808 */
809 
810 #define MACTX_PHY_DESC_CLPC_ENABLE_OFFSET                                           0x0000000000000008
811 #define MACTX_PHY_DESC_CLPC_ENABLE_LSB                                              29
812 #define MACTX_PHY_DESC_CLPC_ENABLE_MSB                                              29
813 #define MACTX_PHY_DESC_CLPC_ENABLE_MASK                                             0x0000000020000000
814 
815 
816 /* Description		MU_NDP
817 
818 			If set indicates that this packet is an NDP used for MU
819 			channel estimation.  This bit will be used by the TPC to
820 			 signal that the analog gain settings can be updated. The
821 			 analog gain settings will not change for subsequent MU
822 			data packets.
823 */
824 
825 #define MACTX_PHY_DESC_MU_NDP_OFFSET                                                0x0000000000000008
826 #define MACTX_PHY_DESC_MU_NDP_LSB                                                   30
827 #define MACTX_PHY_DESC_MU_NDP_MSB                                                   30
828 #define MACTX_PHY_DESC_MU_NDP_MASK                                                  0x0000000040000000
829 
830 
831 /* Description		RESPONSE_EXPECTED
832 
833 			When set, a response frame in SIFS time is expected after
834 			 this transmission.
835 			<legal all>
836 */
837 
838 #define MACTX_PHY_DESC_RESPONSE_EXPECTED_OFFSET                                     0x0000000000000008
839 #define MACTX_PHY_DESC_RESPONSE_EXPECTED_LSB                                        31
840 #define MACTX_PHY_DESC_RESPONSE_EXPECTED_MSB                                        31
841 #define MACTX_PHY_DESC_RESPONSE_EXPECTED_MASK                                       0x0000000080000000
842 
843 
844 /* Description		RX_CHAIN_MASK
845 
846 			Chain mask to support up to 8 antennas.
847 			<legal 1-255>
848 */
849 
850 #define MACTX_PHY_DESC_RX_CHAIN_MASK_OFFSET                                         0x0000000000000008
851 #define MACTX_PHY_DESC_RX_CHAIN_MASK_LSB                                            32
852 #define MACTX_PHY_DESC_RX_CHAIN_MASK_MSB                                            39
853 #define MACTX_PHY_DESC_RX_CHAIN_MASK_MASK                                           0x000000ff00000000
854 
855 
856 /* Description		RX_CHAIN_MASK_VALID
857 
858 			Indicates rx_chain_mask field is valid.
859 			<enum 0 RX_CHAIN_MASK_IS_NOT_VALID>
860 			<enum 1 RX_CHAIN_MASK_IS_VALID>
861 			<legal all>
862 */
863 
864 #define MACTX_PHY_DESC_RX_CHAIN_MASK_VALID_OFFSET                                   0x0000000000000008
865 #define MACTX_PHY_DESC_RX_CHAIN_MASK_VALID_LSB                                      40
866 #define MACTX_PHY_DESC_RX_CHAIN_MASK_VALID_MSB                                      40
867 #define MACTX_PHY_DESC_RX_CHAIN_MASK_VALID_MASK                                     0x0000010000000000
868 
869 
870 /* Description		ANT_SEL_VALID
871 
872 			Field only valid when ant_sel_valid is set.
873 
874 			TX Antenna select valid
875 			<enum 0 ANT_SEL_IS_NOT_VALID>
876 			<enum 1 ANT_SEL_IS_VALID>
877 			<legal all>
878 */
879 
880 #define MACTX_PHY_DESC_ANT_SEL_VALID_OFFSET                                         0x0000000000000008
881 #define MACTX_PHY_DESC_ANT_SEL_VALID_LSB                                            41
882 #define MACTX_PHY_DESC_ANT_SEL_VALID_MSB                                            41
883 #define MACTX_PHY_DESC_ANT_SEL_VALID_MASK                                           0x0000020000000000
884 
885 
886 /* Description		ANT_SEL
887 
888 			Field only valid when ant_sel_valid is set.
889 
890 			Antenna select for TX antenna diversity.
891 			<enum 0 ANTENNA_0>
892 			<enum 1 ANTENNA_1>
893 			<legal all>
894 */
895 
896 #define MACTX_PHY_DESC_ANT_SEL_OFFSET                                               0x0000000000000008
897 #define MACTX_PHY_DESC_ANT_SEL_LSB                                                  42
898 #define MACTX_PHY_DESC_ANT_SEL_MSB                                                  42
899 #define MACTX_PHY_DESC_ANT_SEL_MASK                                                 0x0000040000000000
900 
901 
902 /* Description		CP_SETTING
903 
904 			Field only valid when pkt type is HT, VHT or HE.
905 
906 			Specify the right CP for HE-Ranging NDPs (11az)/Short NDP
907 
908 
909 			<enum 0     gi_0_8_us > Legacy normal GI
910 			<enum 1     gi_0_4_us > Legacy short GI
911 			<enum 2     gi_1_6_us > HE related GI
912 			<enum 3     gi_3_2_us > HE related GI
913 			<legal 0 - 3>
914 */
915 
916 #define MACTX_PHY_DESC_CP_SETTING_OFFSET                                            0x0000000000000008
917 #define MACTX_PHY_DESC_CP_SETTING_LSB                                               43
918 #define MACTX_PHY_DESC_CP_SETTING_MSB                                               44
919 #define MACTX_PHY_DESC_CP_SETTING_MASK                                              0x0000180000000000
920 
921 
922 /* Description		HE_PPDU_SUBTYPE
923 
924 			The subtype of HE transmission:
925 
926 			Specify as HE-SU for HE-SU Ranging NDP in 11az ;
927 			Specify as HE-TB for HE-TB Ranging NDP in 11az ;
928 			Specify as HE-TB for Short -NDP
929 			Re-use the same for EHT PPDU types also
930 			<enum 0 he_subtype_SU>
931 			<enum 1 he_subtype_TRIG>
932 			<enum 2 he_subtype_MU>
933 			<enum 3 he_subtype_EXT_SU>
934 
935 			<legal all>
936 */
937 
938 #define MACTX_PHY_DESC_HE_PPDU_SUBTYPE_OFFSET                                       0x0000000000000008
939 #define MACTX_PHY_DESC_HE_PPDU_SUBTYPE_LSB                                          45
940 #define MACTX_PHY_DESC_HE_PPDU_SUBTYPE_MSB                                          46
941 #define MACTX_PHY_DESC_HE_PPDU_SUBTYPE_MASK                                         0x0000600000000000
942 
943 
944 /* Description		ACTIVE_CHANNEL
945 
946 			Field only valid when triggered == non_trigerred
947 			In case of a triggered response transmission, this field
948 			 will always be set to 0
949 
950 			This field indicates the active frequency band when the
951 			packet bandwidth is less than the channel bandwidth. For
952 			 non 11ax packets this is same as the primary channel
953 			<legal all>
954 */
955 
956 #define MACTX_PHY_DESC_ACTIVE_CHANNEL_OFFSET                                        0x0000000000000008
957 #define MACTX_PHY_DESC_ACTIVE_CHANNEL_LSB                                           47
958 #define MACTX_PHY_DESC_ACTIVE_CHANNEL_MSB                                           49
959 #define MACTX_PHY_DESC_ACTIVE_CHANNEL_MASK                                          0x0003800000000000
960 
961 
962 /* Description		GENERATE_PHYRX_TX_START_TIMING
963 
964 			When set, PHY shall generate the PHYRX_TX_START_TIMING TLV
965 			 at the earliest opportunity during the preamble transmission
966 
967 			<legal all>
968 */
969 
970 #define MACTX_PHY_DESC_GENERATE_PHYRX_TX_START_TIMING_OFFSET                        0x0000000000000008
971 #define MACTX_PHY_DESC_GENERATE_PHYRX_TX_START_TIMING_LSB                           50
972 #define MACTX_PHY_DESC_GENERATE_PHYRX_TX_START_TIMING_MSB                           50
973 #define MACTX_PHY_DESC_GENERATE_PHYRX_TX_START_TIMING_MASK                          0x0004000000000000
974 
975 
976 /* Description		LTF_SIZE
977 
978 			Field only valid when pkt type is HE.
979 
980 			Ltf size
981 
982 			Specify right LTF-size for HE-Ranging NDPs (11az)/Short-NDP
983 
984 
985 			<enum 0     ltf_1x >
986 			<enum 1     ltf_2x >
987 			<enum 2     ltf_4x >
988 			<legal 0 - 2>
989 */
990 
991 #define MACTX_PHY_DESC_LTF_SIZE_OFFSET                                              0x0000000000000008
992 #define MACTX_PHY_DESC_LTF_SIZE_LSB                                                 51
993 #define MACTX_PHY_DESC_LTF_SIZE_MSB                                                 52
994 #define MACTX_PHY_DESC_LTF_SIZE_MASK                                                0x0018000000000000
995 
996 
997 /* Description		RU_SIZE_UPDATED_V2
998 
999 			Field only valid for pkt_type == 11ax or 11be and
1000 			SU_or_MU == SU_transmission or
1001 			SU_or_MU == MU_SU_transmission
1002 
1003 			The RU size of the upcoming transmission.
1004 
1005 			PHY uses this info to apply different min/max BO if payload
1006 			 bandwidth is less than 10MHz
1007 
1008 			In case of HE extended range transmission, e-num 2 (10MHz)
1009 			or e-num 7 (20MHz) are used.
1010 
1011 			In case of trig transmission or OFDMA single user or MU-MIMO
1012 			 single user transmission, if the ru_size allocated to the
1013 			 user is the fullBW (with respect to AP_bw) ru size then
1014 			 the e-num 7 is used.
1015 			For all other cases, e-nums corresponding to the ru size
1016 			 allocated to the user is used.
1017 
1018 			In case of EHT duplicate transmissions, this field indicates
1019 			 the width of the actual content before duplication, e.g.
1020 			a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth
1021 			 fields indicating 160 MHz and this field set to e-num 4
1022 			 (RU_484).
1023 
1024 			<enum 0 RU_26>
1025 			<enum 1 RU_52>
1026 			<enum 2 RU_106>
1027 			<enum 3 RU_242><enum 4 RU_484><enum 5 RU_996><enum 6 RU_1992>
1028 
1029 			<enum 7 RU_FULLBW> Set when the RU occupies the full packet
1030 			 bandwidth
1031 			Note that for an MU-RTS trigger, the response will also
1032 			go out in legacy CTS rate... and thus e-num 7 will be used.
1033 
1034 			<enum 8 RU_FULLBW_240> Set when the RU occupies the full
1035 			 packet bandwidth
1036 			<enum 9 RU_FULLBW_320> Set when the RU occupies the full
1037 			 packet bandwidth
1038 
1039 			<enum 10 RU_MULTI_LARGE> HW will use per-user sub-band-mask
1040 			 to infer the actual RU-size for Multi-large-RU/SU-Puncturing
1041 
1042 
1043 			<enum 11 RU_78> multi small RU
1044 			<enum 12 RU_132> multi small RU
1045 
1046 
1047 
1048 			NOTE: See the table following this TLV definition that explains
1049 			 the relationship between this field and the RU size allocated
1050 			 to users.
1051 
1052 			<legal all>
1053 */
1054 
1055 #define MACTX_PHY_DESC_RU_SIZE_UPDATED_V2_OFFSET                                    0x0000000000000008
1056 #define MACTX_PHY_DESC_RU_SIZE_UPDATED_V2_LSB                                       53
1057 #define MACTX_PHY_DESC_RU_SIZE_UPDATED_V2_MSB                                       56
1058 #define MACTX_PHY_DESC_RU_SIZE_UPDATED_V2_MASK                                      0x01e0000000000000
1059 
1060 
1061 /* Description		RESERVED_3C
1062 
1063 			<legal 0>
1064 */
1065 
1066 #define MACTX_PHY_DESC_RESERVED_3C_OFFSET                                           0x0000000000000008
1067 #define MACTX_PHY_DESC_RESERVED_3C_LSB                                              57
1068 #define MACTX_PHY_DESC_RESERVED_3C_MSB                                              57
1069 #define MACTX_PHY_DESC_RESERVED_3C_MASK                                             0x0200000000000000
1070 
1071 
1072 /* Description		U_SIG_PUNCTURE_PATTERN_ENCODING
1073 
1074 			Field only valid for pkt_type == 11be
1075 
1076 			The 6-bit value to be used in U-SIG and/or EHT-SIG Common
1077 			 field for the puncture pattern
1078 			<legal 0-29>
1079 */
1080 
1081 #define MACTX_PHY_DESC_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET                       0x0000000000000008
1082 #define MACTX_PHY_DESC_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB                          58
1083 #define MACTX_PHY_DESC_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB                          63
1084 #define MACTX_PHY_DESC_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK                         0xfc00000000000000
1085 
1086 
1087 
1088 #endif   // MACTX_PHY_DESC
1089