1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _PCU_PPDU_SETUP_INIT_H_ 27 #define _PCU_PPDU_SETUP_INIT_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #include "pdg_response_rate_setting.h" 32 #define NUM_OF_DWORDS_PCU_PPDU_SETUP_INIT 58 33 34 #define NUM_OF_QWORDS_PCU_PPDU_SETUP_INIT 29 35 36 37 struct pcu_ppdu_setup_init { 38 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 39 uint32_t medium_prot_type : 3, // [2:0] 40 response_type : 5, // [7:3] 41 response_info_part2_required : 1, // [8:8] 42 response_to_response : 3, // [11:9] 43 mba_user_order : 2, // [13:12] 44 expected_mba_size : 11, // [24:14] 45 required_ul_mu_resp_user_count : 6, // [30:25] 46 transmitted_bssid_check_en : 1; // [31:31] 47 uint32_t mprot_required_bw1 : 1, // [0:0] 48 mprot_required_bw20 : 1, // [1:1] 49 mprot_required_bw40 : 1, // [2:2] 50 mprot_required_bw80 : 1, // [3:3] 51 mprot_required_bw160 : 1, // [4:4] 52 mprot_required_bw240 : 1, // [5:5] 53 mprot_required_bw320 : 1, // [6:6] 54 ppdu_allowed_bw1 : 1, // [7:7] 55 ppdu_allowed_bw20 : 1, // [8:8] 56 ppdu_allowed_bw40 : 1, // [9:9] 57 ppdu_allowed_bw80 : 1, // [10:10] 58 ppdu_allowed_bw160 : 1, // [11:11] 59 ppdu_allowed_bw240 : 1, // [12:12] 60 ppdu_allowed_bw320 : 1, // [13:13] 61 set_fc_pwr_mgt : 1, // [14:14] 62 use_cts_duration_for_data_tx : 1, // [15:15] 63 update_timestamp_64 : 1, // [16:16] 64 update_timestamp_32_lower : 1, // [17:17] 65 update_timestamp_32_upper : 1, // [18:18] 66 reserved_1a : 13; // [31:19] 67 uint32_t insert_timestamp_offset_0 : 16, // [15:0] 68 insert_timestamp_offset_1 : 16; // [31:16] 69 uint32_t max_bw40_try_count : 4, // [3:0] 70 max_bw80_try_count : 4, // [7:4] 71 max_bw160_try_count : 4, // [11:8] 72 max_bw240_try_count : 4, // [15:12] 73 max_bw320_try_count : 4, // [19:16] 74 insert_wur_timestamp_offset : 6, // [25:20] 75 update_wur_timestamp : 1, // [26:26] 76 wur_embedded_bssid_present : 1, // [27:27] 77 insert_wur_fcs : 1, // [28:28] 78 reserved_3b : 3; // [31:29] 79 struct pdg_response_rate_setting response_to_response_rate_info_bw20; 80 struct pdg_response_rate_setting response_to_response_rate_info_bw40; 81 struct pdg_response_rate_setting response_to_response_rate_info_bw80; 82 struct pdg_response_rate_setting response_to_response_rate_info_bw160; 83 struct pdg_response_rate_setting response_to_response_rate_info_bw240; 84 struct pdg_response_rate_setting response_to_response_rate_info_bw320; 85 uint32_t r2r_hw_response_tx_duration : 16, // [15:0] 86 r2r_rx_duration_field : 16; // [31:16] 87 uint32_t r2r_group_id : 6, // [5:0] 88 r2r_response_frame_type : 4, // [9:6] 89 r2r_sta_partial_aid : 11, // [20:10] 90 use_address_fields_for_protection : 1, // [21:21] 91 r2r_set_required_response_time : 1, // [22:22] 92 reserved_29a : 3, // [25:23] 93 r2r_bw20_active_channel : 3, // [28:26] 94 r2r_bw40_active_channel : 3; // [31:29] 95 uint32_t r2r_bw80_active_channel : 3, // [2:0] 96 r2r_bw160_active_channel : 3, // [5:3] 97 r2r_bw240_active_channel : 3, // [8:6] 98 r2r_bw320_active_channel : 3, // [11:9] 99 r2r_bw20 : 3, // [14:12] 100 r2r_bw40 : 3, // [17:15] 101 r2r_bw80 : 3, // [20:18] 102 r2r_bw160 : 3, // [23:21] 103 r2r_bw240 : 3, // [26:24] 104 r2r_bw320 : 3, // [29:27] 105 reserved_30a : 2; // [31:30] 106 uint32_t mu_response_expected_bitmap_31_0 : 32; // [31:0] 107 uint32_t mu_response_expected_bitmap_36_32 : 5, // [4:0] 108 mu_expected_response_cbf_count : 6, // [10:5] 109 mu_expected_response_sta_count : 6, // [16:11] 110 transmit_includes_multidestination : 1, // [17:17] 111 insert_prev_tx_start_timing_info : 1, // [18:18] 112 insert_current_tx_start_timing_info : 1, // [19:19] 113 tx_start_transmit_time_byte_offset : 12; // [31:20] 114 uint32_t protection_frame_ad1_31_0 : 32; // [31:0] 115 uint32_t protection_frame_ad1_47_32 : 16, // [15:0] 116 protection_frame_ad2_15_0 : 16; // [31:16] 117 uint32_t protection_frame_ad2_47_16 : 32; // [31:0] 118 uint32_t dynamic_medium_prot_threshold : 24, // [23:0] 119 dynamic_medium_prot_type : 1, // [24:24] 120 reserved_54a : 7; // [31:25] 121 uint32_t protection_frame_ad3_31_0 : 32; // [31:0] 122 uint32_t protection_frame_ad3_47_32 : 16, // [15:0] 123 protection_frame_ad4_15_0 : 16; // [31:16] 124 uint32_t protection_frame_ad4_47_16 : 32; // [31:0] 125 #else 126 uint32_t transmitted_bssid_check_en : 1, // [31:31] 127 required_ul_mu_resp_user_count : 6, // [30:25] 128 expected_mba_size : 11, // [24:14] 129 mba_user_order : 2, // [13:12] 130 response_to_response : 3, // [11:9] 131 response_info_part2_required : 1, // [8:8] 132 response_type : 5, // [7:3] 133 medium_prot_type : 3; // [2:0] 134 uint32_t reserved_1a : 13, // [31:19] 135 update_timestamp_32_upper : 1, // [18:18] 136 update_timestamp_32_lower : 1, // [17:17] 137 update_timestamp_64 : 1, // [16:16] 138 use_cts_duration_for_data_tx : 1, // [15:15] 139 set_fc_pwr_mgt : 1, // [14:14] 140 ppdu_allowed_bw320 : 1, // [13:13] 141 ppdu_allowed_bw240 : 1, // [12:12] 142 ppdu_allowed_bw160 : 1, // [11:11] 143 ppdu_allowed_bw80 : 1, // [10:10] 144 ppdu_allowed_bw40 : 1, // [9:9] 145 ppdu_allowed_bw20 : 1, // [8:8] 146 ppdu_allowed_bw1 : 1, // [7:7] 147 mprot_required_bw320 : 1, // [6:6] 148 mprot_required_bw240 : 1, // [5:5] 149 mprot_required_bw160 : 1, // [4:4] 150 mprot_required_bw80 : 1, // [3:3] 151 mprot_required_bw40 : 1, // [2:2] 152 mprot_required_bw20 : 1, // [1:1] 153 mprot_required_bw1 : 1; // [0:0] 154 uint32_t insert_timestamp_offset_1 : 16, // [31:16] 155 insert_timestamp_offset_0 : 16; // [15:0] 156 uint32_t reserved_3b : 3, // [31:29] 157 insert_wur_fcs : 1, // [28:28] 158 wur_embedded_bssid_present : 1, // [27:27] 159 update_wur_timestamp : 1, // [26:26] 160 insert_wur_timestamp_offset : 6, // [25:20] 161 max_bw320_try_count : 4, // [19:16] 162 max_bw240_try_count : 4, // [15:12] 163 max_bw160_try_count : 4, // [11:8] 164 max_bw80_try_count : 4, // [7:4] 165 max_bw40_try_count : 4; // [3:0] 166 struct pdg_response_rate_setting response_to_response_rate_info_bw20; 167 struct pdg_response_rate_setting response_to_response_rate_info_bw40; 168 struct pdg_response_rate_setting response_to_response_rate_info_bw80; 169 struct pdg_response_rate_setting response_to_response_rate_info_bw160; 170 struct pdg_response_rate_setting response_to_response_rate_info_bw240; 171 struct pdg_response_rate_setting response_to_response_rate_info_bw320; 172 uint32_t r2r_rx_duration_field : 16, // [31:16] 173 r2r_hw_response_tx_duration : 16; // [15:0] 174 uint32_t r2r_bw40_active_channel : 3, // [31:29] 175 r2r_bw20_active_channel : 3, // [28:26] 176 reserved_29a : 3, // [25:23] 177 r2r_set_required_response_time : 1, // [22:22] 178 use_address_fields_for_protection : 1, // [21:21] 179 r2r_sta_partial_aid : 11, // [20:10] 180 r2r_response_frame_type : 4, // [9:6] 181 r2r_group_id : 6; // [5:0] 182 uint32_t reserved_30a : 2, // [31:30] 183 r2r_bw320 : 3, // [29:27] 184 r2r_bw240 : 3, // [26:24] 185 r2r_bw160 : 3, // [23:21] 186 r2r_bw80 : 3, // [20:18] 187 r2r_bw40 : 3, // [17:15] 188 r2r_bw20 : 3, // [14:12] 189 r2r_bw320_active_channel : 3, // [11:9] 190 r2r_bw240_active_channel : 3, // [8:6] 191 r2r_bw160_active_channel : 3, // [5:3] 192 r2r_bw80_active_channel : 3; // [2:0] 193 uint32_t mu_response_expected_bitmap_31_0 : 32; // [31:0] 194 uint32_t tx_start_transmit_time_byte_offset : 12, // [31:20] 195 insert_current_tx_start_timing_info : 1, // [19:19] 196 insert_prev_tx_start_timing_info : 1, // [18:18] 197 transmit_includes_multidestination : 1, // [17:17] 198 mu_expected_response_sta_count : 6, // [16:11] 199 mu_expected_response_cbf_count : 6, // [10:5] 200 mu_response_expected_bitmap_36_32 : 5; // [4:0] 201 uint32_t protection_frame_ad1_31_0 : 32; // [31:0] 202 uint32_t protection_frame_ad2_15_0 : 16, // [31:16] 203 protection_frame_ad1_47_32 : 16; // [15:0] 204 uint32_t protection_frame_ad2_47_16 : 32; // [31:0] 205 uint32_t reserved_54a : 7, // [31:25] 206 dynamic_medium_prot_type : 1, // [24:24] 207 dynamic_medium_prot_threshold : 24; // [23:0] 208 uint32_t protection_frame_ad3_31_0 : 32; // [31:0] 209 uint32_t protection_frame_ad4_15_0 : 16, // [31:16] 210 protection_frame_ad3_47_32 : 16; // [15:0] 211 uint32_t protection_frame_ad4_47_16 : 32; // [31:0] 212 #endif 213 }; 214 215 216 /* Description MEDIUM_PROT_TYPE 217 218 Self Gen Medium Protection type used 219 <enum 0 No_protection> 220 <enum 1 RTS_legacy> 221 <enum 2 RTS_11ac_static_bw> 222 <enum 3 RTS_11ac_dynamic_bw> 223 <enum 4 CTS2Self> 224 <enum 5 QoS_Null_no_ack_3addr> 225 <enum 6 QoS_Null_no_ack_4addr> 226 227 <legal 0-6> 228 */ 229 230 #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_OFFSET 0x0000000000000000 231 #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_LSB 0 232 #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_MSB 2 233 #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_MASK 0x0000000000000007 234 235 236 /* Description RESPONSE_TYPE 237 238 PPDU transmission Response type expected 239 240 Used by PDG to calculate the anticipated response duration 241 time. 242 243 Used by TXPCU to prepare for expecting to receive a response. 244 245 246 <enum 0 no_response_expected>After transmission of this 247 frame, no response in SIFS time is expected 248 249 When TXPCU sees this setting, it shall not generated the 250 EXPECTED_RESPONSE TLV. 251 252 RXPCU should never see this setting 253 <enum 1 ack_expected>An ACK frame is expected as response 254 255 256 RXPCU is just expecting any response. It is TXPCU who checks 257 that the right response was received. 258 <enum 2 ba_64_bitmap_expected>BA with 64 bitmap is expected. 259 260 261 PDG DOES NOT use the size info to calculated response duration. 262 The length of the response will have to be programmed by 263 SW in the per-BW 'Expected_ppdu_resp_length' field. 264 265 For TXPCU only the fact that it is a BA is important. Actual 266 received BA size is not important 267 268 RXPCU is just expecting any response. It is TXPCU who checks 269 that the right response was received. 270 <enum 3 ba_256_expected>BA with 256 bitmap is expected. 271 272 PDG DOES NOT use the size info to calculated response duration. 273 The length of the response will have to be programmed by 274 SW in the per-BW 'Expected_ppdu_resp_length' field. 275 276 For TXPCU only the fact that it is a BA is important. Actual 277 received BA size is not important 278 279 RXPCU is just expecting any response. It is TXPCU who checks 280 that the right response was received. 281 <enum 4 actionnoack_expected>SW sets this after sending 282 NDP or BR-Poll. 283 284 As PDG has no idea on how long the reception is going to 285 be, the reception time of the response will have to be 286 programmed by SW in the 'Extend_duration_value_bw...' field 287 288 289 RXPCU is just expecting any response. It is TXPCU who checks 290 that the right response was received. 291 <enum 5 ack_ba_expected>PDG uses the size info and assumes 292 single BA format with ACK and 64 bitmap embedded. 293 If SW expects more bitmaps in case of multi-TID, is shall 294 program the 'Extend_duration_value_bw...' field for additional 295 duration time. 296 For TXPCU only the fact that an ACK and/or BA is received 297 is important. Reception of only ACK or BA is also considered 298 a success. 299 SW also typically sets this when sending VHT single MPDU. 300 Some chip vendors might send BA rather than ACK in response 301 to VHT single MPDU but still we want to accept BA as well. 302 303 304 RXPCU is just expecting any response. It is TXPCU who checks 305 that the right response was received. 306 <enum 6 cts_expected>SW sets this after queuing RTS frame 307 as standalone packet and sending it. 308 309 RXPCU is just expecting any response. It is TXPCU who checks 310 that the right response was received. 311 <enum 7 ack_data_expected>SW sets this after sending PS-Poll. 312 313 314 For TXPCU either ACK and/or data reception is considered 315 success. 316 PDG basis it's response duration calculation on an ACK. 317 For the data portion, SW shall program the 'Extend_duration_value_bw...' 318 field 319 <enum 8 ndp_ack_expected>Reserved for 11ah usage. 320 <enum 9 ndp_modified_ack>Reserved for 11ah usage 321 <enum 10 ndp_ba_expected>Reserved for 11ah usage. 322 <enum 11 ndp_cts_expected>Reserved for 11ah usage 323 <enum 12 ndp_ack_or_ndp_modified_ack_expected>Reserved for 324 11ah usage 325 <enum 13 ul_mu_ba_expected>NOT SUPPORTED IN NAPIER AX AND 326 HASTINGS 327 328 TXPCU expects UL MU OFDMA or UL MU MIMO reception. 329 As PDG does not know how RUs are assigned for the uplink 330 portion, PDG can not calculate the uplink duration. Therefor 331 SW shall program the 'Extend_duration_value_bw...' field 332 333 334 RXPCU will report any frame received, irrespective of it 335 having been UL MU or SU It is TXPCUs responsibility to 336 distinguish between the UL MU or SU 337 338 TXPCU can check in TLV RECEIVED_RESPONSE_INFO MU_Response_BA_bitmap 339 if indeed BA was received 340 <enum 14 ul_mu_ba_and_data_expected>NOT SUPPORTED IN NAPIER 341 AX AND HASTINGS 342 343 TXPCU expects UL MU OFDMA or UL MU MIMO reception. 344 As PDG does not know how RUs are assigned for the uplink 345 portion, PDG can not calculate the uplink duration. Therefor 346 SW shall program the 'Extend_duration_value_bw...' field 347 348 349 RXPCU will report any frame received, irrespective of it 350 having been UL MU or SU It is TXPCUs responsibility to 351 distinguish between the UL MU or SU 352 353 TXPCU can check in TLV RECEIVED_RESPONSE_INFO, field MU_Response_data_bitmap 354 and MU_Response_BA_bitmap if indeed BA and data was received 355 356 <enum 15 ul_mu_cbf_expected>NOT SUPPORTED IN NAPIER AX AND 357 HASTINGS 358 359 When selected, CBF frames are expected to be received in 360 MU reception (uplink OFDMA or uplink MIMO) 361 362 RXPCU is just expecting any response. It is TXPCU who checks 363 that the right response was received 364 TXPCU can check in TLV RECEIVED_RESPONSE_INFO, field MU_Response_cbf_bitmap 365 if indeed CBF frames were received. 366 <enum 16 ul_mu_frames_expected>When selected, MPDU frames 367 are expected in the MU reception (uplink OFDMA or uplink 368 MIMO) 369 370 RXPCU is just expecting any response. It is TXPCU who checks 371 that the right response was received 372 373 TXPCU can check in TLV RECEIVED_RESPONSE_INFO, field MU_Response_bitmap 374 if indeed frames were received. 375 <enum 17 any_response_to_this_device>Any response expected 376 to be send to this device in SIFS time is acceptable. 377 378 RXPCU is just expecting any response. It is TXPCU who checks 379 that the right response was received 380 381 For TXPCU, UL MU or SU is both acceptable. 382 383 Can be used for complex OFDMA scenarios. PDG can not calculate 384 the uplink duration. Therefor SW shall program the 'Extend_duration_value_bw...' 385 field 386 <enum 18 any_response_accepted>Any frame in the medium to 387 this or any other device, is acceptable as response. 388 RXPCU is just expecting any response. It is TXPCU who checks 389 that the right response was received 390 391 For TXPCU, UL MU or SU is both acceptable. 392 393 Can be used for complex OFDMA scenarios. PDG can not calculate 394 the uplink duration. Therefor SW shall program the 'Extend_duration_value_bw...' 395 field 396 <enum 19 frameless_phyrx_response_accepted>Any MU frameless 397 reception generated by the PHY is acceptable. 398 399 PHY indicates this type of reception explicitly in TLV PHYRX_RSSI_LEGACY, 400 field Reception_type == reception_is_frameless 401 402 RXPCU will report any frame received, irrespective of it 403 having been UL MU or SU. 404 405 This can be used for complex MU-MIMO or OFDMA scenarios, 406 like receiving MU-CTS. 407 408 PDG can not calculate the uplink duration. Therefor SW shall 409 program the 'Extend_duration_value_bw...' field 410 <enum 20 ranging_ndp_and_lmr_expected>SW sets this after 411 sending ranging NDPA followed by NDP as an ISTA and NDP 412 and LMR (Action No Ack) are expected as back-to-back reception 413 in SIFS. 414 415 As PDG has no idea on how long the reception is going to 416 be, the reception time of the response will have to be 417 programmed by SW in the 'Extend_duration_value_bw...' field 418 419 420 RXPCU is just expecting any response. It is TXPCU who checks 421 that the right response was received. 422 <enum 21 ba_512_expected>BA with 512 bitmap is expected. 423 424 425 PDG DOES NOT use the size info to calculated response duration. 426 The length of the response will have to be programmed by 427 SW in the per-BW 'Expected_ppdu_resp_length' field. 428 429 For TXPCU only the fact that it is a BA is important. Actual 430 received BA size is not important 431 432 RXPCU is just expecting any response. It is TXPCU who checks 433 that the right response was received. 434 <enum 22 ba_1024_expected>BA with 1024 bitmap is expected. 435 436 437 PDG DOES NOT use the size info to calculated response duration. 438 The length of the response will have to be programmed by 439 SW in the per-BW 'Expected_ppdu_resp_length' field. 440 441 For TXPCU only the fact that it is a BA is important. Actual 442 received BA size is not important 443 444 RXPCU is just expecting any response. It is TXPCU who checks 445 that the right response was received. 446 <enum 23 ul_mu_ranging_cts2s_expected>When selected, CTS2S 447 frames are expected to be received in MU reception (uplink 448 OFDMA) 449 450 RXPCU shall check each response for CTS2S and report to 451 TXPCU. 452 453 TXPCU can check in the TLV 'RECEIVED_RESPONSE_INFO,' fields 454 'MU_Response_bitmap' and 'TB_Ranging_Resp' if indeed CTS2S 455 frames were received. 456 <enum 24 ul_mu_ranging_ndp_expected>When selected, UL NDP 457 frames are expected to be received in MU reception (uplink 458 spatial multiplexing) 459 460 RXPCU shall check each response for NDP and report to TXPCU. 461 462 463 TXPCU can check in the TLV 'RECEIVED_RESPONSE_INFO,' fields 464 'MU_Response_bitmap' and 'TB_Ranging_Resp' if indeed NDP 465 frames were received. 466 <enum 25 ul_mu_ranging_lmr_expected>When selected, LMR frames 467 are expected to be received in MU reception (uplink OFDMA 468 or uplink MIMO) 469 470 RXPCU shall check each response for LMR and report to TXPCU. 471 472 473 TXPCU can check in the TLV 'RECEIVED_RESPONSE_INFO,' fields 474 'MU_Response_bitmap' and 'TB_Ranging_Resp' if indeed LMR 475 frames were received. 476 */ 477 478 #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_OFFSET 0x0000000000000000 479 #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_LSB 3 480 #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_MSB 7 481 #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_MASK 0x00000000000000f8 482 483 484 /* Description RESPONSE_INFO_PART2_REQUIRED 485 486 Field only valid when Response_type is NOT set to No_response_expected 487 488 489 When set to 1, RXPCU shall generate the RECEIVED_RESPONSE_INFO_PART2 490 TLV after having received the response frame. TXPCU shall 491 wait for this TLV before sending the TX_FES_STATUS_END 492 TLV. 493 494 When NOT set, RXPCU shall NOT generate the above mentioned 495 TLV. TXPCU shall not wait for this TLV and after having 496 received RECEIVED_RESPONSE_INFO TLV, it can immediately 497 generate the TX_FES_STATUS_END TLV. 498 499 <legal all> 500 */ 501 502 #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_OFFSET 0x0000000000000000 503 #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_LSB 8 504 #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_MSB 8 505 #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_MASK 0x0000000000000100 506 507 508 /* Description RESPONSE_TO_RESPONSE 509 510 Field indicates if after receiving an expected PPDU response 511 (as indicated by the Response_type), TXPCU is expected 512 to generate a reponse to that response 513 514 Example: OFDMA trigger frame is sent, with expected response 515 being UL OFDMA data, which result in a response to the 516 response of MBA 517 518 <enum 0 None> No response after response allowed. 519 <enum 1 SU_BA> The response after response that TXPCU is 520 allowed to generate is a single BA. Even if RXPCU is indicating 521 that multiple users are received, TXPCU shall only send 522 a BA for 1 STA. Response_to_response rates can be found 523 in fields 'response_to_response_rate_info_bw...' 524 <enum 2 MU_BA> The response after response that TXPCU is 525 allowed to generate is only Multi Destination Multi User 526 BA. Response_to_response rates can be found in fields 'response_to_response_rate_info_bw...' 527 528 529 <enum 3 RESPONSE_TO_RESPONSE_CMD> A response to response 530 is expected to be generated. In other words, RXPCU will 531 likely indicate to TXPCU at the end of upcoming reception 532 that a response is needed. TXPCU is however to ignore this 533 indication from RXPCU, and assume for a moment that no 534 response to response is needed, as all the details on how 535 to handle this is provided in the next scheduling command, 536 which is marked as a 'response_to_response' type. 537 538 <legal 0-3> 539 */ 540 541 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_OFFSET 0x0000000000000000 542 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_LSB 9 543 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_MSB 11 544 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_MASK 0x0000000000000e00 545 546 547 /* Description MBA_USER_ORDER 548 549 Field only valid in case of 'response_to_response' set to 550 MU_BA. 551 552 <enum 0 mu_ba_fixed_user_order> TXPCU shall ask RXPCU for 553 BA info for all TX users, in order from user 0 to user 554 N 555 <enum 1 mu_ba_optimized_user_order> TXPCU shall ask RXPCU 556 for BA info for all TX users, but let RXPCU determine in 557 which order the BA bitmaps for each user shall be returned. 558 Note that RXPCU might return some 'invalid' bitmaps in case 559 there was no data received from all the users. 560 <enum 2 mu_ba_fully_optimized> TXPCU shall ask RXPCU for 561 BA info for the number RX users that RXPCU indicated in 562 the 'Max_rx_user_count' in the RX_PPDU_START TLV. TXPCU 563 shall let RXPCU determine in which order the BA bitmaps 564 for each user shall be returned. Note that RXPCU might 565 still return some 'invalid' bitmaps in case there were only 566 frames with FCS errors for some of the users 567 <enum 3 mu_ba_fully_optimized_multi_tid> TXPCU shall ask 568 RXPCU for BA info for the number bitmaps that RXPCU indicated 569 in the (SUM of) response_ack_count, response_ba64_count, 570 response_ba256_count fields in RX_RESPONSE_REQUIRED. TXPCU 571 shall let RXPCU determine in which order the BA bitmaps 572 for each user (and sometimes multiple bitmaps for a the 573 same user in case of multi TID) shall be returned. It is 574 not expected that RXPCU will return invalid bitmaps for 575 this scenario as RXPCU earlier indicates that this number 576 of bitmaps was actually available in RXPCU... 577 578 <legal 0-3> 579 */ 580 581 #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_OFFSET 0x0000000000000000 582 #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_LSB 12 583 #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_MSB 13 584 #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_MASK 0x0000000000003000 585 586 587 /* Description EXPECTED_MBA_SIZE 588 589 Field only valid for: 590 Mba_user_order == mu_ba_fixed_user_order, mu_ba_optimized_user_order 591 592 593 The expected number of bytes in response (Multi destination) 594 BA that TXPCU shall request to PDG. 595 NOTE that SW should have pre-calculated and thus looked-up 596 the window sizes for each of the STAs. 597 <legal all> 598 */ 599 600 #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_OFFSET 0x0000000000000000 601 #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_LSB 14 602 #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_MSB 24 603 #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_MASK 0x0000000001ffc000 604 605 606 /* Description REQUIRED_UL_MU_RESP_USER_COUNT 607 608 Field only valid for: Response_to_response 609 == MU_BA 610 or 611 RESPONSE_TO_RESPONSE_CMD 612 613 Field MU_RX_successful_user_count as reported in the RECEIVED_RESPONSE_INFO 614 TLV shall be >= to this field, in order to consider the 615 reception successful. 616 617 Note that the value in this field shall always be equal 618 or smaller to the number of bits set in field MU_Response_expected_bitmap_.... 619 620 <legal all> 621 */ 622 623 #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_OFFSET 0x0000000000000000 624 #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_LSB 25 625 #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_MSB 30 626 #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_MASK 0x000000007e000000 627 628 629 /* Description TRANSMITTED_BSSID_CHECK_EN 630 631 When set to 1, RXPCU shall assume group addressed frame 632 with Tx_AD2 equal to TBSSID was sent. RxPCU should properly 633 handle receive frame(s) from STA(s) which A1 is TBSSID 634 or any VAPs.When NOT set, RXPCU shall compare received frame's 635 A1 with Tx_AD2 only. 636 <legal all> 637 */ 638 639 #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_OFFSET 0x0000000000000000 640 #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_LSB 31 641 #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_MSB 31 642 #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_MASK 0x0000000080000000 643 644 645 /* Description MPROT_REQUIRED_BW1 646 647 Field only valid when ppdu_allowed_bw1 is set. 648 649 When set, Medium protection transmission is required for 650 a 1 MHz bandwidth PPDU transmission. In case of MU transmissions, 651 all the medium protection settings are coming from user0. <legal 652 all> 653 */ 654 655 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_OFFSET 0x0000000000000000 656 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_LSB 32 657 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_MSB 32 658 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_MASK 0x0000000100000000 659 660 661 /* Description MPROT_REQUIRED_BW20 662 663 Field only valid when ppdu_allowed_bw20_bw2 is set. 664 665 NOTE: This field is also known as Mprot_required_pattern_0 666 in case punctured transmission is enabled. 667 668 When set, Medium protection transmission is required for 669 a 20 MHz or 2Mhz 11ah bandwidth PPDU transmission 670 <legal all> 671 */ 672 673 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_OFFSET 0x0000000000000000 674 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_LSB 33 675 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_MSB 33 676 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_MASK 0x0000000200000000 677 678 679 /* Description MPROT_REQUIRED_BW40 680 681 Field only valid when ppdu_allowed_bw40_bw4 is set. 682 683 NOTE: This field is also known as Mprot_required_pattern_1 684 in case punctured transmission is enabled. 685 686 When set, Medium protection transmission is required for 687 a 40 MHz or 4Mhz 11ah bandwidth PPDU transmission 688 <legal all> 689 */ 690 691 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_OFFSET 0x0000000000000000 692 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_LSB 34 693 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_MSB 34 694 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_MASK 0x0000000400000000 695 696 697 /* Description MPROT_REQUIRED_BW80 698 699 Field only valid when ppdu_allowed_bw80_bw8 is set. 700 701 702 NOTE: This field is also known as Mprot_required_pattern_2 703 in case punctured transmission is enabled. 704 705 When set, Medium protection transmission is required for 706 a 80 MHz or 8MHz 11ah bandwidth PPDU transmission 707 <legal all> 708 */ 709 710 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_OFFSET 0x0000000000000000 711 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_LSB 35 712 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_MSB 35 713 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_MASK 0x0000000800000000 714 715 716 /* Description MPROT_REQUIRED_BW160 717 718 Field only valid when ppdu_allowed_bw160_bw16 is set. 719 720 NOTE: This field is also known as Mprot_required_pattern_3 721 in case punctured transmission is enabled. 722 723 When set, Medium protection transmission is required for 724 a 160 MHz or 16MHz 11ah bandwidth PPDU transmission. 725 <legal all> 726 */ 727 728 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_OFFSET 0x0000000000000000 729 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_LSB 36 730 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_MSB 36 731 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_MASK 0x0000001000000000 732 733 734 /* Description MPROT_REQUIRED_BW240 735 736 Field only valid when ppdu_allowed_bw240 is set. 737 738 NOTE: This field is also known as Mprot_required_pattern_4 739 in case punctured transmission is enabled. 740 741 When set, Medium protection transmission is required for 742 a 240 MHz bandwidth PPDU transmission. 743 <legal all> 744 */ 745 746 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_OFFSET 0x0000000000000000 747 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_LSB 37 748 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_MSB 37 749 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_MASK 0x0000002000000000 750 751 752 /* Description MPROT_REQUIRED_BW320 753 754 Field only valid when ppdu_allowed_bw320 is set. 755 756 NOTE: This field is also known as Mprot_required_pattern_5 757 in case punctured transmission is enabled. 758 759 When set, Medium protection transmission is required for 760 a 320 MHz bandwidth PPDU transmission. 761 <legal all> 762 */ 763 764 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_OFFSET 0x0000000000000000 765 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_LSB 38 766 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_MSB 38 767 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_MASK 0x0000004000000000 768 769 770 /* Description PPDU_ALLOWED_BW1 771 772 When set, allow PPDU transmission with 1 MHz 11ah bandwidth. 773 774 <legal all> 775 */ 776 777 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_OFFSET 0x0000000000000000 778 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_LSB 39 779 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_MSB 39 780 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_MASK 0x0000008000000000 781 782 783 /* Description PPDU_ALLOWED_BW20 784 785 Field Not valid in case punctured transmission is enabled. 786 This fields meaning is than taken over by field TX_PUNCTURE_SETUP. 787 788 puncture_pattern_count 789 790 When set, allow PPDU transmission with 20 MHz or 2MHz 11ah 791 bandwidth 792 793 <legal all> 794 */ 795 796 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_OFFSET 0x0000000000000000 797 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_LSB 40 798 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_MSB 40 799 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_MASK 0x0000010000000000 800 801 802 /* Description PPDU_ALLOWED_BW40 803 804 Field Not valid in case punctured transmission is enabled. 805 This fields meaning is than taken over by field TX_PUNCTURE_SETUP. 806 807 puncture_pattern_count 808 809 When set, allow PPDU transmission with 40 MHz or 4MHz 11ah 810 bandwidth 811 <legal all> 812 */ 813 814 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_OFFSET 0x0000000000000000 815 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_LSB 41 816 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_MSB 41 817 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_MASK 0x0000020000000000 818 819 820 /* Description PPDU_ALLOWED_BW80 821 822 Field Not valid in case punctured transmission is enabled. 823 This fields meaning is than taken over by field TX_PUNCTURE_SETUP. 824 825 puncture_pattern_count 826 827 When set, allow PPDU transmission with 80 MHz or 8MHz 11ah 828 bandwidth 829 <legal all> 830 */ 831 832 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_OFFSET 0x0000000000000000 833 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_LSB 42 834 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_MSB 42 835 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_MASK 0x0000040000000000 836 837 838 /* Description PPDU_ALLOWED_BW160 839 840 Field Not valid in case punctured transmission is enabled. 841 This fields meaning is than taken over by field TX_PUNCTURE_SETUP. 842 843 puncture_pattern_count 844 845 When set, allow PPDU transmission with 160 MHz or 16MHz 846 11ah bandwidth 847 <legal all> 848 */ 849 850 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_OFFSET 0x0000000000000000 851 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_LSB 43 852 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_MSB 43 853 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_MASK 0x0000080000000000 854 855 856 /* Description PPDU_ALLOWED_BW240 857 858 Field Not valid in case punctured transmission is enabled. 859 This fields meaning is than taken over by field TX_PUNCTURE_SETUP. 860 861 puncture_pattern_count 862 863 When set, allow PPDU transmission with 240 MHz bandwidth 864 865 <legal all> 866 */ 867 868 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_OFFSET 0x0000000000000000 869 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_LSB 44 870 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_MSB 44 871 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_MASK 0x0000100000000000 872 873 874 /* Description PPDU_ALLOWED_BW320 875 876 Field Not valid in case punctured transmission is enabled. 877 This fields meaning is than taken over by field TX_PUNCTURE_SETUP. 878 879 puncture_pattern_count 880 881 When set, allow PPDU transmission with 320 MHz bandwidth 882 883 <legal all> 884 */ 885 886 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_OFFSET 0x0000000000000000 887 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_LSB 45 888 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_MSB 45 889 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_MASK 0x0000200000000000 890 891 892 /* Description SET_FC_PWR_MGT 893 894 Field valid for SU transmissions only 895 896 When set, the TXPCU will set the power management bit in 897 the Frame Control field for the transmitted frames. 898 899 Note: this is there for backup purposes only. TXOLE is the 900 module now that should be setting the pm bit to the proper 901 value. 902 903 <legal all> 904 */ 905 906 #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_OFFSET 0x0000000000000000 907 #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_LSB 46 908 #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_MSB 46 909 #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_MASK 0x0000400000000000 910 911 912 /* Description USE_CTS_DURATION_FOR_DATA_TX 913 914 When set, take the value of the duration field from the 915 CTS frame, and use this as the reference point for how long 916 the 'data' ppdu transmission can be. 917 This is an E2E feature. 918 <legal all> 919 */ 920 921 #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_OFFSET 0x0000000000000000 922 #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_LSB 47 923 #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_MSB 47 924 #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_MASK 0x0000800000000000 925 926 927 /* Description UPDATE_TIMESTAMP_64 928 929 When set, TXPCU shall update the timestamp value at the 930 indicated location. 931 <legal all> 932 */ 933 934 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_OFFSET 0x0000000000000000 935 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_LSB 48 936 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_MSB 48 937 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_MASK 0x0001000000000000 938 939 940 /* Description UPDATE_TIMESTAMP_32_LOWER 941 942 Update the 32 bit timestamp at the offset specified by the 943 insert_timestamp_offset_32. This will be used for AWDL 944 action frames. The value of the TSF will be added to the 945 timestamp field in the packet buffer in memory. The tx_delay 946 should also be included in the timestamp field<legal all> 947 948 */ 949 950 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_OFFSET 0x0000000000000000 951 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_LSB 49 952 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_MSB 49 953 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_MASK 0x0002000000000000 954 955 956 /* Description UPDATE_TIMESTAMP_32_UPPER 957 958 Update the 64 bit TSF at the offset specified by the insert_timestamp_offset_64. 959 This will be used for beacons and probe response frames. 960 The value of the TSF will be added to the TSF field in 961 the packet buffer in memory. The tx_delay should also be 962 included in the TSF field 963 <legal all> 964 */ 965 966 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_OFFSET 0x0000000000000000 967 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_LSB 50 968 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_MSB 50 969 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_MASK 0x0004000000000000 970 971 972 /* Description RESERVED_1A 973 974 <legal 0> 975 */ 976 977 #define PCU_PPDU_SETUP_INIT_RESERVED_1A_OFFSET 0x0000000000000000 978 #define PCU_PPDU_SETUP_INIT_RESERVED_1A_LSB 51 979 #define PCU_PPDU_SETUP_INIT_RESERVED_1A_MSB 63 980 #define PCU_PPDU_SETUP_INIT_RESERVED_1A_MASK 0xfff8000000000000 981 982 983 /* Description INSERT_TIMESTAMP_OFFSET_0 984 985 Byte offset to the first byte of the lower 32 bit timestamp 986 to be inserted. This is applicable to both beacon and 987 probe response TSF and the AWDL timestamp<legal all> 988 */ 989 990 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_OFFSET 0x0000000000000008 991 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_LSB 0 992 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_MSB 15 993 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_MASK 0x000000000000ffff 994 995 996 /* Description INSERT_TIMESTAMP_OFFSET_1 997 998 Byte offset to the first byte of the upper 32 bit timestamp 999 to be inserted. This is applicable to both beacon and 1000 probe response TSF and the AWDL timestamp<legal all> 1001 */ 1002 1003 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_OFFSET 0x0000000000000008 1004 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_LSB 16 1005 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_MSB 31 1006 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_MASK 0x00000000ffff0000 1007 1008 1009 /* Description MAX_BW40_TRY_COUNT 1010 1011 Field only valid when ppdu_allowed_bw40_bw4 or Mprot_required_bw40_bw4 1012 is set. 1013 1014 NOTE: This field is also known as Max_try_count_pattern_1 1015 in case punctured transmission is enabled. 1016 1017 The maximum number of times that TXPCU will try to do a 1018 transmission at this or a higher BW, before deciding to 1019 go to a lower BW. 1020 If this count (as indicated by field Optimal_bw_retry_count 1021 in TX_FES_SETUP) has not been reached yet, and this BW 1022 is not available, TXPCU will generate a flush with flush 1023 reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.' 1024 1025 When value is 0, it means that if this BW is not available, 1026 TXPCU should immediately try a lower BW. 1027 1028 Note that this value shall always be equal or greater then: 1029 Max_bw80_try_count 1030 1031 <legal all> 1032 */ 1033 1034 #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_OFFSET 0x0000000000000008 1035 #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_LSB 32 1036 #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_MSB 35 1037 #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_MASK 0x0000000f00000000 1038 1039 1040 /* Description MAX_BW80_TRY_COUNT 1041 1042 Field only valid when ppdu_allowed_bw80_bw4 or Mprot_required_bw80_bw4 1043 is set. 1044 1045 NOTE: This field is also known as Max_try_count_pattern_2 1046 in case punctured transmission is enabled. 1047 1048 The maximum number of times that TXPCU will try to do a 1049 transmission at this or a higher BW, before deciding to 1050 go to a lower BW. 1051 If this count (as indicated by field Optimal_bw_retry_count 1052 in TX_FES_SETUP) has not been reached yet, and this BW 1053 is not available, TXPCU will generate a flush with flush 1054 reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.' 1055 1056 When value is 0, it means that if this BW is not available, 1057 TXPCU should immediately try a lower BW. 1058 1059 Note that this value shall always be equal or greater then: 1060 Max_bw160_try_count 1061 1062 <legal all> 1063 */ 1064 1065 #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_OFFSET 0x0000000000000008 1066 #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_LSB 36 1067 #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_MSB 39 1068 #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_MASK 0x000000f000000000 1069 1070 1071 /* Description MAX_BW160_TRY_COUNT 1072 1073 Field only valid when ppdu_allowed_bw160_bw16 or Mprot_required_bw160_bw16 1074 is set. 1075 1076 NOTE: This field is also known as Max_try_count_pattern_3 1077 in case punctured transmission is enabled. 1078 1079 The maximum number of times that TXPCU will try to do a 1080 transmission at this, before deciding to go to a lower BW. 1081 1082 If this count (as indicated by field Optimal_bw_retry_count 1083 in TX_FES_SETUP) has not been reached yet, and this BW 1084 is not available, TXPCU will generate a flush with flush 1085 reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.' 1086 1087 When value is 0, it means that if this BW is not available, 1088 TXPCU should immediately try a lower BW. 1089 1090 <legal all> 1091 */ 1092 1093 #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_OFFSET 0x0000000000000008 1094 #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_LSB 40 1095 #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_MSB 43 1096 #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_MASK 0x00000f0000000000 1097 1098 1099 /* Description MAX_BW240_TRY_COUNT 1100 1101 Field only valid when ppdu_allowed_bw240 or Mprot_required_bw240 1102 is set. 1103 1104 NOTE: This field is also known as Max_try_count_pattern_4 1105 in case punctured transmission is enabled. 1106 1107 The maximum number of times that TXPCU will try to do a 1108 transmission at this, before deciding to go to a lower BW. 1109 1110 If this count (as indicated by field Optimal_bw_retry_count 1111 in TX_FES_SETUP) has not been reached yet, and this BW 1112 is not available, TXPCU will generate a flush with flush 1113 reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.' 1114 1115 When value is 0, it means that if this BW is not available, 1116 TXPCU should immediately try a lower BW. 1117 1118 <legal all> 1119 */ 1120 1121 #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_OFFSET 0x0000000000000008 1122 #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_LSB 44 1123 #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_MSB 47 1124 #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_MASK 0x0000f00000000000 1125 1126 1127 /* Description MAX_BW320_TRY_COUNT 1128 1129 Field only valid when ppdu_allowed_bw320 or Mprot_required_bw320 1130 is set. 1131 1132 NOTE: This field is also known as Max_try_count_pattern_5 1133 in case punctured transmission is enabled. 1134 1135 The maximum number of times that TXPCU will try to do a 1136 transmission at this, before deciding to go to a lower BW. 1137 1138 If this count (as indicated by field Optimal_bw_retry_count 1139 in TX_FES_SETUP) has not been reached yet, and this BW 1140 is not available, TXPCU will generate a flush with flush 1141 reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.' 1142 1143 When value is 0, it means that if this BW is not available, 1144 TXPCU should immediately try a lower BW. 1145 1146 <legal all> 1147 */ 1148 1149 #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_OFFSET 0x0000000000000008 1150 #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_LSB 48 1151 #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_MSB 51 1152 #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_MASK 0x000f000000000000 1153 1154 1155 /* Description INSERT_WUR_TIMESTAMP_OFFSET 1156 1157 Field only to be used in case PCU_PPDU_SETUP_START.pkt_type 1158 indicates a .11ba packet 1159 1160 Used by TXPCU to determine the offset within a WUR packet, 1161 e.g. a WUR beacon into which to insert the timestamp. 1162 1163 <legal all> 1164 */ 1165 1166 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_OFFSET 0x0000000000000008 1167 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_LSB 52 1168 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_MSB 57 1169 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_MASK 0x03f0000000000000 1170 1171 1172 /* Description UPDATE_WUR_TIMESTAMP 1173 1174 Field only to be used in case PCU_PPDU_SETUP_START.pkt_type 1175 indicates a .11ba packet 1176 1177 TXPCU will insert the timestamp into a WUR packet if this 1178 bit is set. 1179 1180 <legal all> 1181 */ 1182 1183 #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_OFFSET 0x0000000000000008 1184 #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_LSB 58 1185 #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_MSB 58 1186 #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_MASK 0x0400000000000000 1187 1188 1189 /* Description WUR_EMBEDDED_BSSID_PRESENT 1190 1191 Field only to be used in case PCU_PPDU_SETUP_START.pkt_type 1192 indicates a .11ba packet 1193 1194 If this bit is set, TXPCU will assume the packet includes 1195 an extra 16 bits which contain the embedded BSSID to be 1196 used in the WUR FCS calculation. TXPCU will replace the 1197 16 bits with the 16-bit FCS field. 1198 If this bit is clear, TXPCU will append the 16-bit FCS calculated 1199 without any embedded BSSID. 1200 1201 <legal all> 1202 */ 1203 1204 #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_OFFSET 0x0000000000000008 1205 #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_LSB 59 1206 #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_MSB 59 1207 #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_MASK 0x0800000000000000 1208 1209 1210 /* Description INSERT_WUR_FCS 1211 1212 Field only to be used in case PCU_PPDU_SETUP_START.pkt_type 1213 indicates a .11ba packet 1214 1215 TXPCU will replace/append the FCS bytes for a WUR packet 1216 if this bit is set. The replace/append choice is based 1217 on WUR_embedded_BSSID_present. 1218 1219 <legal all> 1220 */ 1221 1222 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_OFFSET 0x0000000000000008 1223 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_LSB 60 1224 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_MSB 60 1225 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_MASK 0x1000000000000000 1226 1227 1228 /* Description RESERVED_3B 1229 1230 <legal 0> 1231 */ 1232 1233 #define PCU_PPDU_SETUP_INIT_RESERVED_3B_OFFSET 0x0000000000000008 1234 #define PCU_PPDU_SETUP_INIT_RESERVED_3B_LSB 61 1235 #define PCU_PPDU_SETUP_INIT_RESERVED_3B_MSB 63 1236 #define PCU_PPDU_SETUP_INIT_RESERVED_3B_MASK 0xe000000000000000 1237 1238 1239 /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW20 1240 1241 Field only valid in case of Response_to_response set to 1242 SU_BA or MU_BA 1243 1244 NOTE: This field is also known as response_to_response_rate_info_pattern_0 1245 in case punctured transmission is enabled. 1246 1247 Used by TXPCU to determine what the transmit rates are for 1248 the response to response transmission in case original 1249 transmission was 20 MHz. 1250 1251 Note: 1252 see field R2R_bw20_active_channel for the BW of this transmission 1253 1254 */ 1255 1256 1257 /* Description RESERVED_0A 1258 1259 1260 <legal 0> 1261 */ 1262 1263 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_OFFSET 0x0000000000000010 1264 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_LSB 0 1265 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_MSB 0 1266 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_MASK 0x0000000000000001 1267 1268 1269 /* Description TX_ANTENNA_SECTOR_CTRL 1270 1271 Sectored transmit antenna 1272 <legal all> 1273 */ 1274 1275 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000010 1276 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_LSB 1 1277 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_MSB 24 1278 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_MASK 0x0000000001fffffe 1279 1280 1281 /* Description PKT_TYPE 1282 1283 Packet type: 1284 <enum 0 dot11a>802.11a PPDU type 1285 <enum 1 dot11b>802.11b PPDU type 1286 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 1287 <enum 3 dot11ac>802.11ac PPDU type 1288 <enum 4 dot11ax>802.11ax PPDU type 1289 <enum 5 dot11ba>802.11ba (WUR) PPDU type 1290 <enum 6 dot11be>802.11be PPDU type 1291 <enum 7 dot11az>802.11az (ranging) PPDU type 1292 <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported 1293 & aborted) 1294 */ 1295 1296 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_OFFSET 0x0000000000000010 1297 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_LSB 25 1298 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_MSB 28 1299 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_MASK 0x000000001e000000 1300 1301 1302 /* Description SMOOTHING 1303 1304 This field is used by PDG to populate the SMOOTHING filed 1305 in the SIG Preamble of the PPDU 1306 <legal 0-1> 1307 */ 1308 1309 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_OFFSET 0x0000000000000010 1310 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_LSB 29 1311 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_MSB 29 1312 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_MASK 0x0000000020000000 1313 1314 1315 /* Description LDPC 1316 1317 When set, use LDPC transmission rates 1318 */ 1319 1320 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_OFFSET 0x0000000000000010 1321 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_LSB 30 1322 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_MSB 30 1323 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_MASK 0x0000000040000000 1324 1325 1326 /* Description STBC 1327 1328 When set, use STBC transmission rates 1329 */ 1330 1331 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_OFFSET 0x0000000000000010 1332 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_LSB 31 1333 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_MSB 31 1334 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_MASK 0x0000000080000000 1335 1336 1337 /* Description ALT_TX_PWR 1338 1339 Coex related AlternativeTransmit parameter 1340 1341 Transmit Power in s6.2 format. 1342 In units of 0.25 dBm 1343 <legal all> 1344 */ 1345 1346 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_OFFSET 0x0000000000000010 1347 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_LSB 32 1348 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_MSB 39 1349 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_MASK 0x000000ff00000000 1350 1351 1352 /* Description ALT_MIN_TX_PWR 1353 1354 Coex related Alternative Transmit parameter 1355 1356 Minimum allowed Transmit Power in s6.2 format. 1357 In units of 0.25 dBm 1358 <legal all> 1359 */ 1360 1361 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_OFFSET 0x0000000000000010 1362 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_LSB 40 1363 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_MSB 47 1364 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_MASK 0x0000ff0000000000 1365 1366 1367 /* Description ALT_NSS 1368 1369 Coex related Alternative Transmit parameter 1370 1371 Number of spatial streams. 1372 1373 <enum 0 1_spatial_stream>Single spatial stream 1374 <enum 1 2_spatial_streams>2 spatial streams 1375 <enum 2 3_spatial_streams>3 spatial streams 1376 <enum 3 4_spatial_streams>4 spatial streams 1377 <enum 4 5_spatial_streams>5 spatial streams 1378 <enum 5 6_spatial_streams>6 spatial streams 1379 <enum 6 7_spatial_streams>7 spatial streams 1380 <enum 7 8_spatial_streams>8 spatial streams 1381 */ 1382 1383 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_OFFSET 0x0000000000000010 1384 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_LSB 48 1385 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_MSB 50 1386 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_MASK 0x0007000000000000 1387 1388 1389 /* Description ALT_TX_CHAIN_MASK 1390 1391 Coex related Alternative Transmit parameter 1392 1393 Chain mask to support up to 8 antennas. 1394 <legal 1-255> 1395 */ 1396 1397 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000010 1398 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_LSB 51 1399 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_MSB 58 1400 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_MASK 0x07f8000000000000 1401 1402 1403 /* Description ALT_BW 1404 1405 Coex related Alternative Transmit parameter 1406 1407 The BW of the upcoming transmission. 1408 1409 <enum 0 20_mhz>20 Mhz BW 1410 <enum 1 40_mhz>40 Mhz BW 1411 <enum 2 80_mhz>80 Mhz BW 1412 <enum 3 160_mhz>160 Mhz BW 1413 <enum 4 320_mhz>320 Mhz BW 1414 <enum 5 240_mhz>240 Mhz BW 1415 */ 1416 1417 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_OFFSET 0x0000000000000010 1418 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_LSB 59 1419 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_MSB 61 1420 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_MASK 0x3800000000000000 1421 1422 1423 /* Description STF_LTF_3DB_BOOST 1424 1425 Boost the STF and LTF power by 3dB in 11a/n/ac packets. 1426 This includes both the legacy preambles and the HT/VHT preambles.0: 1427 disable power boost1: enable power boost 1428 <legal all> 1429 */ 1430 1431 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000010 1432 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_LSB 62 1433 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_MSB 62 1434 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_MASK 0x4000000000000000 1435 1436 1437 /* Description FORCE_EXTRA_SYMBOL 1438 1439 Set to 1 to force an extra OFDM symbol (or symbols) even 1440 if the PPDU encoding process does not result in an extra 1441 OFDM symbol (or symbols) 1442 */ 1443 1444 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000010 1445 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_LSB 63 1446 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_MSB 63 1447 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_MASK 0x8000000000000000 1448 1449 1450 /* Description ALT_RATE_MCS 1451 1452 Coex related Alternative Transmit parameter 1453 1454 For details, refer to MCS_TYPE 1455 Note: This is "rate" in case of 11a/11b 1456 description 1457 <legal all> 1458 */ 1459 1460 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_OFFSET 0x0000000000000018 1461 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_LSB 0 1462 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_MSB 3 1463 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_MASK 0x000000000000000f 1464 1465 1466 /* Description NSS 1467 1468 Number of spatial streams. 1469 1470 <enum 0 1_spatial_stream>Single spatial stream 1471 <enum 1 2_spatial_streams>2 spatial streams 1472 <enum 2 3_spatial_streams>3 spatial streams 1473 <enum 3 4_spatial_streams>4 spatial streams 1474 <enum 4 5_spatial_streams>5 spatial streams 1475 <enum 5 6_spatial_streams>6 spatial streams 1476 <enum 6 7_spatial_streams>7 spatial streams 1477 <enum 7 8_spatial_streams>8 spatial streams 1478 */ 1479 1480 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_OFFSET 0x0000000000000018 1481 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_LSB 4 1482 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_MSB 6 1483 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_MASK 0x0000000000000070 1484 1485 1486 /* Description DPD_ENABLE 1487 1488 DPD enable control 1489 1490 This is needed on a per packet basis 1491 <enum 0 dpd_off> DPD profile not applied to current 1492 packet 1493 <enum 1 dpd_on> DPD profile applied to current packet 1494 if available 1495 <legal 0-1> 1496 1497 This field is not applicable in11ah mode of operation and 1498 is ignored by the HW 1499 */ 1500 1501 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_OFFSET 0x0000000000000018 1502 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_LSB 7 1503 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_MSB 7 1504 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_MASK 0x0000000000000080 1505 1506 1507 /* Description TX_PWR 1508 1509 Transmit Power in s6.2 format. 1510 In units of 0.25 dBm 1511 <legal all> 1512 */ 1513 1514 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_OFFSET 0x0000000000000018 1515 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_LSB 8 1516 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_MSB 15 1517 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_MASK 0x000000000000ff00 1518 1519 1520 /* Description MIN_TX_PWR 1521 1522 Coex related field: 1523 1524 Minimum allowed Transmit Power in s6.2 format. 1525 In units of 0.25 dBm 1526 <legal all> 1527 */ 1528 1529 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_OFFSET 0x0000000000000018 1530 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_LSB 16 1531 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_MSB 23 1532 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_MASK 0x0000000000ff0000 1533 1534 1535 /* Description TX_CHAIN_MASK 1536 1537 Chain mask to support up to 8 antennas. 1538 <legal 1-255> 1539 */ 1540 1541 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_OFFSET 0x0000000000000018 1542 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_LSB 24 1543 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_MSB 31 1544 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_MASK 0x00000000ff000000 1545 1546 1547 /* Description RESERVED_3A 1548 1549 <legal 0> 1550 */ 1551 1552 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_OFFSET 0x0000000000000018 1553 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_LSB 32 1554 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_MSB 39 1555 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_MASK 0x000000ff00000000 1556 1557 1558 /* Description SGI 1559 1560 Field only valid when pkt type is HT or VHT.For 11ax see 1561 field Dot11ax_CP_LTF_size 1562 1563 <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used 1564 for HE 1565 <enum 1 0_4_us_sgi > Legacy short GI. Can also be used 1566 for HE 1567 <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types. 1568 1569 <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types 1570 1571 1572 <legal 0 - 3> 1573 */ 1574 1575 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_OFFSET 0x0000000000000018 1576 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_LSB 40 1577 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_MSB 41 1578 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_MASK 0x0000030000000000 1579 1580 1581 /* Description RATE_MCS 1582 1583 For details, refer to MCS_TYPE description 1584 Note: This is "rate" in case of 11a/11b 1585 1586 <legal all> 1587 */ 1588 1589 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_OFFSET 0x0000000000000018 1590 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_LSB 42 1591 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_MSB 45 1592 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_MASK 0x00003c0000000000 1593 1594 1595 /* Description RESERVED_3B 1596 1597 <legal 0> 1598 */ 1599 1600 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_OFFSET 0x0000000000000018 1601 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_LSB 46 1602 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_MSB 47 1603 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_MASK 0x0000c00000000000 1604 1605 1606 /* Description TX_PWR_1 1607 1608 Default (desired) transmit parameter for the second chain 1609 1610 1611 Transmit Power in s6.2 format. 1612 In units of 0.25 dBm 1613 1614 Note that there is no Min value for this 1615 <legal all> 1616 */ 1617 1618 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_OFFSET 0x0000000000000018 1619 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_LSB 48 1620 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_MSB 55 1621 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_MASK 0x00ff000000000000 1622 1623 1624 /* Description ALT_TX_PWR_1 1625 1626 Alternate (desired) transmit parameter for the second chain 1627 1628 1629 Transmit Power in s6.2 format. 1630 In units of 0.25 dBm 1631 1632 Note that there is no Min value for this 1633 <legal all> 1634 */ 1635 1636 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_OFFSET 0x0000000000000018 1637 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_LSB 56 1638 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_MSB 63 1639 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_MASK 0xff00000000000000 1640 1641 1642 /* Description AGGREGATION 1643 1644 Field only valid in case of pkt_type == 11n 1645 1646 <enum 0 mpdu> Indicates MPDU format. TXPCU will select 1647 this setting if the CBF response only contains a single 1648 segment 1649 <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will 1650 select this setting if the CBF response will contain two 1651 or more segments 1652 <legal 0-1> 1653 */ 1654 1655 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_OFFSET 0x0000000000000020 1656 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_LSB 0 1657 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_MSB 0 1658 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_MASK 0x0000000000000001 1659 1660 1661 /* Description DOT11AX_BSS_COLOR_ID 1662 1663 BSS color of the nextwork to which this STA belongs. 1664 When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id 1665 1666 1667 <legal all> 1668 */ 1669 1670 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000020 1671 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_LSB 1 1672 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_MSB 6 1673 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_MASK 0x000000000000007e 1674 1675 1676 /* Description DOT11AX_SPATIAL_REUSE 1677 1678 This field is only valid for pkt_type == 11ax 1679 1680 Spatial re-use 1681 <legal all> 1682 */ 1683 1684 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000020 1685 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_LSB 7 1686 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_MSB 10 1687 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_MASK 0x0000000000000780 1688 1689 1690 /* Description DOT11AX_CP_LTF_SIZE 1691 1692 field is only valid for pkt_type == 11ax 1693 1694 Indicates the CP and HE-LTF type 1695 1696 <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP 1697 <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP 1698 <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP 1699 <enum 3 FourX_LTF_0_8CP_3_2CP> 1700 When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP 1701 When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note: 1702 In this scenario, Neither DCM nor STBC is applied to HE 1703 data field. 1704 1705 If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0) 1706 0 = 1xLTF + 0.4 usec 1707 1 = 2xLTF + 0.4 usec 1708 2~3 = Reserved 1709 1710 <legal all> 1711 */ 1712 1713 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000020 1714 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_LSB 11 1715 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_MSB 12 1716 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_MASK 0x0000000000001800 1717 1718 1719 /* Description DOT11AX_DCM 1720 1721 field is only valid for pkt_type == 11ax 1722 1723 Indicates whether dual sub-carrier modulation is applied 1724 1725 0: No DCM 1726 1:DCM 1727 <legal all> 1728 */ 1729 1730 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_OFFSET 0x0000000000000020 1731 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_LSB 13 1732 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_MSB 13 1733 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_MASK 0x0000000000002000 1734 1735 1736 /* Description DOT11AX_DOPPLER_INDICATION 1737 1738 field is only valid for pkt_type == 11ax 1739 1740 0: No Doppler support 1741 1: Doppler support 1742 <legal all> 1743 */ 1744 1745 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000020 1746 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_LSB 14 1747 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_MSB 14 1748 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_MASK 0x0000000000004000 1749 1750 1751 /* Description DOT11AX_SU_EXTENDED 1752 1753 field is only valid for pkt_type == 11ax OR pkt_type == 1754 11be 1755 1756 When set, the 11ax or 11be frame is of the extended range 1757 format 1758 <legal all> 1759 */ 1760 1761 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000020 1762 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_LSB 15 1763 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_MSB 15 1764 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_MASK 0x0000000000008000 1765 1766 1767 /* Description DOT11AX_MIN_PACKET_EXTENSION 1768 1769 field is only valid for pkt_type == 11ax OR pkt_type == 1770 11be 1771 1772 The min packet extension duration for this user. 1773 0: no extension 1774 1: 8us 1775 2: 16 us 1776 3: 20 us (only for .11be) 1777 <legal 0-3> 1778 */ 1779 1780 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000020 1781 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_LSB 16 1782 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_MSB 17 1783 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0000000000030000 1784 1785 1786 /* Description DOT11AX_PE_NSS 1787 1788 Number of active spatial streams during packet extension. 1789 1790 1791 <enum 0 1_spatial_stream>Single spatial stream 1792 <enum 1 2_spatial_streams>2 spatial streams 1793 <enum 2 3_spatial_streams>3 spatial streams 1794 <enum 3 4_spatial_streams>4 spatial streams 1795 <enum 4 5_spatial_streams>5 spatial streams 1796 <enum 5 6_spatial_streams>6 spatial streams 1797 <enum 6 7_spatial_streams>7 spatial streams 1798 <enum 7 8_spatial_streams>8 spatial streams 1799 */ 1800 1801 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_OFFSET 0x0000000000000020 1802 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_LSB 18 1803 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_MSB 20 1804 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_MASK 0x00000000001c0000 1805 1806 1807 /* Description DOT11AX_PE_CONTENT 1808 1809 Content of packet extension. Valid for all 11ax packets 1810 having packet extension 1811 1812 0-he_ltf, 1-last_data_symbol 1813 <legal all> 1814 */ 1815 1816 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000020 1817 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_LSB 21 1818 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_MSB 21 1819 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_MASK 0x0000000000200000 1820 1821 1822 /* Description DOT11AX_PE_LTF_SIZE 1823 1824 LTF size to be used during packet extention. . This field 1825 is valid for both FTM and non-FTM packets. 1826 0-1x 1827 1-2x (unsupported un HWK-1) 1828 2-4x (unsupported un HWK-1) 1829 <legal all> 1830 */ 1831 1832 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000020 1833 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_LSB 22 1834 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_MSB 23 1835 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_MASK 0x0000000000c00000 1836 1837 1838 /* Description DOT11AX_CHAIN_CSD_EN 1839 1840 This field denotes whether to apply CSD on the preamble 1841 and data portion of the packet. This field is valid for 1842 all transmit packets 1843 0: disable per-chain csd 1844 1: enable per-chain csd 1845 <legal all> 1846 */ 1847 1848 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000020 1849 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_LSB 24 1850 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_MSB 24 1851 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_MASK 0x0000000001000000 1852 1853 1854 /* Description DOT11AX_PE_CHAIN_CSD_EN 1855 1856 This field denotes whether to apply CSD on the packet extension 1857 portion of the packet. This field is valid for all 11ax 1858 packets. 1859 0: disable per-chain csd 1860 1: enable per-chain csd 1861 <legal all> 1862 */ 1863 1864 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000020 1865 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_LSB 25 1866 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_MSB 25 1867 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0000000002000000 1868 1869 1870 /* Description DOT11AX_DL_UL_FLAG 1871 1872 field is only valid for pkt_type == 11ax 1873 1874 <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS> 1875 <enum 1 DL_UL_FLAG_IS_UL> 1876 1877 <legal all> 1878 */ 1879 1880 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000020 1881 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_LSB 26 1882 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_MSB 26 1883 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_MASK 0x0000000004000000 1884 1885 1886 /* Description RESERVED_4A 1887 1888 <legal 0> 1889 */ 1890 1891 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_OFFSET 0x0000000000000020 1892 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_LSB 27 1893 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_MSB 31 1894 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_MASK 0x00000000f8000000 1895 1896 1897 /* Description DOT11AX_EXT_RU_START_INDEX 1898 1899 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 1900 == 1 1901 1902 RU Number to which User is assigned 1903 1904 The RU numbering bitwidth is only enough to cover the 20MHz 1905 BW that extended range allows 1906 <legal 0-8> 1907 */ 1908 1909 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000020 1910 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_LSB 32 1911 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_MSB 35 1912 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_MASK 0x0000000f00000000 1913 1914 1915 /* Description DOT11AX_EXT_RU_SIZE 1916 1917 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 1918 == 1 or pkt_type == 11be and EHT_duplicate_mode == 1 1919 1920 The size of the RU for this user. 1921 1922 In case of EHT duplicate transmissions, this field indicates 1923 the width of the actual content before duplication, e.g. 1924 a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth 1925 fields indicating 160 MHz and this field set to e-num 4 1926 (RU_484). 1927 1928 <enum 0 RU_26> 1929 <enum 1 RU_52> 1930 <enum 2 RU_106> 1931 <enum 3 RU_242> 1932 <enum 4 RU_484> 1933 <enum 5 RU_996> 1934 <enum 6 RU_1992> 1935 <enum 7 RU_FULLBW> Set when the RU occupies the full packet 1936 bandwidth 1937 <enum 8 RU_FULLBW_240> Set when the RU occupies the full 1938 packet bandwidth 1939 <enum 9 RU_FULLBW_320> Set when the RU occupies the full 1940 packet bandwidth 1941 <enum 10 RU_MULTI_LARGE> DO NOT USE 1942 <enum 11 RU_78> DO NOT USE 1943 <enum 12 RU_132> DO NOT USE 1944 <legal 0-12> 1945 */ 1946 1947 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000020 1948 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_LSB 36 1949 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_MSB 39 1950 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_MASK 0x000000f000000000 1951 1952 1953 /* Description EHT_DUPLICATE_MODE 1954 1955 Field only valid for pkt_type == 11be 1956 1957 Indicates EHT duplicate modulation 1958 1959 <enum 0 eht_no_duplicate> 1960 <enum 1 eht_2x_duplicate> 1961 <enum 2 eht_4x_duplicate> 1962 1963 <legal 0-2> 1964 */ 1965 1966 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000020 1967 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_LSB 40 1968 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_MSB 41 1969 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_MASK 0x0000030000000000 1970 1971 1972 /* Description HE_SIGB_DCM 1973 1974 Indicates whether dual sub-carrier modulation is applied 1975 to EHT-SIG 1976 <legal all> 1977 */ 1978 1979 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_OFFSET 0x0000000000000020 1980 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_LSB 42 1981 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_MSB 42 1982 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_MASK 0x0000040000000000 1983 1984 1985 /* Description HE_SIGB_0_MCS 1986 1987 Indicates the MCS of EHT-SIG 1988 1989 For details, refer to MCS_TYPE description 1990 <legal all> 1991 */ 1992 1993 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_OFFSET 0x0000000000000020 1994 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_LSB 43 1995 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_MSB 45 1996 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_MASK 0x0000380000000000 1997 1998 1999 /* Description NUM_HE_SIGB_SYM 2000 2001 Indicates the number of EHT-SIG symbols 2002 2003 This field is 0-based with 0 indicating that 1 eht_sig symbol 2004 needs to be transmitted. 2005 <legal all> 2006 */ 2007 2008 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000020 2009 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_LSB 46 2010 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_MSB 50 2011 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_MASK 0x0007c00000000000 2012 2013 2014 /* Description REQUIRED_RESPONSE_TIME_SOURCE 2015 2016 <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received 2017 HT Control for sync MLO response 2018 <enum 1 reqd_resp_time_src_is_FW> 2019 Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response 2020 to response 2021 <legal all> 2022 */ 2023 2024 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000020 2025 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_LSB 51 2026 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_MSB 51 2027 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0008000000000000 2028 2029 2030 /* Description RESERVED_5A 2031 2032 <legal 0> 2033 */ 2034 2035 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_OFFSET 0x0000000000000020 2036 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_LSB 52 2037 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_MSB 57 2038 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_MASK 0x03f0000000000000 2039 2040 2041 /* Description U_SIG_PUNCTURE_PATTERN_ENCODING 2042 2043 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO' 2044 to pass on to PDG 2045 <legal 0-29> 2046 */ 2047 2048 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000020 2049 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 58 2050 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 63 2051 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc00000000000000 2052 2053 2054 /* Description MLO_STA_ID_DETAILS_RX 2055 2056 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass 2057 on to PDG 2058 2059 Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID' 2060 from address search. 2061 2062 See definition of mlo_sta_id_details. 2063 */ 2064 2065 2066 /* Description NSTR_MLO_STA_ID 2067 2068 ID of peer participating in non-STR MLO 2069 */ 2070 2071 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000028 2072 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0 2073 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9 2074 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x00000000000003ff 2075 2076 2077 /* Description BLOCK_SELF_ML_SYNC 2078 2079 Only valid for TX 2080 2081 When set, this provides an indication to block the peer 2082 for self-link. 2083 */ 2084 2085 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000028 2086 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10 2087 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10 2088 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000000000000400 2089 2090 2091 /* Description BLOCK_PARTNER_ML_SYNC 2092 2093 Only valid for TX 2094 2095 When set, this provides an indication to block the peer 2096 for partner links. 2097 */ 2098 2099 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000028 2100 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11 2101 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11 2102 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000000000000800 2103 2104 2105 /* Description NSTR_MLO_STA_ID_VALID 2106 2107 All the fields in this TLV are valid only if this bit is 2108 set. 2109 */ 2110 2111 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000028 2112 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12 2113 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12 2114 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000000000001000 2115 2116 2117 /* Description RESERVED_0A 2118 2119 <legal 0> 2120 */ 2121 2122 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000028 2123 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13 2124 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15 2125 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x000000000000e000 2126 2127 2128 /* Description REQUIRED_RESPONSE_TIME 2129 2130 When non-zero, indicates that PDG shall pad the response 2131 transmission to the indicated duration (in us) 2132 */ 2133 2134 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000028 2135 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_LSB 16 2136 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_MSB 27 2137 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_MASK 0x000000000fff0000 2138 2139 2140 /* Description DOT11BE_PARAMS_PLACEHOLDER 2141 2142 4 bytes for use as placeholders for 'Dot11be_*' parameters 2143 2144 */ 2145 2146 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000028 2147 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_LSB 28 2148 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_MSB 31 2149 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_MASK 0x00000000f0000000 2150 2151 2152 /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW40 2153 2154 Field only valid in case of Response_to_response set to 2155 SU_BA or MU_BA 2156 2157 NOTE: This field is also known as response_to_response_rate_info_pattern_1 2158 in case punctured transmission is enabled. 2159 2160 Used by TXPCU to determine what the transmit rates are for 2161 the response to response transmission in case original 2162 transmission was 40 MHz. 2163 2164 Note: 2165 see field R2R_bw40_active_channel for the BW of this transmission 2166 2167 */ 2168 2169 2170 /* Description RESERVED_0A 2171 2172 2173 <legal 0> 2174 */ 2175 2176 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_OFFSET 0x0000000000000028 2177 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_LSB 32 2178 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_MSB 32 2179 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_MASK 0x0000000100000000 2180 2181 2182 /* Description TX_ANTENNA_SECTOR_CTRL 2183 2184 Sectored transmit antenna 2185 <legal all> 2186 */ 2187 2188 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000028 2189 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_LSB 33 2190 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_MSB 56 2191 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_MASK 0x01fffffe00000000 2192 2193 2194 /* Description PKT_TYPE 2195 2196 Packet type: 2197 <enum 0 dot11a>802.11a PPDU type 2198 <enum 1 dot11b>802.11b PPDU type 2199 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 2200 <enum 3 dot11ac>802.11ac PPDU type 2201 <enum 4 dot11ax>802.11ax PPDU type 2202 <enum 5 dot11ba>802.11ba (WUR) PPDU type 2203 <enum 6 dot11be>802.11be PPDU type 2204 <enum 7 dot11az>802.11az (ranging) PPDU type 2205 <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported 2206 & aborted) 2207 */ 2208 2209 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_OFFSET 0x0000000000000028 2210 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_LSB 57 2211 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_MSB 60 2212 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_MASK 0x1e00000000000000 2213 2214 2215 /* Description SMOOTHING 2216 2217 This field is used by PDG to populate the SMOOTHING filed 2218 in the SIG Preamble of the PPDU 2219 <legal 0-1> 2220 */ 2221 2222 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_OFFSET 0x0000000000000028 2223 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_LSB 61 2224 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_MSB 61 2225 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_MASK 0x2000000000000000 2226 2227 2228 /* Description LDPC 2229 2230 When set, use LDPC transmission rates 2231 */ 2232 2233 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_OFFSET 0x0000000000000028 2234 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_LSB 62 2235 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_MSB 62 2236 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_MASK 0x4000000000000000 2237 2238 2239 /* Description STBC 2240 2241 When set, use STBC transmission rates 2242 */ 2243 2244 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_OFFSET 0x0000000000000028 2245 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_LSB 63 2246 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_MSB 63 2247 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_MASK 0x8000000000000000 2248 2249 2250 /* Description ALT_TX_PWR 2251 2252 Coex related AlternativeTransmit parameter 2253 2254 Transmit Power in s6.2 format. 2255 In units of 0.25 dBm 2256 <legal all> 2257 */ 2258 2259 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_OFFSET 0x0000000000000030 2260 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_LSB 0 2261 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_MSB 7 2262 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_MASK 0x00000000000000ff 2263 2264 2265 /* Description ALT_MIN_TX_PWR 2266 2267 Coex related Alternative Transmit parameter 2268 2269 Minimum allowed Transmit Power in s6.2 format. 2270 In units of 0.25 dBm 2271 <legal all> 2272 */ 2273 2274 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_OFFSET 0x0000000000000030 2275 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_LSB 8 2276 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_MSB 15 2277 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_MASK 0x000000000000ff00 2278 2279 2280 /* Description ALT_NSS 2281 2282 Coex related Alternative Transmit parameter 2283 2284 Number of spatial streams. 2285 2286 <enum 0 1_spatial_stream>Single spatial stream 2287 <enum 1 2_spatial_streams>2 spatial streams 2288 <enum 2 3_spatial_streams>3 spatial streams 2289 <enum 3 4_spatial_streams>4 spatial streams 2290 <enum 4 5_spatial_streams>5 spatial streams 2291 <enum 5 6_spatial_streams>6 spatial streams 2292 <enum 6 7_spatial_streams>7 spatial streams 2293 <enum 7 8_spatial_streams>8 spatial streams 2294 */ 2295 2296 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_OFFSET 0x0000000000000030 2297 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_LSB 16 2298 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_MSB 18 2299 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_MASK 0x0000000000070000 2300 2301 2302 /* Description ALT_TX_CHAIN_MASK 2303 2304 Coex related Alternative Transmit parameter 2305 2306 Chain mask to support up to 8 antennas. 2307 <legal 1-255> 2308 */ 2309 2310 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000030 2311 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_LSB 19 2312 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_MSB 26 2313 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_MASK 0x0000000007f80000 2314 2315 2316 /* Description ALT_BW 2317 2318 Coex related Alternative Transmit parameter 2319 2320 The BW of the upcoming transmission. 2321 2322 <enum 0 20_mhz>20 Mhz BW 2323 <enum 1 40_mhz>40 Mhz BW 2324 <enum 2 80_mhz>80 Mhz BW 2325 <enum 3 160_mhz>160 Mhz BW 2326 <enum 4 320_mhz>320 Mhz BW 2327 <enum 5 240_mhz>240 Mhz BW 2328 */ 2329 2330 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_OFFSET 0x0000000000000030 2331 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_LSB 27 2332 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_MSB 29 2333 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_MASK 0x0000000038000000 2334 2335 2336 /* Description STF_LTF_3DB_BOOST 2337 2338 Boost the STF and LTF power by 3dB in 11a/n/ac packets. 2339 This includes both the legacy preambles and the HT/VHT preambles.0: 2340 disable power boost1: enable power boost 2341 <legal all> 2342 */ 2343 2344 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000030 2345 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_LSB 30 2346 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_MSB 30 2347 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_MASK 0x0000000040000000 2348 2349 2350 /* Description FORCE_EXTRA_SYMBOL 2351 2352 Set to 1 to force an extra OFDM symbol (or symbols) even 2353 if the PPDU encoding process does not result in an extra 2354 OFDM symbol (or symbols) 2355 */ 2356 2357 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000030 2358 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_LSB 31 2359 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_MSB 31 2360 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_MASK 0x0000000080000000 2361 2362 2363 /* Description ALT_RATE_MCS 2364 2365 Coex related Alternative Transmit parameter 2366 2367 For details, refer to MCS_TYPE 2368 Note: This is "rate" in case of 11a/11b 2369 description 2370 <legal all> 2371 */ 2372 2373 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_OFFSET 0x0000000000000030 2374 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_LSB 32 2375 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_MSB 35 2376 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_MASK 0x0000000f00000000 2377 2378 2379 /* Description NSS 2380 2381 Number of spatial streams. 2382 2383 <enum 0 1_spatial_stream>Single spatial stream 2384 <enum 1 2_spatial_streams>2 spatial streams 2385 <enum 2 3_spatial_streams>3 spatial streams 2386 <enum 3 4_spatial_streams>4 spatial streams 2387 <enum 4 5_spatial_streams>5 spatial streams 2388 <enum 5 6_spatial_streams>6 spatial streams 2389 <enum 6 7_spatial_streams>7 spatial streams 2390 <enum 7 8_spatial_streams>8 spatial streams 2391 */ 2392 2393 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_OFFSET 0x0000000000000030 2394 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_LSB 36 2395 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_MSB 38 2396 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_MASK 0x0000007000000000 2397 2398 2399 /* Description DPD_ENABLE 2400 2401 DPD enable control 2402 2403 This is needed on a per packet basis 2404 <enum 0 dpd_off> DPD profile not applied to current 2405 packet 2406 <enum 1 dpd_on> DPD profile applied to current packet 2407 if available 2408 <legal 0-1> 2409 2410 This field is not applicable in11ah mode of operation and 2411 is ignored by the HW 2412 */ 2413 2414 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_OFFSET 0x0000000000000030 2415 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_LSB 39 2416 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_MSB 39 2417 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_MASK 0x0000008000000000 2418 2419 2420 /* Description TX_PWR 2421 2422 Transmit Power in s6.2 format. 2423 In units of 0.25 dBm 2424 <legal all> 2425 */ 2426 2427 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_OFFSET 0x0000000000000030 2428 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_LSB 40 2429 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_MSB 47 2430 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_MASK 0x0000ff0000000000 2431 2432 2433 /* Description MIN_TX_PWR 2434 2435 Coex related field: 2436 2437 Minimum allowed Transmit Power in s6.2 format. 2438 In units of 0.25 dBm 2439 <legal all> 2440 */ 2441 2442 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_OFFSET 0x0000000000000030 2443 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_LSB 48 2444 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_MSB 55 2445 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_MASK 0x00ff000000000000 2446 2447 2448 /* Description TX_CHAIN_MASK 2449 2450 Chain mask to support up to 8 antennas. 2451 <legal 1-255> 2452 */ 2453 2454 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_OFFSET 0x0000000000000030 2455 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_LSB 56 2456 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_MSB 63 2457 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_MASK 0xff00000000000000 2458 2459 2460 /* Description RESERVED_3A 2461 2462 <legal 0> 2463 */ 2464 2465 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_OFFSET 0x0000000000000038 2466 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_LSB 0 2467 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_MSB 7 2468 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_MASK 0x00000000000000ff 2469 2470 2471 /* Description SGI 2472 2473 Field only valid when pkt type is HT or VHT.For 11ax see 2474 field Dot11ax_CP_LTF_size 2475 2476 <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used 2477 for HE 2478 <enum 1 0_4_us_sgi > Legacy short GI. Can also be used 2479 for HE 2480 <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types. 2481 2482 <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types 2483 2484 2485 <legal 0 - 3> 2486 */ 2487 2488 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_OFFSET 0x0000000000000038 2489 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_LSB 8 2490 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_MSB 9 2491 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_MASK 0x0000000000000300 2492 2493 2494 /* Description RATE_MCS 2495 2496 For details, refer to MCS_TYPE description 2497 Note: This is "rate" in case of 11a/11b 2498 2499 <legal all> 2500 */ 2501 2502 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_OFFSET 0x0000000000000038 2503 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_LSB 10 2504 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_MSB 13 2505 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_MASK 0x0000000000003c00 2506 2507 2508 /* Description RESERVED_3B 2509 2510 <legal 0> 2511 */ 2512 2513 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_OFFSET 0x0000000000000038 2514 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_LSB 14 2515 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_MSB 15 2516 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_MASK 0x000000000000c000 2517 2518 2519 /* Description TX_PWR_1 2520 2521 Default (desired) transmit parameter for the second chain 2522 2523 2524 Transmit Power in s6.2 format. 2525 In units of 0.25 dBm 2526 2527 Note that there is no Min value for this 2528 <legal all> 2529 */ 2530 2531 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_OFFSET 0x0000000000000038 2532 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_LSB 16 2533 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_MSB 23 2534 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_MASK 0x0000000000ff0000 2535 2536 2537 /* Description ALT_TX_PWR_1 2538 2539 Alternate (desired) transmit parameter for the second chain 2540 2541 2542 Transmit Power in s6.2 format. 2543 In units of 0.25 dBm 2544 2545 Note that there is no Min value for this 2546 <legal all> 2547 */ 2548 2549 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_OFFSET 0x0000000000000038 2550 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_LSB 24 2551 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_MSB 31 2552 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_MASK 0x00000000ff000000 2553 2554 2555 /* Description AGGREGATION 2556 2557 Field only valid in case of pkt_type == 11n 2558 2559 <enum 0 mpdu> Indicates MPDU format. TXPCU will select 2560 this setting if the CBF response only contains a single 2561 segment 2562 <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will 2563 select this setting if the CBF response will contain two 2564 or more segments 2565 <legal 0-1> 2566 */ 2567 2568 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_OFFSET 0x0000000000000038 2569 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_LSB 32 2570 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_MSB 32 2571 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_MASK 0x0000000100000000 2572 2573 2574 /* Description DOT11AX_BSS_COLOR_ID 2575 2576 BSS color of the nextwork to which this STA belongs. 2577 When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id 2578 2579 2580 <legal all> 2581 */ 2582 2583 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000038 2584 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_LSB 33 2585 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_MSB 38 2586 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_MASK 0x0000007e00000000 2587 2588 2589 /* Description DOT11AX_SPATIAL_REUSE 2590 2591 This field is only valid for pkt_type == 11ax 2592 2593 Spatial re-use 2594 <legal all> 2595 */ 2596 2597 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000038 2598 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_LSB 39 2599 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_MSB 42 2600 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_MASK 0x0000078000000000 2601 2602 2603 /* Description DOT11AX_CP_LTF_SIZE 2604 2605 field is only valid for pkt_type == 11ax 2606 2607 Indicates the CP and HE-LTF type 2608 2609 <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP 2610 <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP 2611 <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP 2612 <enum 3 FourX_LTF_0_8CP_3_2CP> 2613 When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP 2614 When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note: 2615 In this scenario, Neither DCM nor STBC is applied to HE 2616 data field. 2617 2618 If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0) 2619 0 = 1xLTF + 0.4 usec 2620 1 = 2xLTF + 0.4 usec 2621 2~3 = Reserved 2622 2623 <legal all> 2624 */ 2625 2626 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000038 2627 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_LSB 43 2628 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_MSB 44 2629 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_MASK 0x0000180000000000 2630 2631 2632 /* Description DOT11AX_DCM 2633 2634 field is only valid for pkt_type == 11ax 2635 2636 Indicates whether dual sub-carrier modulation is applied 2637 2638 0: No DCM 2639 1:DCM 2640 <legal all> 2641 */ 2642 2643 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_OFFSET 0x0000000000000038 2644 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_LSB 45 2645 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_MSB 45 2646 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_MASK 0x0000200000000000 2647 2648 2649 /* Description DOT11AX_DOPPLER_INDICATION 2650 2651 field is only valid for pkt_type == 11ax 2652 2653 0: No Doppler support 2654 1: Doppler support 2655 <legal all> 2656 */ 2657 2658 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000038 2659 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_LSB 46 2660 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_MSB 46 2661 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_MASK 0x0000400000000000 2662 2663 2664 /* Description DOT11AX_SU_EXTENDED 2665 2666 field is only valid for pkt_type == 11ax OR pkt_type == 2667 11be 2668 2669 When set, the 11ax or 11be frame is of the extended range 2670 format 2671 <legal all> 2672 */ 2673 2674 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000038 2675 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_LSB 47 2676 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_MSB 47 2677 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_MASK 0x0000800000000000 2678 2679 2680 /* Description DOT11AX_MIN_PACKET_EXTENSION 2681 2682 field is only valid for pkt_type == 11ax OR pkt_type == 2683 11be 2684 2685 The min packet extension duration for this user. 2686 0: no extension 2687 1: 8us 2688 2: 16 us 2689 3: 20 us (only for .11be) 2690 <legal 0-3> 2691 */ 2692 2693 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000038 2694 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_LSB 48 2695 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_MSB 49 2696 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0003000000000000 2697 2698 2699 /* Description DOT11AX_PE_NSS 2700 2701 Number of active spatial streams during packet extension. 2702 2703 2704 <enum 0 1_spatial_stream>Single spatial stream 2705 <enum 1 2_spatial_streams>2 spatial streams 2706 <enum 2 3_spatial_streams>3 spatial streams 2707 <enum 3 4_spatial_streams>4 spatial streams 2708 <enum 4 5_spatial_streams>5 spatial streams 2709 <enum 5 6_spatial_streams>6 spatial streams 2710 <enum 6 7_spatial_streams>7 spatial streams 2711 <enum 7 8_spatial_streams>8 spatial streams 2712 */ 2713 2714 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_OFFSET 0x0000000000000038 2715 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_LSB 50 2716 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_MSB 52 2717 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_MASK 0x001c000000000000 2718 2719 2720 /* Description DOT11AX_PE_CONTENT 2721 2722 Content of packet extension. Valid for all 11ax packets 2723 having packet extension 2724 2725 0-he_ltf, 1-last_data_symbol 2726 <legal all> 2727 */ 2728 2729 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000038 2730 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_LSB 53 2731 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_MSB 53 2732 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_MASK 0x0020000000000000 2733 2734 2735 /* Description DOT11AX_PE_LTF_SIZE 2736 2737 LTF size to be used during packet extention. . This field 2738 is valid for both FTM and non-FTM packets. 2739 0-1x 2740 1-2x (unsupported un HWK-1) 2741 2-4x (unsupported un HWK-1) 2742 <legal all> 2743 */ 2744 2745 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000038 2746 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_LSB 54 2747 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_MSB 55 2748 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_MASK 0x00c0000000000000 2749 2750 2751 /* Description DOT11AX_CHAIN_CSD_EN 2752 2753 This field denotes whether to apply CSD on the preamble 2754 and data portion of the packet. This field is valid for 2755 all transmit packets 2756 0: disable per-chain csd 2757 1: enable per-chain csd 2758 <legal all> 2759 */ 2760 2761 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000038 2762 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_LSB 56 2763 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_MSB 56 2764 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_MASK 0x0100000000000000 2765 2766 2767 /* Description DOT11AX_PE_CHAIN_CSD_EN 2768 2769 This field denotes whether to apply CSD on the packet extension 2770 portion of the packet. This field is valid for all 11ax 2771 packets. 2772 0: disable per-chain csd 2773 1: enable per-chain csd 2774 <legal all> 2775 */ 2776 2777 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000038 2778 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_LSB 57 2779 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_MSB 57 2780 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0200000000000000 2781 2782 2783 /* Description DOT11AX_DL_UL_FLAG 2784 2785 field is only valid for pkt_type == 11ax 2786 2787 <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS> 2788 <enum 1 DL_UL_FLAG_IS_UL> 2789 2790 <legal all> 2791 */ 2792 2793 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000038 2794 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_LSB 58 2795 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_MSB 58 2796 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_MASK 0x0400000000000000 2797 2798 2799 /* Description RESERVED_4A 2800 2801 <legal 0> 2802 */ 2803 2804 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_OFFSET 0x0000000000000038 2805 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_LSB 59 2806 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_MSB 63 2807 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_MASK 0xf800000000000000 2808 2809 2810 /* Description DOT11AX_EXT_RU_START_INDEX 2811 2812 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 2813 == 1 2814 2815 RU Number to which User is assigned 2816 2817 The RU numbering bitwidth is only enough to cover the 20MHz 2818 BW that extended range allows 2819 <legal 0-8> 2820 */ 2821 2822 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000040 2823 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_LSB 0 2824 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_MSB 3 2825 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_MASK 0x000000000000000f 2826 2827 2828 /* Description DOT11AX_EXT_RU_SIZE 2829 2830 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 2831 == 1 or pkt_type == 11be and EHT_duplicate_mode == 1 2832 2833 The size of the RU for this user. 2834 2835 In case of EHT duplicate transmissions, this field indicates 2836 the width of the actual content before duplication, e.g. 2837 a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth 2838 fields indicating 160 MHz and this field set to e-num 4 2839 (RU_484). 2840 2841 <enum 0 RU_26> 2842 <enum 1 RU_52> 2843 <enum 2 RU_106> 2844 <enum 3 RU_242> 2845 <enum 4 RU_484> 2846 <enum 5 RU_996> 2847 <enum 6 RU_1992> 2848 <enum 7 RU_FULLBW> Set when the RU occupies the full packet 2849 bandwidth 2850 <enum 8 RU_FULLBW_240> Set when the RU occupies the full 2851 packet bandwidth 2852 <enum 9 RU_FULLBW_320> Set when the RU occupies the full 2853 packet bandwidth 2854 <enum 10 RU_MULTI_LARGE> DO NOT USE 2855 <enum 11 RU_78> DO NOT USE 2856 <enum 12 RU_132> DO NOT USE 2857 <legal 0-12> 2858 */ 2859 2860 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000040 2861 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_LSB 4 2862 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_MSB 7 2863 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_MASK 0x00000000000000f0 2864 2865 2866 /* Description EHT_DUPLICATE_MODE 2867 2868 Field only valid for pkt_type == 11be 2869 2870 Indicates EHT duplicate modulation 2871 2872 <enum 0 eht_no_duplicate> 2873 <enum 1 eht_2x_duplicate> 2874 <enum 2 eht_4x_duplicate> 2875 2876 <legal 0-2> 2877 */ 2878 2879 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000040 2880 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_LSB 8 2881 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_MSB 9 2882 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_MASK 0x0000000000000300 2883 2884 2885 /* Description HE_SIGB_DCM 2886 2887 Indicates whether dual sub-carrier modulation is applied 2888 to EHT-SIG 2889 <legal all> 2890 */ 2891 2892 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_OFFSET 0x0000000000000040 2893 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_LSB 10 2894 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_MSB 10 2895 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_MASK 0x0000000000000400 2896 2897 2898 /* Description HE_SIGB_0_MCS 2899 2900 Indicates the MCS of EHT-SIG 2901 2902 For details, refer to MCS_TYPE description 2903 <legal all> 2904 */ 2905 2906 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_OFFSET 0x0000000000000040 2907 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_LSB 11 2908 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_MSB 13 2909 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_MASK 0x0000000000003800 2910 2911 2912 /* Description NUM_HE_SIGB_SYM 2913 2914 Indicates the number of EHT-SIG symbols 2915 2916 This field is 0-based with 0 indicating that 1 eht_sig symbol 2917 needs to be transmitted. 2918 <legal all> 2919 */ 2920 2921 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000040 2922 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_LSB 14 2923 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_MSB 18 2924 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_MASK 0x000000000007c000 2925 2926 2927 /* Description REQUIRED_RESPONSE_TIME_SOURCE 2928 2929 <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received 2930 HT Control for sync MLO response 2931 <enum 1 reqd_resp_time_src_is_FW> 2932 Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response 2933 to response 2934 <legal all> 2935 */ 2936 2937 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000040 2938 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_LSB 19 2939 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_MSB 19 2940 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0000000000080000 2941 2942 2943 /* Description RESERVED_5A 2944 2945 <legal 0> 2946 */ 2947 2948 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_OFFSET 0x0000000000000040 2949 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_LSB 20 2950 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_MSB 25 2951 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_MASK 0x0000000003f00000 2952 2953 2954 /* Description U_SIG_PUNCTURE_PATTERN_ENCODING 2955 2956 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO' 2957 to pass on to PDG 2958 <legal 0-29> 2959 */ 2960 2961 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000040 2962 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26 2963 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31 2964 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0x00000000fc000000 2965 2966 2967 /* Description MLO_STA_ID_DETAILS_RX 2968 2969 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass 2970 on to PDG 2971 2972 Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID' 2973 from address search. 2974 2975 See definition of mlo_sta_id_details. 2976 */ 2977 2978 2979 /* Description NSTR_MLO_STA_ID 2980 2981 ID of peer participating in non-STR MLO 2982 */ 2983 2984 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000040 2985 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 32 2986 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 41 2987 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff00000000 2988 2989 2990 /* Description BLOCK_SELF_ML_SYNC 2991 2992 Only valid for TX 2993 2994 When set, this provides an indication to block the peer 2995 for self-link. 2996 */ 2997 2998 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000040 2999 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 42 3000 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 42 3001 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000040000000000 3002 3003 3004 /* Description BLOCK_PARTNER_ML_SYNC 3005 3006 Only valid for TX 3007 3008 When set, this provides an indication to block the peer 3009 for partner links. 3010 */ 3011 3012 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000040 3013 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 43 3014 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 43 3015 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000080000000000 3016 3017 3018 /* Description NSTR_MLO_STA_ID_VALID 3019 3020 All the fields in this TLV are valid only if this bit is 3021 set. 3022 */ 3023 3024 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000040 3025 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 44 3026 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 44 3027 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000100000000000 3028 3029 3030 /* Description RESERVED_0A 3031 3032 <legal 0> 3033 */ 3034 3035 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000040 3036 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 45 3037 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 47 3038 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e00000000000 3039 3040 3041 /* Description REQUIRED_RESPONSE_TIME 3042 3043 When non-zero, indicates that PDG shall pad the response 3044 transmission to the indicated duration (in us) 3045 */ 3046 3047 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000040 3048 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_LSB 48 3049 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_MSB 59 3050 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_MASK 0x0fff000000000000 3051 3052 3053 /* Description DOT11BE_PARAMS_PLACEHOLDER 3054 3055 4 bytes for use as placeholders for 'Dot11be_*' parameters 3056 3057 */ 3058 3059 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000040 3060 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_LSB 60 3061 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_MSB 63 3062 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_MASK 0xf000000000000000 3063 3064 3065 /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW80 3066 3067 Field only valid in case of Response_to_response set to 3068 SU_BA or MU_BA 3069 3070 NOTE: This field is also known as response_to_response_rate_info_pattern_2 3071 in case punctured transmission is enabled. 3072 3073 Used by TXPCU to determine what the transmit rates are for 3074 the response to response transmission in case original 3075 transmission was 80 MHz. 3076 3077 Note: 3078 see field R2R_bw80_active_channel for the BW of this transmission 3079 3080 */ 3081 3082 3083 /* Description RESERVED_0A 3084 3085 3086 <legal 0> 3087 */ 3088 3089 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_OFFSET 0x0000000000000048 3090 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_LSB 0 3091 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_MSB 0 3092 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_MASK 0x0000000000000001 3093 3094 3095 /* Description TX_ANTENNA_SECTOR_CTRL 3096 3097 Sectored transmit antenna 3098 <legal all> 3099 */ 3100 3101 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000048 3102 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_LSB 1 3103 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_MSB 24 3104 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_MASK 0x0000000001fffffe 3105 3106 3107 /* Description PKT_TYPE 3108 3109 Packet type: 3110 <enum 0 dot11a>802.11a PPDU type 3111 <enum 1 dot11b>802.11b PPDU type 3112 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 3113 <enum 3 dot11ac>802.11ac PPDU type 3114 <enum 4 dot11ax>802.11ax PPDU type 3115 <enum 5 dot11ba>802.11ba (WUR) PPDU type 3116 <enum 6 dot11be>802.11be PPDU type 3117 <enum 7 dot11az>802.11az (ranging) PPDU type 3118 <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported 3119 & aborted) 3120 */ 3121 3122 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_OFFSET 0x0000000000000048 3123 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_LSB 25 3124 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_MSB 28 3125 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_MASK 0x000000001e000000 3126 3127 3128 /* Description SMOOTHING 3129 3130 This field is used by PDG to populate the SMOOTHING filed 3131 in the SIG Preamble of the PPDU 3132 <legal 0-1> 3133 */ 3134 3135 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_OFFSET 0x0000000000000048 3136 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_LSB 29 3137 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_MSB 29 3138 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_MASK 0x0000000020000000 3139 3140 3141 /* Description LDPC 3142 3143 When set, use LDPC transmission rates 3144 */ 3145 3146 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_OFFSET 0x0000000000000048 3147 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_LSB 30 3148 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_MSB 30 3149 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_MASK 0x0000000040000000 3150 3151 3152 /* Description STBC 3153 3154 When set, use STBC transmission rates 3155 */ 3156 3157 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_OFFSET 0x0000000000000048 3158 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_LSB 31 3159 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_MSB 31 3160 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_MASK 0x0000000080000000 3161 3162 3163 /* Description ALT_TX_PWR 3164 3165 Coex related AlternativeTransmit parameter 3166 3167 Transmit Power in s6.2 format. 3168 In units of 0.25 dBm 3169 <legal all> 3170 */ 3171 3172 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_OFFSET 0x0000000000000048 3173 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_LSB 32 3174 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_MSB 39 3175 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_MASK 0x000000ff00000000 3176 3177 3178 /* Description ALT_MIN_TX_PWR 3179 3180 Coex related Alternative Transmit parameter 3181 3182 Minimum allowed Transmit Power in s6.2 format. 3183 In units of 0.25 dBm 3184 <legal all> 3185 */ 3186 3187 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_OFFSET 0x0000000000000048 3188 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_LSB 40 3189 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_MSB 47 3190 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_MASK 0x0000ff0000000000 3191 3192 3193 /* Description ALT_NSS 3194 3195 Coex related Alternative Transmit parameter 3196 3197 Number of spatial streams. 3198 3199 <enum 0 1_spatial_stream>Single spatial stream 3200 <enum 1 2_spatial_streams>2 spatial streams 3201 <enum 2 3_spatial_streams>3 spatial streams 3202 <enum 3 4_spatial_streams>4 spatial streams 3203 <enum 4 5_spatial_streams>5 spatial streams 3204 <enum 5 6_spatial_streams>6 spatial streams 3205 <enum 6 7_spatial_streams>7 spatial streams 3206 <enum 7 8_spatial_streams>8 spatial streams 3207 */ 3208 3209 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_OFFSET 0x0000000000000048 3210 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_LSB 48 3211 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_MSB 50 3212 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_MASK 0x0007000000000000 3213 3214 3215 /* Description ALT_TX_CHAIN_MASK 3216 3217 Coex related Alternative Transmit parameter 3218 3219 Chain mask to support up to 8 antennas. 3220 <legal 1-255> 3221 */ 3222 3223 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000048 3224 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_LSB 51 3225 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_MSB 58 3226 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_MASK 0x07f8000000000000 3227 3228 3229 /* Description ALT_BW 3230 3231 Coex related Alternative Transmit parameter 3232 3233 The BW of the upcoming transmission. 3234 3235 <enum 0 20_mhz>20 Mhz BW 3236 <enum 1 40_mhz>40 Mhz BW 3237 <enum 2 80_mhz>80 Mhz BW 3238 <enum 3 160_mhz>160 Mhz BW 3239 <enum 4 320_mhz>320 Mhz BW 3240 <enum 5 240_mhz>240 Mhz BW 3241 */ 3242 3243 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_OFFSET 0x0000000000000048 3244 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_LSB 59 3245 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_MSB 61 3246 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_MASK 0x3800000000000000 3247 3248 3249 /* Description STF_LTF_3DB_BOOST 3250 3251 Boost the STF and LTF power by 3dB in 11a/n/ac packets. 3252 This includes both the legacy preambles and the HT/VHT preambles.0: 3253 disable power boost1: enable power boost 3254 <legal all> 3255 */ 3256 3257 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000048 3258 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_LSB 62 3259 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_MSB 62 3260 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_MASK 0x4000000000000000 3261 3262 3263 /* Description FORCE_EXTRA_SYMBOL 3264 3265 Set to 1 to force an extra OFDM symbol (or symbols) even 3266 if the PPDU encoding process does not result in an extra 3267 OFDM symbol (or symbols) 3268 */ 3269 3270 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000048 3271 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_LSB 63 3272 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_MSB 63 3273 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_MASK 0x8000000000000000 3274 3275 3276 /* Description ALT_RATE_MCS 3277 3278 Coex related Alternative Transmit parameter 3279 3280 For details, refer to MCS_TYPE 3281 Note: This is "rate" in case of 11a/11b 3282 description 3283 <legal all> 3284 */ 3285 3286 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_OFFSET 0x0000000000000050 3287 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_LSB 0 3288 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_MSB 3 3289 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_MASK 0x000000000000000f 3290 3291 3292 /* Description NSS 3293 3294 Number of spatial streams. 3295 3296 <enum 0 1_spatial_stream>Single spatial stream 3297 <enum 1 2_spatial_streams>2 spatial streams 3298 <enum 2 3_spatial_streams>3 spatial streams 3299 <enum 3 4_spatial_streams>4 spatial streams 3300 <enum 4 5_spatial_streams>5 spatial streams 3301 <enum 5 6_spatial_streams>6 spatial streams 3302 <enum 6 7_spatial_streams>7 spatial streams 3303 <enum 7 8_spatial_streams>8 spatial streams 3304 */ 3305 3306 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_OFFSET 0x0000000000000050 3307 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_LSB 4 3308 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_MSB 6 3309 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_MASK 0x0000000000000070 3310 3311 3312 /* Description DPD_ENABLE 3313 3314 DPD enable control 3315 3316 This is needed on a per packet basis 3317 <enum 0 dpd_off> DPD profile not applied to current 3318 packet 3319 <enum 1 dpd_on> DPD profile applied to current packet 3320 if available 3321 <legal 0-1> 3322 3323 This field is not applicable in11ah mode of operation and 3324 is ignored by the HW 3325 */ 3326 3327 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_OFFSET 0x0000000000000050 3328 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_LSB 7 3329 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_MSB 7 3330 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_MASK 0x0000000000000080 3331 3332 3333 /* Description TX_PWR 3334 3335 Transmit Power in s6.2 format. 3336 In units of 0.25 dBm 3337 <legal all> 3338 */ 3339 3340 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_OFFSET 0x0000000000000050 3341 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_LSB 8 3342 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_MSB 15 3343 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_MASK 0x000000000000ff00 3344 3345 3346 /* Description MIN_TX_PWR 3347 3348 Coex related field: 3349 3350 Minimum allowed Transmit Power in s6.2 format. 3351 In units of 0.25 dBm 3352 <legal all> 3353 */ 3354 3355 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_OFFSET 0x0000000000000050 3356 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_LSB 16 3357 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_MSB 23 3358 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_MASK 0x0000000000ff0000 3359 3360 3361 /* Description TX_CHAIN_MASK 3362 3363 Chain mask to support up to 8 antennas. 3364 <legal 1-255> 3365 */ 3366 3367 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_OFFSET 0x0000000000000050 3368 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_LSB 24 3369 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_MSB 31 3370 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_MASK 0x00000000ff000000 3371 3372 3373 /* Description RESERVED_3A 3374 3375 <legal 0> 3376 */ 3377 3378 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_OFFSET 0x0000000000000050 3379 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_LSB 32 3380 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_MSB 39 3381 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_MASK 0x000000ff00000000 3382 3383 3384 /* Description SGI 3385 3386 Field only valid when pkt type is HT or VHT.For 11ax see 3387 field Dot11ax_CP_LTF_size 3388 3389 <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used 3390 for HE 3391 <enum 1 0_4_us_sgi > Legacy short GI. Can also be used 3392 for HE 3393 <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types. 3394 3395 <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types 3396 3397 3398 <legal 0 - 3> 3399 */ 3400 3401 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_OFFSET 0x0000000000000050 3402 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_LSB 40 3403 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_MSB 41 3404 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_MASK 0x0000030000000000 3405 3406 3407 /* Description RATE_MCS 3408 3409 For details, refer to MCS_TYPE description 3410 Note: This is "rate" in case of 11a/11b 3411 3412 <legal all> 3413 */ 3414 3415 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_OFFSET 0x0000000000000050 3416 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_LSB 42 3417 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_MSB 45 3418 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_MASK 0x00003c0000000000 3419 3420 3421 /* Description RESERVED_3B 3422 3423 <legal 0> 3424 */ 3425 3426 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_OFFSET 0x0000000000000050 3427 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_LSB 46 3428 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_MSB 47 3429 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_MASK 0x0000c00000000000 3430 3431 3432 /* Description TX_PWR_1 3433 3434 Default (desired) transmit parameter for the second chain 3435 3436 3437 Transmit Power in s6.2 format. 3438 In units of 0.25 dBm 3439 3440 Note that there is no Min value for this 3441 <legal all> 3442 */ 3443 3444 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_OFFSET 0x0000000000000050 3445 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_LSB 48 3446 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_MSB 55 3447 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_MASK 0x00ff000000000000 3448 3449 3450 /* Description ALT_TX_PWR_1 3451 3452 Alternate (desired) transmit parameter for the second chain 3453 3454 3455 Transmit Power in s6.2 format. 3456 In units of 0.25 dBm 3457 3458 Note that there is no Min value for this 3459 <legal all> 3460 */ 3461 3462 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_OFFSET 0x0000000000000050 3463 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_LSB 56 3464 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_MSB 63 3465 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_MASK 0xff00000000000000 3466 3467 3468 /* Description AGGREGATION 3469 3470 Field only valid in case of pkt_type == 11n 3471 3472 <enum 0 mpdu> Indicates MPDU format. TXPCU will select 3473 this setting if the CBF response only contains a single 3474 segment 3475 <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will 3476 select this setting if the CBF response will contain two 3477 or more segments 3478 <legal 0-1> 3479 */ 3480 3481 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_OFFSET 0x0000000000000058 3482 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_LSB 0 3483 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_MSB 0 3484 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_MASK 0x0000000000000001 3485 3486 3487 /* Description DOT11AX_BSS_COLOR_ID 3488 3489 BSS color of the nextwork to which this STA belongs. 3490 When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id 3491 3492 3493 <legal all> 3494 */ 3495 3496 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000058 3497 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_LSB 1 3498 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_MSB 6 3499 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_MASK 0x000000000000007e 3500 3501 3502 /* Description DOT11AX_SPATIAL_REUSE 3503 3504 This field is only valid for pkt_type == 11ax 3505 3506 Spatial re-use 3507 <legal all> 3508 */ 3509 3510 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000058 3511 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_LSB 7 3512 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_MSB 10 3513 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_MASK 0x0000000000000780 3514 3515 3516 /* Description DOT11AX_CP_LTF_SIZE 3517 3518 field is only valid for pkt_type == 11ax 3519 3520 Indicates the CP and HE-LTF type 3521 3522 <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP 3523 <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP 3524 <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP 3525 <enum 3 FourX_LTF_0_8CP_3_2CP> 3526 When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP 3527 When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note: 3528 In this scenario, Neither DCM nor STBC is applied to HE 3529 data field. 3530 3531 If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0) 3532 0 = 1xLTF + 0.4 usec 3533 1 = 2xLTF + 0.4 usec 3534 2~3 = Reserved 3535 3536 <legal all> 3537 */ 3538 3539 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000058 3540 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_LSB 11 3541 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_MSB 12 3542 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_MASK 0x0000000000001800 3543 3544 3545 /* Description DOT11AX_DCM 3546 3547 field is only valid for pkt_type == 11ax 3548 3549 Indicates whether dual sub-carrier modulation is applied 3550 3551 0: No DCM 3552 1:DCM 3553 <legal all> 3554 */ 3555 3556 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_OFFSET 0x0000000000000058 3557 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_LSB 13 3558 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_MSB 13 3559 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_MASK 0x0000000000002000 3560 3561 3562 /* Description DOT11AX_DOPPLER_INDICATION 3563 3564 field is only valid for pkt_type == 11ax 3565 3566 0: No Doppler support 3567 1: Doppler support 3568 <legal all> 3569 */ 3570 3571 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000058 3572 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_LSB 14 3573 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_MSB 14 3574 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_MASK 0x0000000000004000 3575 3576 3577 /* Description DOT11AX_SU_EXTENDED 3578 3579 field is only valid for pkt_type == 11ax OR pkt_type == 3580 11be 3581 3582 When set, the 11ax or 11be frame is of the extended range 3583 format 3584 <legal all> 3585 */ 3586 3587 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000058 3588 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_LSB 15 3589 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_MSB 15 3590 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_MASK 0x0000000000008000 3591 3592 3593 /* Description DOT11AX_MIN_PACKET_EXTENSION 3594 3595 field is only valid for pkt_type == 11ax OR pkt_type == 3596 11be 3597 3598 The min packet extension duration for this user. 3599 0: no extension 3600 1: 8us 3601 2: 16 us 3602 3: 20 us (only for .11be) 3603 <legal 0-3> 3604 */ 3605 3606 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000058 3607 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_LSB 16 3608 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_MSB 17 3609 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0000000000030000 3610 3611 3612 /* Description DOT11AX_PE_NSS 3613 3614 Number of active spatial streams during packet extension. 3615 3616 3617 <enum 0 1_spatial_stream>Single spatial stream 3618 <enum 1 2_spatial_streams>2 spatial streams 3619 <enum 2 3_spatial_streams>3 spatial streams 3620 <enum 3 4_spatial_streams>4 spatial streams 3621 <enum 4 5_spatial_streams>5 spatial streams 3622 <enum 5 6_spatial_streams>6 spatial streams 3623 <enum 6 7_spatial_streams>7 spatial streams 3624 <enum 7 8_spatial_streams>8 spatial streams 3625 */ 3626 3627 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_OFFSET 0x0000000000000058 3628 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_LSB 18 3629 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_MSB 20 3630 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_MASK 0x00000000001c0000 3631 3632 3633 /* Description DOT11AX_PE_CONTENT 3634 3635 Content of packet extension. Valid for all 11ax packets 3636 having packet extension 3637 3638 0-he_ltf, 1-last_data_symbol 3639 <legal all> 3640 */ 3641 3642 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000058 3643 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_LSB 21 3644 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_MSB 21 3645 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_MASK 0x0000000000200000 3646 3647 3648 /* Description DOT11AX_PE_LTF_SIZE 3649 3650 LTF size to be used during packet extention. . This field 3651 is valid for both FTM and non-FTM packets. 3652 0-1x 3653 1-2x (unsupported un HWK-1) 3654 2-4x (unsupported un HWK-1) 3655 <legal all> 3656 */ 3657 3658 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000058 3659 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_LSB 22 3660 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_MSB 23 3661 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_MASK 0x0000000000c00000 3662 3663 3664 /* Description DOT11AX_CHAIN_CSD_EN 3665 3666 This field denotes whether to apply CSD on the preamble 3667 and data portion of the packet. This field is valid for 3668 all transmit packets 3669 0: disable per-chain csd 3670 1: enable per-chain csd 3671 <legal all> 3672 */ 3673 3674 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000058 3675 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_LSB 24 3676 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_MSB 24 3677 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_MASK 0x0000000001000000 3678 3679 3680 /* Description DOT11AX_PE_CHAIN_CSD_EN 3681 3682 This field denotes whether to apply CSD on the packet extension 3683 portion of the packet. This field is valid for all 11ax 3684 packets. 3685 0: disable per-chain csd 3686 1: enable per-chain csd 3687 <legal all> 3688 */ 3689 3690 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000058 3691 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_LSB 25 3692 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_MSB 25 3693 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0000000002000000 3694 3695 3696 /* Description DOT11AX_DL_UL_FLAG 3697 3698 field is only valid for pkt_type == 11ax 3699 3700 <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS> 3701 <enum 1 DL_UL_FLAG_IS_UL> 3702 3703 <legal all> 3704 */ 3705 3706 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000058 3707 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_LSB 26 3708 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_MSB 26 3709 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_MASK 0x0000000004000000 3710 3711 3712 /* Description RESERVED_4A 3713 3714 <legal 0> 3715 */ 3716 3717 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_OFFSET 0x0000000000000058 3718 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_LSB 27 3719 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_MSB 31 3720 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_MASK 0x00000000f8000000 3721 3722 3723 /* Description DOT11AX_EXT_RU_START_INDEX 3724 3725 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 3726 == 1 3727 3728 RU Number to which User is assigned 3729 3730 The RU numbering bitwidth is only enough to cover the 20MHz 3731 BW that extended range allows 3732 <legal 0-8> 3733 */ 3734 3735 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000058 3736 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_LSB 32 3737 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_MSB 35 3738 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_MASK 0x0000000f00000000 3739 3740 3741 /* Description DOT11AX_EXT_RU_SIZE 3742 3743 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 3744 == 1 or pkt_type == 11be and EHT_duplicate_mode == 1 3745 3746 The size of the RU for this user. 3747 3748 In case of EHT duplicate transmissions, this field indicates 3749 the width of the actual content before duplication, e.g. 3750 a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth 3751 fields indicating 160 MHz and this field set to e-num 4 3752 (RU_484). 3753 3754 <enum 0 RU_26> 3755 <enum 1 RU_52> 3756 <enum 2 RU_106> 3757 <enum 3 RU_242> 3758 <enum 4 RU_484> 3759 <enum 5 RU_996> 3760 <enum 6 RU_1992> 3761 <enum 7 RU_FULLBW> Set when the RU occupies the full packet 3762 bandwidth 3763 <enum 8 RU_FULLBW_240> Set when the RU occupies the full 3764 packet bandwidth 3765 <enum 9 RU_FULLBW_320> Set when the RU occupies the full 3766 packet bandwidth 3767 <enum 10 RU_MULTI_LARGE> DO NOT USE 3768 <enum 11 RU_78> DO NOT USE 3769 <enum 12 RU_132> DO NOT USE 3770 <legal 0-12> 3771 */ 3772 3773 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000058 3774 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_LSB 36 3775 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_MSB 39 3776 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_MASK 0x000000f000000000 3777 3778 3779 /* Description EHT_DUPLICATE_MODE 3780 3781 Field only valid for pkt_type == 11be 3782 3783 Indicates EHT duplicate modulation 3784 3785 <enum 0 eht_no_duplicate> 3786 <enum 1 eht_2x_duplicate> 3787 <enum 2 eht_4x_duplicate> 3788 3789 <legal 0-2> 3790 */ 3791 3792 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000058 3793 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_LSB 40 3794 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_MSB 41 3795 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_MASK 0x0000030000000000 3796 3797 3798 /* Description HE_SIGB_DCM 3799 3800 Indicates whether dual sub-carrier modulation is applied 3801 to EHT-SIG 3802 <legal all> 3803 */ 3804 3805 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_OFFSET 0x0000000000000058 3806 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_LSB 42 3807 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_MSB 42 3808 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_MASK 0x0000040000000000 3809 3810 3811 /* Description HE_SIGB_0_MCS 3812 3813 Indicates the MCS of EHT-SIG 3814 3815 For details, refer to MCS_TYPE description 3816 <legal all> 3817 */ 3818 3819 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_OFFSET 0x0000000000000058 3820 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_LSB 43 3821 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_MSB 45 3822 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_MASK 0x0000380000000000 3823 3824 3825 /* Description NUM_HE_SIGB_SYM 3826 3827 Indicates the number of EHT-SIG symbols 3828 3829 This field is 0-based with 0 indicating that 1 eht_sig symbol 3830 needs to be transmitted. 3831 <legal all> 3832 */ 3833 3834 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000058 3835 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_LSB 46 3836 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_MSB 50 3837 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_MASK 0x0007c00000000000 3838 3839 3840 /* Description REQUIRED_RESPONSE_TIME_SOURCE 3841 3842 <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received 3843 HT Control for sync MLO response 3844 <enum 1 reqd_resp_time_src_is_FW> 3845 Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response 3846 to response 3847 <legal all> 3848 */ 3849 3850 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000058 3851 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_LSB 51 3852 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_MSB 51 3853 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0008000000000000 3854 3855 3856 /* Description RESERVED_5A 3857 3858 <legal 0> 3859 */ 3860 3861 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_OFFSET 0x0000000000000058 3862 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_LSB 52 3863 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_MSB 57 3864 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_MASK 0x03f0000000000000 3865 3866 3867 /* Description U_SIG_PUNCTURE_PATTERN_ENCODING 3868 3869 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO' 3870 to pass on to PDG 3871 <legal 0-29> 3872 */ 3873 3874 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000058 3875 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 58 3876 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 63 3877 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc00000000000000 3878 3879 3880 /* Description MLO_STA_ID_DETAILS_RX 3881 3882 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass 3883 on to PDG 3884 3885 Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID' 3886 from address search. 3887 3888 See definition of mlo_sta_id_details. 3889 */ 3890 3891 3892 /* Description NSTR_MLO_STA_ID 3893 3894 ID of peer participating in non-STR MLO 3895 */ 3896 3897 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000060 3898 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0 3899 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9 3900 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x00000000000003ff 3901 3902 3903 /* Description BLOCK_SELF_ML_SYNC 3904 3905 Only valid for TX 3906 3907 When set, this provides an indication to block the peer 3908 for self-link. 3909 */ 3910 3911 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000060 3912 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10 3913 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10 3914 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000000000000400 3915 3916 3917 /* Description BLOCK_PARTNER_ML_SYNC 3918 3919 Only valid for TX 3920 3921 When set, this provides an indication to block the peer 3922 for partner links. 3923 */ 3924 3925 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000060 3926 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11 3927 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11 3928 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000000000000800 3929 3930 3931 /* Description NSTR_MLO_STA_ID_VALID 3932 3933 All the fields in this TLV are valid only if this bit is 3934 set. 3935 */ 3936 3937 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000060 3938 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12 3939 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12 3940 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000000000001000 3941 3942 3943 /* Description RESERVED_0A 3944 3945 <legal 0> 3946 */ 3947 3948 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000060 3949 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13 3950 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15 3951 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x000000000000e000 3952 3953 3954 /* Description REQUIRED_RESPONSE_TIME 3955 3956 When non-zero, indicates that PDG shall pad the response 3957 transmission to the indicated duration (in us) 3958 */ 3959 3960 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000060 3961 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_LSB 16 3962 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_MSB 27 3963 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_MASK 0x000000000fff0000 3964 3965 3966 /* Description DOT11BE_PARAMS_PLACEHOLDER 3967 3968 4 bytes for use as placeholders for 'Dot11be_*' parameters 3969 3970 */ 3971 3972 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000060 3973 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_LSB 28 3974 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_MSB 31 3975 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_MASK 0x00000000f0000000 3976 3977 3978 /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW160 3979 3980 Field only valid in case of Response_to_response set to 3981 SU_BA or MU_BA 3982 3983 NOTE: This field is also known as response_to_response_rate_info_pattern_3 3984 in case punctured transmission is enabled. 3985 3986 Used by TXPCU to determine what the transmit rates are for 3987 the response to response transmission in case original 3988 transmission was 160 MHz. 3989 3990 Note: 3991 see field R2R_bw160_active_channel for the BW of this transmission 3992 3993 */ 3994 3995 3996 /* Description RESERVED_0A 3997 3998 3999 <legal 0> 4000 */ 4001 4002 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_OFFSET 0x0000000000000060 4003 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_LSB 32 4004 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_MSB 32 4005 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_MASK 0x0000000100000000 4006 4007 4008 /* Description TX_ANTENNA_SECTOR_CTRL 4009 4010 Sectored transmit antenna 4011 <legal all> 4012 */ 4013 4014 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000060 4015 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_LSB 33 4016 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_MSB 56 4017 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_MASK 0x01fffffe00000000 4018 4019 4020 /* Description PKT_TYPE 4021 4022 Packet type: 4023 <enum 0 dot11a>802.11a PPDU type 4024 <enum 1 dot11b>802.11b PPDU type 4025 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 4026 <enum 3 dot11ac>802.11ac PPDU type 4027 <enum 4 dot11ax>802.11ax PPDU type 4028 <enum 5 dot11ba>802.11ba (WUR) PPDU type 4029 <enum 6 dot11be>802.11be PPDU type 4030 <enum 7 dot11az>802.11az (ranging) PPDU type 4031 <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported 4032 & aborted) 4033 */ 4034 4035 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_OFFSET 0x0000000000000060 4036 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_LSB 57 4037 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_MSB 60 4038 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_MASK 0x1e00000000000000 4039 4040 4041 /* Description SMOOTHING 4042 4043 This field is used by PDG to populate the SMOOTHING filed 4044 in the SIG Preamble of the PPDU 4045 <legal 0-1> 4046 */ 4047 4048 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_OFFSET 0x0000000000000060 4049 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_LSB 61 4050 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_MSB 61 4051 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_MASK 0x2000000000000000 4052 4053 4054 /* Description LDPC 4055 4056 When set, use LDPC transmission rates 4057 */ 4058 4059 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_OFFSET 0x0000000000000060 4060 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_LSB 62 4061 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_MSB 62 4062 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_MASK 0x4000000000000000 4063 4064 4065 /* Description STBC 4066 4067 When set, use STBC transmission rates 4068 */ 4069 4070 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_OFFSET 0x0000000000000060 4071 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_LSB 63 4072 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_MSB 63 4073 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_MASK 0x8000000000000000 4074 4075 4076 /* Description ALT_TX_PWR 4077 4078 Coex related AlternativeTransmit parameter 4079 4080 Transmit Power in s6.2 format. 4081 In units of 0.25 dBm 4082 <legal all> 4083 */ 4084 4085 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_OFFSET 0x0000000000000068 4086 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_LSB 0 4087 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_MSB 7 4088 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_MASK 0x00000000000000ff 4089 4090 4091 /* Description ALT_MIN_TX_PWR 4092 4093 Coex related Alternative Transmit parameter 4094 4095 Minimum allowed Transmit Power in s6.2 format. 4096 In units of 0.25 dBm 4097 <legal all> 4098 */ 4099 4100 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_OFFSET 0x0000000000000068 4101 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_LSB 8 4102 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_MSB 15 4103 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_MASK 0x000000000000ff00 4104 4105 4106 /* Description ALT_NSS 4107 4108 Coex related Alternative Transmit parameter 4109 4110 Number of spatial streams. 4111 4112 <enum 0 1_spatial_stream>Single spatial stream 4113 <enum 1 2_spatial_streams>2 spatial streams 4114 <enum 2 3_spatial_streams>3 spatial streams 4115 <enum 3 4_spatial_streams>4 spatial streams 4116 <enum 4 5_spatial_streams>5 spatial streams 4117 <enum 5 6_spatial_streams>6 spatial streams 4118 <enum 6 7_spatial_streams>7 spatial streams 4119 <enum 7 8_spatial_streams>8 spatial streams 4120 */ 4121 4122 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_OFFSET 0x0000000000000068 4123 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_LSB 16 4124 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_MSB 18 4125 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_MASK 0x0000000000070000 4126 4127 4128 /* Description ALT_TX_CHAIN_MASK 4129 4130 Coex related Alternative Transmit parameter 4131 4132 Chain mask to support up to 8 antennas. 4133 <legal 1-255> 4134 */ 4135 4136 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000068 4137 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_LSB 19 4138 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_MSB 26 4139 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_MASK 0x0000000007f80000 4140 4141 4142 /* Description ALT_BW 4143 4144 Coex related Alternative Transmit parameter 4145 4146 The BW of the upcoming transmission. 4147 4148 <enum 0 20_mhz>20 Mhz BW 4149 <enum 1 40_mhz>40 Mhz BW 4150 <enum 2 80_mhz>80 Mhz BW 4151 <enum 3 160_mhz>160 Mhz BW 4152 <enum 4 320_mhz>320 Mhz BW 4153 <enum 5 240_mhz>240 Mhz BW 4154 */ 4155 4156 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_OFFSET 0x0000000000000068 4157 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_LSB 27 4158 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_MSB 29 4159 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_MASK 0x0000000038000000 4160 4161 4162 /* Description STF_LTF_3DB_BOOST 4163 4164 Boost the STF and LTF power by 3dB in 11a/n/ac packets. 4165 This includes both the legacy preambles and the HT/VHT preambles.0: 4166 disable power boost1: enable power boost 4167 <legal all> 4168 */ 4169 4170 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000068 4171 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_LSB 30 4172 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_MSB 30 4173 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_MASK 0x0000000040000000 4174 4175 4176 /* Description FORCE_EXTRA_SYMBOL 4177 4178 Set to 1 to force an extra OFDM symbol (or symbols) even 4179 if the PPDU encoding process does not result in an extra 4180 OFDM symbol (or symbols) 4181 */ 4182 4183 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000068 4184 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_LSB 31 4185 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_MSB 31 4186 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_MASK 0x0000000080000000 4187 4188 4189 /* Description ALT_RATE_MCS 4190 4191 Coex related Alternative Transmit parameter 4192 4193 For details, refer to MCS_TYPE 4194 Note: This is "rate" in case of 11a/11b 4195 description 4196 <legal all> 4197 */ 4198 4199 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_OFFSET 0x0000000000000068 4200 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_LSB 32 4201 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_MSB 35 4202 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_MASK 0x0000000f00000000 4203 4204 4205 /* Description NSS 4206 4207 Number of spatial streams. 4208 4209 <enum 0 1_spatial_stream>Single spatial stream 4210 <enum 1 2_spatial_streams>2 spatial streams 4211 <enum 2 3_spatial_streams>3 spatial streams 4212 <enum 3 4_spatial_streams>4 spatial streams 4213 <enum 4 5_spatial_streams>5 spatial streams 4214 <enum 5 6_spatial_streams>6 spatial streams 4215 <enum 6 7_spatial_streams>7 spatial streams 4216 <enum 7 8_spatial_streams>8 spatial streams 4217 */ 4218 4219 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_OFFSET 0x0000000000000068 4220 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_LSB 36 4221 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_MSB 38 4222 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_MASK 0x0000007000000000 4223 4224 4225 /* Description DPD_ENABLE 4226 4227 DPD enable control 4228 4229 This is needed on a per packet basis 4230 <enum 0 dpd_off> DPD profile not applied to current 4231 packet 4232 <enum 1 dpd_on> DPD profile applied to current packet 4233 if available 4234 <legal 0-1> 4235 4236 This field is not applicable in11ah mode of operation and 4237 is ignored by the HW 4238 */ 4239 4240 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_OFFSET 0x0000000000000068 4241 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_LSB 39 4242 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_MSB 39 4243 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_MASK 0x0000008000000000 4244 4245 4246 /* Description TX_PWR 4247 4248 Transmit Power in s6.2 format. 4249 In units of 0.25 dBm 4250 <legal all> 4251 */ 4252 4253 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_OFFSET 0x0000000000000068 4254 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_LSB 40 4255 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_MSB 47 4256 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_MASK 0x0000ff0000000000 4257 4258 4259 /* Description MIN_TX_PWR 4260 4261 Coex related field: 4262 4263 Minimum allowed Transmit Power in s6.2 format. 4264 In units of 0.25 dBm 4265 <legal all> 4266 */ 4267 4268 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_OFFSET 0x0000000000000068 4269 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_LSB 48 4270 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_MSB 55 4271 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_MASK 0x00ff000000000000 4272 4273 4274 /* Description TX_CHAIN_MASK 4275 4276 Chain mask to support up to 8 antennas. 4277 <legal 1-255> 4278 */ 4279 4280 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_OFFSET 0x0000000000000068 4281 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_LSB 56 4282 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_MSB 63 4283 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_MASK 0xff00000000000000 4284 4285 4286 /* Description RESERVED_3A 4287 4288 <legal 0> 4289 */ 4290 4291 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_OFFSET 0x0000000000000070 4292 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_LSB 0 4293 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_MSB 7 4294 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_MASK 0x00000000000000ff 4295 4296 4297 /* Description SGI 4298 4299 Field only valid when pkt type is HT or VHT.For 11ax see 4300 field Dot11ax_CP_LTF_size 4301 4302 <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used 4303 for HE 4304 <enum 1 0_4_us_sgi > Legacy short GI. Can also be used 4305 for HE 4306 <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types. 4307 4308 <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types 4309 4310 4311 <legal 0 - 3> 4312 */ 4313 4314 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_OFFSET 0x0000000000000070 4315 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_LSB 8 4316 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_MSB 9 4317 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_MASK 0x0000000000000300 4318 4319 4320 /* Description RATE_MCS 4321 4322 For details, refer to MCS_TYPE description 4323 Note: This is "rate" in case of 11a/11b 4324 4325 <legal all> 4326 */ 4327 4328 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_OFFSET 0x0000000000000070 4329 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_LSB 10 4330 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_MSB 13 4331 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_MASK 0x0000000000003c00 4332 4333 4334 /* Description RESERVED_3B 4335 4336 <legal 0> 4337 */ 4338 4339 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_OFFSET 0x0000000000000070 4340 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_LSB 14 4341 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_MSB 15 4342 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_MASK 0x000000000000c000 4343 4344 4345 /* Description TX_PWR_1 4346 4347 Default (desired) transmit parameter for the second chain 4348 4349 4350 Transmit Power in s6.2 format. 4351 In units of 0.25 dBm 4352 4353 Note that there is no Min value for this 4354 <legal all> 4355 */ 4356 4357 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_OFFSET 0x0000000000000070 4358 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_LSB 16 4359 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_MSB 23 4360 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_MASK 0x0000000000ff0000 4361 4362 4363 /* Description ALT_TX_PWR_1 4364 4365 Alternate (desired) transmit parameter for the second chain 4366 4367 4368 Transmit Power in s6.2 format. 4369 In units of 0.25 dBm 4370 4371 Note that there is no Min value for this 4372 <legal all> 4373 */ 4374 4375 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_OFFSET 0x0000000000000070 4376 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_LSB 24 4377 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_MSB 31 4378 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_MASK 0x00000000ff000000 4379 4380 4381 /* Description AGGREGATION 4382 4383 Field only valid in case of pkt_type == 11n 4384 4385 <enum 0 mpdu> Indicates MPDU format. TXPCU will select 4386 this setting if the CBF response only contains a single 4387 segment 4388 <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will 4389 select this setting if the CBF response will contain two 4390 or more segments 4391 <legal 0-1> 4392 */ 4393 4394 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_OFFSET 0x0000000000000070 4395 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_LSB 32 4396 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_MSB 32 4397 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_MASK 0x0000000100000000 4398 4399 4400 /* Description DOT11AX_BSS_COLOR_ID 4401 4402 BSS color of the nextwork to which this STA belongs. 4403 When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id 4404 4405 4406 <legal all> 4407 */ 4408 4409 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000070 4410 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_LSB 33 4411 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_MSB 38 4412 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_MASK 0x0000007e00000000 4413 4414 4415 /* Description DOT11AX_SPATIAL_REUSE 4416 4417 This field is only valid for pkt_type == 11ax 4418 4419 Spatial re-use 4420 <legal all> 4421 */ 4422 4423 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000070 4424 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_LSB 39 4425 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_MSB 42 4426 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_MASK 0x0000078000000000 4427 4428 4429 /* Description DOT11AX_CP_LTF_SIZE 4430 4431 field is only valid for pkt_type == 11ax 4432 4433 Indicates the CP and HE-LTF type 4434 4435 <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP 4436 <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP 4437 <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP 4438 <enum 3 FourX_LTF_0_8CP_3_2CP> 4439 When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP 4440 When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note: 4441 In this scenario, Neither DCM nor STBC is applied to HE 4442 data field. 4443 4444 If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0) 4445 0 = 1xLTF + 0.4 usec 4446 1 = 2xLTF + 0.4 usec 4447 2~3 = Reserved 4448 4449 <legal all> 4450 */ 4451 4452 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000070 4453 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_LSB 43 4454 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_MSB 44 4455 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_MASK 0x0000180000000000 4456 4457 4458 /* Description DOT11AX_DCM 4459 4460 field is only valid for pkt_type == 11ax 4461 4462 Indicates whether dual sub-carrier modulation is applied 4463 4464 0: No DCM 4465 1:DCM 4466 <legal all> 4467 */ 4468 4469 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_OFFSET 0x0000000000000070 4470 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_LSB 45 4471 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_MSB 45 4472 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_MASK 0x0000200000000000 4473 4474 4475 /* Description DOT11AX_DOPPLER_INDICATION 4476 4477 field is only valid for pkt_type == 11ax 4478 4479 0: No Doppler support 4480 1: Doppler support 4481 <legal all> 4482 */ 4483 4484 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000070 4485 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_LSB 46 4486 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_MSB 46 4487 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_MASK 0x0000400000000000 4488 4489 4490 /* Description DOT11AX_SU_EXTENDED 4491 4492 field is only valid for pkt_type == 11ax OR pkt_type == 4493 11be 4494 4495 When set, the 11ax or 11be frame is of the extended range 4496 format 4497 <legal all> 4498 */ 4499 4500 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000070 4501 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_LSB 47 4502 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_MSB 47 4503 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_MASK 0x0000800000000000 4504 4505 4506 /* Description DOT11AX_MIN_PACKET_EXTENSION 4507 4508 field is only valid for pkt_type == 11ax OR pkt_type == 4509 11be 4510 4511 The min packet extension duration for this user. 4512 0: no extension 4513 1: 8us 4514 2: 16 us 4515 3: 20 us (only for .11be) 4516 <legal 0-3> 4517 */ 4518 4519 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000070 4520 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_LSB 48 4521 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_MSB 49 4522 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0003000000000000 4523 4524 4525 /* Description DOT11AX_PE_NSS 4526 4527 Number of active spatial streams during packet extension. 4528 4529 4530 <enum 0 1_spatial_stream>Single spatial stream 4531 <enum 1 2_spatial_streams>2 spatial streams 4532 <enum 2 3_spatial_streams>3 spatial streams 4533 <enum 3 4_spatial_streams>4 spatial streams 4534 <enum 4 5_spatial_streams>5 spatial streams 4535 <enum 5 6_spatial_streams>6 spatial streams 4536 <enum 6 7_spatial_streams>7 spatial streams 4537 <enum 7 8_spatial_streams>8 spatial streams 4538 */ 4539 4540 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_OFFSET 0x0000000000000070 4541 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_LSB 50 4542 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_MSB 52 4543 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_MASK 0x001c000000000000 4544 4545 4546 /* Description DOT11AX_PE_CONTENT 4547 4548 Content of packet extension. Valid for all 11ax packets 4549 having packet extension 4550 4551 0-he_ltf, 1-last_data_symbol 4552 <legal all> 4553 */ 4554 4555 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000070 4556 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_LSB 53 4557 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_MSB 53 4558 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_MASK 0x0020000000000000 4559 4560 4561 /* Description DOT11AX_PE_LTF_SIZE 4562 4563 LTF size to be used during packet extention. . This field 4564 is valid for both FTM and non-FTM packets. 4565 0-1x 4566 1-2x (unsupported un HWK-1) 4567 2-4x (unsupported un HWK-1) 4568 <legal all> 4569 */ 4570 4571 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000070 4572 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_LSB 54 4573 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_MSB 55 4574 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_MASK 0x00c0000000000000 4575 4576 4577 /* Description DOT11AX_CHAIN_CSD_EN 4578 4579 This field denotes whether to apply CSD on the preamble 4580 and data portion of the packet. This field is valid for 4581 all transmit packets 4582 0: disable per-chain csd 4583 1: enable per-chain csd 4584 <legal all> 4585 */ 4586 4587 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000070 4588 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_LSB 56 4589 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_MSB 56 4590 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_MASK 0x0100000000000000 4591 4592 4593 /* Description DOT11AX_PE_CHAIN_CSD_EN 4594 4595 This field denotes whether to apply CSD on the packet extension 4596 portion of the packet. This field is valid for all 11ax 4597 packets. 4598 0: disable per-chain csd 4599 1: enable per-chain csd 4600 <legal all> 4601 */ 4602 4603 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000070 4604 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_LSB 57 4605 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_MSB 57 4606 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0200000000000000 4607 4608 4609 /* Description DOT11AX_DL_UL_FLAG 4610 4611 field is only valid for pkt_type == 11ax 4612 4613 <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS> 4614 <enum 1 DL_UL_FLAG_IS_UL> 4615 4616 <legal all> 4617 */ 4618 4619 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000070 4620 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_LSB 58 4621 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_MSB 58 4622 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_MASK 0x0400000000000000 4623 4624 4625 /* Description RESERVED_4A 4626 4627 <legal 0> 4628 */ 4629 4630 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_OFFSET 0x0000000000000070 4631 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_LSB 59 4632 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_MSB 63 4633 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_MASK 0xf800000000000000 4634 4635 4636 /* Description DOT11AX_EXT_RU_START_INDEX 4637 4638 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 4639 == 1 4640 4641 RU Number to which User is assigned 4642 4643 The RU numbering bitwidth is only enough to cover the 20MHz 4644 BW that extended range allows 4645 <legal 0-8> 4646 */ 4647 4648 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000078 4649 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_LSB 0 4650 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_MSB 3 4651 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_MASK 0x000000000000000f 4652 4653 4654 /* Description DOT11AX_EXT_RU_SIZE 4655 4656 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 4657 == 1 or pkt_type == 11be and EHT_duplicate_mode == 1 4658 4659 The size of the RU for this user. 4660 4661 In case of EHT duplicate transmissions, this field indicates 4662 the width of the actual content before duplication, e.g. 4663 a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth 4664 fields indicating 160 MHz and this field set to e-num 4 4665 (RU_484). 4666 4667 <enum 0 RU_26> 4668 <enum 1 RU_52> 4669 <enum 2 RU_106> 4670 <enum 3 RU_242> 4671 <enum 4 RU_484> 4672 <enum 5 RU_996> 4673 <enum 6 RU_1992> 4674 <enum 7 RU_FULLBW> Set when the RU occupies the full packet 4675 bandwidth 4676 <enum 8 RU_FULLBW_240> Set when the RU occupies the full 4677 packet bandwidth 4678 <enum 9 RU_FULLBW_320> Set when the RU occupies the full 4679 packet bandwidth 4680 <enum 10 RU_MULTI_LARGE> DO NOT USE 4681 <enum 11 RU_78> DO NOT USE 4682 <enum 12 RU_132> DO NOT USE 4683 <legal 0-12> 4684 */ 4685 4686 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000078 4687 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_LSB 4 4688 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_MSB 7 4689 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_MASK 0x00000000000000f0 4690 4691 4692 /* Description EHT_DUPLICATE_MODE 4693 4694 Field only valid for pkt_type == 11be 4695 4696 Indicates EHT duplicate modulation 4697 4698 <enum 0 eht_no_duplicate> 4699 <enum 1 eht_2x_duplicate> 4700 <enum 2 eht_4x_duplicate> 4701 4702 <legal 0-2> 4703 */ 4704 4705 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000078 4706 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_LSB 8 4707 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_MSB 9 4708 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_MASK 0x0000000000000300 4709 4710 4711 /* Description HE_SIGB_DCM 4712 4713 Indicates whether dual sub-carrier modulation is applied 4714 to EHT-SIG 4715 <legal all> 4716 */ 4717 4718 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_OFFSET 0x0000000000000078 4719 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_LSB 10 4720 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_MSB 10 4721 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_MASK 0x0000000000000400 4722 4723 4724 /* Description HE_SIGB_0_MCS 4725 4726 Indicates the MCS of EHT-SIG 4727 4728 For details, refer to MCS_TYPE description 4729 <legal all> 4730 */ 4731 4732 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_OFFSET 0x0000000000000078 4733 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_LSB 11 4734 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_MSB 13 4735 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_MASK 0x0000000000003800 4736 4737 4738 /* Description NUM_HE_SIGB_SYM 4739 4740 Indicates the number of EHT-SIG symbols 4741 4742 This field is 0-based with 0 indicating that 1 eht_sig symbol 4743 needs to be transmitted. 4744 <legal all> 4745 */ 4746 4747 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000078 4748 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_LSB 14 4749 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_MSB 18 4750 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_MASK 0x000000000007c000 4751 4752 4753 /* Description REQUIRED_RESPONSE_TIME_SOURCE 4754 4755 <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received 4756 HT Control for sync MLO response 4757 <enum 1 reqd_resp_time_src_is_FW> 4758 Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response 4759 to response 4760 <legal all> 4761 */ 4762 4763 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000078 4764 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_LSB 19 4765 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_MSB 19 4766 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0000000000080000 4767 4768 4769 /* Description RESERVED_5A 4770 4771 <legal 0> 4772 */ 4773 4774 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_OFFSET 0x0000000000000078 4775 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_LSB 20 4776 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_MSB 25 4777 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_MASK 0x0000000003f00000 4778 4779 4780 /* Description U_SIG_PUNCTURE_PATTERN_ENCODING 4781 4782 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO' 4783 to pass on to PDG 4784 <legal 0-29> 4785 */ 4786 4787 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000078 4788 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26 4789 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31 4790 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0x00000000fc000000 4791 4792 4793 /* Description MLO_STA_ID_DETAILS_RX 4794 4795 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass 4796 on to PDG 4797 4798 Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID' 4799 from address search. 4800 4801 See definition of mlo_sta_id_details. 4802 */ 4803 4804 4805 /* Description NSTR_MLO_STA_ID 4806 4807 ID of peer participating in non-STR MLO 4808 */ 4809 4810 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000078 4811 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 32 4812 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 41 4813 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff00000000 4814 4815 4816 /* Description BLOCK_SELF_ML_SYNC 4817 4818 Only valid for TX 4819 4820 When set, this provides an indication to block the peer 4821 for self-link. 4822 */ 4823 4824 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000078 4825 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 42 4826 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 42 4827 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000040000000000 4828 4829 4830 /* Description BLOCK_PARTNER_ML_SYNC 4831 4832 Only valid for TX 4833 4834 When set, this provides an indication to block the peer 4835 for partner links. 4836 */ 4837 4838 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000078 4839 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 43 4840 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 43 4841 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000080000000000 4842 4843 4844 /* Description NSTR_MLO_STA_ID_VALID 4845 4846 All the fields in this TLV are valid only if this bit is 4847 set. 4848 */ 4849 4850 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000078 4851 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 44 4852 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 44 4853 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000100000000000 4854 4855 4856 /* Description RESERVED_0A 4857 4858 <legal 0> 4859 */ 4860 4861 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000078 4862 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 45 4863 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 47 4864 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e00000000000 4865 4866 4867 /* Description REQUIRED_RESPONSE_TIME 4868 4869 When non-zero, indicates that PDG shall pad the response 4870 transmission to the indicated duration (in us) 4871 */ 4872 4873 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000078 4874 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_LSB 48 4875 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_MSB 59 4876 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_MASK 0x0fff000000000000 4877 4878 4879 /* Description DOT11BE_PARAMS_PLACEHOLDER 4880 4881 4 bytes for use as placeholders for 'Dot11be_*' parameters 4882 4883 */ 4884 4885 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000078 4886 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_LSB 60 4887 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_MSB 63 4888 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_MASK 0xf000000000000000 4889 4890 4891 /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW240 4892 4893 Field only valid in case of Response_to_response set to 4894 SU_BA or MU_BA 4895 4896 NOTE: This field is also known as response_to_response_rate_info_pattern_4 4897 in case punctured transmission is enabled. 4898 4899 Used by TXPCU to determine what the transmit rates are for 4900 the response to response transmission in case original 4901 transmission was 240 MHz. 4902 4903 Note: 4904 see field R2R_bw240_active_channel for the BW of this transmission 4905 4906 */ 4907 4908 4909 /* Description RESERVED_0A 4910 4911 4912 <legal 0> 4913 */ 4914 4915 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_OFFSET 0x0000000000000080 4916 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_LSB 0 4917 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_MSB 0 4918 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_MASK 0x0000000000000001 4919 4920 4921 /* Description TX_ANTENNA_SECTOR_CTRL 4922 4923 Sectored transmit antenna 4924 <legal all> 4925 */ 4926 4927 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000080 4928 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_LSB 1 4929 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_MSB 24 4930 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_MASK 0x0000000001fffffe 4931 4932 4933 /* Description PKT_TYPE 4934 4935 Packet type: 4936 <enum 0 dot11a>802.11a PPDU type 4937 <enum 1 dot11b>802.11b PPDU type 4938 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 4939 <enum 3 dot11ac>802.11ac PPDU type 4940 <enum 4 dot11ax>802.11ax PPDU type 4941 <enum 5 dot11ba>802.11ba (WUR) PPDU type 4942 <enum 6 dot11be>802.11be PPDU type 4943 <enum 7 dot11az>802.11az (ranging) PPDU type 4944 <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported 4945 & aborted) 4946 */ 4947 4948 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_OFFSET 0x0000000000000080 4949 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_LSB 25 4950 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_MSB 28 4951 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_MASK 0x000000001e000000 4952 4953 4954 /* Description SMOOTHING 4955 4956 This field is used by PDG to populate the SMOOTHING filed 4957 in the SIG Preamble of the PPDU 4958 <legal 0-1> 4959 */ 4960 4961 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_OFFSET 0x0000000000000080 4962 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_LSB 29 4963 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_MSB 29 4964 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_MASK 0x0000000020000000 4965 4966 4967 /* Description LDPC 4968 4969 When set, use LDPC transmission rates 4970 */ 4971 4972 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_OFFSET 0x0000000000000080 4973 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_LSB 30 4974 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_MSB 30 4975 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_MASK 0x0000000040000000 4976 4977 4978 /* Description STBC 4979 4980 When set, use STBC transmission rates 4981 */ 4982 4983 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_OFFSET 0x0000000000000080 4984 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_LSB 31 4985 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_MSB 31 4986 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_MASK 0x0000000080000000 4987 4988 4989 /* Description ALT_TX_PWR 4990 4991 Coex related AlternativeTransmit parameter 4992 4993 Transmit Power in s6.2 format. 4994 In units of 0.25 dBm 4995 <legal all> 4996 */ 4997 4998 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_OFFSET 0x0000000000000080 4999 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_LSB 32 5000 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_MSB 39 5001 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_MASK 0x000000ff00000000 5002 5003 5004 /* Description ALT_MIN_TX_PWR 5005 5006 Coex related Alternative Transmit parameter 5007 5008 Minimum allowed Transmit Power in s6.2 format. 5009 In units of 0.25 dBm 5010 <legal all> 5011 */ 5012 5013 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_OFFSET 0x0000000000000080 5014 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_LSB 40 5015 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_MSB 47 5016 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_MASK 0x0000ff0000000000 5017 5018 5019 /* Description ALT_NSS 5020 5021 Coex related Alternative Transmit parameter 5022 5023 Number of spatial streams. 5024 5025 <enum 0 1_spatial_stream>Single spatial stream 5026 <enum 1 2_spatial_streams>2 spatial streams 5027 <enum 2 3_spatial_streams>3 spatial streams 5028 <enum 3 4_spatial_streams>4 spatial streams 5029 <enum 4 5_spatial_streams>5 spatial streams 5030 <enum 5 6_spatial_streams>6 spatial streams 5031 <enum 6 7_spatial_streams>7 spatial streams 5032 <enum 7 8_spatial_streams>8 spatial streams 5033 */ 5034 5035 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_OFFSET 0x0000000000000080 5036 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_LSB 48 5037 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_MSB 50 5038 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_MASK 0x0007000000000000 5039 5040 5041 /* Description ALT_TX_CHAIN_MASK 5042 5043 Coex related Alternative Transmit parameter 5044 5045 Chain mask to support up to 8 antennas. 5046 <legal 1-255> 5047 */ 5048 5049 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000080 5050 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_LSB 51 5051 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_MSB 58 5052 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_MASK 0x07f8000000000000 5053 5054 5055 /* Description ALT_BW 5056 5057 Coex related Alternative Transmit parameter 5058 5059 The BW of the upcoming transmission. 5060 5061 <enum 0 20_mhz>20 Mhz BW 5062 <enum 1 40_mhz>40 Mhz BW 5063 <enum 2 80_mhz>80 Mhz BW 5064 <enum 3 160_mhz>160 Mhz BW 5065 <enum 4 320_mhz>320 Mhz BW 5066 <enum 5 240_mhz>240 Mhz BW 5067 */ 5068 5069 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_OFFSET 0x0000000000000080 5070 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_LSB 59 5071 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_MSB 61 5072 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_MASK 0x3800000000000000 5073 5074 5075 /* Description STF_LTF_3DB_BOOST 5076 5077 Boost the STF and LTF power by 3dB in 11a/n/ac packets. 5078 This includes both the legacy preambles and the HT/VHT preambles.0: 5079 disable power boost1: enable power boost 5080 <legal all> 5081 */ 5082 5083 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000080 5084 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_LSB 62 5085 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_MSB 62 5086 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_MASK 0x4000000000000000 5087 5088 5089 /* Description FORCE_EXTRA_SYMBOL 5090 5091 Set to 1 to force an extra OFDM symbol (or symbols) even 5092 if the PPDU encoding process does not result in an extra 5093 OFDM symbol (or symbols) 5094 */ 5095 5096 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000080 5097 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_LSB 63 5098 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_MSB 63 5099 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_MASK 0x8000000000000000 5100 5101 5102 /* Description ALT_RATE_MCS 5103 5104 Coex related Alternative Transmit parameter 5105 5106 For details, refer to MCS_TYPE 5107 Note: This is "rate" in case of 11a/11b 5108 description 5109 <legal all> 5110 */ 5111 5112 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_OFFSET 0x0000000000000088 5113 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_LSB 0 5114 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_MSB 3 5115 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_MASK 0x000000000000000f 5116 5117 5118 /* Description NSS 5119 5120 Number of spatial streams. 5121 5122 <enum 0 1_spatial_stream>Single spatial stream 5123 <enum 1 2_spatial_streams>2 spatial streams 5124 <enum 2 3_spatial_streams>3 spatial streams 5125 <enum 3 4_spatial_streams>4 spatial streams 5126 <enum 4 5_spatial_streams>5 spatial streams 5127 <enum 5 6_spatial_streams>6 spatial streams 5128 <enum 6 7_spatial_streams>7 spatial streams 5129 <enum 7 8_spatial_streams>8 spatial streams 5130 */ 5131 5132 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_OFFSET 0x0000000000000088 5133 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_LSB 4 5134 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_MSB 6 5135 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_MASK 0x0000000000000070 5136 5137 5138 /* Description DPD_ENABLE 5139 5140 DPD enable control 5141 5142 This is needed on a per packet basis 5143 <enum 0 dpd_off> DPD profile not applied to current 5144 packet 5145 <enum 1 dpd_on> DPD profile applied to current packet 5146 if available 5147 <legal 0-1> 5148 5149 This field is not applicable in11ah mode of operation and 5150 is ignored by the HW 5151 */ 5152 5153 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_OFFSET 0x0000000000000088 5154 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_LSB 7 5155 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_MSB 7 5156 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_MASK 0x0000000000000080 5157 5158 5159 /* Description TX_PWR 5160 5161 Transmit Power in s6.2 format. 5162 In units of 0.25 dBm 5163 <legal all> 5164 */ 5165 5166 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_OFFSET 0x0000000000000088 5167 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_LSB 8 5168 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_MSB 15 5169 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_MASK 0x000000000000ff00 5170 5171 5172 /* Description MIN_TX_PWR 5173 5174 Coex related field: 5175 5176 Minimum allowed Transmit Power in s6.2 format. 5177 In units of 0.25 dBm 5178 <legal all> 5179 */ 5180 5181 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_OFFSET 0x0000000000000088 5182 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_LSB 16 5183 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_MSB 23 5184 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_MASK 0x0000000000ff0000 5185 5186 5187 /* Description TX_CHAIN_MASK 5188 5189 Chain mask to support up to 8 antennas. 5190 <legal 1-255> 5191 */ 5192 5193 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_OFFSET 0x0000000000000088 5194 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_LSB 24 5195 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_MSB 31 5196 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_MASK 0x00000000ff000000 5197 5198 5199 /* Description RESERVED_3A 5200 5201 <legal 0> 5202 */ 5203 5204 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_OFFSET 0x0000000000000088 5205 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_LSB 32 5206 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_MSB 39 5207 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_MASK 0x000000ff00000000 5208 5209 5210 /* Description SGI 5211 5212 Field only valid when pkt type is HT or VHT.For 11ax see 5213 field Dot11ax_CP_LTF_size 5214 5215 <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used 5216 for HE 5217 <enum 1 0_4_us_sgi > Legacy short GI. Can also be used 5218 for HE 5219 <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types. 5220 5221 <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types 5222 5223 5224 <legal 0 - 3> 5225 */ 5226 5227 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_OFFSET 0x0000000000000088 5228 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_LSB 40 5229 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_MSB 41 5230 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_MASK 0x0000030000000000 5231 5232 5233 /* Description RATE_MCS 5234 5235 For details, refer to MCS_TYPE description 5236 Note: This is "rate" in case of 11a/11b 5237 5238 <legal all> 5239 */ 5240 5241 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_OFFSET 0x0000000000000088 5242 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_LSB 42 5243 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_MSB 45 5244 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_MASK 0x00003c0000000000 5245 5246 5247 /* Description RESERVED_3B 5248 5249 <legal 0> 5250 */ 5251 5252 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_OFFSET 0x0000000000000088 5253 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_LSB 46 5254 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_MSB 47 5255 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_MASK 0x0000c00000000000 5256 5257 5258 /* Description TX_PWR_1 5259 5260 Default (desired) transmit parameter for the second chain 5261 5262 5263 Transmit Power in s6.2 format. 5264 In units of 0.25 dBm 5265 5266 Note that there is no Min value for this 5267 <legal all> 5268 */ 5269 5270 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_OFFSET 0x0000000000000088 5271 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_LSB 48 5272 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_MSB 55 5273 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_MASK 0x00ff000000000000 5274 5275 5276 /* Description ALT_TX_PWR_1 5277 5278 Alternate (desired) transmit parameter for the second chain 5279 5280 5281 Transmit Power in s6.2 format. 5282 In units of 0.25 dBm 5283 5284 Note that there is no Min value for this 5285 <legal all> 5286 */ 5287 5288 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_OFFSET 0x0000000000000088 5289 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_LSB 56 5290 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_MSB 63 5291 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_MASK 0xff00000000000000 5292 5293 5294 /* Description AGGREGATION 5295 5296 Field only valid in case of pkt_type == 11n 5297 5298 <enum 0 mpdu> Indicates MPDU format. TXPCU will select 5299 this setting if the CBF response only contains a single 5300 segment 5301 <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will 5302 select this setting if the CBF response will contain two 5303 or more segments 5304 <legal 0-1> 5305 */ 5306 5307 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_OFFSET 0x0000000000000090 5308 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_LSB 0 5309 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_MSB 0 5310 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_MASK 0x0000000000000001 5311 5312 5313 /* Description DOT11AX_BSS_COLOR_ID 5314 5315 BSS color of the nextwork to which this STA belongs. 5316 When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id 5317 5318 5319 <legal all> 5320 */ 5321 5322 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000090 5323 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_LSB 1 5324 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_MSB 6 5325 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_MASK 0x000000000000007e 5326 5327 5328 /* Description DOT11AX_SPATIAL_REUSE 5329 5330 This field is only valid for pkt_type == 11ax 5331 5332 Spatial re-use 5333 <legal all> 5334 */ 5335 5336 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000090 5337 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_LSB 7 5338 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_MSB 10 5339 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_MASK 0x0000000000000780 5340 5341 5342 /* Description DOT11AX_CP_LTF_SIZE 5343 5344 field is only valid for pkt_type == 11ax 5345 5346 Indicates the CP and HE-LTF type 5347 5348 <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP 5349 <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP 5350 <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP 5351 <enum 3 FourX_LTF_0_8CP_3_2CP> 5352 When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP 5353 When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note: 5354 In this scenario, Neither DCM nor STBC is applied to HE 5355 data field. 5356 5357 If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0) 5358 0 = 1xLTF + 0.4 usec 5359 1 = 2xLTF + 0.4 usec 5360 2~3 = Reserved 5361 5362 <legal all> 5363 */ 5364 5365 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000090 5366 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_LSB 11 5367 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_MSB 12 5368 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_MASK 0x0000000000001800 5369 5370 5371 /* Description DOT11AX_DCM 5372 5373 field is only valid for pkt_type == 11ax 5374 5375 Indicates whether dual sub-carrier modulation is applied 5376 5377 0: No DCM 5378 1:DCM 5379 <legal all> 5380 */ 5381 5382 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_OFFSET 0x0000000000000090 5383 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_LSB 13 5384 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_MSB 13 5385 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_MASK 0x0000000000002000 5386 5387 5388 /* Description DOT11AX_DOPPLER_INDICATION 5389 5390 field is only valid for pkt_type == 11ax 5391 5392 0: No Doppler support 5393 1: Doppler support 5394 <legal all> 5395 */ 5396 5397 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000090 5398 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_LSB 14 5399 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_MSB 14 5400 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_MASK 0x0000000000004000 5401 5402 5403 /* Description DOT11AX_SU_EXTENDED 5404 5405 field is only valid for pkt_type == 11ax OR pkt_type == 5406 11be 5407 5408 When set, the 11ax or 11be frame is of the extended range 5409 format 5410 <legal all> 5411 */ 5412 5413 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000090 5414 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_LSB 15 5415 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_MSB 15 5416 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_MASK 0x0000000000008000 5417 5418 5419 /* Description DOT11AX_MIN_PACKET_EXTENSION 5420 5421 field is only valid for pkt_type == 11ax OR pkt_type == 5422 11be 5423 5424 The min packet extension duration for this user. 5425 0: no extension 5426 1: 8us 5427 2: 16 us 5428 3: 20 us (only for .11be) 5429 <legal 0-3> 5430 */ 5431 5432 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000090 5433 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_LSB 16 5434 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_MSB 17 5435 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0000000000030000 5436 5437 5438 /* Description DOT11AX_PE_NSS 5439 5440 Number of active spatial streams during packet extension. 5441 5442 5443 <enum 0 1_spatial_stream>Single spatial stream 5444 <enum 1 2_spatial_streams>2 spatial streams 5445 <enum 2 3_spatial_streams>3 spatial streams 5446 <enum 3 4_spatial_streams>4 spatial streams 5447 <enum 4 5_spatial_streams>5 spatial streams 5448 <enum 5 6_spatial_streams>6 spatial streams 5449 <enum 6 7_spatial_streams>7 spatial streams 5450 <enum 7 8_spatial_streams>8 spatial streams 5451 */ 5452 5453 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_OFFSET 0x0000000000000090 5454 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_LSB 18 5455 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_MSB 20 5456 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_MASK 0x00000000001c0000 5457 5458 5459 /* Description DOT11AX_PE_CONTENT 5460 5461 Content of packet extension. Valid for all 11ax packets 5462 having packet extension 5463 5464 0-he_ltf, 1-last_data_symbol 5465 <legal all> 5466 */ 5467 5468 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000090 5469 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_LSB 21 5470 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_MSB 21 5471 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_MASK 0x0000000000200000 5472 5473 5474 /* Description DOT11AX_PE_LTF_SIZE 5475 5476 LTF size to be used during packet extention. . This field 5477 is valid for both FTM and non-FTM packets. 5478 0-1x 5479 1-2x (unsupported un HWK-1) 5480 2-4x (unsupported un HWK-1) 5481 <legal all> 5482 */ 5483 5484 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000090 5485 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_LSB 22 5486 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_MSB 23 5487 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_MASK 0x0000000000c00000 5488 5489 5490 /* Description DOT11AX_CHAIN_CSD_EN 5491 5492 This field denotes whether to apply CSD on the preamble 5493 and data portion of the packet. This field is valid for 5494 all transmit packets 5495 0: disable per-chain csd 5496 1: enable per-chain csd 5497 <legal all> 5498 */ 5499 5500 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000090 5501 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_LSB 24 5502 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_MSB 24 5503 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_MASK 0x0000000001000000 5504 5505 5506 /* Description DOT11AX_PE_CHAIN_CSD_EN 5507 5508 This field denotes whether to apply CSD on the packet extension 5509 portion of the packet. This field is valid for all 11ax 5510 packets. 5511 0: disable per-chain csd 5512 1: enable per-chain csd 5513 <legal all> 5514 */ 5515 5516 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000090 5517 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_LSB 25 5518 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_MSB 25 5519 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0000000002000000 5520 5521 5522 /* Description DOT11AX_DL_UL_FLAG 5523 5524 field is only valid for pkt_type == 11ax 5525 5526 <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS> 5527 <enum 1 DL_UL_FLAG_IS_UL> 5528 5529 <legal all> 5530 */ 5531 5532 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000090 5533 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_LSB 26 5534 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_MSB 26 5535 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_MASK 0x0000000004000000 5536 5537 5538 /* Description RESERVED_4A 5539 5540 <legal 0> 5541 */ 5542 5543 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_OFFSET 0x0000000000000090 5544 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_LSB 27 5545 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_MSB 31 5546 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_MASK 0x00000000f8000000 5547 5548 5549 /* Description DOT11AX_EXT_RU_START_INDEX 5550 5551 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 5552 == 1 5553 5554 RU Number to which User is assigned 5555 5556 The RU numbering bitwidth is only enough to cover the 20MHz 5557 BW that extended range allows 5558 <legal 0-8> 5559 */ 5560 5561 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000090 5562 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_LSB 32 5563 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_MSB 35 5564 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_MASK 0x0000000f00000000 5565 5566 5567 /* Description DOT11AX_EXT_RU_SIZE 5568 5569 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 5570 == 1 or pkt_type == 11be and EHT_duplicate_mode == 1 5571 5572 The size of the RU for this user. 5573 5574 In case of EHT duplicate transmissions, this field indicates 5575 the width of the actual content before duplication, e.g. 5576 a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth 5577 fields indicating 160 MHz and this field set to e-num 4 5578 (RU_484). 5579 5580 <enum 0 RU_26> 5581 <enum 1 RU_52> 5582 <enum 2 RU_106> 5583 <enum 3 RU_242> 5584 <enum 4 RU_484> 5585 <enum 5 RU_996> 5586 <enum 6 RU_1992> 5587 <enum 7 RU_FULLBW> Set when the RU occupies the full packet 5588 bandwidth 5589 <enum 8 RU_FULLBW_240> Set when the RU occupies the full 5590 packet bandwidth 5591 <enum 9 RU_FULLBW_320> Set when the RU occupies the full 5592 packet bandwidth 5593 <enum 10 RU_MULTI_LARGE> DO NOT USE 5594 <enum 11 RU_78> DO NOT USE 5595 <enum 12 RU_132> DO NOT USE 5596 <legal 0-12> 5597 */ 5598 5599 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000090 5600 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_LSB 36 5601 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_MSB 39 5602 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_MASK 0x000000f000000000 5603 5604 5605 /* Description EHT_DUPLICATE_MODE 5606 5607 Field only valid for pkt_type == 11be 5608 5609 Indicates EHT duplicate modulation 5610 5611 <enum 0 eht_no_duplicate> 5612 <enum 1 eht_2x_duplicate> 5613 <enum 2 eht_4x_duplicate> 5614 5615 <legal 0-2> 5616 */ 5617 5618 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000090 5619 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_LSB 40 5620 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_MSB 41 5621 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_MASK 0x0000030000000000 5622 5623 5624 /* Description HE_SIGB_DCM 5625 5626 Indicates whether dual sub-carrier modulation is applied 5627 to EHT-SIG 5628 <legal all> 5629 */ 5630 5631 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_OFFSET 0x0000000000000090 5632 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_LSB 42 5633 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_MSB 42 5634 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_MASK 0x0000040000000000 5635 5636 5637 /* Description HE_SIGB_0_MCS 5638 5639 Indicates the MCS of EHT-SIG 5640 5641 For details, refer to MCS_TYPE description 5642 <legal all> 5643 */ 5644 5645 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_OFFSET 0x0000000000000090 5646 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_LSB 43 5647 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_MSB 45 5648 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_MASK 0x0000380000000000 5649 5650 5651 /* Description NUM_HE_SIGB_SYM 5652 5653 Indicates the number of EHT-SIG symbols 5654 5655 This field is 0-based with 0 indicating that 1 eht_sig symbol 5656 needs to be transmitted. 5657 <legal all> 5658 */ 5659 5660 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000090 5661 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_LSB 46 5662 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_MSB 50 5663 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_MASK 0x0007c00000000000 5664 5665 5666 /* Description REQUIRED_RESPONSE_TIME_SOURCE 5667 5668 <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received 5669 HT Control for sync MLO response 5670 <enum 1 reqd_resp_time_src_is_FW> 5671 Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response 5672 to response 5673 <legal all> 5674 */ 5675 5676 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000090 5677 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_LSB 51 5678 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_MSB 51 5679 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0008000000000000 5680 5681 5682 /* Description RESERVED_5A 5683 5684 <legal 0> 5685 */ 5686 5687 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_OFFSET 0x0000000000000090 5688 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_LSB 52 5689 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_MSB 57 5690 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_MASK 0x03f0000000000000 5691 5692 5693 /* Description U_SIG_PUNCTURE_PATTERN_ENCODING 5694 5695 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO' 5696 to pass on to PDG 5697 <legal 0-29> 5698 */ 5699 5700 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000090 5701 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 58 5702 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 63 5703 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc00000000000000 5704 5705 5706 /* Description MLO_STA_ID_DETAILS_RX 5707 5708 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass 5709 on to PDG 5710 5711 Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID' 5712 from address search. 5713 5714 See definition of mlo_sta_id_details. 5715 */ 5716 5717 5718 /* Description NSTR_MLO_STA_ID 5719 5720 ID of peer participating in non-STR MLO 5721 */ 5722 5723 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000098 5724 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0 5725 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9 5726 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x00000000000003ff 5727 5728 5729 /* Description BLOCK_SELF_ML_SYNC 5730 5731 Only valid for TX 5732 5733 When set, this provides an indication to block the peer 5734 for self-link. 5735 */ 5736 5737 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000098 5738 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10 5739 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10 5740 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000000000000400 5741 5742 5743 /* Description BLOCK_PARTNER_ML_SYNC 5744 5745 Only valid for TX 5746 5747 When set, this provides an indication to block the peer 5748 for partner links. 5749 */ 5750 5751 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000098 5752 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11 5753 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11 5754 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000000000000800 5755 5756 5757 /* Description NSTR_MLO_STA_ID_VALID 5758 5759 All the fields in this TLV are valid only if this bit is 5760 set. 5761 */ 5762 5763 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000098 5764 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12 5765 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12 5766 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000000000001000 5767 5768 5769 /* Description RESERVED_0A 5770 5771 <legal 0> 5772 */ 5773 5774 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000098 5775 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13 5776 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15 5777 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x000000000000e000 5778 5779 5780 /* Description REQUIRED_RESPONSE_TIME 5781 5782 When non-zero, indicates that PDG shall pad the response 5783 transmission to the indicated duration (in us) 5784 */ 5785 5786 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000098 5787 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_LSB 16 5788 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_MSB 27 5789 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_MASK 0x000000000fff0000 5790 5791 5792 /* Description DOT11BE_PARAMS_PLACEHOLDER 5793 5794 4 bytes for use as placeholders for 'Dot11be_*' parameters 5795 5796 */ 5797 5798 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000098 5799 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_LSB 28 5800 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_MSB 31 5801 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_MASK 0x00000000f0000000 5802 5803 5804 /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW320 5805 5806 Field only valid in case of Response_to_response set to 5807 SU_BA or MU_BA 5808 5809 NOTE: This field is also known as response_to_response_rate_info_pattern_5 5810 in case punctured transmission is enabled. 5811 5812 Used by TXPCU to determine what the transmit rates are for 5813 the response to response transmission in case original 5814 transmission was 320 MHz. 5815 5816 Note: 5817 see field R2R_bw320_active_channel for the BW of this transmission 5818 5819 */ 5820 5821 5822 /* Description RESERVED_0A 5823 5824 5825 <legal 0> 5826 */ 5827 5828 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_OFFSET 0x0000000000000098 5829 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_LSB 32 5830 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_MSB 32 5831 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_MASK 0x0000000100000000 5832 5833 5834 /* Description TX_ANTENNA_SECTOR_CTRL 5835 5836 Sectored transmit antenna 5837 <legal all> 5838 */ 5839 5840 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000098 5841 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_LSB 33 5842 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_MSB 56 5843 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_MASK 0x01fffffe00000000 5844 5845 5846 /* Description PKT_TYPE 5847 5848 Packet type: 5849 <enum 0 dot11a>802.11a PPDU type 5850 <enum 1 dot11b>802.11b PPDU type 5851 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 5852 <enum 3 dot11ac>802.11ac PPDU type 5853 <enum 4 dot11ax>802.11ax PPDU type 5854 <enum 5 dot11ba>802.11ba (WUR) PPDU type 5855 <enum 6 dot11be>802.11be PPDU type 5856 <enum 7 dot11az>802.11az (ranging) PPDU type 5857 <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported 5858 & aborted) 5859 */ 5860 5861 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_OFFSET 0x0000000000000098 5862 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_LSB 57 5863 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_MSB 60 5864 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_MASK 0x1e00000000000000 5865 5866 5867 /* Description SMOOTHING 5868 5869 This field is used by PDG to populate the SMOOTHING filed 5870 in the SIG Preamble of the PPDU 5871 <legal 0-1> 5872 */ 5873 5874 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_OFFSET 0x0000000000000098 5875 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_LSB 61 5876 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_MSB 61 5877 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_MASK 0x2000000000000000 5878 5879 5880 /* Description LDPC 5881 5882 When set, use LDPC transmission rates 5883 */ 5884 5885 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_OFFSET 0x0000000000000098 5886 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_LSB 62 5887 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_MSB 62 5888 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_MASK 0x4000000000000000 5889 5890 5891 /* Description STBC 5892 5893 When set, use STBC transmission rates 5894 */ 5895 5896 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_OFFSET 0x0000000000000098 5897 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_LSB 63 5898 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_MSB 63 5899 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_MASK 0x8000000000000000 5900 5901 5902 /* Description ALT_TX_PWR 5903 5904 Coex related AlternativeTransmit parameter 5905 5906 Transmit Power in s6.2 format. 5907 In units of 0.25 dBm 5908 <legal all> 5909 */ 5910 5911 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_OFFSET 0x00000000000000a0 5912 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_LSB 0 5913 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_MSB 7 5914 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_MASK 0x00000000000000ff 5915 5916 5917 /* Description ALT_MIN_TX_PWR 5918 5919 Coex related Alternative Transmit parameter 5920 5921 Minimum allowed Transmit Power in s6.2 format. 5922 In units of 0.25 dBm 5923 <legal all> 5924 */ 5925 5926 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_OFFSET 0x00000000000000a0 5927 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_LSB 8 5928 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_MSB 15 5929 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_MASK 0x000000000000ff00 5930 5931 5932 /* Description ALT_NSS 5933 5934 Coex related Alternative Transmit parameter 5935 5936 Number of spatial streams. 5937 5938 <enum 0 1_spatial_stream>Single spatial stream 5939 <enum 1 2_spatial_streams>2 spatial streams 5940 <enum 2 3_spatial_streams>3 spatial streams 5941 <enum 3 4_spatial_streams>4 spatial streams 5942 <enum 4 5_spatial_streams>5 spatial streams 5943 <enum 5 6_spatial_streams>6 spatial streams 5944 <enum 6 7_spatial_streams>7 spatial streams 5945 <enum 7 8_spatial_streams>8 spatial streams 5946 */ 5947 5948 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_OFFSET 0x00000000000000a0 5949 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_LSB 16 5950 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_MSB 18 5951 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_MASK 0x0000000000070000 5952 5953 5954 /* Description ALT_TX_CHAIN_MASK 5955 5956 Coex related Alternative Transmit parameter 5957 5958 Chain mask to support up to 8 antennas. 5959 <legal 1-255> 5960 */ 5961 5962 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_OFFSET 0x00000000000000a0 5963 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_LSB 19 5964 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_MSB 26 5965 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_MASK 0x0000000007f80000 5966 5967 5968 /* Description ALT_BW 5969 5970 Coex related Alternative Transmit parameter 5971 5972 The BW of the upcoming transmission. 5973 5974 <enum 0 20_mhz>20 Mhz BW 5975 <enum 1 40_mhz>40 Mhz BW 5976 <enum 2 80_mhz>80 Mhz BW 5977 <enum 3 160_mhz>160 Mhz BW 5978 <enum 4 320_mhz>320 Mhz BW 5979 <enum 5 240_mhz>240 Mhz BW 5980 */ 5981 5982 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_OFFSET 0x00000000000000a0 5983 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_LSB 27 5984 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_MSB 29 5985 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_MASK 0x0000000038000000 5986 5987 5988 /* Description STF_LTF_3DB_BOOST 5989 5990 Boost the STF and LTF power by 3dB in 11a/n/ac packets. 5991 This includes both the legacy preambles and the HT/VHT preambles.0: 5992 disable power boost1: enable power boost 5993 <legal all> 5994 */ 5995 5996 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_OFFSET 0x00000000000000a0 5997 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_LSB 30 5998 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_MSB 30 5999 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_MASK 0x0000000040000000 6000 6001 6002 /* Description FORCE_EXTRA_SYMBOL 6003 6004 Set to 1 to force an extra OFDM symbol (or symbols) even 6005 if the PPDU encoding process does not result in an extra 6006 OFDM symbol (or symbols) 6007 */ 6008 6009 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_OFFSET 0x00000000000000a0 6010 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_LSB 31 6011 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_MSB 31 6012 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_MASK 0x0000000080000000 6013 6014 6015 /* Description ALT_RATE_MCS 6016 6017 Coex related Alternative Transmit parameter 6018 6019 For details, refer to MCS_TYPE 6020 Note: This is "rate" in case of 11a/11b 6021 description 6022 <legal all> 6023 */ 6024 6025 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_OFFSET 0x00000000000000a0 6026 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_LSB 32 6027 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_MSB 35 6028 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_MASK 0x0000000f00000000 6029 6030 6031 /* Description NSS 6032 6033 Number of spatial streams. 6034 6035 <enum 0 1_spatial_stream>Single spatial stream 6036 <enum 1 2_spatial_streams>2 spatial streams 6037 <enum 2 3_spatial_streams>3 spatial streams 6038 <enum 3 4_spatial_streams>4 spatial streams 6039 <enum 4 5_spatial_streams>5 spatial streams 6040 <enum 5 6_spatial_streams>6 spatial streams 6041 <enum 6 7_spatial_streams>7 spatial streams 6042 <enum 7 8_spatial_streams>8 spatial streams 6043 */ 6044 6045 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_OFFSET 0x00000000000000a0 6046 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_LSB 36 6047 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_MSB 38 6048 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_MASK 0x0000007000000000 6049 6050 6051 /* Description DPD_ENABLE 6052 6053 DPD enable control 6054 6055 This is needed on a per packet basis 6056 <enum 0 dpd_off> DPD profile not applied to current 6057 packet 6058 <enum 1 dpd_on> DPD profile applied to current packet 6059 if available 6060 <legal 0-1> 6061 6062 This field is not applicable in11ah mode of operation and 6063 is ignored by the HW 6064 */ 6065 6066 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_OFFSET 0x00000000000000a0 6067 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_LSB 39 6068 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_MSB 39 6069 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_MASK 0x0000008000000000 6070 6071 6072 /* Description TX_PWR 6073 6074 Transmit Power in s6.2 format. 6075 In units of 0.25 dBm 6076 <legal all> 6077 */ 6078 6079 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_OFFSET 0x00000000000000a0 6080 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_LSB 40 6081 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_MSB 47 6082 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_MASK 0x0000ff0000000000 6083 6084 6085 /* Description MIN_TX_PWR 6086 6087 Coex related field: 6088 6089 Minimum allowed Transmit Power in s6.2 format. 6090 In units of 0.25 dBm 6091 <legal all> 6092 */ 6093 6094 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_OFFSET 0x00000000000000a0 6095 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_LSB 48 6096 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_MSB 55 6097 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_MASK 0x00ff000000000000 6098 6099 6100 /* Description TX_CHAIN_MASK 6101 6102 Chain mask to support up to 8 antennas. 6103 <legal 1-255> 6104 */ 6105 6106 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_OFFSET 0x00000000000000a0 6107 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_LSB 56 6108 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_MSB 63 6109 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_MASK 0xff00000000000000 6110 6111 6112 /* Description RESERVED_3A 6113 6114 <legal 0> 6115 */ 6116 6117 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_OFFSET 0x00000000000000a8 6118 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_LSB 0 6119 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_MSB 7 6120 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_MASK 0x00000000000000ff 6121 6122 6123 /* Description SGI 6124 6125 Field only valid when pkt type is HT or VHT.For 11ax see 6126 field Dot11ax_CP_LTF_size 6127 6128 <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used 6129 for HE 6130 <enum 1 0_4_us_sgi > Legacy short GI. Can also be used 6131 for HE 6132 <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types. 6133 6134 <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types 6135 6136 6137 <legal 0 - 3> 6138 */ 6139 6140 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_OFFSET 0x00000000000000a8 6141 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_LSB 8 6142 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_MSB 9 6143 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_MASK 0x0000000000000300 6144 6145 6146 /* Description RATE_MCS 6147 6148 For details, refer to MCS_TYPE description 6149 Note: This is "rate" in case of 11a/11b 6150 6151 <legal all> 6152 */ 6153 6154 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_OFFSET 0x00000000000000a8 6155 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_LSB 10 6156 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_MSB 13 6157 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_MASK 0x0000000000003c00 6158 6159 6160 /* Description RESERVED_3B 6161 6162 <legal 0> 6163 */ 6164 6165 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_OFFSET 0x00000000000000a8 6166 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_LSB 14 6167 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_MSB 15 6168 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_MASK 0x000000000000c000 6169 6170 6171 /* Description TX_PWR_1 6172 6173 Default (desired) transmit parameter for the second chain 6174 6175 6176 Transmit Power in s6.2 format. 6177 In units of 0.25 dBm 6178 6179 Note that there is no Min value for this 6180 <legal all> 6181 */ 6182 6183 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_OFFSET 0x00000000000000a8 6184 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_LSB 16 6185 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_MSB 23 6186 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_MASK 0x0000000000ff0000 6187 6188 6189 /* Description ALT_TX_PWR_1 6190 6191 Alternate (desired) transmit parameter for the second chain 6192 6193 6194 Transmit Power in s6.2 format. 6195 In units of 0.25 dBm 6196 6197 Note that there is no Min value for this 6198 <legal all> 6199 */ 6200 6201 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_OFFSET 0x00000000000000a8 6202 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_LSB 24 6203 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_MSB 31 6204 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_MASK 0x00000000ff000000 6205 6206 6207 /* Description AGGREGATION 6208 6209 Field only valid in case of pkt_type == 11n 6210 6211 <enum 0 mpdu> Indicates MPDU format. TXPCU will select 6212 this setting if the CBF response only contains a single 6213 segment 6214 <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will 6215 select this setting if the CBF response will contain two 6216 or more segments 6217 <legal 0-1> 6218 */ 6219 6220 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_OFFSET 0x00000000000000a8 6221 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_LSB 32 6222 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_MSB 32 6223 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_MASK 0x0000000100000000 6224 6225 6226 /* Description DOT11AX_BSS_COLOR_ID 6227 6228 BSS color of the nextwork to which this STA belongs. 6229 When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id 6230 6231 6232 <legal all> 6233 */ 6234 6235 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_OFFSET 0x00000000000000a8 6236 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_LSB 33 6237 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_MSB 38 6238 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_MASK 0x0000007e00000000 6239 6240 6241 /* Description DOT11AX_SPATIAL_REUSE 6242 6243 This field is only valid for pkt_type == 11ax 6244 6245 Spatial re-use 6246 <legal all> 6247 */ 6248 6249 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_OFFSET 0x00000000000000a8 6250 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_LSB 39 6251 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_MSB 42 6252 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_MASK 0x0000078000000000 6253 6254 6255 /* Description DOT11AX_CP_LTF_SIZE 6256 6257 field is only valid for pkt_type == 11ax 6258 6259 Indicates the CP and HE-LTF type 6260 6261 <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP 6262 <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP 6263 <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP 6264 <enum 3 FourX_LTF_0_8CP_3_2CP> 6265 When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP 6266 When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note: 6267 In this scenario, Neither DCM nor STBC is applied to HE 6268 data field. 6269 6270 If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0) 6271 0 = 1xLTF + 0.4 usec 6272 1 = 2xLTF + 0.4 usec 6273 2~3 = Reserved 6274 6275 <legal all> 6276 */ 6277 6278 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_OFFSET 0x00000000000000a8 6279 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_LSB 43 6280 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_MSB 44 6281 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_MASK 0x0000180000000000 6282 6283 6284 /* Description DOT11AX_DCM 6285 6286 field is only valid for pkt_type == 11ax 6287 6288 Indicates whether dual sub-carrier modulation is applied 6289 6290 0: No DCM 6291 1:DCM 6292 <legal all> 6293 */ 6294 6295 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_OFFSET 0x00000000000000a8 6296 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_LSB 45 6297 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_MSB 45 6298 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_MASK 0x0000200000000000 6299 6300 6301 /* Description DOT11AX_DOPPLER_INDICATION 6302 6303 field is only valid for pkt_type == 11ax 6304 6305 0: No Doppler support 6306 1: Doppler support 6307 <legal all> 6308 */ 6309 6310 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_OFFSET 0x00000000000000a8 6311 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_LSB 46 6312 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_MSB 46 6313 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_MASK 0x0000400000000000 6314 6315 6316 /* Description DOT11AX_SU_EXTENDED 6317 6318 field is only valid for pkt_type == 11ax OR pkt_type == 6319 11be 6320 6321 When set, the 11ax or 11be frame is of the extended range 6322 format 6323 <legal all> 6324 */ 6325 6326 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_OFFSET 0x00000000000000a8 6327 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_LSB 47 6328 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_MSB 47 6329 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_MASK 0x0000800000000000 6330 6331 6332 /* Description DOT11AX_MIN_PACKET_EXTENSION 6333 6334 field is only valid for pkt_type == 11ax OR pkt_type == 6335 11be 6336 6337 The min packet extension duration for this user. 6338 0: no extension 6339 1: 8us 6340 2: 16 us 6341 3: 20 us (only for .11be) 6342 <legal 0-3> 6343 */ 6344 6345 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x00000000000000a8 6346 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_LSB 48 6347 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_MSB 49 6348 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0003000000000000 6349 6350 6351 /* Description DOT11AX_PE_NSS 6352 6353 Number of active spatial streams during packet extension. 6354 6355 6356 <enum 0 1_spatial_stream>Single spatial stream 6357 <enum 1 2_spatial_streams>2 spatial streams 6358 <enum 2 3_spatial_streams>3 spatial streams 6359 <enum 3 4_spatial_streams>4 spatial streams 6360 <enum 4 5_spatial_streams>5 spatial streams 6361 <enum 5 6_spatial_streams>6 spatial streams 6362 <enum 6 7_spatial_streams>7 spatial streams 6363 <enum 7 8_spatial_streams>8 spatial streams 6364 */ 6365 6366 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_OFFSET 0x00000000000000a8 6367 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_LSB 50 6368 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_MSB 52 6369 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_MASK 0x001c000000000000 6370 6371 6372 /* Description DOT11AX_PE_CONTENT 6373 6374 Content of packet extension. Valid for all 11ax packets 6375 having packet extension 6376 6377 0-he_ltf, 1-last_data_symbol 6378 <legal all> 6379 */ 6380 6381 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_OFFSET 0x00000000000000a8 6382 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_LSB 53 6383 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_MSB 53 6384 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_MASK 0x0020000000000000 6385 6386 6387 /* Description DOT11AX_PE_LTF_SIZE 6388 6389 LTF size to be used during packet extention. . This field 6390 is valid for both FTM and non-FTM packets. 6391 0-1x 6392 1-2x (unsupported un HWK-1) 6393 2-4x (unsupported un HWK-1) 6394 <legal all> 6395 */ 6396 6397 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_OFFSET 0x00000000000000a8 6398 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_LSB 54 6399 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_MSB 55 6400 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_MASK 0x00c0000000000000 6401 6402 6403 /* Description DOT11AX_CHAIN_CSD_EN 6404 6405 This field denotes whether to apply CSD on the preamble 6406 and data portion of the packet. This field is valid for 6407 all transmit packets 6408 0: disable per-chain csd 6409 1: enable per-chain csd 6410 <legal all> 6411 */ 6412 6413 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_OFFSET 0x00000000000000a8 6414 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_LSB 56 6415 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_MSB 56 6416 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_MASK 0x0100000000000000 6417 6418 6419 /* Description DOT11AX_PE_CHAIN_CSD_EN 6420 6421 This field denotes whether to apply CSD on the packet extension 6422 portion of the packet. This field is valid for all 11ax 6423 packets. 6424 0: disable per-chain csd 6425 1: enable per-chain csd 6426 <legal all> 6427 */ 6428 6429 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x00000000000000a8 6430 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_LSB 57 6431 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_MSB 57 6432 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0200000000000000 6433 6434 6435 /* Description DOT11AX_DL_UL_FLAG 6436 6437 field is only valid for pkt_type == 11ax 6438 6439 <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS> 6440 <enum 1 DL_UL_FLAG_IS_UL> 6441 6442 <legal all> 6443 */ 6444 6445 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_OFFSET 0x00000000000000a8 6446 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_LSB 58 6447 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_MSB 58 6448 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_MASK 0x0400000000000000 6449 6450 6451 /* Description RESERVED_4A 6452 6453 <legal 0> 6454 */ 6455 6456 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_OFFSET 0x00000000000000a8 6457 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_LSB 59 6458 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_MSB 63 6459 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_MASK 0xf800000000000000 6460 6461 6462 /* Description DOT11AX_EXT_RU_START_INDEX 6463 6464 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 6465 == 1 6466 6467 RU Number to which User is assigned 6468 6469 The RU numbering bitwidth is only enough to cover the 20MHz 6470 BW that extended range allows 6471 <legal 0-8> 6472 */ 6473 6474 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x00000000000000b0 6475 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_LSB 0 6476 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_MSB 3 6477 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_MASK 0x000000000000000f 6478 6479 6480 /* Description DOT11AX_EXT_RU_SIZE 6481 6482 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 6483 == 1 or pkt_type == 11be and EHT_duplicate_mode == 1 6484 6485 The size of the RU for this user. 6486 6487 In case of EHT duplicate transmissions, this field indicates 6488 the width of the actual content before duplication, e.g. 6489 a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth 6490 fields indicating 160 MHz and this field set to e-num 4 6491 (RU_484). 6492 6493 <enum 0 RU_26> 6494 <enum 1 RU_52> 6495 <enum 2 RU_106> 6496 <enum 3 RU_242> 6497 <enum 4 RU_484> 6498 <enum 5 RU_996> 6499 <enum 6 RU_1992> 6500 <enum 7 RU_FULLBW> Set when the RU occupies the full packet 6501 bandwidth 6502 <enum 8 RU_FULLBW_240> Set when the RU occupies the full 6503 packet bandwidth 6504 <enum 9 RU_FULLBW_320> Set when the RU occupies the full 6505 packet bandwidth 6506 <enum 10 RU_MULTI_LARGE> DO NOT USE 6507 <enum 11 RU_78> DO NOT USE 6508 <enum 12 RU_132> DO NOT USE 6509 <legal 0-12> 6510 */ 6511 6512 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_OFFSET 0x00000000000000b0 6513 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_LSB 4 6514 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_MSB 7 6515 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_MASK 0x00000000000000f0 6516 6517 6518 /* Description EHT_DUPLICATE_MODE 6519 6520 Field only valid for pkt_type == 11be 6521 6522 Indicates EHT duplicate modulation 6523 6524 <enum 0 eht_no_duplicate> 6525 <enum 1 eht_2x_duplicate> 6526 <enum 2 eht_4x_duplicate> 6527 6528 <legal 0-2> 6529 */ 6530 6531 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_OFFSET 0x00000000000000b0 6532 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_LSB 8 6533 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_MSB 9 6534 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_MASK 0x0000000000000300 6535 6536 6537 /* Description HE_SIGB_DCM 6538 6539 Indicates whether dual sub-carrier modulation is applied 6540 to EHT-SIG 6541 <legal all> 6542 */ 6543 6544 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_OFFSET 0x00000000000000b0 6545 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_LSB 10 6546 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_MSB 10 6547 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_MASK 0x0000000000000400 6548 6549 6550 /* Description HE_SIGB_0_MCS 6551 6552 Indicates the MCS of EHT-SIG 6553 6554 For details, refer to MCS_TYPE description 6555 <legal all> 6556 */ 6557 6558 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_OFFSET 0x00000000000000b0 6559 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_LSB 11 6560 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_MSB 13 6561 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_MASK 0x0000000000003800 6562 6563 6564 /* Description NUM_HE_SIGB_SYM 6565 6566 Indicates the number of EHT-SIG symbols 6567 6568 This field is 0-based with 0 indicating that 1 eht_sig symbol 6569 needs to be transmitted. 6570 <legal all> 6571 */ 6572 6573 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_OFFSET 0x00000000000000b0 6574 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_LSB 14 6575 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_MSB 18 6576 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_MASK 0x000000000007c000 6577 6578 6579 /* Description REQUIRED_RESPONSE_TIME_SOURCE 6580 6581 <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received 6582 HT Control for sync MLO response 6583 <enum 1 reqd_resp_time_src_is_FW> 6584 Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response 6585 to response 6586 <legal all> 6587 */ 6588 6589 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x00000000000000b0 6590 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_LSB 19 6591 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_MSB 19 6592 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0000000000080000 6593 6594 6595 /* Description RESERVED_5A 6596 6597 <legal 0> 6598 */ 6599 6600 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_OFFSET 0x00000000000000b0 6601 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_LSB 20 6602 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_MSB 25 6603 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_MASK 0x0000000003f00000 6604 6605 6606 /* Description U_SIG_PUNCTURE_PATTERN_ENCODING 6607 6608 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO' 6609 to pass on to PDG 6610 <legal 0-29> 6611 */ 6612 6613 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x00000000000000b0 6614 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26 6615 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31 6616 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0x00000000fc000000 6617 6618 6619 /* Description MLO_STA_ID_DETAILS_RX 6620 6621 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass 6622 on to PDG 6623 6624 Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID' 6625 from address search. 6626 6627 See definition of mlo_sta_id_details. 6628 */ 6629 6630 6631 /* Description NSTR_MLO_STA_ID 6632 6633 ID of peer participating in non-STR MLO 6634 */ 6635 6636 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x00000000000000b0 6637 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 32 6638 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 41 6639 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff00000000 6640 6641 6642 /* Description BLOCK_SELF_ML_SYNC 6643 6644 Only valid for TX 6645 6646 When set, this provides an indication to block the peer 6647 for self-link. 6648 */ 6649 6650 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x00000000000000b0 6651 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 42 6652 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 42 6653 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000040000000000 6654 6655 6656 /* Description BLOCK_PARTNER_ML_SYNC 6657 6658 Only valid for TX 6659 6660 When set, this provides an indication to block the peer 6661 for partner links. 6662 */ 6663 6664 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x00000000000000b0 6665 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 43 6666 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 43 6667 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000080000000000 6668 6669 6670 /* Description NSTR_MLO_STA_ID_VALID 6671 6672 All the fields in this TLV are valid only if this bit is 6673 set. 6674 */ 6675 6676 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x00000000000000b0 6677 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 44 6678 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 44 6679 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000100000000000 6680 6681 6682 /* Description RESERVED_0A 6683 6684 <legal 0> 6685 */ 6686 6687 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x00000000000000b0 6688 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 45 6689 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 47 6690 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e00000000000 6691 6692 6693 /* Description REQUIRED_RESPONSE_TIME 6694 6695 When non-zero, indicates that PDG shall pad the response 6696 transmission to the indicated duration (in us) 6697 */ 6698 6699 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_OFFSET 0x00000000000000b0 6700 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_LSB 48 6701 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_MSB 59 6702 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_MASK 0x0fff000000000000 6703 6704 6705 /* Description DOT11BE_PARAMS_PLACEHOLDER 6706 6707 4 bytes for use as placeholders for 'Dot11be_*' parameters 6708 6709 */ 6710 6711 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x00000000000000b0 6712 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_LSB 60 6713 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_MSB 63 6714 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_MASK 0xf000000000000000 6715 6716 6717 /* Description R2R_HW_RESPONSE_TX_DURATION 6718 6719 Field only valid in case of Response_to_response set to 6720 SU_BA or MU_BA 6721 6722 The amount of time the transmission of the HW response to 6723 response will take (in us) 6724 6725 Used for coex as well as e.g. for sync MLO to align R2R 6726 times on the medium across multiple channels 6727 6728 This field also represents the 'alt_hw_response_tx_duration'. 6729 Note that this implies that no different duration can be 6730 programmed for the default and alt setting. SW should program 6731 the worst case value in the RXPCU table in case they are 6732 different. 6733 <legal all> 6734 */ 6735 6736 #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_OFFSET 0x00000000000000b8 6737 #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_LSB 0 6738 #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_MSB 15 6739 #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_MASK 0x000000000000ffff 6740 6741 6742 /* Description R2R_RX_DURATION_FIELD 6743 6744 Field only valid in case of Response_to_response set to 6745 SU_BA or MU_BA 6746 6747 The duration field assumed to have been received in the 6748 response frame and what will be used in the duration field 6749 calculation for the response_to_response_Frame 6750 6751 PDG uses this field to calculate what the duration field 6752 value should be in the response frame. 6753 This is returned to the TXPCU 6754 6755 Note that if PDG has protection in place to wrap around... 6756 I the actual transmit time is larger then the value programmed 6757 here, PDG HW will set the duration field in the response 6758 to response frame to zero. 6759 6760 This field is used in 11ah mode as well 6761 <legal all> 6762 */ 6763 6764 #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_OFFSET 0x00000000000000b8 6765 #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_LSB 16 6766 #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_MSB 31 6767 #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_MASK 0x00000000ffff0000 6768 6769 6770 /* Description R2R_GROUP_ID 6771 6772 Field only valid in case of Response_to_response set to 6773 SU_BA or MU_BA 6774 6775 Specifies the Group ID to be used in the response to response 6776 frame. 6777 <legal all> 6778 */ 6779 6780 #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_OFFSET 0x00000000000000b8 6781 #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_LSB 32 6782 #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_MSB 37 6783 #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_MASK 0x0000003f00000000 6784 6785 6786 /* Description R2R_RESPONSE_FRAME_TYPE 6787 6788 Field only valid in case of Response_to_response set to 6789 SU_BA or MU_BA 6790 6791 Response_frame_type to be indicated in the PDG_RESPONSE 6792 TLV for the response to response frame. 6793 6794 Coex related field 6795 <enum 0 Non_11ah_ACK > 6796 <enum 1 Non_11ah_BA > also used for M-BA 6797 <enum 2 Non_11ah_CTS > 6798 <enum 3 AH_NDP_CTS> 6799 <enum 4 AH_NDP_ACK> 6800 <enum 5 AH_NDP_BA> 6801 <enum 6 AH_NDP_MOD_ACK> 6802 <enum 7 AH_Normal_ACK> 6803 <enum 8 AH_Normal_BA> 6804 <enum 9 RTT_ACK> 6805 <enum 10 CBF_RESPONSE> 6806 <enum 11 MBA> This can be a multi STA BA or multi TID BA 6807 6808 <enum 12 Ranging_NDP> 6809 <enum 13 LMR_RESPONSE> NDP followed by LMR response for 6810 Rx ranging NDPA followed by NDP 6811 6812 <legal 0-12> 6813 */ 6814 6815 #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_OFFSET 0x00000000000000b8 6816 #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_LSB 38 6817 #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_MSB 41 6818 #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_MASK 0x000003c000000000 6819 6820 6821 /* Description R2R_STA_PARTIAL_AID 6822 6823 Field only valid in case of Response_to_response set to 6824 SU_BA or MU_BA 6825 6826 Specifies the partial AID of the response to response frame 6827 in case it is transmitted at VHT rates. 6828 <legal all> 6829 */ 6830 6831 #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_OFFSET 0x00000000000000b8 6832 #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_LSB 42 6833 #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_MSB 52 6834 #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_MASK 0x001ffc0000000000 6835 6836 6837 /* Description USE_ADDRESS_FIELDS_FOR_PROTECTION 6838 6839 When set, the protection_frame_ad1/ad2 fields are to be 6840 used for RTS/CTS2S frames 6841 6842 When set and not disabled through a TXPCU register bit, 6843 the protection_frame_ad2* fields are also copied to the 6844 tx_ad2* fields of the 'EXPECTED_RESPONSE' TLV (i.e. the 6845 expected response Rx AD1) to RXPCU for all frames. 6846 6847 <legal all> 6848 */ 6849 6850 #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_OFFSET 0x00000000000000b8 6851 #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_LSB 53 6852 #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_MSB 53 6853 #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_MASK 0x0020000000000000 6854 6855 6856 /* Description R2R_SET_REQUIRED_RESPONSE_TIME 6857 6858 Field only valid in case of response to response 6859 6860 When set, TXPCU shall copy the R2R_Hw_response_tx_duration 6861 field and pass it on to PDG in field required_response_time 6862 in 'PDG_RESPONSE.' 6863 6864 This allows SW to force an R2R time e.g. in case of sync 6865 MLO, making sure that the R2R times on the medium for multiple 6866 links are aligned. 6867 6868 <legal all> 6869 */ 6870 6871 #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_OFFSET 0x00000000000000b8 6872 #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_LSB 54 6873 #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_MSB 54 6874 #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_MASK 0x0040000000000000 6875 6876 6877 /* Description RESERVED_29A 6878 6879 <legal 0> 6880 */ 6881 6882 #define PCU_PPDU_SETUP_INIT_RESERVED_29A_OFFSET 0x00000000000000b8 6883 #define PCU_PPDU_SETUP_INIT_RESERVED_29A_LSB 55 6884 #define PCU_PPDU_SETUP_INIT_RESERVED_29A_MSB 57 6885 #define PCU_PPDU_SETUP_INIT_RESERVED_29A_MASK 0x0380000000000000 6886 6887 6888 /* Description R2R_BW20_ACTIVE_CHANNEL 6889 6890 Field only valid for 20 BW 6891 6892 NOTE: This field is also known as R2R_active_channel_pattern_0 6893 in case punctured transmission is enabled. 6894 6895 This field indicates the active frequency band when the 6896 initial trigger frame transmission was in 20 MHz 6897 <legal all> 6898 */ 6899 6900 #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_OFFSET 0x00000000000000b8 6901 #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_LSB 58 6902 #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_MSB 60 6903 #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_MASK 0x1c00000000000000 6904 6905 6906 /* Description R2R_BW40_ACTIVE_CHANNEL 6907 6908 Field only valid for 40 BW 6909 6910 NOTE: This field is also known as R2R_active_channel_pattern_1 6911 in case punctured transmission is enabled. 6912 6913 This field indicates the active frequency band when the 6914 initial trigger frame transmission was in 40 MHz 6915 <legal all> 6916 */ 6917 6918 #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_OFFSET 0x00000000000000b8 6919 #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_LSB 61 6920 #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_MSB 63 6921 #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_MASK 0xe000000000000000 6922 6923 6924 /* Description R2R_BW80_ACTIVE_CHANNEL 6925 6926 Field only valid for 80 BW 6927 6928 NOTE: This field is also known as R2R_active_channel_pattern_2 6929 in case punctured transmission is enabled. 6930 6931 This field indicates the active frequency band when the 6932 initial trigger frame transmission was in 80 MHz 6933 <legal all> 6934 */ 6935 6936 #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0 6937 #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_LSB 0 6938 #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_MSB 2 6939 #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_MASK 0x0000000000000007 6940 6941 6942 /* Description R2R_BW160_ACTIVE_CHANNEL 6943 6944 Field only valid for 160 BW 6945 6946 NOTE: This field is also known as R2R_active_channel_pattern_3 6947 in case punctured transmission is enabled. 6948 6949 This field indicates the active frequency band when the 6950 initial trigger frame transmission was in 160 MHz 6951 <legal all> 6952 */ 6953 6954 #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0 6955 #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_LSB 3 6956 #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_MSB 5 6957 #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_MASK 0x0000000000000038 6958 6959 6960 /* Description R2R_BW240_ACTIVE_CHANNEL 6961 6962 Field only valid for 240 BW 6963 6964 NOTE: This field is also known as R2R_active_channel_pattern_4 6965 in case punctured transmission is enabled. 6966 6967 This field indicates the active frequency band when the 6968 initial trigger frame transmission was in 240 MHz 6969 <legal all> 6970 */ 6971 6972 #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0 6973 #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_LSB 6 6974 #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_MSB 8 6975 #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_MASK 0x00000000000001c0 6976 6977 6978 /* Description R2R_BW320_ACTIVE_CHANNEL 6979 6980 Field only valid for 320 BW 6981 6982 NOTE: This field is also known as R2R_active_channel_pattern_5 6983 in case punctured transmission is enabled. 6984 6985 This field indicates the active frequency band when the 6986 initial trigger frame transmission was in 320 MHz 6987 <legal all> 6988 */ 6989 6990 #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0 6991 #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_LSB 9 6992 #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_MSB 11 6993 #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_MASK 0x0000000000000e00 6994 6995 6996 /* Description R2R_BW20 6997 6998 The BW for the response to response frame when the initial 6999 trigger frame transmission was in 20 MHz 7000 7001 NOTE: This field is also known as R2R_pattern_0 in case 7002 punctured transmission is enabled. 7003 7004 <enum 0 20_mhz>20 Mhz BW 7005 <enum 1 40_mhz>40 Mhz BW 7006 <enum 2 80_mhz>80 Mhz BW 7007 <enum 3 160_mhz>160 Mhz BW 7008 <enum 4 320_mhz>320 Mhz BW 7009 <enum 5 240_mhz>240 Mhz BW 7010 */ 7011 7012 #define PCU_PPDU_SETUP_INIT_R2R_BW20_OFFSET 0x00000000000000c0 7013 #define PCU_PPDU_SETUP_INIT_R2R_BW20_LSB 12 7014 #define PCU_PPDU_SETUP_INIT_R2R_BW20_MSB 14 7015 #define PCU_PPDU_SETUP_INIT_R2R_BW20_MASK 0x0000000000007000 7016 7017 7018 /* Description R2R_BW40 7019 7020 The BW for the response to response frame when the initial 7021 trigger frame transmission was in 40 MHz 7022 7023 NOTE: This field is also known as R2R_pattern_1 in case 7024 punctured transmission is enabled. 7025 7026 <enum 0 20_mhz>20 Mhz BW 7027 <enum 1 40_mhz>40 Mhz BW 7028 <enum 2 80_mhz>80 Mhz BW 7029 <enum 3 160_mhz>160 Mhz BW 7030 <enum 4 320_mhz>320 Mhz BW 7031 <enum 5 240_mhz>240 Mhz BW 7032 */ 7033 7034 #define PCU_PPDU_SETUP_INIT_R2R_BW40_OFFSET 0x00000000000000c0 7035 #define PCU_PPDU_SETUP_INIT_R2R_BW40_LSB 15 7036 #define PCU_PPDU_SETUP_INIT_R2R_BW40_MSB 17 7037 #define PCU_PPDU_SETUP_INIT_R2R_BW40_MASK 0x0000000000038000 7038 7039 7040 /* Description R2R_BW80 7041 7042 The BW for the response to response frame when the initial 7043 trigger frame transmission was in 80 MHz 7044 7045 NOTE: This field is also known as R2R_pattern_2 in case 7046 punctured transmission is enabled. 7047 7048 <enum 0 20_mhz>20 Mhz BW 7049 <enum 1 40_mhz>40 Mhz BW 7050 <enum 2 80_mhz>80 Mhz BW 7051 <enum 3 160_mhz>160 Mhz BW 7052 <enum 4 320_mhz>320 Mhz BW 7053 <enum 5 240_mhz>240 Mhz BW 7054 */ 7055 7056 #define PCU_PPDU_SETUP_INIT_R2R_BW80_OFFSET 0x00000000000000c0 7057 #define PCU_PPDU_SETUP_INIT_R2R_BW80_LSB 18 7058 #define PCU_PPDU_SETUP_INIT_R2R_BW80_MSB 20 7059 #define PCU_PPDU_SETUP_INIT_R2R_BW80_MASK 0x00000000001c0000 7060 7061 7062 /* Description R2R_BW160 7063 7064 The BW for the response to response frame when the initial 7065 trigger frame transmission was in 160 MHz 7066 7067 NOTE: This field is also known as R2R_pattern_3 in case 7068 punctured transmission is enabled. 7069 7070 <enum 0 20_mhz>20 Mhz BW 7071 <enum 1 40_mhz>40 Mhz BW 7072 <enum 2 80_mhz>80 Mhz BW 7073 <enum 3 160_mhz>160 Mhz BW 7074 <enum 4 320_mhz>320 Mhz BW 7075 <enum 5 240_mhz>240 Mhz BW 7076 */ 7077 7078 #define PCU_PPDU_SETUP_INIT_R2R_BW160_OFFSET 0x00000000000000c0 7079 #define PCU_PPDU_SETUP_INIT_R2R_BW160_LSB 21 7080 #define PCU_PPDU_SETUP_INIT_R2R_BW160_MSB 23 7081 #define PCU_PPDU_SETUP_INIT_R2R_BW160_MASK 0x0000000000e00000 7082 7083 7084 /* Description R2R_BW240 7085 7086 The BW for the response to response frame when the initial 7087 trigger frame transmission was in 240 MHz 7088 7089 NOTE: This field is also known as R2R_pattern_4 in case 7090 punctured transmission is enabled. 7091 7092 <enum 0 20_mhz>20 Mhz BW 7093 <enum 1 40_mhz>40 Mhz BW 7094 <enum 2 80_mhz>80 Mhz BW 7095 <enum 3 160_mhz>160 Mhz BW 7096 <enum 4 320_mhz>320 Mhz BW 7097 <enum 5 240_mhz>240 Mhz BW 7098 */ 7099 7100 #define PCU_PPDU_SETUP_INIT_R2R_BW240_OFFSET 0x00000000000000c0 7101 #define PCU_PPDU_SETUP_INIT_R2R_BW240_LSB 24 7102 #define PCU_PPDU_SETUP_INIT_R2R_BW240_MSB 26 7103 #define PCU_PPDU_SETUP_INIT_R2R_BW240_MASK 0x0000000007000000 7104 7105 7106 /* Description R2R_BW320 7107 7108 The BW for the response to response frame when the initial 7109 trigger frame transmission was in 320 MHz 7110 7111 NOTE: This field is also known as R2R_pattern_5 in case 7112 punctured transmission is enabled. 7113 7114 <enum 0 20_mhz>20 Mhz BW 7115 <enum 1 40_mhz>40 Mhz BW 7116 <enum 2 80_mhz>80 Mhz BW 7117 <enum 3 160_mhz>160 Mhz BW 7118 <enum 4 320_mhz>320 Mhz BW 7119 <enum 5 240_mhz>240 Mhz BW 7120 */ 7121 7122 #define PCU_PPDU_SETUP_INIT_R2R_BW320_OFFSET 0x00000000000000c0 7123 #define PCU_PPDU_SETUP_INIT_R2R_BW320_LSB 27 7124 #define PCU_PPDU_SETUP_INIT_R2R_BW320_MSB 29 7125 #define PCU_PPDU_SETUP_INIT_R2R_BW320_MASK 0x0000000038000000 7126 7127 7128 /* Description RESERVED_30A 7129 7130 <legal 0> 7131 */ 7132 7133 #define PCU_PPDU_SETUP_INIT_RESERVED_30A_OFFSET 0x00000000000000c0 7134 #define PCU_PPDU_SETUP_INIT_RESERVED_30A_LSB 30 7135 #define PCU_PPDU_SETUP_INIT_RESERVED_30A_MSB 31 7136 #define PCU_PPDU_SETUP_INIT_RESERVED_30A_MASK 0x00000000c0000000 7137 7138 7139 /* Description MU_RESPONSE_EXPECTED_BITMAP_31_0 7140 7141 Field only valid in case of MU transmission and a response 7142 from other or more then just user0 is expected. 7143 7144 Note that this implies that for all legacy SU exchanges, 7145 or legacy MU-MIMO where only user 0 can get a response, 7146 this field does not need to be programmed by SW. All existing 7147 programming remains backwards compatible. 7148 7149 Bit 0 represents user 0 7150 Bit 1 represents user 1 7151 ... 7152 When set, a response from this user is expected, and TXPCU 7153 shall generate the 'tx_fes_status_user_response' TLV for 7154 this user 7155 7156 Note that the number of bits set in bitmap fields 0 - 36 7157 (including next field), shall always be equal or greater 7158 then the number indicated in field: Required_UL_MU_resp_user_count 7159 7160 <legal all> 7161 */ 7162 7163 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_OFFSET 0x00000000000000c0 7164 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_LSB 32 7165 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_MSB 63 7166 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_MASK 0xffffffff00000000 7167 7168 7169 /* Description MU_RESPONSE_EXPECTED_BITMAP_36_32 7170 7171 Field only valid in case of MU transmission and a response 7172 from other or more then just user0 is expected. 7173 7174 Note that this implies that for all legacy SU exchanges, 7175 or legacy MU-MIMO where only user 0 can get a response, 7176 this field does not need to be programmed by SW. All existing 7177 programming remains backwards compatible. 7178 7179 Bit 0 represents user 32 7180 Bit 1 represents user 33 7181 ... 7182 When set, a response from this user is expected, and TXPCU 7183 shall generate the 'tx_fes_status_user_response' TLV for 7184 this user 7185 7186 Note that the number of bits set in bitmap fields 0 - 36 7187 (including previous field), shall always be equal or greater 7188 then the number indicated in field: Required_UL_MU_resp_user_count 7189 7190 <legal all> 7191 */ 7192 7193 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_OFFSET 0x00000000000000c8 7194 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_LSB 0 7195 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_MSB 4 7196 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_MASK 0x000000000000001f 7197 7198 7199 /* Description MU_EXPECTED_RESPONSE_CBF_COUNT 7200 7201 Field only valid when Response_type == MU_CBF_expected 7202 7203 The number of STAs that are expected to send a CBF back 7204 7205 Note that the actual amount could be smaller.... 7206 <legal all> 7207 */ 7208 7209 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_OFFSET 0x00000000000000c8 7210 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_LSB 5 7211 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_MSB 10 7212 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_MASK 0x00000000000007e0 7213 7214 7215 /* Description MU_EXPECTED_RESPONSE_STA_COUNT 7216 7217 SW shall program this field if the number of STAs that are 7218 expected to send something (ACK, DATA, BA, CBF, etc...) 7219 back is 2 or larger.. 7220 7221 The number of STAs that are expected to send a response 7222 back. 7223 7224 Note that the actual amount could be smaller.... 7225 <legal all> 7226 */ 7227 7228 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_OFFSET 0x00000000000000c8 7229 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_LSB 11 7230 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_MSB 16 7231 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_MASK 0x000000000001f800 7232 7233 7234 /* Description TRANSMIT_INCLUDES_MULTIDESTINATION 7235 7236 Used by TXPCU 7237 7238 When set, the MD (Multi Destination) feature is used for 7239 this transmission. Either for real multi destination STA 7240 transmissions or Multi TID transmissions. 7241 7242 Used by TXPCU to know when it can start pre-fetching data 7243 in order to do BW constrained frame drops. 7244 7245 <legal all> 7246 */ 7247 7248 #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_OFFSET 0x00000000000000c8 7249 #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_LSB 17 7250 #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_MSB 17 7251 #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_MASK 0x0000000000020000 7252 7253 7254 /* Description INSERT_PREV_TX_START_TIMING_INFO 7255 7256 When set, TXPCU will insert the value in TXPCU register "prev_phy_tx_start_transmit_time" 7257 in the transmit frame at the byte location indicated by 7258 field tx_start_transmit_time_byte_offset 7259 <legal all> 7260 */ 7261 7262 #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_OFFSET 0x00000000000000c8 7263 #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_LSB 18 7264 #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_MSB 18 7265 #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_MASK 0x0000000000040000 7266 7267 7268 /* Description INSERT_CURRENT_TX_START_TIMING_INFO 7269 7270 When set, TXPCU will insert the value in TXPCU register "current_phy_tx_start_transmit_time" 7271 in the transmit frame at the byte location indicated by 7272 field tx_start_transmit_time_byte_offset 7273 <legal all> 7274 */ 7275 7276 #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_OFFSET 0x00000000000000c8 7277 #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_LSB 19 7278 #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_MSB 19 7279 #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_MASK 0x0000000000080000 7280 7281 7282 /* Description TX_START_TRANSMIT_TIME_BYTE_OFFSET 7283 7284 Field only valid when insert_prev_tx_start_timing_info or 7285 insert_current_tx_start_timing_info is set. 7286 Start byte offset where the 'start_time' needs to be overwritten 7287 in the frame 7288 <legal all> 7289 */ 7290 7291 #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_OFFSET 0x00000000000000c8 7292 #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_LSB 20 7293 #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_MSB 31 7294 #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_MASK 0x00000000fff00000 7295 7296 7297 /* Description PROTECTION_FRAME_AD1_31_0 7298 7299 Field only valid when use_address_fields_for_protection 7300 is set 7301 7302 The Least Significant 4 bytes of the Protection Frame MAC 7303 Address AD1 7304 <legal all> 7305 */ 7306 7307 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_OFFSET 0x00000000000000c8 7308 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_LSB 32 7309 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_MSB 63 7310 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_MASK 0xffffffff00000000 7311 7312 7313 /* Description PROTECTION_FRAME_AD1_47_32 7314 7315 Field only valid when use_address_fields_for_protection 7316 is set 7317 7318 The 2 most significant bytes of the Protection Frame MAC 7319 Address AD1 7320 <legal all> 7321 */ 7322 7323 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_OFFSET 0x00000000000000d0 7324 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_LSB 0 7325 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_MSB 15 7326 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_MASK 0x000000000000ffff 7327 7328 7329 /* Description PROTECTION_FRAME_AD2_15_0 7330 7331 Field only valid when use_address_fields_for_protection 7332 is set 7333 7334 The Least Significant 2 bytes of the MAC Address AD2 7335 <legal all> 7336 */ 7337 7338 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_OFFSET 0x00000000000000d0 7339 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_LSB 16 7340 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_MSB 31 7341 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_MASK 0x00000000ffff0000 7342 7343 7344 /* Description PROTECTION_FRAME_AD2_47_16 7345 7346 Field only valid when use_address_fields_for_protection 7347 is set 7348 7349 The 4 most significant bytes of the MAC Address AD2 7350 <legal all> 7351 */ 7352 7353 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_OFFSET 0x00000000000000d0 7354 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_LSB 32 7355 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_MSB 63 7356 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_MASK 0xffffffff00000000 7357 7358 7359 /* Description DYNAMIC_MEDIUM_PROT_THRESHOLD 7360 7361 Threshold to enable the dynamic medium protection feature 7362 in terms of PPDU duration in us or PSDU length in bytes 7363 7364 7365 This is set to zero to disable the dynamic medium protection 7366 feature. 7367 7368 <legal all> 7369 */ 7370 7371 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_OFFSET 0x00000000000000d8 7372 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_LSB 0 7373 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_MSB 23 7374 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_MASK 0x0000000000ffffff 7375 7376 7377 /* Description DYNAMIC_MEDIUM_PROT_TYPE 7378 7379 <enum 0 dyn_medium_prot_byte> dynamic_medium_prot_threshold 7380 indicates PSDU length in bytes. 7381 <enum 1 dyn_medium_prot_us> 7382 dynamic_medium_prot_threshold indicates PPDU duration in 7383 us. 7384 <legal all> 7385 */ 7386 7387 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_OFFSET 0x00000000000000d8 7388 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_LSB 24 7389 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_MSB 24 7390 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_MASK 0x0000000001000000 7391 7392 7393 /* Description RESERVED_54A 7394 7395 <legal 0> 7396 */ 7397 7398 #define PCU_PPDU_SETUP_INIT_RESERVED_54A_OFFSET 0x00000000000000d8 7399 #define PCU_PPDU_SETUP_INIT_RESERVED_54A_LSB 25 7400 #define PCU_PPDU_SETUP_INIT_RESERVED_54A_MSB 31 7401 #define PCU_PPDU_SETUP_INIT_RESERVED_54A_MASK 0x00000000fe000000 7402 7403 7404 /* Description PROTECTION_FRAME_AD3_31_0 7405 7406 Field only valid when use_address_fields_for_protection 7407 is set 7408 7409 The least significant 4 bytes of the Protection Frame MAC 7410 Address AD3 7411 7412 Hamilton v1 did not include this (and any subsequent) word. 7413 7414 <legal all> 7415 */ 7416 7417 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_OFFSET 0x00000000000000d8 7418 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_LSB 32 7419 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_MSB 63 7420 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_MASK 0xffffffff00000000 7421 7422 7423 /* Description PROTECTION_FRAME_AD3_47_32 7424 7425 Field only valid when use_address_fields_for_protection 7426 is set 7427 7428 The 2 most significant bytes of the Protection Frame MAC 7429 Address AD3 7430 <legal all> 7431 */ 7432 7433 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_OFFSET 0x00000000000000e0 7434 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_LSB 0 7435 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_MSB 15 7436 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_MASK 0x000000000000ffff 7437 7438 7439 /* Description PROTECTION_FRAME_AD4_15_0 7440 7441 Field only valid when use_address_fields_for_protection 7442 is set 7443 7444 The least significant 2 bytes of the Protection Frame MAC 7445 Address AD4 7446 <legal all> 7447 */ 7448 7449 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_OFFSET 0x00000000000000e0 7450 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_LSB 16 7451 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_MSB 31 7452 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_MASK 0x00000000ffff0000 7453 7454 7455 /* Description PROTECTION_FRAME_AD4_47_16 7456 7457 Field only valid when use_address_fields_for_protection 7458 is set 7459 7460 The 4 most significant bytes of the Protection Frame MAC 7461 Address AD4 7462 <legal all> 7463 */ 7464 7465 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_OFFSET 0x00000000000000e0 7466 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_LSB 32 7467 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_MSB 63 7468 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_MASK 0xffffffff00000000 7469 7470 7471 7472 #endif // PCU_PPDU_SETUP_INIT 7473