xref: /wlan-driver/fw-api/hw/qca5332/phyrx_he_sig_a_su.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 
19 
20 
21 
22 
23 
24 
25 
26 #ifndef _PHYRX_HE_SIG_A_SU_H_
27 #define _PHYRX_HE_SIG_A_SU_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #include "he_sig_a_su_info.h"
32 #define NUM_OF_DWORDS_PHYRX_HE_SIG_A_SU 2
33 
34 #define NUM_OF_QWORDS_PHYRX_HE_SIG_A_SU 1
35 
36 
37 struct phyrx_he_sig_a_su {
38 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
39              struct   he_sig_a_su_info                                          phyrx_he_sig_a_su_info_details;
40 #else
41              struct   he_sig_a_su_info                                          phyrx_he_sig_a_su_info_details;
42 #endif
43 };
44 
45 
46 /* Description		PHYRX_HE_SIG_A_SU_INFO_DETAILS
47 
48 			See detailed description of the STRUCT
49 */
50 
51 
52 /* Description		FORMAT_INDICATION
53 
54 			<enum 0 HE_SIGA_FORMAT_HE_TRIG>
55 			<enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU>
56 			<legal all>
57 */
58 
59 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_OFFSET   0x0000000000000000
60 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_LSB      0
61 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_MSB      0
62 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_MASK     0x0000000000000001
63 
64 
65 /* Description		BEAM_CHANGE
66 
67 			Indicates whether spatial mapping is changed between legacy
68 			 and HE portion of preamble. If not, channel estimation
69 			can include legacy preamble to improve accuracy
70 			<legal all>
71 */
72 
73 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_OFFSET         0x0000000000000000
74 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_LSB            1
75 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_MSB            1
76 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_MASK           0x0000000000000002
77 
78 
79 /* Description		DL_UL_FLAG
80 
81 			Differentiates between DL and UL transmission
82 
83 			<enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
84 			<enum 1 DL_UL_FLAG_IS_UL>
85 			<legal all>
86 */
87 
88 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_OFFSET          0x0000000000000000
89 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_LSB             2
90 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_MSB             2
91 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_MASK            0x0000000000000004
92 
93 
94 /* Description		TRANSMIT_MCS
95 
96 			Indicates the data MCS
97 
98 			Field Used by MAC HW
99 			<legal all>
100 */
101 
102 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_OFFSET        0x0000000000000000
103 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_LSB           3
104 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_MSB           6
105 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_MASK          0x0000000000000078
106 
107 
108 /* Description		DCM
109 
110 			Indicates whether dual sub-carrier modulation is applied
111 
112 			0: No DCM
113 			1:DCM
114 			<legal all>
115 */
116 
117 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DCM_OFFSET                 0x0000000000000000
118 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DCM_LSB                    7
119 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DCM_MSB                    7
120 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DCM_MASK                   0x0000000000000080
121 
122 
123 /* Description		BSS_COLOR_ID
124 
125 			BSS color ID
126 
127 			Field Used by MAC HW
128 			<legal all>
129 */
130 
131 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_OFFSET        0x0000000000000000
132 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_LSB           8
133 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_MSB           13
134 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_MASK          0x0000000000003f00
135 
136 
137 /* Description		RESERVED_0A
138 
139 			Note: spec indicates this shall be set to 1
140 			<legal 1>
141 */
142 
143 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_OFFSET         0x0000000000000000
144 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_LSB            14
145 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_MSB            14
146 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_MASK           0x0000000000004000
147 
148 
149 /* Description		SPATIAL_REUSE
150 
151 			Spatial reuse
152 
153 			For 20MHz one SR field corresponding to entire 20MHz (other
154 			 3 fields indicate identical values)
155 			For 40MHz two SR fields for each 20MHz (other 2 fields indicate
156 			 identical values)
157 			For 80MHz four SR fields for each 20MHz
158 			For 160MHz four SR fields for each 40MHz
159 			<legal all>
160 */
161 
162 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_OFFSET       0x0000000000000000
163 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_LSB          15
164 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_MSB          18
165 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_MASK         0x0000000000078000
166 
167 
168 /* Description		TRANSMIT_BW
169 
170 			Bandwidth of the PPDU.
171 
172 			For HE SU PPDU
173 
174 
175 
176 			<enum 0 HE_SIG_A_BW20> 20 Mhz
177 			<enum 1 HE_SIG_A_BW40> 40 Mhz
178 			<enum 2 HE_SIG_A_BW80> 80 Mhz
179 			<enum 3 HE_SIG_A_BW160> 160 MHz or 80+80 MHz
180 
181 			For HE Extended Range SU PPDU
182 			Set to 0 for 242-tone RU
183 
184 			                  Set to 1 for right 106-tone RU within
185 			the primary 20 MHz
186 
187 			On RX side, Field Used by MAC HW
188 			<legal all>
189 */
190 
191 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_OFFSET         0x0000000000000000
192 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_LSB            19
193 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_MSB            20
194 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_MASK           0x0000000000180000
195 
196 
197 /* Description		CP_LTF_SIZE
198 
199 			Indicates the CP and HE-LTF type
200 
201 			<enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
202 			<enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
203 			<enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
204 
205 			<enum 3 FourX_LTF_0_8CP_3_2CP>
206 			When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
207 			When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
208 			In this scenario, Neither DCM nor STBC is applied to HE
209 			data field.
210 
211 			NOTE:
212 			If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
213 			0      = 1xLTF + 0.4 usec
214 			1      = 2xLTF + 0.4 usec
215 			2~3 = Reserved
216 
217 			<legal all>
218 */
219 
220 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_OFFSET         0x0000000000000000
221 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_LSB            21
222 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_MSB            22
223 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_MASK           0x0000000000600000
224 
225 
226 /* Description		NSTS
227 
228 			Indicates number of streams used for the SU transmission
229 
230 
231 			For HE SU PPDU
232 
233 
234 			                      Set to n for n+1 space time stream,
235 			where n = 0, 1, 2,.....,7.
236 
237 
238 
239 
240 			For HE Extended Range PPDU
241 
242 
243 			                            Set to 0 for 1 space time stream.
244 			 Value 1 is TBD
245 
246 
247 
248 			   Values 2 - 7 are reserved
249 			<legal all>
250 */
251 
252 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_NSTS_OFFSET                0x0000000000000000
253 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_NSTS_LSB                   23
254 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_NSTS_MSB                   25
255 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_NSTS_MASK                  0x0000000003800000
256 
257 
258 /* Description		RESERVED_0B
259 
260 			<legal 0>
261 */
262 
263 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_OFFSET         0x0000000000000000
264 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_LSB            26
265 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_MSB            31
266 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_MASK           0x00000000fc000000
267 
268 
269 /* Description		TXOP_DURATION
270 
271 			Indicates the remaining time in the current TXOP
272 
273 			Field Used by MAC HW
274 			 <legal all>
275 */
276 
277 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_OFFSET       0x0000000000000000
278 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_LSB          32
279 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_MSB          38
280 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_MASK         0x0000007f00000000
281 
282 
283 /* Description		CODING
284 
285 			Distinguishes between BCC and LDPC coding.
286 
287 			0: BCC
288 			1: LDPC
289 			<legal all>
290 */
291 
292 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CODING_OFFSET              0x0000000000000000
293 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CODING_LSB                 39
294 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CODING_MSB                 39
295 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CODING_MASK                0x0000008000000000
296 
297 
298 /* Description		LDPC_EXTRA_SYMBOL
299 
300 			If LDPC,
301 			  0: LDPC extra symbol not present
302 			  1: LDPC extra symbol present
303 			Else
304 			  Set to 1
305 			<legal all>
306 */
307 
308 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_OFFSET   0x0000000000000000
309 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_LSB      40
310 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_MSB      40
311 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_MASK     0x0000010000000000
312 
313 
314 /* Description		STBC
315 
316 			Indicates whether STBC is applied
317 			0: No STBC
318 			1: STBC
319 			<legal all>
320 */
321 
322 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_STBC_OFFSET                0x0000000000000000
323 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_STBC_LSB                   41
324 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_STBC_MSB                   41
325 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_STBC_MASK                  0x0000020000000000
326 
327 
328 /* Description		TXBF
329 
330 			Indicates whether beamforming is applied
331 			0: No beamforming
332 			1: beamforming
333 			<legal all>
334 */
335 
336 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXBF_OFFSET                0x0000000000000000
337 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXBF_LSB                   42
338 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXBF_MSB                   42
339 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXBF_MASK                  0x0000040000000000
340 
341 
342 /* Description		PACKET_EXTENSION_A_FACTOR
343 
344 			Common trigger info
345 
346 			the packet extension duration of the trigger-based PPDU
347 			response with these two bits indicating the "a-factor"
348 
349 			<enum 0 a_factor_4>
350 			<enum 1 a_factor_1>
351 			<enum 2 a_factor_2>
352 			<enum 3 a_factor_3>
353 
354 			<legal all>
355 */
356 
357 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_OFFSET 0x0000000000000000
358 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_LSB 43
359 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_MSB 44
360 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_MASK 0x0000180000000000
361 
362 
363 /* Description		PACKET_EXTENSION_PE_DISAMBIGUITY
364 
365 			Common trigger info
366 
367 			the packet extension duration of the trigger-based PPDU
368 			response with this bit indicating the PE-Disambiguity
369 			<legal all>
370 */
371 
372 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_OFFSET 0x0000000000000000
373 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_LSB 45
374 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_MSB 45
375 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_MASK 0x0000200000000000
376 
377 
378 /* Description		RESERVED_1A
379 
380 			Note: per standard, set to 1
381 			<legal 1>
382 */
383 
384 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_OFFSET         0x0000000000000000
385 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_LSB            46
386 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_MSB            46
387 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_MASK           0x0000400000000000
388 
389 
390 /* Description		DOPPLER_INDICATION
391 
392 			0: No Doppler support
393 			1: Doppler support
394 			<legal all>
395 */
396 
397 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_OFFSET  0x0000000000000000
398 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_LSB     47
399 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_MSB     47
400 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_MASK    0x0000800000000000
401 
402 
403 /* Description		CRC
404 
405 			CRC for HE-SIG-A contents.
406 			<legal all>
407 */
408 
409 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CRC_OFFSET                 0x0000000000000000
410 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CRC_LSB                    48
411 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CRC_MSB                    51
412 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CRC_MASK                   0x000f000000000000
413 
414 
415 /* Description		TAIL
416 
417 			<legal 0>
418 */
419 
420 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TAIL_OFFSET                0x0000000000000000
421 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TAIL_LSB                   52
422 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TAIL_MSB                   57
423 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TAIL_MASK                  0x03f0000000000000
424 
425 
426 /* Description		DOT11AX_SU_EXTENDED
427 
428 			TX side:
429 			Set to 0
430 
431 			RX side:
432 			On RX side, evaluated by MAC HW. This is the only way for
433 			 MAC RX to know that this was an HE_SIG_A_SU received in
434 			 'extended' format
435 
436 			When set, the 11ax frame is of the extended range format
437 
438 			<legal all>
439 */
440 
441 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000000
442 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_LSB    58
443 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_MSB    58
444 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_MASK   0x0400000000000000
445 
446 
447 /* Description		DOT11AX_EXT_RU_SIZE
448 
449 			TX side:
450 			Set to 0
451 
452 			RX side:
453 			Field only contains valid info when dot11ax_su_extended
454 			is set.
455 
456 			On RX side, evaluated by MAC HW. This is the only way for
457 			 MAC RX to know what the number of based RUs was in this
458 			 extended range reception. It is used by the MAC to determine
459 			 the RU size for the response...
460 
461 			<enum 0 EXT_RU_26>
462 			<enum 1 EXT_RU_52>
463 			<enum 2 EXT_RU_106>
464 			<enum 3 EXT_RU_242><legal 0-3>
465 */
466 
467 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000000
468 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_LSB    59
469 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_MSB    61
470 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_MASK   0x3800000000000000
471 
472 
473 /* Description		RX_NDP
474 
475 			TX side:
476 			Set to 0
477 
478 			RX side:Valid on RX side only, and looked at by MAC HW
479 
480 			When set, PHY has received (expected) NDP frame
481 			<legal all>
482 */
483 
484 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_OFFSET              0x0000000000000000
485 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_LSB                 62
486 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_MSB                 62
487 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_MASK                0x4000000000000000
488 
489 
490 /* Description		RX_INTEGRITY_CHECK_PASSED
491 
492 			TX side: Set to 0
493 			RX side: Set to 1 if PHY determines the HE-SIG-A CRC check
494 			 has passed, else set to 0
495 
496 			<legal all>
497 */
498 
499 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x0000000000000000
500 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB 63
501 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB 63
502 #define PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK 0x8000000000000000
503 
504 
505 
506 #endif   // PHYRX_HE_SIG_A_SU
507