xref: /wlan-driver/fw-api/hw/qca5332/phyrx_l_sig_a.h (revision 5113495b16420b49004c444715d2daae2066e7dc) 
1*5113495bSYour Name 
2*5113495bSYour Name /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3*5113495bSYour Name  *
4*5113495bSYour Name  * Permission to use, copy, modify, and/or distribute this software for any
5*5113495bSYour Name  * purpose with or without fee is hereby granted, provided that the above
6*5113495bSYour Name  * copyright notice and this permission notice appear in all copies.
7*5113495bSYour Name  *
8*5113495bSYour Name  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*5113495bSYour Name  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*5113495bSYour Name  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11*5113495bSYour Name  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*5113495bSYour Name  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13*5113495bSYour Name  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14*5113495bSYour Name  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*5113495bSYour Name  */
16*5113495bSYour Name 
17*5113495bSYour Name 
18*5113495bSYour Name 
19*5113495bSYour Name 
20*5113495bSYour Name 
21*5113495bSYour Name 
22*5113495bSYour Name 
23*5113495bSYour Name 
24*5113495bSYour Name 
25*5113495bSYour Name 
26*5113495bSYour Name #ifndef _PHYRX_L_SIG_A_H_
27*5113495bSYour Name #define _PHYRX_L_SIG_A_H_
28*5113495bSYour Name #if !defined(__ASSEMBLER__)
29*5113495bSYour Name #endif
30*5113495bSYour Name 
31*5113495bSYour Name #include "l_sig_a_info.h"
32*5113495bSYour Name #define NUM_OF_DWORDS_PHYRX_L_SIG_A 2
33*5113495bSYour Name 
34*5113495bSYour Name #define NUM_OF_QWORDS_PHYRX_L_SIG_A 1
35*5113495bSYour Name 
36*5113495bSYour Name 
37*5113495bSYour Name struct phyrx_l_sig_a {
38*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
39*5113495bSYour Name              struct   l_sig_a_info                                              phyrx_l_sig_a_info_details;
40*5113495bSYour Name              uint32_t tlv64_padding                                           : 32; // [31:0]
41*5113495bSYour Name #else
42*5113495bSYour Name              struct   l_sig_a_info                                              phyrx_l_sig_a_info_details;
43*5113495bSYour Name              uint32_t tlv64_padding                                           : 32; // [31:0]
44*5113495bSYour Name #endif
45*5113495bSYour Name };
46*5113495bSYour Name 
47*5113495bSYour Name 
48*5113495bSYour Name /* Description		PHYRX_L_SIG_A_INFO_DETAILS
49*5113495bSYour Name 
50*5113495bSYour Name 			See detailed description of the STRUCT
51*5113495bSYour Name */
52*5113495bSYour Name 
53*5113495bSYour Name 
54*5113495bSYour Name /* Description		RATE
55*5113495bSYour Name 
56*5113495bSYour Name 			This format is originally defined for OFDM as a 4 bit field
57*5113495bSYour Name 			 but the 5th bit was added to indicate 11b formatted frames.
58*5113495bSYour Name 			 In the standard bit [4] is specified as reserved.  For
59*5113495bSYour Name 			11b frames this L-SIG is transformed in the PHY into the
60*5113495bSYour Name 			 11b preamble format.  The following are the rates:
61*5113495bSYour Name 			<enum 8     ofdm_48_mbps> 64-QAM 2/3 (48 Mbps)
62*5113495bSYour Name 			<enum 9     ofdm_24_mbps> 16-QAM 1/2 (24 Mbps)
63*5113495bSYour Name 			<enum 10     ofdm_12_mbps> QPSK 1/2 (12 Mbps)
64*5113495bSYour Name 			<enum 11     ofdm_6_mbps> BPSK 1/2 (6 Mbps)
65*5113495bSYour Name 			<enum 12     ofdm_54_mbps> 64-QAM 3/4 (54 Mbps)
66*5113495bSYour Name 			<enum 13     ofdm_36_mbps> 16-QAM 3/4 (36 Mbps)
67*5113495bSYour Name 			<enum 14     ofdm_18_mbps> QPSK 1/2 (18 Mbps)
68*5113495bSYour Name 			<enum 15     ofdm_9_mbps> BPSK 3/4 (9 Mbps)
69*5113495bSYour Name 			<legal 8-15>
70*5113495bSYour Name */
71*5113495bSYour Name 
72*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_OFFSET                        0x0000000000000000
73*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_LSB                           0
74*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_MSB                           3
75*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_MASK                          0x000000000000000f
76*5113495bSYour Name 
77*5113495bSYour Name 
78*5113495bSYour Name /* Description		LSIG_RESERVED
79*5113495bSYour Name 
80*5113495bSYour Name 			Reserved: Should be set to 0 by the MAC and ignored by the
81*5113495bSYour Name 			 PHY
82*5113495bSYour Name 			<legal 0>
83*5113495bSYour Name */
84*5113495bSYour Name 
85*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_OFFSET               0x0000000000000000
86*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_LSB                  4
87*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_MSB                  4
88*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_MASK                 0x0000000000000010
89*5113495bSYour Name 
90*5113495bSYour Name 
91*5113495bSYour Name /* Description		LENGTH
92*5113495bSYour Name 
93*5113495bSYour Name 			The length indicates the number of octets in this MPDU.
94*5113495bSYour Name 			 Note that when using mixed mode .11n preamble or .11ac/.11ax/.11ba/.11be
95*5113495bSYour Name 			 this length provides the spoofed length for the PPDU.
96*5113495bSYour Name 			This length provides part of the information (viz. PPDU
97*5113495bSYour Name 			duration) to derive the actually PSDU length.  For legacy
98*5113495bSYour Name 			 OFDM and 11B frames the maximum length is 4095.
99*5113495bSYour Name 			<legal all>
100*5113495bSYour Name */
101*5113495bSYour Name 
102*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_OFFSET                      0x0000000000000000
103*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_LSB                         5
104*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_MSB                         16
105*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_MASK                        0x000000000001ffe0
106*5113495bSYour Name 
107*5113495bSYour Name 
108*5113495bSYour Name /* Description		PARITY
109*5113495bSYour Name 
110*5113495bSYour Name 			11a/n/ac TX: This field provides even parity over the first
111*5113495bSYour Name 			 18 bits of the signal field which means that the sum of
112*5113495bSYour Name 			 1s in the signal field will always be even on transmission.
113*5113495bSYour Name 			The value of the field is computed by the MAC.
114*5113495bSYour Name 			11a/n/ac RX: this field contains the received parity field
115*5113495bSYour Name 			 from the L-SIG symbol for the current packet.
116*5113495bSYour Name 			<legal 0-1>
117*5113495bSYour Name */
118*5113495bSYour Name 
119*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_OFFSET                      0x0000000000000000
120*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_LSB                         17
121*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_MSB                         17
122*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_MASK                        0x0000000000020000
123*5113495bSYour Name 
124*5113495bSYour Name 
125*5113495bSYour Name /* Description		TAIL
126*5113495bSYour Name 
127*5113495bSYour Name 			The 6 bits of tail is always set to 0 is used to flush the
128*5113495bSYour Name 			 BCC encoder and decoder.  <legal 0>
129*5113495bSYour Name */
130*5113495bSYour Name 
131*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_OFFSET                        0x0000000000000000
132*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_LSB                           18
133*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_MSB                           23
134*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_MASK                          0x0000000000fc0000
135*5113495bSYour Name 
136*5113495bSYour Name 
137*5113495bSYour Name /* Description		PKT_TYPE
138*5113495bSYour Name 
139*5113495bSYour Name 			Only used on the RX side.
140*5113495bSYour Name 			Note: This is not really part of L-SIG
141*5113495bSYour Name 
142*5113495bSYour Name 			Packet type:
143*5113495bSYour Name 			<enum 0 dot11a>802.11a PPDU type
144*5113495bSYour Name 			<enum 1 dot11b>802.11b PPDU type
145*5113495bSYour Name 			<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
146*5113495bSYour Name 			<enum 3 dot11ac>802.11ac PPDU type
147*5113495bSYour Name 			<enum 4 dot11ax>802.11ax PPDU type
148*5113495bSYour Name 			<enum 5 dot11ba>802.11ba (WUR) PPDU type
149*5113495bSYour Name 			<enum 6 dot11be>802.11be PPDU type
150*5113495bSYour Name 			<enum 7 dot11az>802.11az (ranging) PPDU type
151*5113495bSYour Name 			<enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
152*5113495bSYour Name 			 & aborted)
153*5113495bSYour Name */
154*5113495bSYour Name 
155*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_OFFSET                    0x0000000000000000
156*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_LSB                       24
157*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_MSB                       27
158*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_MASK                      0x000000000f000000
159*5113495bSYour Name 
160*5113495bSYour Name 
161*5113495bSYour Name /* Description		CAPTURED_IMPLICIT_SOUNDING
162*5113495bSYour Name 
163*5113495bSYour Name 			Only used on the RX side.
164*5113495bSYour Name 			Note: This is not really part of L-SIG
165*5113495bSYour Name 
166*5113495bSYour Name 			This indicates that the PHY has captured implicit sounding.
167*5113495bSYour Name 
168*5113495bSYour Name */
169*5113495bSYour Name 
170*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_OFFSET  0x0000000000000000
171*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_LSB     28
172*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_MSB     28
173*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_MASK    0x0000000010000000
174*5113495bSYour Name 
175*5113495bSYour Name 
176*5113495bSYour Name /* Description		RESERVED
177*5113495bSYour Name 
178*5113495bSYour Name 			Reserved: Should be set to 0 by the transmitting MAC and
179*5113495bSYour Name 			 ignored by the PHY <legal 0>
180*5113495bSYour Name */
181*5113495bSYour Name 
182*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_OFFSET                    0x0000000000000000
183*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_LSB                       29
184*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_MSB                       30
185*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_MASK                      0x0000000060000000
186*5113495bSYour Name 
187*5113495bSYour Name 
188*5113495bSYour Name /* Description		RX_INTEGRITY_CHECK_PASSED
189*5113495bSYour Name 
190*5113495bSYour Name 			TX side: Set to 0
191*5113495bSYour Name 			RX side: Set to 1 if PHY determines the L-SIG integrity
192*5113495bSYour Name 			check has passed, else set to 0
193*5113495bSYour Name 
194*5113495bSYour Name 			<legal all>
195*5113495bSYour Name */
196*5113495bSYour Name 
197*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET   0x0000000000000000
198*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB      31
199*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB      31
200*5113495bSYour Name #define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK     0x0000000080000000
201*5113495bSYour Name 
202*5113495bSYour Name 
203*5113495bSYour Name /* Description		TLV64_PADDING
204*5113495bSYour Name 
205*5113495bSYour Name 			Automatic DWORD padding inserted while converting TLV32
206*5113495bSYour Name 			to TLV64 for 64 bit ARCH
207*5113495bSYour Name 			<legal 0>
208*5113495bSYour Name */
209*5113495bSYour Name 
210*5113495bSYour Name #define PHYRX_L_SIG_A_TLV64_PADDING_OFFSET                                          0x0000000000000000
211*5113495bSYour Name #define PHYRX_L_SIG_A_TLV64_PADDING_LSB                                             32
212*5113495bSYour Name #define PHYRX_L_SIG_A_TLV64_PADDING_MSB                                             63
213*5113495bSYour Name #define PHYRX_L_SIG_A_TLV64_PADDING_MASK                                            0xffffffff00000000
214*5113495bSYour Name 
215*5113495bSYour Name 
216*5113495bSYour Name 
217*5113495bSYour Name #endif   // PHYRX_L_SIG_A
218