1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _RECEIVE_RSSI_INFO_H_ 27 #define _RECEIVE_RSSI_INFO_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_DWORDS_RECEIVE_RSSI_INFO 16 32 33 34 struct receive_rssi_info { 35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 36 uint32_t rssi_pri20_chain0 : 8, // [7:0] 37 rssi_ext20_chain0 : 8, // [15:8] 38 rssi_ext40_low20_chain0 : 8, // [23:16] 39 rssi_ext40_high20_chain0 : 8; // [31:24] 40 uint32_t rssi_ext80_low20_chain0 : 8, // [7:0] 41 rssi_ext80_low_high20_chain0 : 8, // [15:8] 42 rssi_ext80_high_low20_chain0 : 8, // [23:16] 43 rssi_ext80_high20_chain0 : 8; // [31:24] 44 uint32_t rssi_ext160_0_chain0 : 8, // [7:0] 45 rssi_ext160_1_chain0 : 8, // [15:8] 46 rssi_ext160_2_chain0 : 8, // [23:16] 47 rssi_ext160_3_chain0 : 8; // [31:24] 48 uint32_t rssi_ext160_4_chain0 : 8, // [7:0] 49 rssi_ext160_5_chain0 : 8, // [15:8] 50 rssi_ext160_6_chain0 : 8, // [23:16] 51 rssi_ext160_7_chain0 : 8; // [31:24] 52 uint32_t rssi_pri20_chain1 : 8, // [7:0] 53 rssi_ext20_chain1 : 8, // [15:8] 54 rssi_ext40_low20_chain1 : 8, // [23:16] 55 rssi_ext40_high20_chain1 : 8; // [31:24] 56 uint32_t rssi_ext80_low20_chain1 : 8, // [7:0] 57 rssi_ext80_low_high20_chain1 : 8, // [15:8] 58 rssi_ext80_high_low20_chain1 : 8, // [23:16] 59 rssi_ext80_high20_chain1 : 8; // [31:24] 60 uint32_t rssi_ext160_0_chain1 : 8, // [7:0] 61 rssi_ext160_1_chain1 : 8, // [15:8] 62 rssi_ext160_2_chain1 : 8, // [23:16] 63 rssi_ext160_3_chain1 : 8; // [31:24] 64 uint32_t rssi_ext160_4_chain1 : 8, // [7:0] 65 rssi_ext160_5_chain1 : 8, // [15:8] 66 rssi_ext160_6_chain1 : 8, // [23:16] 67 rssi_ext160_7_chain1 : 8; // [31:24] 68 uint32_t rssi_pri20_chain2 : 8, // [7:0] 69 rssi_ext20_chain2 : 8, // [15:8] 70 rssi_ext40_low20_chain2 : 8, // [23:16] 71 rssi_ext40_high20_chain2 : 8; // [31:24] 72 uint32_t rssi_ext80_low20_chain2 : 8, // [7:0] 73 rssi_ext80_low_high20_chain2 : 8, // [15:8] 74 rssi_ext80_high_low20_chain2 : 8, // [23:16] 75 rssi_ext80_high20_chain2 : 8; // [31:24] 76 uint32_t rssi_ext160_0_chain2 : 8, // [7:0] 77 rssi_ext160_1_chain2 : 8, // [15:8] 78 rssi_ext160_2_chain2 : 8, // [23:16] 79 rssi_ext160_3_chain2 : 8; // [31:24] 80 uint32_t rssi_ext160_4_chain2 : 8, // [7:0] 81 rssi_ext160_5_chain2 : 8, // [15:8] 82 rssi_ext160_6_chain2 : 8, // [23:16] 83 rssi_ext160_7_chain2 : 8; // [31:24] 84 uint32_t rssi_pri20_chain3 : 8, // [7:0] 85 rssi_ext20_chain3 : 8, // [15:8] 86 rssi_ext40_low20_chain3 : 8, // [23:16] 87 rssi_ext40_high20_chain3 : 8; // [31:24] 88 uint32_t rssi_ext80_low20_chain3 : 8, // [7:0] 89 rssi_ext80_low_high20_chain3 : 8, // [15:8] 90 rssi_ext80_high_low20_chain3 : 8, // [23:16] 91 rssi_ext80_high20_chain3 : 8; // [31:24] 92 uint32_t rssi_ext160_0_chain3 : 8, // [7:0] 93 rssi_ext160_1_chain3 : 8, // [15:8] 94 rssi_ext160_2_chain3 : 8, // [23:16] 95 rssi_ext160_3_chain3 : 8; // [31:24] 96 uint32_t rssi_ext160_4_chain3 : 8, // [7:0] 97 rssi_ext160_5_chain3 : 8, // [15:8] 98 rssi_ext160_6_chain3 : 8, // [23:16] 99 rssi_ext160_7_chain3 : 8; // [31:24] 100 #else 101 uint32_t rssi_ext40_high20_chain0 : 8, // [31:24] 102 rssi_ext40_low20_chain0 : 8, // [23:16] 103 rssi_ext20_chain0 : 8, // [15:8] 104 rssi_pri20_chain0 : 8; // [7:0] 105 uint32_t rssi_ext80_high20_chain0 : 8, // [31:24] 106 rssi_ext80_high_low20_chain0 : 8, // [23:16] 107 rssi_ext80_low_high20_chain0 : 8, // [15:8] 108 rssi_ext80_low20_chain0 : 8; // [7:0] 109 uint32_t rssi_ext160_3_chain0 : 8, // [31:24] 110 rssi_ext160_2_chain0 : 8, // [23:16] 111 rssi_ext160_1_chain0 : 8, // [15:8] 112 rssi_ext160_0_chain0 : 8; // [7:0] 113 uint32_t rssi_ext160_7_chain0 : 8, // [31:24] 114 rssi_ext160_6_chain0 : 8, // [23:16] 115 rssi_ext160_5_chain0 : 8, // [15:8] 116 rssi_ext160_4_chain0 : 8; // [7:0] 117 uint32_t rssi_ext40_high20_chain1 : 8, // [31:24] 118 rssi_ext40_low20_chain1 : 8, // [23:16] 119 rssi_ext20_chain1 : 8, // [15:8] 120 rssi_pri20_chain1 : 8; // [7:0] 121 uint32_t rssi_ext80_high20_chain1 : 8, // [31:24] 122 rssi_ext80_high_low20_chain1 : 8, // [23:16] 123 rssi_ext80_low_high20_chain1 : 8, // [15:8] 124 rssi_ext80_low20_chain1 : 8; // [7:0] 125 uint32_t rssi_ext160_3_chain1 : 8, // [31:24] 126 rssi_ext160_2_chain1 : 8, // [23:16] 127 rssi_ext160_1_chain1 : 8, // [15:8] 128 rssi_ext160_0_chain1 : 8; // [7:0] 129 uint32_t rssi_ext160_7_chain1 : 8, // [31:24] 130 rssi_ext160_6_chain1 : 8, // [23:16] 131 rssi_ext160_5_chain1 : 8, // [15:8] 132 rssi_ext160_4_chain1 : 8; // [7:0] 133 uint32_t rssi_ext40_high20_chain2 : 8, // [31:24] 134 rssi_ext40_low20_chain2 : 8, // [23:16] 135 rssi_ext20_chain2 : 8, // [15:8] 136 rssi_pri20_chain2 : 8; // [7:0] 137 uint32_t rssi_ext80_high20_chain2 : 8, // [31:24] 138 rssi_ext80_high_low20_chain2 : 8, // [23:16] 139 rssi_ext80_low_high20_chain2 : 8, // [15:8] 140 rssi_ext80_low20_chain2 : 8; // [7:0] 141 uint32_t rssi_ext160_3_chain2 : 8, // [31:24] 142 rssi_ext160_2_chain2 : 8, // [23:16] 143 rssi_ext160_1_chain2 : 8, // [15:8] 144 rssi_ext160_0_chain2 : 8; // [7:0] 145 uint32_t rssi_ext160_7_chain2 : 8, // [31:24] 146 rssi_ext160_6_chain2 : 8, // [23:16] 147 rssi_ext160_5_chain2 : 8, // [15:8] 148 rssi_ext160_4_chain2 : 8; // [7:0] 149 uint32_t rssi_ext40_high20_chain3 : 8, // [31:24] 150 rssi_ext40_low20_chain3 : 8, // [23:16] 151 rssi_ext20_chain3 : 8, // [15:8] 152 rssi_pri20_chain3 : 8; // [7:0] 153 uint32_t rssi_ext80_high20_chain3 : 8, // [31:24] 154 rssi_ext80_high_low20_chain3 : 8, // [23:16] 155 rssi_ext80_low_high20_chain3 : 8, // [15:8] 156 rssi_ext80_low20_chain3 : 8; // [7:0] 157 uint32_t rssi_ext160_3_chain3 : 8, // [31:24] 158 rssi_ext160_2_chain3 : 8, // [23:16] 159 rssi_ext160_1_chain3 : 8, // [15:8] 160 rssi_ext160_0_chain3 : 8; // [7:0] 161 uint32_t rssi_ext160_7_chain3 : 8, // [31:24] 162 rssi_ext160_6_chain3 : 8, // [23:16] 163 rssi_ext160_5_chain3 : 8, // [15:8] 164 rssi_ext160_4_chain3 : 8; // [7:0] 165 #endif 166 }; 167 168 169 /* Description RSSI_PRI20_CHAIN0 170 171 RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth. 172 173 Value of 0x80 indicates invalid. 174 */ 175 176 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN0_OFFSET 0x00000000 177 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN0_LSB 0 178 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN0_MSB 7 179 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN0_MASK 0x000000ff 180 181 182 /* Description RSSI_EXT20_CHAIN0 183 184 RSSI of RX PPDU on chain 0 of extension 20 MHz bandwidth. 185 186 Value of 0x80 indicates invalid. 187 */ 188 189 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN0_OFFSET 0x00000000 190 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN0_LSB 8 191 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN0_MSB 15 192 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN0_MASK 0x0000ff00 193 194 195 /* Description RSSI_EXT40_LOW20_CHAIN0 196 197 RSSI of RX PPDU on chain 0 of extension 40, low 20 MHz bandwidth. 198 199 Value of 0x80 indicates invalid. 200 */ 201 202 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN0_OFFSET 0x00000000 203 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN0_LSB 16 204 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN0_MSB 23 205 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN0_MASK 0x00ff0000 206 207 208 /* Description RSSI_EXT40_HIGH20_CHAIN0 209 210 RSSI of RX PPDU on chain 0 of extension 40, high 20 MHz 211 bandwidth. 212 Value of 0x80 indicates invalid. 213 */ 214 215 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN0_OFFSET 0x00000000 216 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN0_LSB 24 217 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN0_MSB 31 218 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN0_MASK 0xff000000 219 220 221 /* Description RSSI_EXT80_LOW20_CHAIN0 222 223 RSSI of RX PPDU on chain 0 of extension 80, low 20 MHz bandwidth. 224 225 Value of 0x80 indicates invalid. 226 */ 227 228 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN0_OFFSET 0x00000004 229 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN0_LSB 0 230 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN0_MSB 7 231 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN0_MASK 0x000000ff 232 233 234 /* Description RSSI_EXT80_LOW_HIGH20_CHAIN0 235 236 RSSI of RX PPDU on chain 0 of extension 80, low-high 20 237 MHz bandwidth. 238 Value of 0x80 indicates invalid. 239 */ 240 241 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN0_OFFSET 0x00000004 242 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN0_LSB 8 243 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN0_MSB 15 244 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN0_MASK 0x0000ff00 245 246 247 /* Description RSSI_EXT80_HIGH_LOW20_CHAIN0 248 249 RSSI of RX PPDU on chain 0 of extension 80, high-low 20 250 MHz bandwidth. 251 Value of 0x80 indicates invalid. 252 */ 253 254 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN0_OFFSET 0x00000004 255 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN0_LSB 16 256 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN0_MSB 23 257 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN0_MASK 0x00ff0000 258 259 260 /* Description RSSI_EXT80_HIGH20_CHAIN0 261 262 RSSI of RX PPDU on chain 0 of extension 80, high 20 MHz 263 bandwidth. 264 Value of 0x80 indicates invalid. 265 */ 266 267 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN0_OFFSET 0x00000004 268 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN0_LSB 24 269 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN0_MSB 31 270 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN0_MASK 0xff000000 271 272 273 /* Description RSSI_EXT160_0_CHAIN0 274 275 RSSI of RX PPDU on chain 0 of extension 160, lowest 20 MHz 276 bandwidth. 277 Value of 0x80 indicates invalid. 278 */ 279 280 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN0_OFFSET 0x00000008 281 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN0_LSB 0 282 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN0_MSB 7 283 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN0_MASK 0x000000ff 284 285 286 /* Description RSSI_EXT160_1_CHAIN0 287 288 RSSI of RX PPDU on chain 0 of extension 160, next 20 MHz 289 bandwidth. 290 Value of 0x80 indicates invalid. 291 */ 292 293 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN0_OFFSET 0x00000008 294 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN0_LSB 8 295 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN0_MSB 15 296 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN0_MASK 0x0000ff00 297 298 299 /* Description RSSI_EXT160_2_CHAIN0 300 301 RSSI of RX PPDU on chain 0 of extension 160, next 20 MHz 302 bandwidth. 303 Value of 0x80 indicates invalid. 304 */ 305 306 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN0_OFFSET 0x00000008 307 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN0_LSB 16 308 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN0_MSB 23 309 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN0_MASK 0x00ff0000 310 311 312 /* Description RSSI_EXT160_3_CHAIN0 313 314 RSSI of RX PPDU on chain 0 of extension 160, next 20 MHz 315 bandwidth. 316 Value of 0x80 indicates invalid. 317 */ 318 319 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN0_OFFSET 0x00000008 320 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN0_LSB 24 321 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN0_MSB 31 322 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN0_MASK 0xff000000 323 324 325 /* Description RSSI_EXT160_4_CHAIN0 326 327 RSSI of RX PPDU on chain 0 of extension 160, next 20 MHz 328 bandwidth. 329 Value of 0x80 indicates invalid. 330 */ 331 332 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN0_OFFSET 0x0000000c 333 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN0_LSB 0 334 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN0_MSB 7 335 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN0_MASK 0x000000ff 336 337 338 /* Description RSSI_EXT160_5_CHAIN0 339 340 RSSI of RX PPDU on chain 0 of extension 160, next 20 MHz 341 bandwidth. 342 Value of 0x80 indicates invalid. 343 */ 344 345 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN0_OFFSET 0x0000000c 346 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN0_LSB 8 347 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN0_MSB 15 348 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN0_MASK 0x0000ff00 349 350 351 /* Description RSSI_EXT160_6_CHAIN0 352 353 RSSI of RX PPDU on chain 0 of extension 160, next 20 MHz 354 bandwidth. 355 Value of 0x80 indicates invalid. 356 */ 357 358 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN0_OFFSET 0x0000000c 359 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN0_LSB 16 360 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN0_MSB 23 361 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN0_MASK 0x00ff0000 362 363 364 /* Description RSSI_EXT160_7_CHAIN0 365 366 RSSI of RX PPDU on chain 0 of extension 160, highest 20 367 MHz bandwidth. 368 Value of 0x80 indicates invalid. 369 */ 370 371 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN0_OFFSET 0x0000000c 372 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN0_LSB 24 373 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN0_MSB 31 374 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN0_MASK 0xff000000 375 376 377 /* Description RSSI_PRI20_CHAIN1 378 379 RSSI of RX PPDU on chain 1 of primary 20 MHz bandwidth. 380 381 Value of 0x80 indicates invalid. 382 */ 383 384 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN1_OFFSET 0x00000010 385 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN1_LSB 0 386 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN1_MSB 7 387 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN1_MASK 0x000000ff 388 389 390 /* Description RSSI_EXT20_CHAIN1 391 392 RSSI of RX PPDU on chain 1 of extension 20 MHz bandwidth. 393 394 Value of 0x80 indicates invalid. 395 */ 396 397 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN1_OFFSET 0x00000010 398 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN1_LSB 8 399 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN1_MSB 15 400 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN1_MASK 0x0000ff00 401 402 403 /* Description RSSI_EXT40_LOW20_CHAIN1 404 405 RSSI of RX PPDU on chain 1 of extension 40, low 20 MHz bandwidth. 406 407 Value of 0x80 indicates invalid. 408 */ 409 410 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN1_OFFSET 0x00000010 411 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN1_LSB 16 412 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN1_MSB 23 413 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN1_MASK 0x00ff0000 414 415 416 /* Description RSSI_EXT40_HIGH20_CHAIN1 417 418 RSSI of RX PPDU on chain 1 of extension 40, high 20 MHz 419 bandwidth. 420 Value of 0x80 indicates invalid. 421 */ 422 423 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN1_OFFSET 0x00000010 424 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN1_LSB 24 425 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN1_MSB 31 426 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN1_MASK 0xff000000 427 428 429 /* Description RSSI_EXT80_LOW20_CHAIN1 430 431 RSSI of RX PPDU on chain 1 of extension 80, low 20 MHz bandwidth. 432 433 Value of 0x80 indicates invalid. 434 */ 435 436 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN1_OFFSET 0x00000014 437 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN1_LSB 0 438 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN1_MSB 7 439 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN1_MASK 0x000000ff 440 441 442 /* Description RSSI_EXT80_LOW_HIGH20_CHAIN1 443 444 RSSI of RX PPDU on chain 1 of extension 80, low-high 20 445 MHz bandwidth. 446 Value of 0x80 indicates invalid. 447 */ 448 449 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN1_OFFSET 0x00000014 450 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN1_LSB 8 451 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN1_MSB 15 452 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN1_MASK 0x0000ff00 453 454 455 /* Description RSSI_EXT80_HIGH_LOW20_CHAIN1 456 457 RSSI of RX PPDU on chain 1 of extension 80, high-low 20 458 MHz bandwidth. 459 Value of 0x80 indicates invalid. 460 */ 461 462 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN1_OFFSET 0x00000014 463 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN1_LSB 16 464 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN1_MSB 23 465 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN1_MASK 0x00ff0000 466 467 468 /* Description RSSI_EXT80_HIGH20_CHAIN1 469 470 RSSI of RX PPDU on chain 1 of extension 80, high 20 MHz 471 bandwidth. 472 Value of 0x80 indicates invalid. 473 */ 474 475 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN1_OFFSET 0x00000014 476 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN1_LSB 24 477 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN1_MSB 31 478 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN1_MASK 0xff000000 479 480 481 /* Description RSSI_EXT160_0_CHAIN1 482 483 RSSI of RX PPDU on chain 1 of extension 160, lowest 20 MHz 484 bandwidth. 485 Value of 0x80 indicates invalid. 486 */ 487 488 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN1_OFFSET 0x00000018 489 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN1_LSB 0 490 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN1_MSB 7 491 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN1_MASK 0x000000ff 492 493 494 /* Description RSSI_EXT160_1_CHAIN1 495 496 RSSI of RX PPDU on chain 1 of extension 160, next 20 MHz 497 bandwidth. 498 Value of 0x80 indicates invalid. 499 */ 500 501 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN1_OFFSET 0x00000018 502 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN1_LSB 8 503 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN1_MSB 15 504 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN1_MASK 0x0000ff00 505 506 507 /* Description RSSI_EXT160_2_CHAIN1 508 509 RSSI of RX PPDU on chain 1 of extension 160, next 20 MHz 510 bandwidth. 511 Value of 0x80 indicates invalid. 512 */ 513 514 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN1_OFFSET 0x00000018 515 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN1_LSB 16 516 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN1_MSB 23 517 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN1_MASK 0x00ff0000 518 519 520 /* Description RSSI_EXT160_3_CHAIN1 521 522 RSSI of RX PPDU on chain 1 of extension 160, next 20 MHz 523 bandwidth. 524 Value of 0x80 indicates invalid. 525 */ 526 527 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN1_OFFSET 0x00000018 528 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN1_LSB 24 529 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN1_MSB 31 530 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN1_MASK 0xff000000 531 532 533 /* Description RSSI_EXT160_4_CHAIN1 534 535 RSSI of RX PPDU on chain 1 of extension 160, next 20 MHz 536 bandwidth. 537 Value of 0x80 indicates invalid. 538 */ 539 540 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN1_OFFSET 0x0000001c 541 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN1_LSB 0 542 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN1_MSB 7 543 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN1_MASK 0x000000ff 544 545 546 /* Description RSSI_EXT160_5_CHAIN1 547 548 RSSI of RX PPDU on chain 1 of extension 160, next 20 MHz 549 bandwidth. 550 Value of 0x80 indicates invalid. 551 */ 552 553 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN1_OFFSET 0x0000001c 554 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN1_LSB 8 555 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN1_MSB 15 556 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN1_MASK 0x0000ff00 557 558 559 /* Description RSSI_EXT160_6_CHAIN1 560 561 RSSI of RX PPDU on chain 1 of extension 160, next 20 MHz 562 bandwidth. 563 Value of 0x80 indicates invalid. 564 */ 565 566 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN1_OFFSET 0x0000001c 567 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN1_LSB 16 568 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN1_MSB 23 569 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN1_MASK 0x00ff0000 570 571 572 /* Description RSSI_EXT160_7_CHAIN1 573 574 RSSI of RX PPDU on chain 1 of extension 160, highest 20 575 MHz bandwidth. 576 Value of 0x80 indicates invalid. 577 */ 578 579 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN1_OFFSET 0x0000001c 580 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN1_LSB 24 581 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN1_MSB 31 582 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN1_MASK 0xff000000 583 584 585 /* Description RSSI_PRI20_CHAIN2 586 587 RSSI of RX PPDU on chain 2 of primary 20 MHz bandwidth. 588 589 Value of 0x80 indicates invalid. 590 */ 591 592 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN2_OFFSET 0x00000020 593 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN2_LSB 0 594 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN2_MSB 7 595 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN2_MASK 0x000000ff 596 597 598 /* Description RSSI_EXT20_CHAIN2 599 600 RSSI of RX PPDU on chain 2 of extension 20 MHz bandwidth. 601 602 Value of 0x80 indicates invalid. 603 */ 604 605 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN2_OFFSET 0x00000020 606 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN2_LSB 8 607 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN2_MSB 15 608 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN2_MASK 0x0000ff00 609 610 611 /* Description RSSI_EXT40_LOW20_CHAIN2 612 613 RSSI of RX PPDU on chain 2 of extension 40, low 20 MHz bandwidth. 614 615 Value of 0x80 indicates invalid. 616 */ 617 618 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN2_OFFSET 0x00000020 619 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN2_LSB 16 620 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN2_MSB 23 621 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN2_MASK 0x00ff0000 622 623 624 /* Description RSSI_EXT40_HIGH20_CHAIN2 625 626 RSSI of RX PPDU on chain 2 of extension 40, high 20 MHz 627 bandwidth. 628 Value of 0x80 indicates invalid. 629 */ 630 631 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN2_OFFSET 0x00000020 632 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN2_LSB 24 633 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN2_MSB 31 634 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN2_MASK 0xff000000 635 636 637 /* Description RSSI_EXT80_LOW20_CHAIN2 638 639 RSSI of RX PPDU on chain 2 of extension 80, low 20 MHz bandwidth. 640 641 Value of 0x80 indicates invalid. 642 */ 643 644 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN2_OFFSET 0x00000024 645 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN2_LSB 0 646 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN2_MSB 7 647 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN2_MASK 0x000000ff 648 649 650 /* Description RSSI_EXT80_LOW_HIGH20_CHAIN2 651 652 RSSI of RX PPDU on chain 2 of extension 80, low-high 20 653 MHz bandwidth. 654 Value of 0x80 indicates invalid. 655 */ 656 657 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN2_OFFSET 0x00000024 658 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN2_LSB 8 659 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN2_MSB 15 660 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN2_MASK 0x0000ff00 661 662 663 /* Description RSSI_EXT80_HIGH_LOW20_CHAIN2 664 665 RSSI of RX PPDU on chain 2 of extension 80, high-low 20 666 MHz bandwidth. 667 Value of 0x80 indicates invalid. 668 */ 669 670 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN2_OFFSET 0x00000024 671 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN2_LSB 16 672 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN2_MSB 23 673 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN2_MASK 0x00ff0000 674 675 676 /* Description RSSI_EXT80_HIGH20_CHAIN2 677 678 RSSI of RX PPDU on chain 2 of extension 80, high 20 MHz 679 bandwidth. 680 Value of 0x80 indicates invalid. 681 */ 682 683 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN2_OFFSET 0x00000024 684 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN2_LSB 24 685 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN2_MSB 31 686 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN2_MASK 0xff000000 687 688 689 /* Description RSSI_EXT160_0_CHAIN2 690 691 RSSI of RX PPDU on chain 2 of extension 160, lowest 20 MHz 692 bandwidth. 693 Value of 0x80 indicates invalid. 694 */ 695 696 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN2_OFFSET 0x00000028 697 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN2_LSB 0 698 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN2_MSB 7 699 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN2_MASK 0x000000ff 700 701 702 /* Description RSSI_EXT160_1_CHAIN2 703 704 RSSI of RX PPDU on chain 2 of extension 160, next 20 MHz 705 bandwidth. 706 Value of 0x80 indicates invalid. 707 */ 708 709 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN2_OFFSET 0x00000028 710 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN2_LSB 8 711 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN2_MSB 15 712 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN2_MASK 0x0000ff00 713 714 715 /* Description RSSI_EXT160_2_CHAIN2 716 717 RSSI of RX PPDU on chain 2 of extension 160, next 20 MHz 718 bandwidth. 719 Value of 0x80 indicates invalid. 720 */ 721 722 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN2_OFFSET 0x00000028 723 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN2_LSB 16 724 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN2_MSB 23 725 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN2_MASK 0x00ff0000 726 727 728 /* Description RSSI_EXT160_3_CHAIN2 729 730 RSSI of RX PPDU on chain 2 of extension 160, next 20 MHz 731 bandwidth. 732 Value of 0x80 indicates invalid. 733 */ 734 735 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN2_OFFSET 0x00000028 736 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN2_LSB 24 737 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN2_MSB 31 738 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN2_MASK 0xff000000 739 740 741 /* Description RSSI_EXT160_4_CHAIN2 742 743 RSSI of RX PPDU on chain 2 of extension 160, next 20 MHz 744 bandwidth. 745 Value of 0x80 indicates invalid. 746 */ 747 748 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN2_OFFSET 0x0000002c 749 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN2_LSB 0 750 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN2_MSB 7 751 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN2_MASK 0x000000ff 752 753 754 /* Description RSSI_EXT160_5_CHAIN2 755 756 RSSI of RX PPDU on chain 2 of extension 160, next 20 MHz 757 bandwidth. 758 Value of 0x80 indicates invalid. 759 */ 760 761 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN2_OFFSET 0x0000002c 762 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN2_LSB 8 763 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN2_MSB 15 764 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN2_MASK 0x0000ff00 765 766 767 /* Description RSSI_EXT160_6_CHAIN2 768 769 RSSI of RX PPDU on chain 2 of extension 160, next 20 MHz 770 bandwidth. 771 Value of 0x80 indicates invalid. 772 */ 773 774 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN2_OFFSET 0x0000002c 775 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN2_LSB 16 776 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN2_MSB 23 777 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN2_MASK 0x00ff0000 778 779 780 /* Description RSSI_EXT160_7_CHAIN2 781 782 RSSI of RX PPDU on chain 2 of extension 80, highest 20 MHz 783 bandwidth. 784 Value of 0x80 indicates invalid. 785 */ 786 787 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN2_OFFSET 0x0000002c 788 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN2_LSB 24 789 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN2_MSB 31 790 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN2_MASK 0xff000000 791 792 793 /* Description RSSI_PRI20_CHAIN3 794 795 RSSI of RX PPDU on chain 3 of primary 20 MHz bandwidth. 796 797 Value of 0x80 indicates invalid. 798 */ 799 800 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN3_OFFSET 0x00000030 801 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN3_LSB 0 802 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN3_MSB 7 803 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN3_MASK 0x000000ff 804 805 806 /* Description RSSI_EXT20_CHAIN3 807 808 RSSI of RX PPDU on chain 3 of extension 20 MHz bandwidth. 809 810 Value of 0x80 indicates invalid. 811 */ 812 813 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN3_OFFSET 0x00000030 814 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN3_LSB 8 815 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN3_MSB 15 816 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN3_MASK 0x0000ff00 817 818 819 /* Description RSSI_EXT40_LOW20_CHAIN3 820 821 RSSI of RX PPDU on chain 3 of extension 40, low 20 MHz bandwidth. 822 823 Value of 0x80 indicates invalid. 824 */ 825 826 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN3_OFFSET 0x00000030 827 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN3_LSB 16 828 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN3_MSB 23 829 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN3_MASK 0x00ff0000 830 831 832 /* Description RSSI_EXT40_HIGH20_CHAIN3 833 834 RSSI of RX PPDU on chain 3 of extension 40, high 20 MHz 835 bandwidth. 836 Value of 0x80 indicates invalid. 837 */ 838 839 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN3_OFFSET 0x00000030 840 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN3_LSB 24 841 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN3_MSB 31 842 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN3_MASK 0xff000000 843 844 845 /* Description RSSI_EXT80_LOW20_CHAIN3 846 847 RSSI of RX PPDU on chain 3 of extension 80, low 20 MHz bandwidth. 848 849 Value of 0x80 indicates invalid. 850 */ 851 852 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN3_OFFSET 0x00000034 853 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN3_LSB 0 854 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN3_MSB 7 855 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN3_MASK 0x000000ff 856 857 858 /* Description RSSI_EXT80_LOW_HIGH20_CHAIN3 859 860 RSSI of RX PPDU on chain 3 of extension 80, low-high 20 861 MHz bandwidth. 862 Value of 0x80 indicates invalid. 863 */ 864 865 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN3_OFFSET 0x00000034 866 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN3_LSB 8 867 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN3_MSB 15 868 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN3_MASK 0x0000ff00 869 870 871 /* Description RSSI_EXT80_HIGH_LOW20_CHAIN3 872 873 RSSI of RX PPDU on chain 3 of extension 80, high-low 20 874 MHz bandwidth. 875 Value of 0x80 indicates invalid. 876 */ 877 878 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN3_OFFSET 0x00000034 879 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN3_LSB 16 880 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN3_MSB 23 881 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN3_MASK 0x00ff0000 882 883 884 /* Description RSSI_EXT80_HIGH20_CHAIN3 885 886 RSSI of RX PPDU on chain 3 of extension 80, high 20 MHz 887 bandwidth. 888 Value of 0x80 indicates invalid. 889 */ 890 891 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN3_OFFSET 0x00000034 892 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN3_LSB 24 893 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN3_MSB 31 894 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN3_MASK 0xff000000 895 896 897 /* Description RSSI_EXT160_0_CHAIN3 898 899 RSSI of RX PPDU on chain 3 of extension 160, lowest 20 MHz 900 bandwidth. 901 Value of 0x80 indicates invalid. 902 */ 903 904 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN3_OFFSET 0x00000038 905 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN3_LSB 0 906 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN3_MSB 7 907 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN3_MASK 0x000000ff 908 909 910 /* Description RSSI_EXT160_1_CHAIN3 911 912 RSSI of RX PPDU on chain 3 of extension 160, next 20 MHz 913 bandwidth. 914 Value of 0x80 indicates invalid. 915 */ 916 917 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN3_OFFSET 0x00000038 918 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN3_LSB 8 919 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN3_MSB 15 920 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN3_MASK 0x0000ff00 921 922 923 /* Description RSSI_EXT160_2_CHAIN3 924 925 RSSI of RX PPDU on chain 3 of extension 160, next 20 MHz 926 bandwidth. 927 Value of 0x80 indicates invalid. 928 */ 929 930 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN3_OFFSET 0x00000038 931 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN3_LSB 16 932 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN3_MSB 23 933 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN3_MASK 0x00ff0000 934 935 936 /* Description RSSI_EXT160_3_CHAIN3 937 938 RSSI of RX PPDU on chain 3 of extension 160, next 20 MHz 939 bandwidth. 940 Value of 0x80 indicates invalid. 941 */ 942 943 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN3_OFFSET 0x00000038 944 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN3_LSB 24 945 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN3_MSB 31 946 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN3_MASK 0xff000000 947 948 949 /* Description RSSI_EXT160_4_CHAIN3 950 951 RSSI of RX PPDU on chain 3 of extension 160, next 20 MHz 952 bandwidth. 953 Value of 0x80 indicates invalid. 954 */ 955 956 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN3_OFFSET 0x0000003c 957 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN3_LSB 0 958 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN3_MSB 7 959 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN3_MASK 0x000000ff 960 961 962 /* Description RSSI_EXT160_5_CHAIN3 963 964 RSSI of RX PPDU on chain 3 of extension 160, next 20 MHz 965 bandwidth. 966 Value of 0x80 indicates invalid. 967 */ 968 969 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN3_OFFSET 0x0000003c 970 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN3_LSB 8 971 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN3_MSB 15 972 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN3_MASK 0x0000ff00 973 974 975 /* Description RSSI_EXT160_6_CHAIN3 976 977 RSSI of RX PPDU on chain 3 of extension 160, next 20 MHz 978 bandwidth. 979 Value of 0x80 indicates invalid. 980 */ 981 982 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN3_OFFSET 0x0000003c 983 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN3_LSB 16 984 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN3_MSB 23 985 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN3_MASK 0x00ff0000 986 987 988 /* Description RSSI_EXT160_7_CHAIN3 989 990 RSSI of RX PPDU on chain 3 of extension 160, highest 20 991 MHz bandwidth. 992 Value of 0x80 indicates invalid. 993 */ 994 995 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN3_OFFSET 0x0000003c 996 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN3_LSB 24 997 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN3_MSB 31 998 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN3_MASK 0xff000000 999 1000 1001 1002 #endif // RECEIVE_RSSI_INFO 1003