1*5113495bSYour Name 2*5113495bSYour Name /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name 18*5113495bSYour Name 19*5113495bSYour Name 20*5113495bSYour Name 21*5113495bSYour Name 22*5113495bSYour Name 23*5113495bSYour Name 24*5113495bSYour Name 25*5113495bSYour Name 26*5113495bSYour Name #ifndef _REO_ENTRANCE_RING_H_ 27*5113495bSYour Name #define _REO_ENTRANCE_RING_H_ 28*5113495bSYour Name #if !defined(__ASSEMBLER__) 29*5113495bSYour Name #endif 30*5113495bSYour Name 31*5113495bSYour Name #include "rx_mpdu_details.h" 32*5113495bSYour Name #define NUM_OF_DWORDS_REO_ENTRANCE_RING 8 33*5113495bSYour Name 34*5113495bSYour Name 35*5113495bSYour Name struct reo_entrance_ring { 36*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 37*5113495bSYour Name struct rx_mpdu_details reo_level_mpdu_frame_info; 38*5113495bSYour Name uint32_t rx_reo_queue_desc_addr_31_0 : 32; // [31:0] 39*5113495bSYour Name uint32_t rx_reo_queue_desc_addr_39_32 : 8, // [7:0] 40*5113495bSYour Name rounded_mpdu_byte_count : 14, // [21:8] 41*5113495bSYour Name reo_destination_indication : 5, // [26:22] 42*5113495bSYour Name frameless_bar : 1, // [27:27] 43*5113495bSYour Name reserved_5a : 4; // [31:28] 44*5113495bSYour Name uint32_t rxdma_push_reason : 2, // [1:0] 45*5113495bSYour Name rxdma_error_code : 5, // [6:2] 46*5113495bSYour Name mpdu_fragment_number : 4, // [10:7] 47*5113495bSYour Name sw_exception : 1, // [11:11] 48*5113495bSYour Name sw_exception_mpdu_delink : 1, // [12:12] 49*5113495bSYour Name sw_exception_destination_ring_valid : 1, // [13:13] 50*5113495bSYour Name sw_exception_destination_ring : 5, // [18:14] 51*5113495bSYour Name mpdu_sequence_number : 12, // [30:19] 52*5113495bSYour Name reserved_6a : 1; // [31:31] 53*5113495bSYour Name uint32_t phy_ppdu_id : 16, // [15:0] 54*5113495bSYour Name src_link_id : 3, // [18:16] 55*5113495bSYour Name reserved_7a : 1, // [19:19] 56*5113495bSYour Name ring_id : 8, // [27:20] 57*5113495bSYour Name looping_count : 4; // [31:28] 58*5113495bSYour Name #else 59*5113495bSYour Name struct rx_mpdu_details reo_level_mpdu_frame_info; 60*5113495bSYour Name uint32_t rx_reo_queue_desc_addr_31_0 : 32; // [31:0] 61*5113495bSYour Name uint32_t reserved_5a : 4, // [31:28] 62*5113495bSYour Name frameless_bar : 1, // [27:27] 63*5113495bSYour Name reo_destination_indication : 5, // [26:22] 64*5113495bSYour Name rounded_mpdu_byte_count : 14, // [21:8] 65*5113495bSYour Name rx_reo_queue_desc_addr_39_32 : 8; // [7:0] 66*5113495bSYour Name uint32_t reserved_6a : 1, // [31:31] 67*5113495bSYour Name mpdu_sequence_number : 12, // [30:19] 68*5113495bSYour Name sw_exception_destination_ring : 5, // [18:14] 69*5113495bSYour Name sw_exception_destination_ring_valid : 1, // [13:13] 70*5113495bSYour Name sw_exception_mpdu_delink : 1, // [12:12] 71*5113495bSYour Name sw_exception : 1, // [11:11] 72*5113495bSYour Name mpdu_fragment_number : 4, // [10:7] 73*5113495bSYour Name rxdma_error_code : 5, // [6:2] 74*5113495bSYour Name rxdma_push_reason : 2; // [1:0] 75*5113495bSYour Name uint32_t looping_count : 4, // [31:28] 76*5113495bSYour Name ring_id : 8, // [27:20] 77*5113495bSYour Name reserved_7a : 1, // [19:19] 78*5113495bSYour Name src_link_id : 3, // [18:16] 79*5113495bSYour Name phy_ppdu_id : 16; // [15:0] 80*5113495bSYour Name #endif 81*5113495bSYour Name }; 82*5113495bSYour Name 83*5113495bSYour Name 84*5113495bSYour Name /* Description REO_LEVEL_MPDU_FRAME_INFO 85*5113495bSYour Name 86*5113495bSYour Name Consumer: REO 87*5113495bSYour Name Producer: RXDMA 88*5113495bSYour Name 89*5113495bSYour Name Details related to the MPDU being pushed into the REO 90*5113495bSYour Name */ 91*5113495bSYour Name 92*5113495bSYour Name 93*5113495bSYour Name /* Description MSDU_LINK_DESC_ADDR_INFO 94*5113495bSYour Name 95*5113495bSYour Name Consumer: REO/SW/FW 96*5113495bSYour Name Producer: RXDMA 97*5113495bSYour Name 98*5113495bSYour Name Details of the physical address of the MSDU link descriptor 99*5113495bSYour Name that contains pointers to MSDUs related to this MPDU 100*5113495bSYour Name */ 101*5113495bSYour Name 102*5113495bSYour Name 103*5113495bSYour Name /* Description BUFFER_ADDR_31_0 104*5113495bSYour Name 105*5113495bSYour Name Address (lower 32 bits) of the MSDU buffer OR MSDU_EXTENSION 106*5113495bSYour Name descriptor OR Link Descriptor 107*5113495bSYour Name 108*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 109*5113495bSYour Name <legal all> 110*5113495bSYour Name */ 111*5113495bSYour Name 112*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000 113*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0 114*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MSB 31 115*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff 116*5113495bSYour Name 117*5113495bSYour Name 118*5113495bSYour Name /* Description BUFFER_ADDR_39_32 119*5113495bSYour Name 120*5113495bSYour Name Address (upper 8 bits) of the MSDU buffer OR MSDU_EXTENSION 121*5113495bSYour Name descriptor OR Link Descriptor 122*5113495bSYour Name 123*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 124*5113495bSYour Name <legal all> 125*5113495bSYour Name */ 126*5113495bSYour Name 127*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004 128*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0 129*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MSB 7 130*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff 131*5113495bSYour Name 132*5113495bSYour Name 133*5113495bSYour Name /* Description RETURN_BUFFER_MANAGER 134*5113495bSYour Name 135*5113495bSYour Name Consumer: WBM 136*5113495bSYour Name Producer: SW/FW 137*5113495bSYour Name 138*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 139*5113495bSYour Name 140*5113495bSYour Name Indicates to which buffer manager the buffer OR MSDU_EXTENSION 141*5113495bSYour Name descriptor OR link descriptor that is being pointed to 142*5113495bSYour Name shall be returned after the frame has been processed. It 143*5113495bSYour Name is used by WBM for routing purposes. 144*5113495bSYour Name 145*5113495bSYour Name <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned 146*5113495bSYour Name to the WMB buffer idle list 147*5113495bSYour Name <enum 1 WBM_CHIP0_IDLE_DESC_LIST> This buffer shall be returned 148*5113495bSYour Name to the WBM idle link descriptor idle list, where the chip 149*5113495bSYour Name 0 WBM is chosen in case of a multi-chip config 150*5113495bSYour Name <enum 2 WBM_CHIP1_IDLE_DESC_LIST> This buffer shall be returned 151*5113495bSYour Name to the chip 1 WBM idle link descriptor idle list 152*5113495bSYour Name <enum 3 WBM_CHIP2_IDLE_DESC_LIST> This buffer shall be returned 153*5113495bSYour Name to the chip 2 WBM idle link descriptor idle list 154*5113495bSYour Name <enum 12 WBM_CHIP3_IDLE_DESC_LIST> This buffer shall be 155*5113495bSYour Name returned to chip 3 WBM idle link descriptor idle list 156*5113495bSYour Name <enum 4 FW_BM> This buffer shall be returned to the FW 157*5113495bSYour Name <enum 5 SW0_BM> This buffer shall be returned to the SW, 158*5113495bSYour Name ring 0 159*5113495bSYour Name <enum 6 SW1_BM> This buffer shall be returned to the SW, 160*5113495bSYour Name ring 1 161*5113495bSYour Name <enum 7 SW2_BM> This buffer shall be returned to the SW, 162*5113495bSYour Name ring 2 163*5113495bSYour Name <enum 8 SW3_BM> This buffer shall be returned to the SW, 164*5113495bSYour Name ring 3 165*5113495bSYour Name <enum 9 SW4_BM> This buffer shall be returned to the SW, 166*5113495bSYour Name ring 4 167*5113495bSYour Name <enum 10 SW5_BM> This buffer shall be returned to the SW, 168*5113495bSYour Name ring 5 169*5113495bSYour Name <enum 11 SW6_BM> This buffer shall be returned to the SW, 170*5113495bSYour Name ring 6 171*5113495bSYour Name 172*5113495bSYour Name <legal 0-12> 173*5113495bSYour Name */ 174*5113495bSYour Name 175*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004 176*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8 177*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB 11 178*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000f00 179*5113495bSYour Name 180*5113495bSYour Name 181*5113495bSYour Name /* Description SW_BUFFER_COOKIE 182*5113495bSYour Name 183*5113495bSYour Name Cookie field exclusively used by SW. 184*5113495bSYour Name 185*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 186*5113495bSYour Name 187*5113495bSYour Name HW ignores the contents, accept that it passes the programmed 188*5113495bSYour Name value on to other descriptors together with the physical 189*5113495bSYour Name address 190*5113495bSYour Name 191*5113495bSYour Name Field can be used by SW to for example associate the buffers 192*5113495bSYour Name physical address with the virtual address 193*5113495bSYour Name The bit definitions as used by SW are within SW HLD specification 194*5113495bSYour Name 195*5113495bSYour Name 196*5113495bSYour Name NOTE1: 197*5113495bSYour Name The three most significant bits can have a special meaning 198*5113495bSYour Name in case this struct is embedded in a TX_MPDU_DETAILS STRUCT, 199*5113495bSYour Name and field transmit_bw_restriction is set 200*5113495bSYour Name 201*5113495bSYour Name In case of NON punctured transmission: 202*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b000: 20 MHz TX only 203*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b001: 40 MHz TX only 204*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b010: 80 MHz TX only 205*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b011: 160 MHz TX only 206*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b101: 240 MHz TX only 207*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b100: 320 MHz TX only 208*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 209*5113495bSYour Name 210*5113495bSYour Name In case of punctured transmission: 211*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0000: pattern 0 only 212*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0001: pattern 1 only 213*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0010: pattern 2 only 214*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0011: pattern 3 only 215*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0100: pattern 4 only 216*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0101: pattern 5 only 217*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0110: pattern 6 only 218*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0111: pattern 7 only 219*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1000: pattern 8 only 220*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1001: pattern 9 only 221*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1010: pattern 10 only 222*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1011: pattern 11 only 223*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 224*5113495bSYour Name 225*5113495bSYour Name Note: a punctured transmission is indicated by the presence 226*5113495bSYour Name of TLV TX_PUNCTURE_SETUP embedded in the scheduler TLV 227*5113495bSYour Name 228*5113495bSYour Name <legal all> 229*5113495bSYour Name */ 230*5113495bSYour Name 231*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004 232*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 12 233*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MSB 31 234*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff000 235*5113495bSYour Name 236*5113495bSYour Name 237*5113495bSYour Name /* Description RX_MPDU_DESC_INFO_DETAILS 238*5113495bSYour Name 239*5113495bSYour Name Consumer: REO/SW/FW 240*5113495bSYour Name Producer: RXDMA 241*5113495bSYour Name 242*5113495bSYour Name General information related to the MPDU that should be passed 243*5113495bSYour Name on from REO entrance ring to the REO destination ring 244*5113495bSYour Name */ 245*5113495bSYour Name 246*5113495bSYour Name 247*5113495bSYour Name /* Description MSDU_COUNT 248*5113495bSYour Name 249*5113495bSYour Name Consumer: REO/SW/FW 250*5113495bSYour Name Producer: RXDMA 251*5113495bSYour Name 252*5113495bSYour Name The number of MSDUs within the MPDU 253*5113495bSYour Name <legal all> 254*5113495bSYour Name */ 255*5113495bSYour Name 256*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x00000008 257*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB 0 258*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MSB 7 259*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK 0x000000ff 260*5113495bSYour Name 261*5113495bSYour Name 262*5113495bSYour Name /* Description FRAGMENT_FLAG 263*5113495bSYour Name 264*5113495bSYour Name Consumer: REO/SW/FW 265*5113495bSYour Name Producer: RXDMA 266*5113495bSYour Name 267*5113495bSYour Name When set, this MPDU is a fragment and REO should forward 268*5113495bSYour Name this fragment MPDU to the REO destination ring without 269*5113495bSYour Name any reorder checks, pn checks or bitmap update. This implies 270*5113495bSYour Name that REO is forwarding the pointer to the MSDU link descriptor. 271*5113495bSYour Name The destination ring is coming from a programmable register 272*5113495bSYour Name setting in REO 273*5113495bSYour Name 274*5113495bSYour Name <legal all> 275*5113495bSYour Name */ 276*5113495bSYour Name 277*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x00000008 278*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 8 279*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MSB 8 280*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00000100 281*5113495bSYour Name 282*5113495bSYour Name 283*5113495bSYour Name /* Description MPDU_RETRY_BIT 284*5113495bSYour Name 285*5113495bSYour Name Consumer: REO/SW/FW 286*5113495bSYour Name Producer: RXDMA 287*5113495bSYour Name 288*5113495bSYour Name The retry bit setting from the MPDU header of the received 289*5113495bSYour Name frame 290*5113495bSYour Name <legal all> 291*5113495bSYour Name */ 292*5113495bSYour Name 293*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x00000008 294*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 9 295*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MSB 9 296*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00000200 297*5113495bSYour Name 298*5113495bSYour Name 299*5113495bSYour Name /* Description AMPDU_FLAG 300*5113495bSYour Name 301*5113495bSYour Name Consumer: REO/SW/FW 302*5113495bSYour Name Producer: RXDMA 303*5113495bSYour Name 304*5113495bSYour Name When set, the MPDU was received as part of an A-MPDU. 305*5113495bSYour Name <legal all> 306*5113495bSYour Name */ 307*5113495bSYour Name 308*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x00000008 309*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB 10 310*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MSB 10 311*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK 0x00000400 312*5113495bSYour Name 313*5113495bSYour Name 314*5113495bSYour Name /* Description BAR_FRAME 315*5113495bSYour Name 316*5113495bSYour Name Consumer: REO/SW/FW 317*5113495bSYour Name Producer: RXDMA 318*5113495bSYour Name 319*5113495bSYour Name When set, the received frame is a BAR frame. After processing, 320*5113495bSYour Name this frame shall be pushed to SW or deleted. 321*5113495bSYour Name <legal all> 322*5113495bSYour Name */ 323*5113495bSYour Name 324*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x00000008 325*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB 11 326*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MSB 11 327*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK 0x00000800 328*5113495bSYour Name 329*5113495bSYour Name 330*5113495bSYour Name /* Description PN_FIELDS_CONTAIN_VALID_INFO 331*5113495bSYour Name 332*5113495bSYour Name Consumer: REO/SW/FW 333*5113495bSYour Name Producer: RXDMA 334*5113495bSYour Name 335*5113495bSYour Name Copied here by RXDMA from RX_MPDU_END 336*5113495bSYour Name When not set, REO will Not perform a PN sequence number 337*5113495bSYour Name check 338*5113495bSYour Name */ 339*5113495bSYour Name 340*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000008 341*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 12 342*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MSB 12 343*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x00001000 344*5113495bSYour Name 345*5113495bSYour Name 346*5113495bSYour Name /* Description RAW_MPDU 347*5113495bSYour Name 348*5113495bSYour Name Field only valid when first_msdu_in_mpdu_flag is set. 349*5113495bSYour Name 350*5113495bSYour Name When set, the contents in the MSDU buffer contains a 'RAW' 351*5113495bSYour Name MPDU. This 'RAW' MPDU might be spread out over multiple 352*5113495bSYour Name MSDU buffers. 353*5113495bSYour Name <legal all> 354*5113495bSYour Name */ 355*5113495bSYour Name 356*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET 0x00000008 357*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB 13 358*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MSB 13 359*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK 0x00002000 360*5113495bSYour Name 361*5113495bSYour Name 362*5113495bSYour Name /* Description MORE_FRAGMENT_FLAG 363*5113495bSYour Name 364*5113495bSYour Name The More Fragment bit setting from the MPDU header of the 365*5113495bSYour Name received frame 366*5113495bSYour Name 367*5113495bSYour Name <legal all> 368*5113495bSYour Name */ 369*5113495bSYour Name 370*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x00000008 371*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 14 372*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MSB 14 373*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x00004000 374*5113495bSYour Name 375*5113495bSYour Name 376*5113495bSYour Name /* Description SRC_INFO 377*5113495bSYour Name 378*5113495bSYour Name Source (virtual) device/interface info. associated with 379*5113495bSYour Name this peer 380*5113495bSYour Name 381*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 382*5113495bSYour Name ('REO_TO_PPE_RING'). 383*5113495bSYour Name 384*5113495bSYour Name Hamilton v1 used this for 'vdev_id' instead. 385*5113495bSYour Name <legal all> 386*5113495bSYour Name */ 387*5113495bSYour Name 388*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_OFFSET 0x00000008 389*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_LSB 15 390*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_MSB 26 391*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_MASK 0x07ff8000 392*5113495bSYour Name 393*5113495bSYour Name 394*5113495bSYour Name /* Description MPDU_QOS_CONTROL_VALID 395*5113495bSYour Name 396*5113495bSYour Name When set, the MPDU has a QoS control field. 397*5113495bSYour Name 398*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 399*5113495bSYour Name 400*5113495bSYour Name <legal all> 401*5113495bSYour Name */ 402*5113495bSYour Name 403*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_OFFSET 0x00000008 404*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_LSB 27 405*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MSB 27 406*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MASK 0x08000000 407*5113495bSYour Name 408*5113495bSYour Name 409*5113495bSYour Name /* Description TID 410*5113495bSYour Name 411*5113495bSYour Name Field only valid when mpdu_qos_control_valid is set 412*5113495bSYour Name 413*5113495bSYour Name The TID field in the QoS control field 414*5113495bSYour Name <legal all> 415*5113495bSYour Name */ 416*5113495bSYour Name 417*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_OFFSET 0x00000008 418*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_LSB 28 419*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_MSB 31 420*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_MASK 0xf0000000 421*5113495bSYour Name 422*5113495bSYour Name 423*5113495bSYour Name /* Description PEER_META_DATA 424*5113495bSYour Name 425*5113495bSYour Name Meta data that SW has programmed in the Peer table entry 426*5113495bSYour Name of the transmitting STA. 427*5113495bSYour Name <legal all> 428*5113495bSYour Name */ 429*5113495bSYour Name 430*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000c 431*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0 432*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MSB 31 433*5113495bSYour Name #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff 434*5113495bSYour Name 435*5113495bSYour Name 436*5113495bSYour Name /* Description RX_REO_QUEUE_DESC_ADDR_31_0 437*5113495bSYour Name 438*5113495bSYour Name Consumer: REO 439*5113495bSYour Name Producer: RXDMA 440*5113495bSYour Name 441*5113495bSYour Name Address (lower 32 bits) of the REO queue descriptor 442*5113495bSYour Name 443*5113495bSYour Name Alternatively, as per FR63739, REO internally looks up the 444*5113495bSYour Name queue descriptor address from 'Sw_peer_id' and 'Tid.' In 445*5113495bSYour Name this mode, RXDMA fills 'Sw_peer_id' from 'RX_MPDU_START' 446*5113495bSYour Name in the LSB 16 bits. 'Tid' is available in 'RX_MPDU_DETAILS.' 447*5113495bSYour Name 448*5113495bSYour Name <legal all> 449*5113495bSYour Name */ 450*5113495bSYour Name 451*5113495bSYour Name #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000010 452*5113495bSYour Name #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0 453*5113495bSYour Name #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_MSB 31 454*5113495bSYour Name #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff 455*5113495bSYour Name 456*5113495bSYour Name 457*5113495bSYour Name /* Description RX_REO_QUEUE_DESC_ADDR_39_32 458*5113495bSYour Name 459*5113495bSYour Name Consumer: REO 460*5113495bSYour Name Producer: RXDMA 461*5113495bSYour Name 462*5113495bSYour Name Address (upper 8 bits) of the REO queue descriptor 463*5113495bSYour Name Alternatively, as per FR63739, REO internally looks up the 464*5113495bSYour Name queue descriptor address from 'Sw_peer_id' and 'Tid.' In 465*5113495bSYour Name this mode, this field is unused. 466*5113495bSYour Name <legal all> 467*5113495bSYour Name */ 468*5113495bSYour Name 469*5113495bSYour Name #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000014 470*5113495bSYour Name #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0 471*5113495bSYour Name #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_MSB 7 472*5113495bSYour Name #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff 473*5113495bSYour Name 474*5113495bSYour Name 475*5113495bSYour Name /* Description ROUNDED_MPDU_BYTE_COUNT 476*5113495bSYour Name 477*5113495bSYour Name An approximation of the number of bytes received in this 478*5113495bSYour Name MPDU. 479*5113495bSYour Name Used to keeps stats on the amount of data flowing through 480*5113495bSYour Name a queue. 481*5113495bSYour Name <legal all> 482*5113495bSYour Name */ 483*5113495bSYour Name 484*5113495bSYour Name #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_OFFSET 0x00000014 485*5113495bSYour Name #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_LSB 8 486*5113495bSYour Name #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_MSB 21 487*5113495bSYour Name #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_MASK 0x003fff00 488*5113495bSYour Name 489*5113495bSYour Name 490*5113495bSYour Name /* Description REO_DESTINATION_INDICATION 491*5113495bSYour Name 492*5113495bSYour Name RXDMA copy the MPDU's first MSDU's destination indication 493*5113495bSYour Name field here. This is used for REO to be able to re-route 494*5113495bSYour Name the packet to a different SW destination ring if the packet 495*5113495bSYour Name is detected as error in REO. 496*5113495bSYour Name 497*5113495bSYour Name The ID of the REO exit ring where the MSDU frame shall push 498*5113495bSYour Name after (MPDU level) reordering has finished. 499*5113495bSYour Name 500*5113495bSYour Name <enum 0 reo_destination_sw0> Reo will push the frame into 501*5113495bSYour Name the REO2SW0 ring 502*5113495bSYour Name <enum 1 reo_destination_sw1> Reo will push the frame into 503*5113495bSYour Name the REO2SW1 ring 504*5113495bSYour Name <enum 2 reo_destination_sw2> Reo will push the frame into 505*5113495bSYour Name the REO2SW2 ring 506*5113495bSYour Name <enum 3 reo_destination_sw3> Reo will push the frame into 507*5113495bSYour Name the REO2SW3 ring 508*5113495bSYour Name <enum 4 reo_destination_sw4> Reo will push the frame into 509*5113495bSYour Name the REO2SW4 ring 510*5113495bSYour Name <enum 5 reo_destination_release> Reo will push the frame 511*5113495bSYour Name into the REO_release ring 512*5113495bSYour Name <enum 6 reo_destination_fw> Reo will push the frame into 513*5113495bSYour Name the REO2FW ring 514*5113495bSYour Name <enum 7 reo_destination_sw5> Reo will push the frame into 515*5113495bSYour Name the REO2SW5 ring (REO remaps this in chips without REO2SW5 516*5113495bSYour Name ring, e.g. Pine) 517*5113495bSYour Name <enum 8 reo_destination_sw6> Reo will push the frame into 518*5113495bSYour Name the REO2SW6 ring (REO remaps this in chips without REO2SW6 519*5113495bSYour Name ring, e.g. Pine) 520*5113495bSYour Name <enum 9 reo_destination_sw7> Reo will push the frame into 521*5113495bSYour Name the REO2SW7 ring (REO remaps this in chips without REO2SW7 522*5113495bSYour Name ring) 523*5113495bSYour Name <enum 10 reo_destination_sw8> Reo will push the frame into 524*5113495bSYour Name the REO2SW8 ring (REO remaps this in chips without REO2SW8 525*5113495bSYour Name ring) 526*5113495bSYour Name <enum 11 reo_destination_11> REO remaps this 527*5113495bSYour Name <enum 12 reo_destination_12> REO remaps this <enum 13 reo_destination_13> 528*5113495bSYour Name REO remaps this 529*5113495bSYour Name <enum 14 reo_destination_14> REO remaps this 530*5113495bSYour Name <enum 15 reo_destination_15> REO remaps this 531*5113495bSYour Name <enum 16 reo_destination_16> REO remaps this 532*5113495bSYour Name <enum 17 reo_destination_17> REO remaps this 533*5113495bSYour Name <enum 18 reo_destination_18> REO remaps this 534*5113495bSYour Name <enum 19 reo_destination_19> REO remaps this 535*5113495bSYour Name <enum 20 reo_destination_20> REO remaps this 536*5113495bSYour Name <enum 21 reo_destination_21> REO remaps this 537*5113495bSYour Name <enum 22 reo_destination_22> REO remaps this 538*5113495bSYour Name <enum 23 reo_destination_23> REO remaps this 539*5113495bSYour Name <enum 24 reo_destination_24> REO remaps this 540*5113495bSYour Name <enum 25 reo_destination_25> REO remaps this 541*5113495bSYour Name <enum 26 reo_destination_26> REO remaps this 542*5113495bSYour Name <enum 27 reo_destination_27> REO remaps this 543*5113495bSYour Name <enum 28 reo_destination_28> REO remaps this 544*5113495bSYour Name <enum 29 reo_destination_29> REO remaps this 545*5113495bSYour Name <enum 30 reo_destination_30> REO remaps this 546*5113495bSYour Name <enum 31 reo_destination_31> REO remaps this 547*5113495bSYour Name 548*5113495bSYour Name <legal all> 549*5113495bSYour Name */ 550*5113495bSYour Name 551*5113495bSYour Name #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_OFFSET 0x00000014 552*5113495bSYour Name #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_LSB 22 553*5113495bSYour Name #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_MSB 26 554*5113495bSYour Name #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_MASK 0x07c00000 555*5113495bSYour Name 556*5113495bSYour Name 557*5113495bSYour Name /* Description FRAMELESS_BAR 558*5113495bSYour Name 559*5113495bSYour Name When set, this REO entrance ring struct contains BAR info 560*5113495bSYour Name from a multi TID BAR frame. The original multi TID BAR 561*5113495bSYour Name frame itself contained all the REO info for the first TID, 562*5113495bSYour Name but all the subsequent TID info and their linkage to the 563*5113495bSYour Name REO descriptors is passed down as 'frameless' BAR info. 564*5113495bSYour Name 565*5113495bSYour Name 566*5113495bSYour Name The only fields valid in this descriptor when this bit is 567*5113495bSYour Name set are: 568*5113495bSYour Name Rx_reo_queue_desc_addr_31_0 569*5113495bSYour Name RX_reo_queue_desc_addr_39_32 570*5113495bSYour Name 571*5113495bSYour Name And within the 572*5113495bSYour Name Reo_level_mpdu_frame_info: 573*5113495bSYour Name Within Rx_mpdu_desc_info_details: 574*5113495bSYour Name Mpdu_Sequence_number 575*5113495bSYour Name BAR_frame 576*5113495bSYour Name Peer_meta_data 577*5113495bSYour Name All other fields shall be set to 0 578*5113495bSYour Name 579*5113495bSYour Name <legal all> 580*5113495bSYour Name */ 581*5113495bSYour Name 582*5113495bSYour Name #define REO_ENTRANCE_RING_FRAMELESS_BAR_OFFSET 0x00000014 583*5113495bSYour Name #define REO_ENTRANCE_RING_FRAMELESS_BAR_LSB 27 584*5113495bSYour Name #define REO_ENTRANCE_RING_FRAMELESS_BAR_MSB 27 585*5113495bSYour Name #define REO_ENTRANCE_RING_FRAMELESS_BAR_MASK 0x08000000 586*5113495bSYour Name 587*5113495bSYour Name 588*5113495bSYour Name /* Description RESERVED_5A 589*5113495bSYour Name 590*5113495bSYour Name <legal 0> 591*5113495bSYour Name */ 592*5113495bSYour Name 593*5113495bSYour Name #define REO_ENTRANCE_RING_RESERVED_5A_OFFSET 0x00000014 594*5113495bSYour Name #define REO_ENTRANCE_RING_RESERVED_5A_LSB 28 595*5113495bSYour Name #define REO_ENTRANCE_RING_RESERVED_5A_MSB 31 596*5113495bSYour Name #define REO_ENTRANCE_RING_RESERVED_5A_MASK 0xf0000000 597*5113495bSYour Name 598*5113495bSYour Name 599*5113495bSYour Name /* Description RXDMA_PUSH_REASON 600*5113495bSYour Name 601*5113495bSYour Name Indicates why rxdma pushed the frame to this ring 602*5113495bSYour Name 603*5113495bSYour Name This field is ignored by REO. 604*5113495bSYour Name 605*5113495bSYour Name <enum 0 rxdma_error_detected> RXDMA detected an error an 606*5113495bSYour Name pushed this frame to this queue 607*5113495bSYour Name <enum 1 rxdma_routing_instruction> RXDMA pushed the frame 608*5113495bSYour Name to this queue per received routing instructions. No error 609*5113495bSYour Name within RXDMA was detected 610*5113495bSYour Name <enum 2 rxdma_rx_flush> RXDMA received an RX_FLUSH. As a 611*5113495bSYour Name result the MSDU link descriptor might not have the "last_msdu_in_mpdu_flag" 612*5113495bSYour Name set, but instead WBM might just see a NULL pointer in the 613*5113495bSYour Name MSDU link descriptor. This is to be considered a normal 614*5113495bSYour Name condition for this scenario. 615*5113495bSYour Name 616*5113495bSYour Name <legal 0 - 2> 617*5113495bSYour Name */ 618*5113495bSYour Name 619*5113495bSYour Name #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_OFFSET 0x00000018 620*5113495bSYour Name #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_LSB 0 621*5113495bSYour Name #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_MSB 1 622*5113495bSYour Name #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_MASK 0x00000003 623*5113495bSYour Name 624*5113495bSYour Name 625*5113495bSYour Name /* Description RXDMA_ERROR_CODE 626*5113495bSYour Name 627*5113495bSYour Name Field only valid when 'rxdma_push_reason' set to 'rxdma_error_detected'. 628*5113495bSYour Name 629*5113495bSYour Name 630*5113495bSYour Name This field is ignored by REO. 631*5113495bSYour Name 632*5113495bSYour Name <enum 0 rxdma_overflow_err>MPDU frame is not complete due 633*5113495bSYour Name to a FIFO overflow error in RXPCU. 634*5113495bSYour Name <enum 1 rxdma_mpdu_length_err>MPDU frame is not complete 635*5113495bSYour Name due to receiving incomplete MPDU from the PHY 636*5113495bSYour Name <enum 2 rxdma_fcs_err>FCS check on the MPDU frame failed 637*5113495bSYour Name 638*5113495bSYour Name <enum 3 rxdma_decrypt_err>CRYPTO reported a decryption error 639*5113495bSYour Name or CRYPTO received an encrypted frame, but did not get 640*5113495bSYour Name a valid corresponding key id in the peer entry. 641*5113495bSYour Name <enum 4 rxdma_tkip_mic_err>CRYPTO reported a TKIP MIC error 642*5113495bSYour Name 643*5113495bSYour Name <enum 5 rxdma_unecrypted_err>CRYPTO reported an unencrypted 644*5113495bSYour Name frame error when encrypted was expected 645*5113495bSYour Name <enum 6 rxdma_msdu_len_err>RX OLE reported an MSDU length 646*5113495bSYour Name error 647*5113495bSYour Name <enum 7 rxdma_msdu_limit_err>RX OLE reported that max number 648*5113495bSYour Name of MSDUs allowed in an MPDU got exceeded 649*5113495bSYour Name <enum 8 rxdma_wifi_parse_err>RX OLE reported a parsing error 650*5113495bSYour Name 651*5113495bSYour Name <enum 9 rxdma_amsdu_parse_err>RX OLE reported an A-MSDU 652*5113495bSYour Name parsing error 653*5113495bSYour Name <enum 10 rxdma_sa_timeout_err>RX OLE reported a timeout 654*5113495bSYour Name during SA search 655*5113495bSYour Name <enum 11 rxdma_da_timeout_err>RX OLE reported a timeout 656*5113495bSYour Name during DA search 657*5113495bSYour Name <enum 12 rxdma_flow_timeout_err>RX OLE reported a timeout 658*5113495bSYour Name during flow search 659*5113495bSYour Name <enum 13 rxdma_flush_request>RXDMA received a flush request 660*5113495bSYour Name 661*5113495bSYour Name <enum 14 rxdma_amsdu_fragment_err>Rx PCU reported A-MSDU 662*5113495bSYour Name present as well as a fragmented MPDU. A-MSDU defragmentation 663*5113495bSYour Name is not supported in Lithium SW so this is treated as an 664*5113495bSYour Name error. 665*5113495bSYour Name <enum 15 rxdma_multicast_echo_err>RX OLE reported a multicast 666*5113495bSYour Name echo 667*5113495bSYour Name <enum 16 rxdma_amsdu_addr_mismatch_err>RX OLE reported an 668*5113495bSYour Name A-MSDU with either 'from DS = 0' with an SA mismatching 669*5113495bSYour Name TA or 'to DS = 0' with a DA mismatching RA. 670*5113495bSYour Name <enum 17 rxdma_unauthorized_wds_err>RX PCU reported that 671*5113495bSYour Name Rx peer entry did not indicate 'authorized_to_send_WDS' 672*5113495bSYour Name and also indicated 'from DS = to DS = 1.' 673*5113495bSYour Name <enum 18 rxdma_groupcast_amsdu_or_wds_err>RX PCU reported 674*5113495bSYour Name a broadcast or multicast RA as well as either A-MSDU present 675*5113495bSYour Name or 'from DS = to DS = 1.' 676*5113495bSYour Name */ 677*5113495bSYour Name 678*5113495bSYour Name #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_OFFSET 0x00000018 679*5113495bSYour Name #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_LSB 2 680*5113495bSYour Name #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_MSB 6 681*5113495bSYour Name #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_MASK 0x0000007c 682*5113495bSYour Name 683*5113495bSYour Name 684*5113495bSYour Name /* Description MPDU_FRAGMENT_NUMBER 685*5113495bSYour Name 686*5113495bSYour Name Field only valid when Reo_level_mpdu_frame_info. Rx_mpdu_desc_info_details.Fragment_flag 687*5113495bSYour Name is set. 688*5113495bSYour Name 689*5113495bSYour Name The fragment number from the 802.11 header. 690*5113495bSYour Name 691*5113495bSYour Name Note that the sequence number is embedded in the field: 692*5113495bSYour Name Reo_level_mpdu_frame_info. Rx_mpdu_desc_info_details. Mpdu_sequence_number 693*5113495bSYour Name 694*5113495bSYour Name 695*5113495bSYour Name <legal all> 696*5113495bSYour Name */ 697*5113495bSYour Name 698*5113495bSYour Name #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_OFFSET 0x00000018 699*5113495bSYour Name #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_LSB 7 700*5113495bSYour Name #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_MSB 10 701*5113495bSYour Name #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_MASK 0x00000780 702*5113495bSYour Name 703*5113495bSYour Name 704*5113495bSYour Name /* Description SW_EXCEPTION 705*5113495bSYour Name 706*5113495bSYour Name When not set, REO is performing all its default MPDU processing 707*5113495bSYour Name operations, 708*5113495bSYour Name When set, this REO entrance descriptor is generated by FW, 709*5113495bSYour Name and should be processed as an exception. This implies: 710*5113495bSYour Name NO re-order function is needed. 711*5113495bSYour Name MPDU delinking is determined by the setting of field SW_excection_mpdu_delink 712*5113495bSYour Name 713*5113495bSYour Name Destination ring selection is based on the setting of the 714*5113495bSYour Name field SW_exception_destination_ring_valid 715*5113495bSYour Name In the destination ring descriptor set bit: SW_exception_entry 716*5113495bSYour Name 717*5113495bSYour Name Feature supported only in HastingsPrime 718*5113495bSYour Name <legal all> 719*5113495bSYour Name */ 720*5113495bSYour Name 721*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_OFFSET 0x00000018 722*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_LSB 11 723*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_MSB 11 724*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_MASK 0x00000800 725*5113495bSYour Name 726*5113495bSYour Name 727*5113495bSYour Name /* Description SW_EXCEPTION_MPDU_DELINK 728*5113495bSYour Name 729*5113495bSYour Name Field only valid when SW_exception is set. 730*5113495bSYour Name 1'b0: REO should NOT delink the MPDU, and thus pass this 731*5113495bSYour Name MPDU on to the destination ring as is. This implies that 732*5113495bSYour Name in the REO_DESTINATION_RING struct field Buf_or_link_desc_addr_info 733*5113495bSYour Name should point to an MSDU link descriptor 734*5113495bSYour Name 1'b1: REO should perform the normal MPDU delink into MSDU 735*5113495bSYour Name operations. 736*5113495bSYour Name Feature supported only in HastingsPrime 737*5113495bSYour Name <legal all> 738*5113495bSYour Name */ 739*5113495bSYour Name 740*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_OFFSET 0x00000018 741*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_LSB 12 742*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_MSB 12 743*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_MASK 0x00001000 744*5113495bSYour Name 745*5113495bSYour Name 746*5113495bSYour Name /* Description SW_EXCEPTION_DESTINATION_RING_VALID 747*5113495bSYour Name 748*5113495bSYour Name Field only valid when SW_exception is set. 749*5113495bSYour Name 1'b0: REO shall push the MPDU (or delinked MPDU based on 750*5113495bSYour Name the setting of SW_exception_mpdu_delink) to the destination 751*5113495bSYour Name ring according to field reo_destination_indication. 752*5113495bSYour Name 1'b1: REO shall push the MPDU (or delinked MPDU based on 753*5113495bSYour Name the setting of SW_exception_mpdu_delink) to the destination 754*5113495bSYour Name ring according to field SW_exception_destination_ring. 755*5113495bSYour Name Feature supported only in HastingsPrime 756*5113495bSYour Name <legal all> 757*5113495bSYour Name */ 758*5113495bSYour Name 759*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_OFFSET 0x00000018 760*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_LSB 13 761*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_MSB 13 762*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_MASK 0x00002000 763*5113495bSYour Name 764*5113495bSYour Name 765*5113495bSYour Name /* Description SW_EXCEPTION_DESTINATION_RING 766*5113495bSYour Name 767*5113495bSYour Name Field only valid when fields SW_exception and SW_exception_destination_ring_valid 768*5113495bSYour Name are set. 769*5113495bSYour Name The ID of the ring where REO shall push this frame. 770*5113495bSYour Name <enum 0 reo_destination_sw0> Reo will push the frame into 771*5113495bSYour Name the REO2SW0 ring 772*5113495bSYour Name <enum 1 reo_destination_sw1> Reo will push the frame into 773*5113495bSYour Name the REO2SW1 ring 774*5113495bSYour Name <enum 2 reo_destination_sw2> Reo will push the frame into 775*5113495bSYour Name the REO2SW1 ring 776*5113495bSYour Name <enum 3 reo_destination_sw3> Reo will push the frame into 777*5113495bSYour Name the REO2SW1 ring 778*5113495bSYour Name <enum 4 reo_destination_sw4> Reo will push the frame into 779*5113495bSYour Name the REO2SW1 ring 780*5113495bSYour Name <enum 5 reo_destination_release> Reo will push the frame 781*5113495bSYour Name into the REO_release ring 782*5113495bSYour Name <enum 6 reo_destination_fw> Reo will push the frame into 783*5113495bSYour Name the REO2FW ring 784*5113495bSYour Name <enum 7 reo_destination_sw5> REO remaps this 785*5113495bSYour Name <enum 8 reo_destination_sw6> REO remaps this 786*5113495bSYour Name <enum 9 reo_destination_sw7> REO remaps this 787*5113495bSYour Name <enum 10 reo_destination_sw8> REO remaps this 788*5113495bSYour Name <enum 11 reo_destination_11> REO remaps this 789*5113495bSYour Name <enum 12 reo_destination_12> REO remaps this <enum 13 reo_destination_13> 790*5113495bSYour Name REO remaps this 791*5113495bSYour Name <enum 14 reo_destination_14> REO remaps this 792*5113495bSYour Name <enum 15 reo_destination_15> REO remaps this 793*5113495bSYour Name <enum 16 reo_destination_16> REO remaps this 794*5113495bSYour Name <enum 17 reo_destination_17> REO remaps this 795*5113495bSYour Name <enum 18 reo_destination_18> REO remaps this 796*5113495bSYour Name <enum 19 reo_destination_19> REO remaps this 797*5113495bSYour Name <enum 20 reo_destination_20> REO remaps this 798*5113495bSYour Name <enum 21 reo_destination_21> REO remaps this 799*5113495bSYour Name <enum 22 reo_destination_22> REO remaps this 800*5113495bSYour Name <enum 23 reo_destination_23> REO remaps this 801*5113495bSYour Name <enum 24 reo_destination_24> REO remaps this 802*5113495bSYour Name <enum 25 reo_destination_25> REO remaps this 803*5113495bSYour Name <enum 26 reo_destination_26> REO remaps this 804*5113495bSYour Name <enum 27 reo_destination_27> REO remaps this 805*5113495bSYour Name <enum 28 reo_destination_28> REO remaps this 806*5113495bSYour Name <enum 29 reo_destination_29> REO remaps this 807*5113495bSYour Name <enum 30 reo_destination_30> REO remaps this 808*5113495bSYour Name <enum 31 reo_destination_31> REO remaps this 809*5113495bSYour Name 810*5113495bSYour Name Feature supported only in HastingsPrime 811*5113495bSYour Name <legal all> 812*5113495bSYour Name */ 813*5113495bSYour Name 814*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_OFFSET 0x00000018 815*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_LSB 14 816*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_MSB 18 817*5113495bSYour Name #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_MASK 0x0007c000 818*5113495bSYour Name 819*5113495bSYour Name 820*5113495bSYour Name /* Description MPDU_SEQUENCE_NUMBER 821*5113495bSYour Name 822*5113495bSYour Name Consumer: REO/SW/FW 823*5113495bSYour Name Producer: RXDMA 824*5113495bSYour Name 825*5113495bSYour Name The field can have two different meanings based on the setting 826*5113495bSYour Name of sub-field Reo_level_mpdu_frame_info. Rx_mpdu_desc_info_details.BAR_frame: 827*5113495bSYour Name 828*5113495bSYour Name 829*5113495bSYour Name 'BAR_frame' is NOT set: 830*5113495bSYour Name The MPDU sequence number of the received frame. 831*5113495bSYour Name 832*5113495bSYour Name 'BAR_frame' is set. 833*5113495bSYour Name The MPDU Start sequence number from the BAR frame 834*5113495bSYour Name <legal all> 835*5113495bSYour Name */ 836*5113495bSYour Name 837*5113495bSYour Name #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_OFFSET 0x00000018 838*5113495bSYour Name #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_LSB 19 839*5113495bSYour Name #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_MSB 30 840*5113495bSYour Name #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_MASK 0x7ff80000 841*5113495bSYour Name 842*5113495bSYour Name 843*5113495bSYour Name /* Description RESERVED_6A 844*5113495bSYour Name 845*5113495bSYour Name Field only valid when Reo_level_mpdu_frame_info. Rx_mpdu_desc_info_details. 846*5113495bSYour Name Mpdu_qos_control_valid is set 847*5113495bSYour Name 848*5113495bSYour Name This indicates whether the 'Ack policy' field within the 849*5113495bSYour Name QoS control field of the MPDU indicates 'no-Ack.' 850*5113495bSYour Name <legal all> 851*5113495bSYour Name */ 852*5113495bSYour Name 853*5113495bSYour Name #define REO_ENTRANCE_RING_RESERVED_6A_OFFSET 0x00000018 854*5113495bSYour Name #define REO_ENTRANCE_RING_RESERVED_6A_LSB 31 855*5113495bSYour Name #define REO_ENTRANCE_RING_RESERVED_6A_MSB 31 856*5113495bSYour Name #define REO_ENTRANCE_RING_RESERVED_6A_MASK 0x80000000 857*5113495bSYour Name 858*5113495bSYour Name 859*5113495bSYour Name /* Description PHY_PPDU_ID 860*5113495bSYour Name 861*5113495bSYour Name A PPDU counter value that PHY increments for every PPDU 862*5113495bSYour Name received 863*5113495bSYour Name The counter value wraps around. Pine RXDMA can be configured 864*5113495bSYour Name to copy this from the RX_PPDU_START TLV for every output 865*5113495bSYour Name descriptor. 866*5113495bSYour Name 867*5113495bSYour Name This field is ignored by REO. 868*5113495bSYour Name 869*5113495bSYour Name Feature supported only in Pine 870*5113495bSYour Name <legal all> 871*5113495bSYour Name */ 872*5113495bSYour Name 873*5113495bSYour Name #define REO_ENTRANCE_RING_PHY_PPDU_ID_OFFSET 0x0000001c 874*5113495bSYour Name #define REO_ENTRANCE_RING_PHY_PPDU_ID_LSB 0 875*5113495bSYour Name #define REO_ENTRANCE_RING_PHY_PPDU_ID_MSB 15 876*5113495bSYour Name #define REO_ENTRANCE_RING_PHY_PPDU_ID_MASK 0x0000ffff 877*5113495bSYour Name 878*5113495bSYour Name 879*5113495bSYour Name /* Description SRC_LINK_ID 880*5113495bSYour Name 881*5113495bSYour Name Consumer: SW 882*5113495bSYour Name Producer: RXDMA 883*5113495bSYour Name 884*5113495bSYour Name Set to the link ID of the PMAC that received the frame 885*5113495bSYour Name <legal all> 886*5113495bSYour Name */ 887*5113495bSYour Name 888*5113495bSYour Name #define REO_ENTRANCE_RING_SRC_LINK_ID_OFFSET 0x0000001c 889*5113495bSYour Name #define REO_ENTRANCE_RING_SRC_LINK_ID_LSB 16 890*5113495bSYour Name #define REO_ENTRANCE_RING_SRC_LINK_ID_MSB 18 891*5113495bSYour Name #define REO_ENTRANCE_RING_SRC_LINK_ID_MASK 0x00070000 892*5113495bSYour Name 893*5113495bSYour Name 894*5113495bSYour Name /* Description RESERVED_7A 895*5113495bSYour Name 896*5113495bSYour Name Hamilton v1 filled the link ID of the PMAC that received 897*5113495bSYour Name the frame here. 898*5113495bSYour Name <legal 0> 899*5113495bSYour Name */ 900*5113495bSYour Name 901*5113495bSYour Name #define REO_ENTRANCE_RING_RESERVED_7A_OFFSET 0x0000001c 902*5113495bSYour Name #define REO_ENTRANCE_RING_RESERVED_7A_LSB 19 903*5113495bSYour Name #define REO_ENTRANCE_RING_RESERVED_7A_MSB 19 904*5113495bSYour Name #define REO_ENTRANCE_RING_RESERVED_7A_MASK 0x00080000 905*5113495bSYour Name 906*5113495bSYour Name 907*5113495bSYour Name /* Description RING_ID 908*5113495bSYour Name 909*5113495bSYour Name Consumer: SW/REO/DEBUG 910*5113495bSYour Name Producer: SRNG (of RXDMA) 911*5113495bSYour Name 912*5113495bSYour Name For debugging. 913*5113495bSYour Name This field is filled in by the SRNG module. 914*5113495bSYour Name It help to identify the ring that is being looked <legal 915*5113495bSYour Name all> 916*5113495bSYour Name */ 917*5113495bSYour Name 918*5113495bSYour Name #define REO_ENTRANCE_RING_RING_ID_OFFSET 0x0000001c 919*5113495bSYour Name #define REO_ENTRANCE_RING_RING_ID_LSB 20 920*5113495bSYour Name #define REO_ENTRANCE_RING_RING_ID_MSB 27 921*5113495bSYour Name #define REO_ENTRANCE_RING_RING_ID_MASK 0x0ff00000 922*5113495bSYour Name 923*5113495bSYour Name 924*5113495bSYour Name /* Description LOOPING_COUNT 925*5113495bSYour Name 926*5113495bSYour Name Consumer: SW/REO/DEBUG 927*5113495bSYour Name Producer: SRNG (of RXDMA) 928*5113495bSYour Name 929*5113495bSYour Name For debugging. 930*5113495bSYour Name This field is filled in by the SRNG module. 931*5113495bSYour Name 932*5113495bSYour Name A count value that indicates the number of times the producer 933*5113495bSYour Name of entries into this Ring has looped around the ring. 934*5113495bSYour Name At initialization time, this value is set to 0. On the first 935*5113495bSYour Name loop, this value is set to 1. After the max value is reached 936*5113495bSYour Name allowed by the number of bits for this field, the count 937*5113495bSYour Name value continues with 0 again. 938*5113495bSYour Name 939*5113495bSYour Name In case SW is the consumer of the ring entries, it can use 940*5113495bSYour Name this field to figure out up to where the producer of entries 941*5113495bSYour Name has created new entries. This eliminates the need to check 942*5113495bSYour Name where the "head pointer' of the ring is located once the 943*5113495bSYour Name SW starts processing an interrupt indicating that new entries 944*5113495bSYour Name have been put into this ring... 945*5113495bSYour Name 946*5113495bSYour Name Also note that SW if it wants only needs to look at the 947*5113495bSYour Name LSB bit of this count value. 948*5113495bSYour Name <legal all> 949*5113495bSYour Name */ 950*5113495bSYour Name 951*5113495bSYour Name #define REO_ENTRANCE_RING_LOOPING_COUNT_OFFSET 0x0000001c 952*5113495bSYour Name #define REO_ENTRANCE_RING_LOOPING_COUNT_LSB 28 953*5113495bSYour Name #define REO_ENTRANCE_RING_LOOPING_COUNT_MSB 31 954*5113495bSYour Name #define REO_ENTRANCE_RING_LOOPING_COUNT_MASK 0xf0000000 955*5113495bSYour Name 956*5113495bSYour Name 957*5113495bSYour Name 958*5113495bSYour Name #endif // REO_ENTRANCE_RING 959