1*5113495bSYour Name 2*5113495bSYour Name /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name 18*5113495bSYour Name 19*5113495bSYour Name 20*5113495bSYour Name 21*5113495bSYour Name 22*5113495bSYour Name 23*5113495bSYour Name 24*5113495bSYour Name 25*5113495bSYour Name 26*5113495bSYour Name #ifndef _RESPONSE_END_STATUS_H_ 27*5113495bSYour Name #define _RESPONSE_END_STATUS_H_ 28*5113495bSYour Name #if !defined(__ASSEMBLER__) 29*5113495bSYour Name #endif 30*5113495bSYour Name 31*5113495bSYour Name #include "phytx_abort_request_info.h" 32*5113495bSYour Name #define NUM_OF_DWORDS_RESPONSE_END_STATUS 22 33*5113495bSYour Name 34*5113495bSYour Name #define NUM_OF_QWORDS_RESPONSE_END_STATUS 11 35*5113495bSYour Name 36*5113495bSYour Name 37*5113495bSYour Name struct response_end_status { 38*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 39*5113495bSYour Name uint32_t coex_bt_tx_while_wlan_tx : 1, // [0:0] 40*5113495bSYour Name coex_wan_tx_while_wlan_tx : 1, // [1:1] 41*5113495bSYour Name coex_wlan_tx_while_wlan_tx : 1, // [2:2] 42*5113495bSYour Name global_data_underflow_warning : 1, // [3:3] 43*5113495bSYour Name response_transmit_status : 4, // [7:4] 44*5113495bSYour Name phytx_pkt_end_info_valid : 1, // [8:8] 45*5113495bSYour Name phytx_abort_request_info_valid : 1, // [9:9] 46*5113495bSYour Name generated_response : 3, // [12:10] 47*5113495bSYour Name mba_user_count : 7, // [19:13] 48*5113495bSYour Name mba_fake_bitmap_count : 7, // [26:20] 49*5113495bSYour Name coex_based_tx_bw : 3, // [29:27] 50*5113495bSYour Name trig_response_related : 1, // [30:30] 51*5113495bSYour Name dpdtrain_done : 1; // [31:31] 52*5113495bSYour Name struct phytx_abort_request_info phytx_abort_request_info_details; 53*5113495bSYour Name uint16_t cbf_segment_request_mask : 8, // [23:16] 54*5113495bSYour Name cbf_segment_sent_mask : 8; // [31:24] 55*5113495bSYour Name uint32_t underflow_mpdu_count : 9, // [8:0] 56*5113495bSYour Name data_underflow_warning : 2, // [10:9] 57*5113495bSYour Name phy_tx_gain_setting : 8, // [18:11] 58*5113495bSYour Name timing_status : 2, // [20:19] 59*5113495bSYour Name only_null_delim_sent : 1, // [21:21] 60*5113495bSYour Name brp_info_valid : 1, // [22:22] 61*5113495bSYour Name reserved_2a : 9; // [31:23] 62*5113495bSYour Name uint32_t mu_response_bitmap_31_0 : 32; // [31:0] 63*5113495bSYour Name uint32_t mu_response_bitmap_36_32 : 5, // [4:0] 64*5113495bSYour Name reserved_4a : 11, // [15:5] 65*5113495bSYour Name transmit_delay : 16; // [31:16] 66*5113495bSYour Name uint32_t start_of_frame_timestamp_15_0 : 16, // [15:0] 67*5113495bSYour Name start_of_frame_timestamp_31_16 : 16; // [31:16] 68*5113495bSYour Name uint32_t end_of_frame_timestamp_15_0 : 16, // [15:0] 69*5113495bSYour Name end_of_frame_timestamp_31_16 : 16; // [31:16] 70*5113495bSYour Name uint32_t tx_group_delay : 12, // [11:0] 71*5113495bSYour Name reserved_7a : 4, // [15:12] 72*5113495bSYour Name tpc_dbg_info_cmn_15_0 : 16; // [31:16] 73*5113495bSYour Name uint32_t tpc_dbg_info_31_16 : 16, // [15:0] 74*5113495bSYour Name tpc_dbg_info_47_32 : 16; // [31:16] 75*5113495bSYour Name uint32_t tpc_dbg_info_chn1_15_0 : 16, // [15:0] 76*5113495bSYour Name tpc_dbg_info_chn1_31_16 : 16; // [31:16] 77*5113495bSYour Name uint32_t tpc_dbg_info_chn1_47_32 : 16, // [15:0] 78*5113495bSYour Name tpc_dbg_info_chn1_63_48 : 16; // [31:16] 79*5113495bSYour Name uint32_t tpc_dbg_info_chn1_79_64 : 16, // [15:0] 80*5113495bSYour Name tpc_dbg_info_chn2_15_0 : 16; // [31:16] 81*5113495bSYour Name uint32_t tpc_dbg_info_chn2_31_16 : 16, // [15:0] 82*5113495bSYour Name tpc_dbg_info_chn2_47_32 : 16; // [31:16] 83*5113495bSYour Name uint32_t tpc_dbg_info_chn2_63_48 : 16, // [15:0] 84*5113495bSYour Name tpc_dbg_info_chn2_79_64 : 16; // [31:16] 85*5113495bSYour Name uint32_t phytx_tx_end_sw_info_15_0 : 16, // [15:0] 86*5113495bSYour Name phytx_tx_end_sw_info_31_16 : 16; // [31:16] 87*5113495bSYour Name uint32_t phytx_tx_end_sw_info_47_32 : 16, // [15:0] 88*5113495bSYour Name phytx_tx_end_sw_info_63_48 : 16; // [31:16] 89*5113495bSYour Name uint32_t addr1_31_0 : 32; // [31:0] 90*5113495bSYour Name uint32_t addr1_47_32 : 16, // [15:0] 91*5113495bSYour Name addr2_15_0 : 16; // [31:16] 92*5113495bSYour Name uint32_t addr2_47_16 : 32; // [31:0] 93*5113495bSYour Name uint32_t addr3_31_0 : 32; // [31:0] 94*5113495bSYour Name uint32_t addr3_47_32 : 16, // [15:0] 95*5113495bSYour Name ranging : 1, // [16:16] 96*5113495bSYour Name secure : 1, // [17:17] 97*5113495bSYour Name ranging_ftm_frame_sent : 1, // [18:18] 98*5113495bSYour Name reserved_20a : 13; // [31:19] 99*5113495bSYour Name uint32_t tlv64_padding : 32; // [31:0] 100*5113495bSYour Name #else 101*5113495bSYour Name uint32_t dpdtrain_done : 1, // [31:31] 102*5113495bSYour Name trig_response_related : 1, // [30:30] 103*5113495bSYour Name coex_based_tx_bw : 3, // [29:27] 104*5113495bSYour Name mba_fake_bitmap_count : 7, // [26:20] 105*5113495bSYour Name mba_user_count : 7, // [19:13] 106*5113495bSYour Name generated_response : 3, // [12:10] 107*5113495bSYour Name phytx_abort_request_info_valid : 1, // [9:9] 108*5113495bSYour Name phytx_pkt_end_info_valid : 1, // [8:8] 109*5113495bSYour Name response_transmit_status : 4, // [7:4] 110*5113495bSYour Name global_data_underflow_warning : 1, // [3:3] 111*5113495bSYour Name coex_wlan_tx_while_wlan_tx : 1, // [2:2] 112*5113495bSYour Name coex_wan_tx_while_wlan_tx : 1, // [1:1] 113*5113495bSYour Name coex_bt_tx_while_wlan_tx : 1; // [0:0] 114*5113495bSYour Name uint32_t cbf_segment_sent_mask : 8, // [31:24] 115*5113495bSYour Name cbf_segment_request_mask : 8; // [23:16] 116*5113495bSYour Name struct phytx_abort_request_info phytx_abort_request_info_details; 117*5113495bSYour Name uint32_t reserved_2a : 9, // [31:23] 118*5113495bSYour Name brp_info_valid : 1, // [22:22] 119*5113495bSYour Name only_null_delim_sent : 1, // [21:21] 120*5113495bSYour Name timing_status : 2, // [20:19] 121*5113495bSYour Name phy_tx_gain_setting : 8, // [18:11] 122*5113495bSYour Name data_underflow_warning : 2, // [10:9] 123*5113495bSYour Name underflow_mpdu_count : 9; // [8:0] 124*5113495bSYour Name uint32_t mu_response_bitmap_31_0 : 32; // [31:0] 125*5113495bSYour Name uint32_t transmit_delay : 16, // [31:16] 126*5113495bSYour Name reserved_4a : 11, // [15:5] 127*5113495bSYour Name mu_response_bitmap_36_32 : 5; // [4:0] 128*5113495bSYour Name uint32_t start_of_frame_timestamp_31_16 : 16, // [31:16] 129*5113495bSYour Name start_of_frame_timestamp_15_0 : 16; // [15:0] 130*5113495bSYour Name uint32_t end_of_frame_timestamp_31_16 : 16, // [31:16] 131*5113495bSYour Name end_of_frame_timestamp_15_0 : 16; // [15:0] 132*5113495bSYour Name uint32_t tpc_dbg_info_cmn_15_0 : 16, // [31:16] 133*5113495bSYour Name reserved_7a : 4, // [15:12] 134*5113495bSYour Name tx_group_delay : 12; // [11:0] 135*5113495bSYour Name uint32_t tpc_dbg_info_47_32 : 16, // [31:16] 136*5113495bSYour Name tpc_dbg_info_31_16 : 16; // [15:0] 137*5113495bSYour Name uint32_t tpc_dbg_info_chn1_31_16 : 16, // [31:16] 138*5113495bSYour Name tpc_dbg_info_chn1_15_0 : 16; // [15:0] 139*5113495bSYour Name uint32_t tpc_dbg_info_chn1_63_48 : 16, // [31:16] 140*5113495bSYour Name tpc_dbg_info_chn1_47_32 : 16; // [15:0] 141*5113495bSYour Name uint32_t tpc_dbg_info_chn2_15_0 : 16, // [31:16] 142*5113495bSYour Name tpc_dbg_info_chn1_79_64 : 16; // [15:0] 143*5113495bSYour Name uint32_t tpc_dbg_info_chn2_47_32 : 16, // [31:16] 144*5113495bSYour Name tpc_dbg_info_chn2_31_16 : 16; // [15:0] 145*5113495bSYour Name uint32_t tpc_dbg_info_chn2_79_64 : 16, // [31:16] 146*5113495bSYour Name tpc_dbg_info_chn2_63_48 : 16; // [15:0] 147*5113495bSYour Name uint32_t phytx_tx_end_sw_info_31_16 : 16, // [31:16] 148*5113495bSYour Name phytx_tx_end_sw_info_15_0 : 16; // [15:0] 149*5113495bSYour Name uint32_t phytx_tx_end_sw_info_63_48 : 16, // [31:16] 150*5113495bSYour Name phytx_tx_end_sw_info_47_32 : 16; // [15:0] 151*5113495bSYour Name uint32_t addr1_31_0 : 32; // [31:0] 152*5113495bSYour Name uint32_t addr2_15_0 : 16, // [31:16] 153*5113495bSYour Name addr1_47_32 : 16; // [15:0] 154*5113495bSYour Name uint32_t addr2_47_16 : 32; // [31:0] 155*5113495bSYour Name uint32_t addr3_31_0 : 32; // [31:0] 156*5113495bSYour Name uint32_t reserved_20a : 13, // [31:19] 157*5113495bSYour Name ranging_ftm_frame_sent : 1, // [18:18] 158*5113495bSYour Name secure : 1, // [17:17] 159*5113495bSYour Name ranging : 1, // [16:16] 160*5113495bSYour Name addr3_47_32 : 16; // [15:0] 161*5113495bSYour Name uint32_t tlv64_padding : 32; // [31:0] 162*5113495bSYour Name #endif 163*5113495bSYour Name }; 164*5113495bSYour Name 165*5113495bSYour Name 166*5113495bSYour Name /* Description COEX_BT_TX_WHILE_WLAN_TX 167*5113495bSYour Name 168*5113495bSYour Name When set, a BT tx coex event started while wlan was in the 169*5113495bSYour Name middle of response transmission. 170*5113495bSYour Name 171*5113495bSYour Name Field set when coex_status_broadcast TLV received with bt 172*5113495bSYour Name tx activity set and WLAN tx ongoing. 173*5113495bSYour Name <legal all> 174*5113495bSYour Name */ 175*5113495bSYour Name 176*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_BT_TX_WHILE_WLAN_TX_OFFSET 0x0000000000000000 177*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_BT_TX_WHILE_WLAN_TX_LSB 0 178*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_BT_TX_WHILE_WLAN_TX_MSB 0 179*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_BT_TX_WHILE_WLAN_TX_MASK 0x0000000000000001 180*5113495bSYour Name 181*5113495bSYour Name 182*5113495bSYour Name /* Description COEX_WAN_TX_WHILE_WLAN_TX 183*5113495bSYour Name 184*5113495bSYour Name When set, a WAN tx coex event started while wlan was in 185*5113495bSYour Name the middle of response transmission. 186*5113495bSYour Name 187*5113495bSYour Name Field set when coex_status_broadcast TLV received with WAN 188*5113495bSYour Name tx activity set and WLAN tx ongoing 189*5113495bSYour Name <legal all> 190*5113495bSYour Name */ 191*5113495bSYour Name 192*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_WAN_TX_WHILE_WLAN_TX_OFFSET 0x0000000000000000 193*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_WAN_TX_WHILE_WLAN_TX_LSB 1 194*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_WAN_TX_WHILE_WLAN_TX_MSB 1 195*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_WAN_TX_WHILE_WLAN_TX_MASK 0x0000000000000002 196*5113495bSYour Name 197*5113495bSYour Name 198*5113495bSYour Name /* Description COEX_WLAN_TX_WHILE_WLAN_TX 199*5113495bSYour Name 200*5113495bSYour Name When set, a WLAN tx coex event started while wlan was in 201*5113495bSYour Name the middle of response transmission. 202*5113495bSYour Name 203*5113495bSYour Name Field set when coex_status_broadcast TLV received with WLAN 204*5113495bSYour Name tx activity set and WLAN tx ongoing 205*5113495bSYour Name <legal all> 206*5113495bSYour Name */ 207*5113495bSYour Name 208*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_WLAN_TX_WHILE_WLAN_TX_OFFSET 0x0000000000000000 209*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_WLAN_TX_WHILE_WLAN_TX_LSB 2 210*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_WLAN_TX_WHILE_WLAN_TX_MSB 2 211*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_WLAN_TX_WHILE_WLAN_TX_MASK 0x0000000000000004 212*5113495bSYour Name 213*5113495bSYour Name 214*5113495bSYour Name /* Description GLOBAL_DATA_UNDERFLOW_WARNING 215*5113495bSYour Name 216*5113495bSYour Name Consumer: SCH/SW 217*5113495bSYour Name Producer: TXPCU 218*5113495bSYour Name 219*5113495bSYour Name When set, during response transmission a data underflow 220*5113495bSYour Name occurred for one or more users.<legal all> 221*5113495bSYour Name */ 222*5113495bSYour Name 223*5113495bSYour Name #define RESPONSE_END_STATUS_GLOBAL_DATA_UNDERFLOW_WARNING_OFFSET 0x0000000000000000 224*5113495bSYour Name #define RESPONSE_END_STATUS_GLOBAL_DATA_UNDERFLOW_WARNING_LSB 3 225*5113495bSYour Name #define RESPONSE_END_STATUS_GLOBAL_DATA_UNDERFLOW_WARNING_MSB 3 226*5113495bSYour Name #define RESPONSE_END_STATUS_GLOBAL_DATA_UNDERFLOW_WARNING_MASK 0x0000000000000008 227*5113495bSYour Name 228*5113495bSYour Name 229*5113495bSYour Name /* Description RESPONSE_TRANSMIT_STATUS 230*5113495bSYour Name 231*5113495bSYour Name <enum 0 response_ok> Successful transmission of the selfgen 232*5113495bSYour Name response frame 233*5113495bSYour Name <enum 1 response_coex_soft_abort> Set if transmission is 234*5113495bSYour Name terminated because of the coex soft abort. 235*5113495bSYour Name <enum 2 response_phy_err> Set if transmission is terminated 236*5113495bSYour Name because PHY generated an abort request 237*5113495bSYour Name <enum 3 response_flush_received> Set if transmission is 238*5113495bSYour Name terminated because RXPCU received a flush request 239*5113495bSYour Name <enum 4 response_other_err> Set if transmission is terminated 240*5113495bSYour Name because of other errors within the RXPCU 241*5113495bSYour Name <legal 0-4> 242*5113495bSYour Name */ 243*5113495bSYour Name 244*5113495bSYour Name #define RESPONSE_END_STATUS_RESPONSE_TRANSMIT_STATUS_OFFSET 0x0000000000000000 245*5113495bSYour Name #define RESPONSE_END_STATUS_RESPONSE_TRANSMIT_STATUS_LSB 4 246*5113495bSYour Name #define RESPONSE_END_STATUS_RESPONSE_TRANSMIT_STATUS_MSB 7 247*5113495bSYour Name #define RESPONSE_END_STATUS_RESPONSE_TRANSMIT_STATUS_MASK 0x00000000000000f0 248*5113495bSYour Name 249*5113495bSYour Name 250*5113495bSYour Name /* Description PHYTX_PKT_END_INFO_VALID 251*5113495bSYour Name 252*5113495bSYour Name All the fields originating from PHYTX_PKT_END TLV contain 253*5113495bSYour Name valid info 254*5113495bSYour Name 255*5113495bSYour Name Note that when "trig_response_related" is set, this bit 256*5113495bSYour Name will often not be set as the trigger response contents might 257*5113495bSYour Name have come from a scheduling command which is not reported 258*5113495bSYour Name as part of the 'response' transmission. 259*5113495bSYour Name */ 260*5113495bSYour Name 261*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_PKT_END_INFO_VALID_OFFSET 0x0000000000000000 262*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_PKT_END_INFO_VALID_LSB 8 263*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_PKT_END_INFO_VALID_MSB 8 264*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_PKT_END_INFO_VALID_MASK 0x0000000000000100 265*5113495bSYour Name 266*5113495bSYour Name 267*5113495bSYour Name /* Description PHYTX_ABORT_REQUEST_INFO_VALID 268*5113495bSYour Name 269*5113495bSYour Name Field Phytx_abort_request_info_details contains valid info 270*5113495bSYour Name 271*5113495bSYour Name */ 272*5113495bSYour Name 273*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_VALID_OFFSET 0x0000000000000000 274*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_VALID_LSB 9 275*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_VALID_MSB 9 276*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_VALID_MASK 0x0000000000000200 277*5113495bSYour Name 278*5113495bSYour Name 279*5113495bSYour Name /* Description GENERATED_RESPONSE 280*5113495bSYour Name 281*5113495bSYour Name The generated response frame 282*5113495bSYour Name 283*5113495bSYour Name <enum 0 selfgen_ACK> TXPCU generated an ACK response. Note 284*5113495bSYour Name that this can be part of a trigger response. In that case 285*5113495bSYour Name bit trig_response_related will be set as well. 286*5113495bSYour Name 287*5113495bSYour Name <enum 1 selfgen_CTS> TXPCU generated an CTS response. Note 288*5113495bSYour Name that this can be part of a trigger response. In that case 289*5113495bSYour Name bit trig_response_related will be set as well. 290*5113495bSYour Name 291*5113495bSYour Name <enum 2 selfgen_BA> TXPCU generated a BA response. Note 292*5113495bSYour Name that this can be part of a trigger response. In that case 293*5113495bSYour Name bit trig_response_related will be set as well. 294*5113495bSYour Name 295*5113495bSYour Name <enum 3 selfgen_MBA> TXPCU generated an M BA response. Note 296*5113495bSYour Name that this can be part of a trigger response. In that case 297*5113495bSYour Name bit trig_response_related will be set as well. 298*5113495bSYour Name 299*5113495bSYour Name <enum 4 selfgen_CBF> TXPCU generated a CBF response. Note 300*5113495bSYour Name that this can be part of a trigger response. In that case 301*5113495bSYour Name bit trig_response_related will be set as well. 302*5113495bSYour Name 303*5113495bSYour Name <enum 5 selfgen_other_trig_response> 304*5113495bSYour Name TXPCU generated a trigger related response of a type not 305*5113495bSYour Name specified above. Note that in this case bit trig_response_related 306*5113495bSYour Name will be set as well. 307*5113495bSYour Name This e-num will also be used when TXPCU has been programmed 308*5113495bSYour Name to overwrite it's own self gen response generation, and 309*5113495bSYour Name wait for the response to come from SCH.. 310*5113495bSYour Name Also applicable for basic trigger response. 311*5113495bSYour Name 312*5113495bSYour Name <enum 6 selfgen_NDP_LMR> TXPCU generated a self-gen NDP 313*5113495bSYour Name followed by a self-gen LMR for the ranging NDPA followed 314*5113495bSYour Name by NDP received by RXPCU. 315*5113495bSYour Name 316*5113495bSYour Name <legal 0-6> 317*5113495bSYour Name */ 318*5113495bSYour Name 319*5113495bSYour Name #define RESPONSE_END_STATUS_GENERATED_RESPONSE_OFFSET 0x0000000000000000 320*5113495bSYour Name #define RESPONSE_END_STATUS_GENERATED_RESPONSE_LSB 10 321*5113495bSYour Name #define RESPONSE_END_STATUS_GENERATED_RESPONSE_MSB 12 322*5113495bSYour Name #define RESPONSE_END_STATUS_GENERATED_RESPONSE_MASK 0x0000000000001c00 323*5113495bSYour Name 324*5113495bSYour Name 325*5113495bSYour Name /* Description MBA_USER_COUNT 326*5113495bSYour Name 327*5113495bSYour Name Field only valid in case of selfgen_MBA 328*5113495bSYour Name 329*5113495bSYour Name The number of users included in the generated MBA 330*5113495bSYour Name 331*5113495bSYour Name Note that this value will be the same as in TLV/field: RESPONSE_START_STATUS.response_STA_count 332*5113495bSYour Name 333*5113495bSYour Name 334*5113495bSYour Name <legal all> 335*5113495bSYour Name */ 336*5113495bSYour Name 337*5113495bSYour Name #define RESPONSE_END_STATUS_MBA_USER_COUNT_OFFSET 0x0000000000000000 338*5113495bSYour Name #define RESPONSE_END_STATUS_MBA_USER_COUNT_LSB 13 339*5113495bSYour Name #define RESPONSE_END_STATUS_MBA_USER_COUNT_MSB 19 340*5113495bSYour Name #define RESPONSE_END_STATUS_MBA_USER_COUNT_MASK 0x00000000000fe000 341*5113495bSYour Name 342*5113495bSYour Name 343*5113495bSYour Name /* Description MBA_FAKE_BITMAP_COUNT 344*5113495bSYour Name 345*5113495bSYour Name Field only valid in case of MU OFDMA selfgen_MBA 346*5113495bSYour Name 347*5113495bSYour Name The number of users for which RXPCU did not have a bitmap, 348*5113495bSYour Name and thus provided a 'fake bitmap' 349*5113495bSYour Name <legal all> 350*5113495bSYour Name */ 351*5113495bSYour Name 352*5113495bSYour Name #define RESPONSE_END_STATUS_MBA_FAKE_BITMAP_COUNT_OFFSET 0x0000000000000000 353*5113495bSYour Name #define RESPONSE_END_STATUS_MBA_FAKE_BITMAP_COUNT_LSB 20 354*5113495bSYour Name #define RESPONSE_END_STATUS_MBA_FAKE_BITMAP_COUNT_MSB 26 355*5113495bSYour Name #define RESPONSE_END_STATUS_MBA_FAKE_BITMAP_COUNT_MASK 0x0000000007f00000 356*5113495bSYour Name 357*5113495bSYour Name 358*5113495bSYour Name /* Description COEX_BASED_TX_BW 359*5113495bSYour Name 360*5113495bSYour Name This is the transmit bandwidth value 361*5113495bSYour Name that is granted by Coex for the response frame 362*5113495bSYour Name 363*5113495bSYour Name <enum 0 20_mhz>20 Mhz BW 364*5113495bSYour Name <enum 1 40_mhz>40 Mhz BW 365*5113495bSYour Name <enum 2 80_mhz>80 Mhz BW 366*5113495bSYour Name <enum 3 160_mhz>160 Mhz BW 367*5113495bSYour Name <enum 4 320_mhz>320 Mhz BW 368*5113495bSYour Name <enum 5 240_mhz>240 Mhz BW 369*5113495bSYour Name */ 370*5113495bSYour Name 371*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_BASED_TX_BW_OFFSET 0x0000000000000000 372*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_BASED_TX_BW_LSB 27 373*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_BASED_TX_BW_MSB 29 374*5113495bSYour Name #define RESPONSE_END_STATUS_COEX_BASED_TX_BW_MASK 0x0000000038000000 375*5113495bSYour Name 376*5113495bSYour Name 377*5113495bSYour Name /* Description TRIG_RESPONSE_RELATED 378*5113495bSYour Name 379*5113495bSYour Name When set, this TLV is generated by TXPCU in the context 380*5113495bSYour Name of a response transmission to a received trigger frame. 381*5113495bSYour Name 382*5113495bSYour Name <legal all> 383*5113495bSYour Name */ 384*5113495bSYour Name 385*5113495bSYour Name #define RESPONSE_END_STATUS_TRIG_RESPONSE_RELATED_OFFSET 0x0000000000000000 386*5113495bSYour Name #define RESPONSE_END_STATUS_TRIG_RESPONSE_RELATED_LSB 30 387*5113495bSYour Name #define RESPONSE_END_STATUS_TRIG_RESPONSE_RELATED_MSB 30 388*5113495bSYour Name #define RESPONSE_END_STATUS_TRIG_RESPONSE_RELATED_MASK 0x0000000040000000 389*5113495bSYour Name 390*5113495bSYour Name 391*5113495bSYour Name /* Description DPDTRAIN_DONE 392*5113495bSYour Name 393*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 394*5113495bSYour Name 395*5113495bSYour Name For DPD Training packets, this bit is set to indicate that 396*5113495bSYour Name DPD Training was successfully run to completion. Also 397*5113495bSYour Name reused by Implicit BF Calibration Packets. This bit is intended 398*5113495bSYour Name for debug purposes. 399*5113495bSYour Name <legal all> 400*5113495bSYour Name */ 401*5113495bSYour Name 402*5113495bSYour Name #define RESPONSE_END_STATUS_DPDTRAIN_DONE_OFFSET 0x0000000000000000 403*5113495bSYour Name #define RESPONSE_END_STATUS_DPDTRAIN_DONE_LSB 31 404*5113495bSYour Name #define RESPONSE_END_STATUS_DPDTRAIN_DONE_MSB 31 405*5113495bSYour Name #define RESPONSE_END_STATUS_DPDTRAIN_DONE_MASK 0x0000000080000000 406*5113495bSYour Name 407*5113495bSYour Name 408*5113495bSYour Name /* Description PHYTX_ABORT_REQUEST_INFO_DETAILS 409*5113495bSYour Name 410*5113495bSYour Name Field only valid when PHYTX_ABORT_REQUEST_info_valid is 411*5113495bSYour Name set 412*5113495bSYour Name 413*5113495bSYour Name The reason why PHYTX is requested an abort 414*5113495bSYour Name */ 415*5113495bSYour Name 416*5113495bSYour Name 417*5113495bSYour Name /* Description PHYTX_ABORT_REASON 418*5113495bSYour Name 419*5113495bSYour Name Reason for early termination of TX packet by the PHY 420*5113495bSYour Name 421*5113495bSYour Name <enum_type PHYTX_ABORT_ENUM> 422*5113495bSYour Name */ 423*5113495bSYour Name 424*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_DETAILS_PHYTX_ABORT_REASON_OFFSET 0x0000000000000000 425*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_DETAILS_PHYTX_ABORT_REASON_LSB 32 426*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_DETAILS_PHYTX_ABORT_REASON_MSB 39 427*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_DETAILS_PHYTX_ABORT_REASON_MASK 0x000000ff00000000 428*5113495bSYour Name 429*5113495bSYour Name 430*5113495bSYour Name /* Description USER_NUMBER 431*5113495bSYour Name 432*5113495bSYour Name For some errors, the user for which this error was detected 433*5113495bSYour Name can be indicated in this field. 434*5113495bSYour Name <legal 0-36> 435*5113495bSYour Name */ 436*5113495bSYour Name 437*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_DETAILS_USER_NUMBER_OFFSET 0x0000000000000000 438*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_DETAILS_USER_NUMBER_LSB 40 439*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_DETAILS_USER_NUMBER_MSB 45 440*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_DETAILS_USER_NUMBER_MASK 0x00003f0000000000 441*5113495bSYour Name 442*5113495bSYour Name 443*5113495bSYour Name /* Description RESERVED 444*5113495bSYour Name 445*5113495bSYour Name <legal 0> 446*5113495bSYour Name */ 447*5113495bSYour Name 448*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_DETAILS_RESERVED_OFFSET 0x0000000000000000 449*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_DETAILS_RESERVED_LSB 46 450*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_DETAILS_RESERVED_MSB 47 451*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_ABORT_REQUEST_INFO_DETAILS_RESERVED_MASK 0x0000c00000000000 452*5113495bSYour Name 453*5113495bSYour Name 454*5113495bSYour Name /* Description CBF_SEGMENT_REQUEST_MASK 455*5113495bSYour Name 456*5113495bSYour Name Field only valid when brp_info_valid is set. 457*5113495bSYour Name 458*5113495bSYour Name Field equal to the 'Feedback Segment Retransmission Bitmap' 459*5113495bSYour Name from the Beamform Report Poll frame OR Beamform Report Poll 460*5113495bSYour Name Trigger frame 461*5113495bSYour Name 462*5113495bSYour Name Bit 0 represents segment 0 463*5113495bSYour Name Bit 1 represents segment 1 464*5113495bSYour Name Etc. 465*5113495bSYour Name 466*5113495bSYour Name 1'b1: Segment is requested 467*5113495bSYour Name 1'b0: Segment is NOT requested 468*5113495bSYour Name 469*5113495bSYour Name <legal all> 470*5113495bSYour Name */ 471*5113495bSYour Name 472*5113495bSYour Name #define RESPONSE_END_STATUS_CBF_SEGMENT_REQUEST_MASK_OFFSET 0x0000000000000000 473*5113495bSYour Name #define RESPONSE_END_STATUS_CBF_SEGMENT_REQUEST_MASK_LSB 48 474*5113495bSYour Name #define RESPONSE_END_STATUS_CBF_SEGMENT_REQUEST_MASK_MSB 55 475*5113495bSYour Name #define RESPONSE_END_STATUS_CBF_SEGMENT_REQUEST_MASK_MASK 0x00ff000000000000 476*5113495bSYour Name 477*5113495bSYour Name 478*5113495bSYour Name /* Description CBF_SEGMENT_SENT_MASK 479*5113495bSYour Name 480*5113495bSYour Name Field only valid when brp_info_valid is set. 481*5113495bSYour Name 482*5113495bSYour Name Bit 0 represents segment 0 483*5113495bSYour Name Bit 1 represents segment 1 484*5113495bSYour Name Etc. 485*5113495bSYour Name 486*5113495bSYour Name 1'b1: Segment is sent 487*5113495bSYour Name 1'b0: Segment is not sent 488*5113495bSYour Name 489*5113495bSYour Name <legal all> 490*5113495bSYour Name */ 491*5113495bSYour Name 492*5113495bSYour Name #define RESPONSE_END_STATUS_CBF_SEGMENT_SENT_MASK_OFFSET 0x0000000000000000 493*5113495bSYour Name #define RESPONSE_END_STATUS_CBF_SEGMENT_SENT_MASK_LSB 56 494*5113495bSYour Name #define RESPONSE_END_STATUS_CBF_SEGMENT_SENT_MASK_MSB 63 495*5113495bSYour Name #define RESPONSE_END_STATUS_CBF_SEGMENT_SENT_MASK_MASK 0xff00000000000000 496*5113495bSYour Name 497*5113495bSYour Name 498*5113495bSYour Name /* Description UNDERFLOW_MPDU_COUNT 499*5113495bSYour Name 500*5113495bSYour Name The MPDU count transmitted when the first underrun condition 501*5113495bSYour Name was detected 502*5113495bSYour Name <legal 0-256> 503*5113495bSYour Name */ 504*5113495bSYour Name 505*5113495bSYour Name #define RESPONSE_END_STATUS_UNDERFLOW_MPDU_COUNT_OFFSET 0x0000000000000008 506*5113495bSYour Name #define RESPONSE_END_STATUS_UNDERFLOW_MPDU_COUNT_LSB 0 507*5113495bSYour Name #define RESPONSE_END_STATUS_UNDERFLOW_MPDU_COUNT_MSB 8 508*5113495bSYour Name #define RESPONSE_END_STATUS_UNDERFLOW_MPDU_COUNT_MASK 0x00000000000001ff 509*5113495bSYour Name 510*5113495bSYour Name 511*5113495bSYour Name /* Description DATA_UNDERFLOW_WARNING 512*5113495bSYour Name 513*5113495bSYour Name Mac data underflow warning 514*5113495bSYour Name 515*5113495bSYour Name <enum 0 no_data_underrun> No data underflow 516*5113495bSYour Name <enum 1 data_underrun_between_mpdu> PCU experienced data 517*5113495bSYour Name underflow in between MPDUs 518*5113495bSYour Name <enum 2 data_underrun_within_mpdu> PCU experienced data 519*5113495bSYour Name underflow within an MPDU 520*5113495bSYour Name <legal 0-2> 521*5113495bSYour Name */ 522*5113495bSYour Name 523*5113495bSYour Name #define RESPONSE_END_STATUS_DATA_UNDERFLOW_WARNING_OFFSET 0x0000000000000008 524*5113495bSYour Name #define RESPONSE_END_STATUS_DATA_UNDERFLOW_WARNING_LSB 9 525*5113495bSYour Name #define RESPONSE_END_STATUS_DATA_UNDERFLOW_WARNING_MSB 10 526*5113495bSYour Name #define RESPONSE_END_STATUS_DATA_UNDERFLOW_WARNING_MASK 0x0000000000000600 527*5113495bSYour Name 528*5113495bSYour Name 529*5113495bSYour Name /* Description PHY_TX_GAIN_SETTING 530*5113495bSYour Name 531*5113495bSYour Name PHYTX_PKT_END info 532*5113495bSYour Name 533*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 534*5113495bSYour Name 535*5113495bSYour Name The gain setting that the PHY used for this last PPDU transmission 536*5113495bSYour Name 537*5113495bSYour Name */ 538*5113495bSYour Name 539*5113495bSYour Name #define RESPONSE_END_STATUS_PHY_TX_GAIN_SETTING_OFFSET 0x0000000000000008 540*5113495bSYour Name #define RESPONSE_END_STATUS_PHY_TX_GAIN_SETTING_LSB 11 541*5113495bSYour Name #define RESPONSE_END_STATUS_PHY_TX_GAIN_SETTING_MSB 18 542*5113495bSYour Name #define RESPONSE_END_STATUS_PHY_TX_GAIN_SETTING_MASK 0x000000000007f800 543*5113495bSYour Name 544*5113495bSYour Name 545*5113495bSYour Name /* Description TIMING_STATUS 546*5113495bSYour Name 547*5113495bSYour Name PHYTX_PKT_END info 548*5113495bSYour Name 549*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 550*5113495bSYour Name 551*5113495bSYour Name <enum 0 No_tx_timing_request> The MAC did not request for 552*5113495bSYour Name the transmission to start at a particular time 553*5113495bSYour Name <enum 1 successful_tx_timing > MAC did request for transmission 554*5113495bSYour Name to start at a particular time and PHY was able to do so. 555*5113495bSYour Name 556*5113495bSYour Name <enum 2 tx_timing_not_honoured> PHY was not able to honour 557*5113495bSYour Name the requested transmit time by the MAC. The transmission 558*5113495bSYour Name started later, and field transmit_delay indicates how much 559*5113495bSYour Name later. 560*5113495bSYour Name <legal 0-2> 561*5113495bSYour Name */ 562*5113495bSYour Name 563*5113495bSYour Name #define RESPONSE_END_STATUS_TIMING_STATUS_OFFSET 0x0000000000000008 564*5113495bSYour Name #define RESPONSE_END_STATUS_TIMING_STATUS_LSB 19 565*5113495bSYour Name #define RESPONSE_END_STATUS_TIMING_STATUS_MSB 20 566*5113495bSYour Name #define RESPONSE_END_STATUS_TIMING_STATUS_MASK 0x0000000000180000 567*5113495bSYour Name 568*5113495bSYour Name 569*5113495bSYour Name /* Description ONLY_NULL_DELIM_SENT 570*5113495bSYour Name 571*5113495bSYour Name Field only valid when "trig_response_related" is set. 572*5113495bSYour Name 573*5113495bSYour Name When set, TXPCU only sent NULL delimiters to the PHY for 574*5113495bSYour Name the entire duration of the trigger response time. 575*5113495bSYour Name 576*5113495bSYour Name Note that SCH does not evaluate this field. It is only for 577*5113495bSYour Name SW to look at. 578*5113495bSYour Name 579*5113495bSYour Name Setting this bit can only happen when a trigger is received, 580*5113495bSYour Name and either the trigger allocated an incorrectly small duration, 581*5113495bSYour Name or SW had not programmed a response scheduler command in 582*5113495bSYour Name time to respond, which may not comply with the 11ax IEEE 583*5113495bSYour Name spec. 584*5113495bSYour Name 585*5113495bSYour Name <legal all> 586*5113495bSYour Name */ 587*5113495bSYour Name 588*5113495bSYour Name #define RESPONSE_END_STATUS_ONLY_NULL_DELIM_SENT_OFFSET 0x0000000000000008 589*5113495bSYour Name #define RESPONSE_END_STATUS_ONLY_NULL_DELIM_SENT_LSB 21 590*5113495bSYour Name #define RESPONSE_END_STATUS_ONLY_NULL_DELIM_SENT_MSB 21 591*5113495bSYour Name #define RESPONSE_END_STATUS_ONLY_NULL_DELIM_SENT_MASK 0x0000000000200000 592*5113495bSYour Name 593*5113495bSYour Name 594*5113495bSYour Name /* Description BRP_INFO_VALID 595*5113495bSYour Name 596*5113495bSYour Name When set, TXPCU sent CBF segments. 597*5113495bSYour Name 598*5113495bSYour Name Fields cbf_segment_request_mask and cbf_segment_sent_mask 599*5113495bSYour Name contain valid info. 600*5113495bSYour Name 601*5113495bSYour Name <legal all> 602*5113495bSYour Name */ 603*5113495bSYour Name 604*5113495bSYour Name #define RESPONSE_END_STATUS_BRP_INFO_VALID_OFFSET 0x0000000000000008 605*5113495bSYour Name #define RESPONSE_END_STATUS_BRP_INFO_VALID_LSB 22 606*5113495bSYour Name #define RESPONSE_END_STATUS_BRP_INFO_VALID_MSB 22 607*5113495bSYour Name #define RESPONSE_END_STATUS_BRP_INFO_VALID_MASK 0x0000000000400000 608*5113495bSYour Name 609*5113495bSYour Name 610*5113495bSYour Name /* Description RESERVED_2A 611*5113495bSYour Name 612*5113495bSYour Name <legal 0> 613*5113495bSYour Name */ 614*5113495bSYour Name 615*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_2A_OFFSET 0x0000000000000008 616*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_2A_LSB 23 617*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_2A_MSB 31 618*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_2A_MASK 0x00000000ff800000 619*5113495bSYour Name 620*5113495bSYour Name 621*5113495bSYour Name /* Description MU_RESPONSE_BITMAP_31_0 622*5113495bSYour Name 623*5113495bSYour Name Bit 0 represents user 0 624*5113495bSYour Name Bit 1 represents user 1 625*5113495bSYour Name ... 626*5113495bSYour Name When set, at least 1 MPDU from this user has been properly 627*5113495bSYour Name received => FCS OK 628*5113495bSYour Name 629*5113495bSYour Name TODO: remove these 630*5113495bSYour Name Field can not be filled in with the self generated response 631*5113495bSYour Name 632*5113495bSYour Name */ 633*5113495bSYour Name 634*5113495bSYour Name #define RESPONSE_END_STATUS_MU_RESPONSE_BITMAP_31_0_OFFSET 0x0000000000000008 635*5113495bSYour Name #define RESPONSE_END_STATUS_MU_RESPONSE_BITMAP_31_0_LSB 32 636*5113495bSYour Name #define RESPONSE_END_STATUS_MU_RESPONSE_BITMAP_31_0_MSB 63 637*5113495bSYour Name #define RESPONSE_END_STATUS_MU_RESPONSE_BITMAP_31_0_MASK 0xffffffff00000000 638*5113495bSYour Name 639*5113495bSYour Name 640*5113495bSYour Name /* Description MU_RESPONSE_BITMAP_36_32 641*5113495bSYour Name 642*5113495bSYour Name Bit 0 represents user 32 643*5113495bSYour Name Bit 1 represents user 33 644*5113495bSYour Name ... 645*5113495bSYour Name When set, at least 1 MPDU from this user has been properly 646*5113495bSYour Name received => FCS OK 647*5113495bSYour Name TODO: remove these 648*5113495bSYour Name Field can not be filled in with the self generated response 649*5113495bSYour Name 650*5113495bSYour Name Note: Received_response already goes to SW, so probably 651*5113495bSYour Name no need to copy this bitmap info to TX_FES_STATUS TLV. 652*5113495bSYour Name */ 653*5113495bSYour Name 654*5113495bSYour Name #define RESPONSE_END_STATUS_MU_RESPONSE_BITMAP_36_32_OFFSET 0x0000000000000010 655*5113495bSYour Name #define RESPONSE_END_STATUS_MU_RESPONSE_BITMAP_36_32_LSB 0 656*5113495bSYour Name #define RESPONSE_END_STATUS_MU_RESPONSE_BITMAP_36_32_MSB 4 657*5113495bSYour Name #define RESPONSE_END_STATUS_MU_RESPONSE_BITMAP_36_32_MASK 0x000000000000001f 658*5113495bSYour Name 659*5113495bSYour Name 660*5113495bSYour Name /* Description RESERVED_4A 661*5113495bSYour Name 662*5113495bSYour Name <legal 0> 663*5113495bSYour Name */ 664*5113495bSYour Name 665*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_4A_OFFSET 0x0000000000000010 666*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_4A_LSB 5 667*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_4A_MSB 15 668*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_4A_MASK 0x000000000000ffe0 669*5113495bSYour Name 670*5113495bSYour Name 671*5113495bSYour Name /* Description TRANSMIT_DELAY 672*5113495bSYour Name 673*5113495bSYour Name PHYTX_PKT_END info 674*5113495bSYour Name 675*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 676*5113495bSYour Name 677*5113495bSYour Name The number of 480 MHz clock cycles that the transmission 678*5113495bSYour Name started after the actual requested transmit start time. 679*5113495bSYour Name 680*5113495bSYour Name Value saturates at 0xFFFF 681*5113495bSYour Name <legal all> 682*5113495bSYour Name */ 683*5113495bSYour Name 684*5113495bSYour Name #define RESPONSE_END_STATUS_TRANSMIT_DELAY_OFFSET 0x0000000000000010 685*5113495bSYour Name #define RESPONSE_END_STATUS_TRANSMIT_DELAY_LSB 16 686*5113495bSYour Name #define RESPONSE_END_STATUS_TRANSMIT_DELAY_MSB 31 687*5113495bSYour Name #define RESPONSE_END_STATUS_TRANSMIT_DELAY_MASK 0x00000000ffff0000 688*5113495bSYour Name 689*5113495bSYour Name 690*5113495bSYour Name /* Description START_OF_FRAME_TIMESTAMP_15_0 691*5113495bSYour Name 692*5113495bSYour Name PHYTX_PKT_END info 693*5113495bSYour Name 694*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 695*5113495bSYour Name 696*5113495bSYour Name bits 15:0 of a 64 bit time stamp 697*5113495bSYour Name Start of frame in the medium @960 MHz 698*5113495bSYour Name <legal all> 699*5113495bSYour Name */ 700*5113495bSYour Name 701*5113495bSYour Name #define RESPONSE_END_STATUS_START_OF_FRAME_TIMESTAMP_15_0_OFFSET 0x0000000000000010 702*5113495bSYour Name #define RESPONSE_END_STATUS_START_OF_FRAME_TIMESTAMP_15_0_LSB 32 703*5113495bSYour Name #define RESPONSE_END_STATUS_START_OF_FRAME_TIMESTAMP_15_0_MSB 47 704*5113495bSYour Name #define RESPONSE_END_STATUS_START_OF_FRAME_TIMESTAMP_15_0_MASK 0x0000ffff00000000 705*5113495bSYour Name 706*5113495bSYour Name 707*5113495bSYour Name /* Description START_OF_FRAME_TIMESTAMP_31_16 708*5113495bSYour Name 709*5113495bSYour Name PHYTX_PKT_END info 710*5113495bSYour Name 711*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 712*5113495bSYour Name 713*5113495bSYour Name bits 31:16 of a 64 bit time stamp 714*5113495bSYour Name Start of frame in the medium @960 MHz 715*5113495bSYour Name <legal all> 716*5113495bSYour Name */ 717*5113495bSYour Name 718*5113495bSYour Name #define RESPONSE_END_STATUS_START_OF_FRAME_TIMESTAMP_31_16_OFFSET 0x0000000000000010 719*5113495bSYour Name #define RESPONSE_END_STATUS_START_OF_FRAME_TIMESTAMP_31_16_LSB 48 720*5113495bSYour Name #define RESPONSE_END_STATUS_START_OF_FRAME_TIMESTAMP_31_16_MSB 63 721*5113495bSYour Name #define RESPONSE_END_STATUS_START_OF_FRAME_TIMESTAMP_31_16_MASK 0xffff000000000000 722*5113495bSYour Name 723*5113495bSYour Name 724*5113495bSYour Name /* Description END_OF_FRAME_TIMESTAMP_15_0 725*5113495bSYour Name 726*5113495bSYour Name PHYTX_PKT_END info 727*5113495bSYour Name 728*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 729*5113495bSYour Name 730*5113495bSYour Name bits 15:0 of a 64 bit time stamp 731*5113495bSYour Name End of frame in the medium @960 MHz 732*5113495bSYour Name <legal all> 733*5113495bSYour Name */ 734*5113495bSYour Name 735*5113495bSYour Name #define RESPONSE_END_STATUS_END_OF_FRAME_TIMESTAMP_15_0_OFFSET 0x0000000000000018 736*5113495bSYour Name #define RESPONSE_END_STATUS_END_OF_FRAME_TIMESTAMP_15_0_LSB 0 737*5113495bSYour Name #define RESPONSE_END_STATUS_END_OF_FRAME_TIMESTAMP_15_0_MSB 15 738*5113495bSYour Name #define RESPONSE_END_STATUS_END_OF_FRAME_TIMESTAMP_15_0_MASK 0x000000000000ffff 739*5113495bSYour Name 740*5113495bSYour Name 741*5113495bSYour Name /* Description END_OF_FRAME_TIMESTAMP_31_16 742*5113495bSYour Name 743*5113495bSYour Name PHYTX_PKT_END info 744*5113495bSYour Name 745*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 746*5113495bSYour Name 747*5113495bSYour Name bits 31:16 of a 64 bit time stamp 748*5113495bSYour Name End of frame in the medium @960 MHz 749*5113495bSYour Name <legal all> 750*5113495bSYour Name */ 751*5113495bSYour Name 752*5113495bSYour Name #define RESPONSE_END_STATUS_END_OF_FRAME_TIMESTAMP_31_16_OFFSET 0x0000000000000018 753*5113495bSYour Name #define RESPONSE_END_STATUS_END_OF_FRAME_TIMESTAMP_31_16_LSB 16 754*5113495bSYour Name #define RESPONSE_END_STATUS_END_OF_FRAME_TIMESTAMP_31_16_MSB 31 755*5113495bSYour Name #define RESPONSE_END_STATUS_END_OF_FRAME_TIMESTAMP_31_16_MASK 0x00000000ffff0000 756*5113495bSYour Name 757*5113495bSYour Name 758*5113495bSYour Name /* Description TX_GROUP_DELAY 759*5113495bSYour Name 760*5113495bSYour Name PHYTX_PKT_END info 761*5113495bSYour Name 762*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 763*5113495bSYour Name 764*5113495bSYour Name Group delay on TxTD+PHYRF path for this PPDU (packet BW 765*5113495bSYour Name dependent), useful for RTT 766*5113495bSYour Name 767*5113495bSYour Name Unit is 960MHz cycles. 768*5113495bSYour Name <legal all> 769*5113495bSYour Name */ 770*5113495bSYour Name 771*5113495bSYour Name #define RESPONSE_END_STATUS_TX_GROUP_DELAY_OFFSET 0x0000000000000018 772*5113495bSYour Name #define RESPONSE_END_STATUS_TX_GROUP_DELAY_LSB 32 773*5113495bSYour Name #define RESPONSE_END_STATUS_TX_GROUP_DELAY_MSB 43 774*5113495bSYour Name #define RESPONSE_END_STATUS_TX_GROUP_DELAY_MASK 0x00000fff00000000 775*5113495bSYour Name 776*5113495bSYour Name 777*5113495bSYour Name /* Description RESERVED_7A 778*5113495bSYour Name 779*5113495bSYour Name <legal 0> 780*5113495bSYour Name */ 781*5113495bSYour Name 782*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_7A_OFFSET 0x0000000000000018 783*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_7A_LSB 44 784*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_7A_MSB 47 785*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_7A_MASK 0x0000f00000000000 786*5113495bSYour Name 787*5113495bSYour Name 788*5113495bSYour Name /* Description TPC_DBG_INFO_CMN_15_0 789*5113495bSYour Name 790*5113495bSYour Name PHYTX_PKT_END info 791*5113495bSYour Name 792*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 793*5113495bSYour Name 794*5113495bSYour Name Some TPC debug info that PHY can pass back to MAC FW 795*5113495bSYour Name <legal all> 796*5113495bSYour Name */ 797*5113495bSYour Name 798*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CMN_15_0_OFFSET 0x0000000000000018 799*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CMN_15_0_LSB 48 800*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CMN_15_0_MSB 63 801*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CMN_15_0_MASK 0xffff000000000000 802*5113495bSYour Name 803*5113495bSYour Name 804*5113495bSYour Name /* Description TPC_DBG_INFO_31_16 805*5113495bSYour Name 806*5113495bSYour Name PHYTX_PKT_END info 807*5113495bSYour Name 808*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 809*5113495bSYour Name 810*5113495bSYour Name Some TPC debug info that PHY can pass back to MAC FW 811*5113495bSYour Name <legal all> 812*5113495bSYour Name */ 813*5113495bSYour Name 814*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_31_16_OFFSET 0x0000000000000020 815*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_31_16_LSB 0 816*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_31_16_MSB 15 817*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_31_16_MASK 0x000000000000ffff 818*5113495bSYour Name 819*5113495bSYour Name 820*5113495bSYour Name /* Description TPC_DBG_INFO_47_32 821*5113495bSYour Name 822*5113495bSYour Name PHYTX_PKT_END info 823*5113495bSYour Name 824*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 825*5113495bSYour Name 826*5113495bSYour Name Some TPC debug infothat PHY can pass back to MAC FW 827*5113495bSYour Name <legal all> 828*5113495bSYour Name */ 829*5113495bSYour Name 830*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_47_32_OFFSET 0x0000000000000020 831*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_47_32_LSB 16 832*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_47_32_MSB 31 833*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_47_32_MASK 0x00000000ffff0000 834*5113495bSYour Name 835*5113495bSYour Name 836*5113495bSYour Name /* Description TPC_DBG_INFO_CHN1_15_0 837*5113495bSYour Name 838*5113495bSYour Name PHYTX_PKT_END info 839*5113495bSYour Name 840*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 841*5113495bSYour Name 842*5113495bSYour Name Some per-chain TPC debug info for the first selected chain 843*5113495bSYour Name that PHY can pass back to MAC FW 844*5113495bSYour Name <legal all> 845*5113495bSYour Name */ 846*5113495bSYour Name 847*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_15_0_OFFSET 0x0000000000000020 848*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_15_0_LSB 32 849*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_15_0_MSB 47 850*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_15_0_MASK 0x0000ffff00000000 851*5113495bSYour Name 852*5113495bSYour Name 853*5113495bSYour Name /* Description TPC_DBG_INFO_CHN1_31_16 854*5113495bSYour Name 855*5113495bSYour Name PHYTX_PKT_END info 856*5113495bSYour Name 857*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 858*5113495bSYour Name 859*5113495bSYour Name Some per-chain TPC debug info for the first selected chain 860*5113495bSYour Name that PHY can pass back to MAC FW 861*5113495bSYour Name <legal all> 862*5113495bSYour Name */ 863*5113495bSYour Name 864*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_31_16_OFFSET 0x0000000000000020 865*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_31_16_LSB 48 866*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_31_16_MSB 63 867*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_31_16_MASK 0xffff000000000000 868*5113495bSYour Name 869*5113495bSYour Name 870*5113495bSYour Name /* Description TPC_DBG_INFO_CHN1_47_32 871*5113495bSYour Name 872*5113495bSYour Name PHYTX_PKT_END info 873*5113495bSYour Name 874*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 875*5113495bSYour Name 876*5113495bSYour Name Some per-chain TPC debug info for the first selected chain 877*5113495bSYour Name that PHY can pass back to MAC FW 878*5113495bSYour Name <legal all> 879*5113495bSYour Name */ 880*5113495bSYour Name 881*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_47_32_OFFSET 0x0000000000000028 882*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_47_32_LSB 0 883*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_47_32_MSB 15 884*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_47_32_MASK 0x000000000000ffff 885*5113495bSYour Name 886*5113495bSYour Name 887*5113495bSYour Name /* Description TPC_DBG_INFO_CHN1_63_48 888*5113495bSYour Name 889*5113495bSYour Name PHYTX_PKT_END info 890*5113495bSYour Name 891*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 892*5113495bSYour Name 893*5113495bSYour Name Some per-chain TPC debug info for the first selected chain 894*5113495bSYour Name that PHY can pass back to MAC FW 895*5113495bSYour Name <legal all> 896*5113495bSYour Name */ 897*5113495bSYour Name 898*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_63_48_OFFSET 0x0000000000000028 899*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_63_48_LSB 16 900*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_63_48_MSB 31 901*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_63_48_MASK 0x00000000ffff0000 902*5113495bSYour Name 903*5113495bSYour Name 904*5113495bSYour Name /* Description TPC_DBG_INFO_CHN1_79_64 905*5113495bSYour Name 906*5113495bSYour Name PHYTX_PKT_END info 907*5113495bSYour Name 908*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 909*5113495bSYour Name 910*5113495bSYour Name Some per-chain TPC debug info for the first selected chain 911*5113495bSYour Name that PHY can pass back to MAC FW 912*5113495bSYour Name <legal all> 913*5113495bSYour Name */ 914*5113495bSYour Name 915*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_79_64_OFFSET 0x0000000000000028 916*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_79_64_LSB 32 917*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_79_64_MSB 47 918*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN1_79_64_MASK 0x0000ffff00000000 919*5113495bSYour Name 920*5113495bSYour Name 921*5113495bSYour Name /* Description TPC_DBG_INFO_CHN2_15_0 922*5113495bSYour Name 923*5113495bSYour Name PHYTX_PKT_END info 924*5113495bSYour Name 925*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 926*5113495bSYour Name 927*5113495bSYour Name Some per-chain TPC debug info for the second selected chain 928*5113495bSYour Name that PHY can pass back to MAC FW 929*5113495bSYour Name <legal all> 930*5113495bSYour Name */ 931*5113495bSYour Name 932*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_15_0_OFFSET 0x0000000000000028 933*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_15_0_LSB 48 934*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_15_0_MSB 63 935*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_15_0_MASK 0xffff000000000000 936*5113495bSYour Name 937*5113495bSYour Name 938*5113495bSYour Name /* Description TPC_DBG_INFO_CHN2_31_16 939*5113495bSYour Name 940*5113495bSYour Name PHYTX_PKT_END info 941*5113495bSYour Name 942*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 943*5113495bSYour Name 944*5113495bSYour Name Some per-chain TPC debug info for the second selected chain 945*5113495bSYour Name that PHY can pass back to MAC FW 946*5113495bSYour Name <legal all> 947*5113495bSYour Name */ 948*5113495bSYour Name 949*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_31_16_OFFSET 0x0000000000000030 950*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_31_16_LSB 0 951*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_31_16_MSB 15 952*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_31_16_MASK 0x000000000000ffff 953*5113495bSYour Name 954*5113495bSYour Name 955*5113495bSYour Name /* Description TPC_DBG_INFO_CHN2_47_32 956*5113495bSYour Name 957*5113495bSYour Name PHYTX_PKT_END info 958*5113495bSYour Name 959*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 960*5113495bSYour Name 961*5113495bSYour Name Some per-chain TPC debug info for the second selected chain 962*5113495bSYour Name that PHY can pass back to MAC FW 963*5113495bSYour Name <legal all> 964*5113495bSYour Name */ 965*5113495bSYour Name 966*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_47_32_OFFSET 0x0000000000000030 967*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_47_32_LSB 16 968*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_47_32_MSB 31 969*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_47_32_MASK 0x00000000ffff0000 970*5113495bSYour Name 971*5113495bSYour Name 972*5113495bSYour Name /* Description TPC_DBG_INFO_CHN2_63_48 973*5113495bSYour Name 974*5113495bSYour Name PHYTX_PKT_END info 975*5113495bSYour Name 976*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 977*5113495bSYour Name 978*5113495bSYour Name Some per-chain TPC debug info for the second selected chain 979*5113495bSYour Name that PHY can pass back to MAC FW 980*5113495bSYour Name <legal all> 981*5113495bSYour Name */ 982*5113495bSYour Name 983*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_63_48_OFFSET 0x0000000000000030 984*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_63_48_LSB 32 985*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_63_48_MSB 47 986*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_63_48_MASK 0x0000ffff00000000 987*5113495bSYour Name 988*5113495bSYour Name 989*5113495bSYour Name /* Description TPC_DBG_INFO_CHN2_79_64 990*5113495bSYour Name 991*5113495bSYour Name PHYTX_PKT_END info 992*5113495bSYour Name 993*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 994*5113495bSYour Name 995*5113495bSYour Name Some per-chain TPC debug info for the second selected chain 996*5113495bSYour Name that PHY can pass back to MAC FW 997*5113495bSYour Name <legal all> 998*5113495bSYour Name */ 999*5113495bSYour Name 1000*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_79_64_OFFSET 0x0000000000000030 1001*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_79_64_LSB 48 1002*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_79_64_MSB 63 1003*5113495bSYour Name #define RESPONSE_END_STATUS_TPC_DBG_INFO_CHN2_79_64_MASK 0xffff000000000000 1004*5113495bSYour Name 1005*5113495bSYour Name 1006*5113495bSYour Name /* Description PHYTX_TX_END_SW_INFO_15_0 1007*5113495bSYour Name 1008*5113495bSYour Name PHYTX_PKT_END info 1009*5113495bSYour Name 1010*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 1011*5113495bSYour Name 1012*5113495bSYour Name Some PHY status data that PHY microcode can pass back to 1013*5113495bSYour Name MAC FW, for any future requests, e.g. any DMA download 1014*5113495bSYour Name time 1015*5113495bSYour Name <legal all> 1016*5113495bSYour Name */ 1017*5113495bSYour Name 1018*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_15_0_OFFSET 0x0000000000000038 1019*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_15_0_LSB 0 1020*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_15_0_MSB 15 1021*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_15_0_MASK 0x000000000000ffff 1022*5113495bSYour Name 1023*5113495bSYour Name 1024*5113495bSYour Name /* Description PHYTX_TX_END_SW_INFO_31_16 1025*5113495bSYour Name 1026*5113495bSYour Name PHYTX_PKT_END info 1027*5113495bSYour Name 1028*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 1029*5113495bSYour Name 1030*5113495bSYour Name Some PHY status data that PHY microcode can pass back to 1031*5113495bSYour Name MAC FW, for any future requests, e.g. any DMA download 1032*5113495bSYour Name time 1033*5113495bSYour Name <legal all> 1034*5113495bSYour Name */ 1035*5113495bSYour Name 1036*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_31_16_OFFSET 0x0000000000000038 1037*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_31_16_LSB 16 1038*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_31_16_MSB 31 1039*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_31_16_MASK 0x00000000ffff0000 1040*5113495bSYour Name 1041*5113495bSYour Name 1042*5113495bSYour Name /* Description PHYTX_TX_END_SW_INFO_47_32 1043*5113495bSYour Name 1044*5113495bSYour Name PHYTX_PKT_END info 1045*5113495bSYour Name 1046*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 1047*5113495bSYour Name 1048*5113495bSYour Name Some PHY status data that PHY microcode can pass back to 1049*5113495bSYour Name MAC FW, for any future requests, e.g. any DMA download 1050*5113495bSYour Name time 1051*5113495bSYour Name <legal all> 1052*5113495bSYour Name */ 1053*5113495bSYour Name 1054*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_47_32_OFFSET 0x0000000000000038 1055*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_47_32_LSB 32 1056*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_47_32_MSB 47 1057*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_47_32_MASK 0x0000ffff00000000 1058*5113495bSYour Name 1059*5113495bSYour Name 1060*5113495bSYour Name /* Description PHYTX_TX_END_SW_INFO_63_48 1061*5113495bSYour Name 1062*5113495bSYour Name PHYTX_PKT_END info 1063*5113495bSYour Name 1064*5113495bSYour Name Field only valid when PHYTX_PKT_END_info_valid is set 1065*5113495bSYour Name 1066*5113495bSYour Name Some PHY status data that PHY microcode can pass back to 1067*5113495bSYour Name MAC FW, for any future requests, e.g. any DMA download 1068*5113495bSYour Name time 1069*5113495bSYour Name <legal all> 1070*5113495bSYour Name */ 1071*5113495bSYour Name 1072*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_63_48_OFFSET 0x0000000000000038 1073*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_63_48_LSB 48 1074*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_63_48_MSB 63 1075*5113495bSYour Name #define RESPONSE_END_STATUS_PHYTX_TX_END_SW_INFO_63_48_MASK 0xffff000000000000 1076*5113495bSYour Name 1077*5113495bSYour Name 1078*5113495bSYour Name /* Description ADDR1_31_0 1079*5113495bSYour Name 1080*5113495bSYour Name To be copied over from RESPONSE_REQUIRED_INFO or TX_CBF_INFO 1081*5113495bSYour Name 1082*5113495bSYour Name */ 1083*5113495bSYour Name 1084*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR1_31_0_OFFSET 0x0000000000000040 1085*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR1_31_0_LSB 0 1086*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR1_31_0_MSB 31 1087*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR1_31_0_MASK 0x00000000ffffffff 1088*5113495bSYour Name 1089*5113495bSYour Name 1090*5113495bSYour Name /* Description ADDR1_47_32 1091*5113495bSYour Name 1092*5113495bSYour Name To be copied over from RESPONSE_REQUIRED_INFO or TX_CBF_INFO 1093*5113495bSYour Name 1094*5113495bSYour Name */ 1095*5113495bSYour Name 1096*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR1_47_32_OFFSET 0x0000000000000040 1097*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR1_47_32_LSB 32 1098*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR1_47_32_MSB 47 1099*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR1_47_32_MASK 0x0000ffff00000000 1100*5113495bSYour Name 1101*5113495bSYour Name 1102*5113495bSYour Name /* Description ADDR2_15_0 1103*5113495bSYour Name 1104*5113495bSYour Name To be copied over from RESPONSE_REQUIRED_INFO or TX_CBF_INFO 1105*5113495bSYour Name 1106*5113495bSYour Name */ 1107*5113495bSYour Name 1108*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR2_15_0_OFFSET 0x0000000000000040 1109*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR2_15_0_LSB 48 1110*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR2_15_0_MSB 63 1111*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR2_15_0_MASK 0xffff000000000000 1112*5113495bSYour Name 1113*5113495bSYour Name 1114*5113495bSYour Name /* Description ADDR2_47_16 1115*5113495bSYour Name 1116*5113495bSYour Name To be copied over from RESPONSE_REQUIRED_INFO or TX_CBF_INFO 1117*5113495bSYour Name 1118*5113495bSYour Name */ 1119*5113495bSYour Name 1120*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR2_47_16_OFFSET 0x0000000000000048 1121*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR2_47_16_LSB 0 1122*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR2_47_16_MSB 31 1123*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR2_47_16_MASK 0x00000000ffffffff 1124*5113495bSYour Name 1125*5113495bSYour Name 1126*5113495bSYour Name /* Description ADDR3_31_0 1127*5113495bSYour Name 1128*5113495bSYour Name To be copied over from TX_CBF_INFO 1129*5113495bSYour Name */ 1130*5113495bSYour Name 1131*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR3_31_0_OFFSET 0x0000000000000048 1132*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR3_31_0_LSB 32 1133*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR3_31_0_MSB 63 1134*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR3_31_0_MASK 0xffffffff00000000 1135*5113495bSYour Name 1136*5113495bSYour Name 1137*5113495bSYour Name /* Description ADDR3_47_32 1138*5113495bSYour Name 1139*5113495bSYour Name To be copied over from TX_CBF_INFO 1140*5113495bSYour Name */ 1141*5113495bSYour Name 1142*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR3_47_32_OFFSET 0x0000000000000050 1143*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR3_47_32_LSB 0 1144*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR3_47_32_MSB 15 1145*5113495bSYour Name #define RESPONSE_END_STATUS_ADDR3_47_32_MASK 0x000000000000ffff 1146*5113495bSYour Name 1147*5113495bSYour Name 1148*5113495bSYour Name /* Description RANGING 1149*5113495bSYour Name 1150*5113495bSYour Name To be copied over from TX_CBF_INFO: Set to 1 if the status 1151*5113495bSYour Name is generated due to an active ranging session (.11az) 1152*5113495bSYour Name */ 1153*5113495bSYour Name 1154*5113495bSYour Name #define RESPONSE_END_STATUS_RANGING_OFFSET 0x0000000000000050 1155*5113495bSYour Name #define RESPONSE_END_STATUS_RANGING_LSB 16 1156*5113495bSYour Name #define RESPONSE_END_STATUS_RANGING_MSB 16 1157*5113495bSYour Name #define RESPONSE_END_STATUS_RANGING_MASK 0x0000000000010000 1158*5113495bSYour Name 1159*5113495bSYour Name 1160*5113495bSYour Name /* Description SECURE 1161*5113495bSYour Name 1162*5113495bSYour Name To be copied over from TX_CBF_INFO: Only valid if Ranging 1163*5113495bSYour Name is set to 1, this indicates if the current ranging session 1164*5113495bSYour Name is secure. 1165*5113495bSYour Name */ 1166*5113495bSYour Name 1167*5113495bSYour Name #define RESPONSE_END_STATUS_SECURE_OFFSET 0x0000000000000050 1168*5113495bSYour Name #define RESPONSE_END_STATUS_SECURE_LSB 17 1169*5113495bSYour Name #define RESPONSE_END_STATUS_SECURE_MSB 17 1170*5113495bSYour Name #define RESPONSE_END_STATUS_SECURE_MASK 0x0000000000020000 1171*5113495bSYour Name 1172*5113495bSYour Name 1173*5113495bSYour Name /* Description RANGING_FTM_FRAME_SENT 1174*5113495bSYour Name 1175*5113495bSYour Name Only valid if Ranging is set to 1 1176*5113495bSYour Name 1177*5113495bSYour Name TXPCU sets this bit if an FTM frame aggregated with an LMR 1178*5113495bSYour Name was sent. 1179*5113495bSYour Name */ 1180*5113495bSYour Name 1181*5113495bSYour Name #define RESPONSE_END_STATUS_RANGING_FTM_FRAME_SENT_OFFSET 0x0000000000000050 1182*5113495bSYour Name #define RESPONSE_END_STATUS_RANGING_FTM_FRAME_SENT_LSB 18 1183*5113495bSYour Name #define RESPONSE_END_STATUS_RANGING_FTM_FRAME_SENT_MSB 18 1184*5113495bSYour Name #define RESPONSE_END_STATUS_RANGING_FTM_FRAME_SENT_MASK 0x0000000000040000 1185*5113495bSYour Name 1186*5113495bSYour Name 1187*5113495bSYour Name /* Description RESERVED_20A 1188*5113495bSYour Name 1189*5113495bSYour Name <legal 0> 1190*5113495bSYour Name */ 1191*5113495bSYour Name 1192*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_20A_OFFSET 0x0000000000000050 1193*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_20A_LSB 19 1194*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_20A_MSB 31 1195*5113495bSYour Name #define RESPONSE_END_STATUS_RESERVED_20A_MASK 0x00000000fff80000 1196*5113495bSYour Name 1197*5113495bSYour Name 1198*5113495bSYour Name /* Description TLV64_PADDING 1199*5113495bSYour Name 1200*5113495bSYour Name Automatic DWORD padding inserted while converting TLV32 1201*5113495bSYour Name to TLV64 for 64 bit ARCH 1202*5113495bSYour Name <legal 0> 1203*5113495bSYour Name */ 1204*5113495bSYour Name 1205*5113495bSYour Name #define RESPONSE_END_STATUS_TLV64_PADDING_OFFSET 0x0000000000000050 1206*5113495bSYour Name #define RESPONSE_END_STATUS_TLV64_PADDING_LSB 32 1207*5113495bSYour Name #define RESPONSE_END_STATUS_TLV64_PADDING_MSB 63 1208*5113495bSYour Name #define RESPONSE_END_STATUS_TLV64_PADDING_MASK 0xffffffff00000000 1209*5113495bSYour Name 1210*5113495bSYour Name 1211*5113495bSYour Name 1212*5113495bSYour Name #endif // RESPONSE_END_STATUS 1213