1*5113495bSYour Name 2*5113495bSYour Name /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name 18*5113495bSYour Name 19*5113495bSYour Name 20*5113495bSYour Name 21*5113495bSYour Name 22*5113495bSYour Name 23*5113495bSYour Name 24*5113495bSYour Name 25*5113495bSYour Name 26*5113495bSYour Name #ifndef _RX_MPDU_INFO_H_ 27*5113495bSYour Name #define _RX_MPDU_INFO_H_ 28*5113495bSYour Name #if !defined(__ASSEMBLER__) 29*5113495bSYour Name #endif 30*5113495bSYour Name 31*5113495bSYour Name #include "rxpt_classify_info.h" 32*5113495bSYour Name #define NUM_OF_DWORDS_RX_MPDU_INFO 30 33*5113495bSYour Name 34*5113495bSYour Name 35*5113495bSYour Name struct rx_mpdu_info { 36*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 37*5113495bSYour Name struct rxpt_classify_info rxpt_classify_info_details; 38*5113495bSYour Name uint32_t rx_reo_queue_desc_addr_31_0 : 32; // [31:0] 39*5113495bSYour Name uint32_t rx_reo_queue_desc_addr_39_32 : 8, // [7:0] 40*5113495bSYour Name receive_queue_number : 16, // [23:8] 41*5113495bSYour Name pre_delim_err_warning : 1, // [24:24] 42*5113495bSYour Name first_delim_err : 1, // [25:25] 43*5113495bSYour Name reserved_2a : 6; // [31:26] 44*5113495bSYour Name uint32_t pn_31_0 : 32; // [31:0] 45*5113495bSYour Name uint32_t pn_63_32 : 32; // [31:0] 46*5113495bSYour Name uint32_t pn_95_64 : 32; // [31:0] 47*5113495bSYour Name uint32_t pn_127_96 : 32; // [31:0] 48*5113495bSYour Name uint32_t epd_en : 1, // [0:0] 49*5113495bSYour Name all_frames_shall_be_encrypted : 1, // [1:1] 50*5113495bSYour Name encrypt_type : 4, // [5:2] 51*5113495bSYour Name wep_key_width_for_variable_key : 2, // [7:6] 52*5113495bSYour Name mesh_sta : 2, // [9:8] 53*5113495bSYour Name bssid_hit : 1, // [10:10] 54*5113495bSYour Name bssid_number : 4, // [14:11] 55*5113495bSYour Name tid : 4, // [18:15] 56*5113495bSYour Name reserved_7a : 13; // [31:19] 57*5113495bSYour Name uint32_t peer_meta_data : 32; // [31:0] 58*5113495bSYour Name uint32_t rxpcu_mpdu_filter_in_category : 2, // [1:0] 59*5113495bSYour Name sw_frame_group_id : 7, // [8:2] 60*5113495bSYour Name ndp_frame : 1, // [9:9] 61*5113495bSYour Name phy_err : 1, // [10:10] 62*5113495bSYour Name phy_err_during_mpdu_header : 1, // [11:11] 63*5113495bSYour Name protocol_version_err : 1, // [12:12] 64*5113495bSYour Name ast_based_lookup_valid : 1, // [13:13] 65*5113495bSYour Name ranging : 1, // [14:14] 66*5113495bSYour Name reserved_9a : 1, // [15:15] 67*5113495bSYour Name phy_ppdu_id : 16; // [31:16] 68*5113495bSYour Name uint32_t ast_index : 16, // [15:0] 69*5113495bSYour Name sw_peer_id : 16; // [31:16] 70*5113495bSYour Name uint32_t mpdu_frame_control_valid : 1, // [0:0] 71*5113495bSYour Name mpdu_duration_valid : 1, // [1:1] 72*5113495bSYour Name mac_addr_ad1_valid : 1, // [2:2] 73*5113495bSYour Name mac_addr_ad2_valid : 1, // [3:3] 74*5113495bSYour Name mac_addr_ad3_valid : 1, // [4:4] 75*5113495bSYour Name mac_addr_ad4_valid : 1, // [5:5] 76*5113495bSYour Name mpdu_sequence_control_valid : 1, // [6:6] 77*5113495bSYour Name mpdu_qos_control_valid : 1, // [7:7] 78*5113495bSYour Name mpdu_ht_control_valid : 1, // [8:8] 79*5113495bSYour Name frame_encryption_info_valid : 1, // [9:9] 80*5113495bSYour Name mpdu_fragment_number : 4, // [13:10] 81*5113495bSYour Name more_fragment_flag : 1, // [14:14] 82*5113495bSYour Name reserved_11a : 1, // [15:15] 83*5113495bSYour Name fr_ds : 1, // [16:16] 84*5113495bSYour Name to_ds : 1, // [17:17] 85*5113495bSYour Name encrypted : 1, // [18:18] 86*5113495bSYour Name mpdu_retry : 1, // [19:19] 87*5113495bSYour Name mpdu_sequence_number : 12; // [31:20] 88*5113495bSYour Name uint32_t key_id_octet : 8, // [7:0] 89*5113495bSYour Name new_peer_entry : 1, // [8:8] 90*5113495bSYour Name decrypt_needed : 1, // [9:9] 91*5113495bSYour Name decap_type : 2, // [11:10] 92*5113495bSYour Name rx_insert_vlan_c_tag_padding : 1, // [12:12] 93*5113495bSYour Name rx_insert_vlan_s_tag_padding : 1, // [13:13] 94*5113495bSYour Name strip_vlan_c_tag_decap : 1, // [14:14] 95*5113495bSYour Name strip_vlan_s_tag_decap : 1, // [15:15] 96*5113495bSYour Name pre_delim_count : 12, // [27:16] 97*5113495bSYour Name ampdu_flag : 1, // [28:28] 98*5113495bSYour Name bar_frame : 1, // [29:29] 99*5113495bSYour Name raw_mpdu : 1, // [30:30] 100*5113495bSYour Name reserved_12 : 1; // [31:31] 101*5113495bSYour Name uint32_t mpdu_length : 14, // [13:0] 102*5113495bSYour Name first_mpdu : 1, // [14:14] 103*5113495bSYour Name mcast_bcast : 1, // [15:15] 104*5113495bSYour Name ast_index_not_found : 1, // [16:16] 105*5113495bSYour Name ast_index_timeout : 1, // [17:17] 106*5113495bSYour Name power_mgmt : 1, // [18:18] 107*5113495bSYour Name non_qos : 1, // [19:19] 108*5113495bSYour Name null_data : 1, // [20:20] 109*5113495bSYour Name mgmt_type : 1, // [21:21] 110*5113495bSYour Name ctrl_type : 1, // [22:22] 111*5113495bSYour Name more_data : 1, // [23:23] 112*5113495bSYour Name eosp : 1, // [24:24] 113*5113495bSYour Name fragment_flag : 1, // [25:25] 114*5113495bSYour Name order : 1, // [26:26] 115*5113495bSYour Name u_apsd_trigger : 1, // [27:27] 116*5113495bSYour Name encrypt_required : 1, // [28:28] 117*5113495bSYour Name directed : 1, // [29:29] 118*5113495bSYour Name amsdu_present : 1, // [30:30] 119*5113495bSYour Name reserved_13 : 1; // [31:31] 120*5113495bSYour Name uint32_t mpdu_frame_control_field : 16, // [15:0] 121*5113495bSYour Name mpdu_duration_field : 16; // [31:16] 122*5113495bSYour Name uint32_t mac_addr_ad1_31_0 : 32; // [31:0] 123*5113495bSYour Name uint32_t mac_addr_ad1_47_32 : 16, // [15:0] 124*5113495bSYour Name mac_addr_ad2_15_0 : 16; // [31:16] 125*5113495bSYour Name uint32_t mac_addr_ad2_47_16 : 32; // [31:0] 126*5113495bSYour Name uint32_t mac_addr_ad3_31_0 : 32; // [31:0] 127*5113495bSYour Name uint32_t mac_addr_ad3_47_32 : 16, // [15:0] 128*5113495bSYour Name mpdu_sequence_control_field : 16; // [31:16] 129*5113495bSYour Name uint32_t mac_addr_ad4_31_0 : 32; // [31:0] 130*5113495bSYour Name uint32_t mac_addr_ad4_47_32 : 16, // [15:0] 131*5113495bSYour Name mpdu_qos_control_field : 16; // [31:16] 132*5113495bSYour Name uint32_t mpdu_ht_control_field : 32; // [31:0] 133*5113495bSYour Name uint32_t vdev_id : 8, // [7:0] 134*5113495bSYour Name service_code : 9, // [16:8] 135*5113495bSYour Name priority_valid : 1, // [17:17] 136*5113495bSYour Name src_info : 12, // [29:18] 137*5113495bSYour Name reserved_23a : 1, // [30:30] 138*5113495bSYour Name multi_link_addr_ad1_ad2_valid : 1; // [31:31] 139*5113495bSYour Name uint32_t multi_link_addr_ad1_31_0 : 32; // [31:0] 140*5113495bSYour Name uint32_t multi_link_addr_ad1_47_32 : 16, // [15:0] 141*5113495bSYour Name multi_link_addr_ad2_15_0 : 16; // [31:16] 142*5113495bSYour Name uint32_t multi_link_addr_ad2_47_16 : 32; // [31:0] 143*5113495bSYour Name uint32_t authorized_to_send_wds : 1, // [0:0] 144*5113495bSYour Name reserved_27a : 31; // [31:1] 145*5113495bSYour Name uint32_t reserved_28a : 32; // [31:0] 146*5113495bSYour Name uint32_t reserved_29a : 32; // [31:0] 147*5113495bSYour Name #else 148*5113495bSYour Name struct rxpt_classify_info rxpt_classify_info_details; 149*5113495bSYour Name uint32_t rx_reo_queue_desc_addr_31_0 : 32; // [31:0] 150*5113495bSYour Name uint32_t reserved_2a : 6, // [31:26] 151*5113495bSYour Name first_delim_err : 1, // [25:25] 152*5113495bSYour Name pre_delim_err_warning : 1, // [24:24] 153*5113495bSYour Name receive_queue_number : 16, // [23:8] 154*5113495bSYour Name rx_reo_queue_desc_addr_39_32 : 8; // [7:0] 155*5113495bSYour Name uint32_t pn_31_0 : 32; // [31:0] 156*5113495bSYour Name uint32_t pn_63_32 : 32; // [31:0] 157*5113495bSYour Name uint32_t pn_95_64 : 32; // [31:0] 158*5113495bSYour Name uint32_t pn_127_96 : 32; // [31:0] 159*5113495bSYour Name uint32_t reserved_7a : 13, // [31:19] 160*5113495bSYour Name tid : 4, // [18:15] 161*5113495bSYour Name bssid_number : 4, // [14:11] 162*5113495bSYour Name bssid_hit : 1, // [10:10] 163*5113495bSYour Name mesh_sta : 2, // [9:8] 164*5113495bSYour Name wep_key_width_for_variable_key : 2, // [7:6] 165*5113495bSYour Name encrypt_type : 4, // [5:2] 166*5113495bSYour Name all_frames_shall_be_encrypted : 1, // [1:1] 167*5113495bSYour Name epd_en : 1; // [0:0] 168*5113495bSYour Name uint32_t peer_meta_data : 32; // [31:0] 169*5113495bSYour Name uint32_t phy_ppdu_id : 16, // [31:16] 170*5113495bSYour Name reserved_9a : 1, // [15:15] 171*5113495bSYour Name ranging : 1, // [14:14] 172*5113495bSYour Name ast_based_lookup_valid : 1, // [13:13] 173*5113495bSYour Name protocol_version_err : 1, // [12:12] 174*5113495bSYour Name phy_err_during_mpdu_header : 1, // [11:11] 175*5113495bSYour Name phy_err : 1, // [10:10] 176*5113495bSYour Name ndp_frame : 1, // [9:9] 177*5113495bSYour Name sw_frame_group_id : 7, // [8:2] 178*5113495bSYour Name rxpcu_mpdu_filter_in_category : 2; // [1:0] 179*5113495bSYour Name uint32_t sw_peer_id : 16, // [31:16] 180*5113495bSYour Name ast_index : 16; // [15:0] 181*5113495bSYour Name uint32_t mpdu_sequence_number : 12, // [31:20] 182*5113495bSYour Name mpdu_retry : 1, // [19:19] 183*5113495bSYour Name encrypted : 1, // [18:18] 184*5113495bSYour Name to_ds : 1, // [17:17] 185*5113495bSYour Name fr_ds : 1, // [16:16] 186*5113495bSYour Name reserved_11a : 1, // [15:15] 187*5113495bSYour Name more_fragment_flag : 1, // [14:14] 188*5113495bSYour Name mpdu_fragment_number : 4, // [13:10] 189*5113495bSYour Name frame_encryption_info_valid : 1, // [9:9] 190*5113495bSYour Name mpdu_ht_control_valid : 1, // [8:8] 191*5113495bSYour Name mpdu_qos_control_valid : 1, // [7:7] 192*5113495bSYour Name mpdu_sequence_control_valid : 1, // [6:6] 193*5113495bSYour Name mac_addr_ad4_valid : 1, // [5:5] 194*5113495bSYour Name mac_addr_ad3_valid : 1, // [4:4] 195*5113495bSYour Name mac_addr_ad2_valid : 1, // [3:3] 196*5113495bSYour Name mac_addr_ad1_valid : 1, // [2:2] 197*5113495bSYour Name mpdu_duration_valid : 1, // [1:1] 198*5113495bSYour Name mpdu_frame_control_valid : 1; // [0:0] 199*5113495bSYour Name uint32_t reserved_12 : 1, // [31:31] 200*5113495bSYour Name raw_mpdu : 1, // [30:30] 201*5113495bSYour Name bar_frame : 1, // [29:29] 202*5113495bSYour Name ampdu_flag : 1, // [28:28] 203*5113495bSYour Name pre_delim_count : 12, // [27:16] 204*5113495bSYour Name strip_vlan_s_tag_decap : 1, // [15:15] 205*5113495bSYour Name strip_vlan_c_tag_decap : 1, // [14:14] 206*5113495bSYour Name rx_insert_vlan_s_tag_padding : 1, // [13:13] 207*5113495bSYour Name rx_insert_vlan_c_tag_padding : 1, // [12:12] 208*5113495bSYour Name decap_type : 2, // [11:10] 209*5113495bSYour Name decrypt_needed : 1, // [9:9] 210*5113495bSYour Name new_peer_entry : 1, // [8:8] 211*5113495bSYour Name key_id_octet : 8; // [7:0] 212*5113495bSYour Name uint32_t reserved_13 : 1, // [31:31] 213*5113495bSYour Name amsdu_present : 1, // [30:30] 214*5113495bSYour Name directed : 1, // [29:29] 215*5113495bSYour Name encrypt_required : 1, // [28:28] 216*5113495bSYour Name u_apsd_trigger : 1, // [27:27] 217*5113495bSYour Name order : 1, // [26:26] 218*5113495bSYour Name fragment_flag : 1, // [25:25] 219*5113495bSYour Name eosp : 1, // [24:24] 220*5113495bSYour Name more_data : 1, // [23:23] 221*5113495bSYour Name ctrl_type : 1, // [22:22] 222*5113495bSYour Name mgmt_type : 1, // [21:21] 223*5113495bSYour Name null_data : 1, // [20:20] 224*5113495bSYour Name non_qos : 1, // [19:19] 225*5113495bSYour Name power_mgmt : 1, // [18:18] 226*5113495bSYour Name ast_index_timeout : 1, // [17:17] 227*5113495bSYour Name ast_index_not_found : 1, // [16:16] 228*5113495bSYour Name mcast_bcast : 1, // [15:15] 229*5113495bSYour Name first_mpdu : 1, // [14:14] 230*5113495bSYour Name mpdu_length : 14; // [13:0] 231*5113495bSYour Name uint32_t mpdu_duration_field : 16, // [31:16] 232*5113495bSYour Name mpdu_frame_control_field : 16; // [15:0] 233*5113495bSYour Name uint32_t mac_addr_ad1_31_0 : 32; // [31:0] 234*5113495bSYour Name uint32_t mac_addr_ad2_15_0 : 16, // [31:16] 235*5113495bSYour Name mac_addr_ad1_47_32 : 16; // [15:0] 236*5113495bSYour Name uint32_t mac_addr_ad2_47_16 : 32; // [31:0] 237*5113495bSYour Name uint32_t mac_addr_ad3_31_0 : 32; // [31:0] 238*5113495bSYour Name uint32_t mpdu_sequence_control_field : 16, // [31:16] 239*5113495bSYour Name mac_addr_ad3_47_32 : 16; // [15:0] 240*5113495bSYour Name uint32_t mac_addr_ad4_31_0 : 32; // [31:0] 241*5113495bSYour Name uint32_t mpdu_qos_control_field : 16, // [31:16] 242*5113495bSYour Name mac_addr_ad4_47_32 : 16; // [15:0] 243*5113495bSYour Name uint32_t mpdu_ht_control_field : 32; // [31:0] 244*5113495bSYour Name uint32_t multi_link_addr_ad1_ad2_valid : 1, // [31:31] 245*5113495bSYour Name reserved_23a : 1, // [30:30] 246*5113495bSYour Name src_info : 12, // [29:18] 247*5113495bSYour Name priority_valid : 1, // [17:17] 248*5113495bSYour Name service_code : 9, // [16:8] 249*5113495bSYour Name vdev_id : 8; // [7:0] 250*5113495bSYour Name uint32_t multi_link_addr_ad1_31_0 : 32; // [31:0] 251*5113495bSYour Name uint32_t multi_link_addr_ad2_15_0 : 16, // [31:16] 252*5113495bSYour Name multi_link_addr_ad1_47_32 : 16; // [15:0] 253*5113495bSYour Name uint32_t multi_link_addr_ad2_47_16 : 32; // [31:0] 254*5113495bSYour Name uint32_t reserved_27a : 31, // [31:1] 255*5113495bSYour Name authorized_to_send_wds : 1; // [0:0] 256*5113495bSYour Name uint32_t reserved_28a : 32; // [31:0] 257*5113495bSYour Name uint32_t reserved_29a : 32; // [31:0] 258*5113495bSYour Name #endif 259*5113495bSYour Name }; 260*5113495bSYour Name 261*5113495bSYour Name 262*5113495bSYour Name /* Description RXPT_CLASSIFY_INFO_DETAILS 263*5113495bSYour Name 264*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 265*5113495bSYour Name this field will be set to 0 266*5113495bSYour Name 267*5113495bSYour Name RXOLE related classification info 268*5113495bSYour Name <legal all 269*5113495bSYour Name */ 270*5113495bSYour Name 271*5113495bSYour Name 272*5113495bSYour Name /* Description REO_DESTINATION_INDICATION 273*5113495bSYour Name 274*5113495bSYour Name The ID of the REO exit ring where the MSDU frame shall push 275*5113495bSYour Name after (MPDU level) reordering has finished. 276*5113495bSYour Name 277*5113495bSYour Name <enum 0 reo_destination_sw0> Reo will push the frame into 278*5113495bSYour Name the REO2SW0 ring 279*5113495bSYour Name <enum 1 reo_destination_sw1> Reo will push the frame into 280*5113495bSYour Name the REO2SW1 ring 281*5113495bSYour Name <enum 2 reo_destination_sw2> Reo will push the frame into 282*5113495bSYour Name the REO2SW2 ring 283*5113495bSYour Name <enum 3 reo_destination_sw3> Reo will push the frame into 284*5113495bSYour Name the REO2SW3 ring 285*5113495bSYour Name <enum 4 reo_destination_sw4> Reo will push the frame into 286*5113495bSYour Name the REO2SW4 ring 287*5113495bSYour Name <enum 5 reo_destination_release> Reo will push the frame 288*5113495bSYour Name into the REO_release ring 289*5113495bSYour Name <enum 6 reo_destination_fw> Reo will push the frame into 290*5113495bSYour Name the REO2FW ring 291*5113495bSYour Name <enum 7 reo_destination_sw5> Reo will push the frame into 292*5113495bSYour Name the REO2SW5 ring (REO remaps this in chips without REO2SW5 293*5113495bSYour Name ring, e.g. Pine) 294*5113495bSYour Name <enum 8 reo_destination_sw6> Reo will push the frame into 295*5113495bSYour Name the REO2SW6 ring (REO remaps this in chips without REO2SW6 296*5113495bSYour Name ring, e.g. Pine) 297*5113495bSYour Name <enum 9 reo_destination_sw7> Reo will push the frame into 298*5113495bSYour Name the REO2SW7 ring (REO remaps this in chips without REO2SW7 299*5113495bSYour Name ring) 300*5113495bSYour Name <enum 10 reo_destination_sw8> Reo will push the frame into 301*5113495bSYour Name the REO2SW8 ring (REO remaps this in chips without REO2SW8 302*5113495bSYour Name ring) 303*5113495bSYour Name <enum 11 reo_destination_11> REO remaps this 304*5113495bSYour Name <enum 12 reo_destination_12> REO remaps this <enum 13 reo_destination_13> 305*5113495bSYour Name REO remaps this 306*5113495bSYour Name <enum 14 reo_destination_14> REO remaps this 307*5113495bSYour Name <enum 15 reo_destination_15> REO remaps this 308*5113495bSYour Name <enum 16 reo_destination_16> REO remaps this 309*5113495bSYour Name <enum 17 reo_destination_17> REO remaps this 310*5113495bSYour Name <enum 18 reo_destination_18> REO remaps this 311*5113495bSYour Name <enum 19 reo_destination_19> REO remaps this 312*5113495bSYour Name <enum 20 reo_destination_20> REO remaps this 313*5113495bSYour Name <enum 21 reo_destination_21> REO remaps this 314*5113495bSYour Name <enum 22 reo_destination_22> REO remaps this 315*5113495bSYour Name <enum 23 reo_destination_23> REO remaps this 316*5113495bSYour Name <enum 24 reo_destination_24> REO remaps this 317*5113495bSYour Name <enum 25 reo_destination_25> REO remaps this 318*5113495bSYour Name <enum 26 reo_destination_26> REO remaps this 319*5113495bSYour Name <enum 27 reo_destination_27> REO remaps this 320*5113495bSYour Name <enum 28 reo_destination_28> REO remaps this 321*5113495bSYour Name <enum 29 reo_destination_29> REO remaps this 322*5113495bSYour Name <enum 30 reo_destination_30> REO remaps this 323*5113495bSYour Name <enum 31 reo_destination_31> REO remaps this 324*5113495bSYour Name 325*5113495bSYour Name <legal all> 326*5113495bSYour Name */ 327*5113495bSYour Name 328*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_REO_DESTINATION_INDICATION_OFFSET 0x00000000 329*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_REO_DESTINATION_INDICATION_LSB 0 330*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_REO_DESTINATION_INDICATION_MSB 4 331*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_REO_DESTINATION_INDICATION_MASK 0x0000001f 332*5113495bSYour Name 333*5113495bSYour Name 334*5113495bSYour Name /* Description LMAC_PEER_ID_MSB 335*5113495bSYour Name 336*5113495bSYour Name If use_flow_id_toeplitz_clfy is set and lmac_peer_id_'sb 337*5113495bSYour Name is 2'b00, Rx OLE uses a REO desination indicati'n of {1'b1, 338*5113495bSYour Name hash[3:0]} using the chosen Toeplitz hash from Common Parser 339*5113495bSYour Name if flow search fails. 340*5113495bSYour Name If use_flow_id_toeplitz_clfy is set and lmac_peer_id_msb 341*5113495bSYour Name 's not 2'b00, Rx OLE uses a REO desination indication of 342*5113495bSYour Name {lmac_peer_id_msb, hash[2:0]} using the chosen Toeplitz 343*5113495bSYour Name hash from Common Parser if flow search fails. 344*5113495bSYour Name This LMAC/peer-based routing is not supported in Hastings80 345*5113495bSYour Name and HastingsPrime. 346*5113495bSYour Name <legal all> 347*5113495bSYour Name */ 348*5113495bSYour Name 349*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_LMAC_PEER_ID_MSB_OFFSET 0x00000000 350*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_LMAC_PEER_ID_MSB_LSB 5 351*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_LMAC_PEER_ID_MSB_MSB 6 352*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_LMAC_PEER_ID_MSB_MASK 0x00000060 353*5113495bSYour Name 354*5113495bSYour Name 355*5113495bSYour Name /* Description USE_FLOW_ID_TOEPLITZ_CLFY 356*5113495bSYour Name 357*5113495bSYour Name Indication to Rx OLE to enable REO destination routing based 358*5113495bSYour Name on the chosen Toeplitz hash from Common Parser, in case 359*5113495bSYour Name flow search fails 360*5113495bSYour Name <legal all> 361*5113495bSYour Name */ 362*5113495bSYour Name 363*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_USE_FLOW_ID_TOEPLITZ_CLFY_OFFSET 0x00000000 364*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_USE_FLOW_ID_TOEPLITZ_CLFY_LSB 7 365*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_USE_FLOW_ID_TOEPLITZ_CLFY_MSB 7 366*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_USE_FLOW_ID_TOEPLITZ_CLFY_MASK 0x00000080 367*5113495bSYour Name 368*5113495bSYour Name 369*5113495bSYour Name /* Description PKT_SELECTION_FP_UCAST_DATA 370*5113495bSYour Name 371*5113495bSYour Name Filter pass Unicast data frame (matching rxpcu_filter_pass 372*5113495bSYour Name and sw_frame_group_Unicast_data) routing selection 373*5113495bSYour Name TODO: What about 'rxpcu_filter_pass_monior_ovrd'? 374*5113495bSYour Name 375*5113495bSYour Name 1'b0: source and destination rings are selected from the 376*5113495bSYour Name RxOLE register settings for the packet type 377*5113495bSYour Name 378*5113495bSYour Name 1'b1: source ring and destination ring is selected from 379*5113495bSYour Name the rxdma0_source_ring_selection and rxdma0_destination_ring_selection 380*5113495bSYour Name fields in this STRUCT 381*5113495bSYour Name <legal all> 382*5113495bSYour Name */ 383*5113495bSYour Name 384*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_UCAST_DATA_OFFSET 0x00000000 385*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_UCAST_DATA_LSB 8 386*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_UCAST_DATA_MSB 8 387*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_UCAST_DATA_MASK 0x00000100 388*5113495bSYour Name 389*5113495bSYour Name 390*5113495bSYour Name /* Description PKT_SELECTION_FP_MCAST_DATA 391*5113495bSYour Name 392*5113495bSYour Name Filter pass Multicast data frame (matching rxpcu_filter_pass 393*5113495bSYour Name and sw_frame_group_Multicast_data) routing selection 394*5113495bSYour Name TODO: What about 'rxpcu_filter_pass_monior_ovrd'? 395*5113495bSYour Name 396*5113495bSYour Name 1'b0: source and destination rings are selected from the 397*5113495bSYour Name RxOLE register settings for the packet type 398*5113495bSYour Name 399*5113495bSYour Name 1'b1: source ring and destination ring is selected from 400*5113495bSYour Name the rxdma0_source_ring_selection and rxdma0_destination_ring_selection 401*5113495bSYour Name fields in this STRUCT 402*5113495bSYour Name <legal all> 403*5113495bSYour Name */ 404*5113495bSYour Name 405*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_MCAST_DATA_OFFSET 0x00000000 406*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_MCAST_DATA_LSB 9 407*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_MCAST_DATA_MSB 9 408*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_MCAST_DATA_MASK 0x00000200 409*5113495bSYour Name 410*5113495bSYour Name 411*5113495bSYour Name /* Description PKT_SELECTION_FP_1000 412*5113495bSYour Name 413*5113495bSYour Name Filter pass BAR frame (matching rxpcu_filter_pass and sw_frame_group_ctrl_1000) 414*5113495bSYour Name routing selection 415*5113495bSYour Name TODO: What about 'rxpcu_filter_pass_monior_ovrd'? 416*5113495bSYour Name 417*5113495bSYour Name 1'b0: source and destination rings are selected from the 418*5113495bSYour Name RxOLE register settings for the packet type 419*5113495bSYour Name 420*5113495bSYour Name 1'b1: source ring and destination ring is selected from 421*5113495bSYour Name the rxdma0_source_ring_selection and rxdma0_destination_ring_selection 422*5113495bSYour Name fields in this STRUCT 423*5113495bSYour Name <legal all> 424*5113495bSYour Name */ 425*5113495bSYour Name 426*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_1000_OFFSET 0x00000000 427*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_1000_LSB 10 428*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_1000_MSB 10 429*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PKT_SELECTION_FP_1000_MASK 0x00000400 430*5113495bSYour Name 431*5113495bSYour Name 432*5113495bSYour Name /* Description RXDMA0_SOURCE_RING_SELECTION 433*5113495bSYour Name 434*5113495bSYour Name Field only valid when for the received frame type the corresponding 435*5113495bSYour Name pkt_selection_fp_... bit is set 436*5113495bSYour Name 437*5113495bSYour Name <enum 0 sw2rxdma0_0_buf_source_ring> The data buffer for 438*5113495bSYour Name this frame shall be sourced by sw2rxdma0 buffer source 439*5113495bSYour Name ring. 440*5113495bSYour Name <enum 1 fw2rxdma0_pmac0_buf_source_ring> The data buffer 441*5113495bSYour Name for this frame shall be sourced by fw2rxdma buffer source 442*5113495bSYour Name ring for PMAC0. 443*5113495bSYour Name <enum 2 sw2rxdma0_1_buf_source_ring> The data buffer for 444*5113495bSYour Name this frame shall be sourced by sw2rxdma1 buffer source 445*5113495bSYour Name ring. 446*5113495bSYour Name <enum 3 no_buffer_rxdma0_ring> The frame shall not be written 447*5113495bSYour Name to any data buffer. 448*5113495bSYour Name <enum 4 sw2rxdma0_exception_buf_source_ring> The data buffer 449*5113495bSYour Name for this frame shall be sourced by sw2rxdma_exception buffer 450*5113495bSYour Name source ring. 451*5113495bSYour Name <enum 5 fw2rxdma0_pmac1_buf_source_ring> The data buffer 452*5113495bSYour Name for this frame shall be sourced by fw2rxdma buffer source 453*5113495bSYour Name ring for PMAC1. 454*5113495bSYour Name 455*5113495bSYour Name <legal 0-5> 456*5113495bSYour Name */ 457*5113495bSYour Name 458*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_SOURCE_RING_SELECTION_OFFSET 0x00000000 459*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_SOURCE_RING_SELECTION_LSB 11 460*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_SOURCE_RING_SELECTION_MSB 13 461*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_SOURCE_RING_SELECTION_MASK 0x00003800 462*5113495bSYour Name 463*5113495bSYour Name 464*5113495bSYour Name /* Description RXDMA0_DESTINATION_RING_SELECTION 465*5113495bSYour Name 466*5113495bSYour Name Field only valid when for the received frame type the corresponding 467*5113495bSYour Name pkt_selection_fp_... bit is set 468*5113495bSYour Name 469*5113495bSYour Name <enum 0 rxdma_release_ring> RXDMA0 shall push the frame 470*5113495bSYour Name to the Release ring. Effectively this means the frame needs 471*5113495bSYour Name to be dropped. 472*5113495bSYour Name <enum 1 rxdma2fw_pmac0_ring> RXDMA0 shall push the frame 473*5113495bSYour Name to the FW ring for PMAC0. 474*5113495bSYour Name <enum 2 rxdma2sw_ring> RXDMA0 shall push the frame to the 475*5113495bSYour Name SW ring. 476*5113495bSYour Name <enum 3 rxdma2reo_ring> RXDMA0 shall push the frame to 477*5113495bSYour Name the REO entrance ring. 478*5113495bSYour Name <enum 4 rxdma2fw_pmac1_ring> RXDMA0 shall push the frame 479*5113495bSYour Name to the FW ring for PMAC1. 480*5113495bSYour Name <enum 5 rxdma2reo_remote0_ring> RXDMA0 shall push the frame 481*5113495bSYour Name to the first MLO REO entrance ring. 482*5113495bSYour Name <enum 6 rxdma2reo_remote1_ring> RXDMA0 shall push the frame 483*5113495bSYour Name to the second MLO REO entrance ring. 484*5113495bSYour Name 485*5113495bSYour Name <legal 0-6> 486*5113495bSYour Name */ 487*5113495bSYour Name 488*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_DESTINATION_RING_SELECTION_OFFSET 0x00000000 489*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_DESTINATION_RING_SELECTION_LSB 14 490*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_DESTINATION_RING_SELECTION_MSB 16 491*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_RXDMA0_DESTINATION_RING_SELECTION_MASK 0x0001c000 492*5113495bSYour Name 493*5113495bSYour Name 494*5113495bSYour Name /* Description MCAST_ECHO_DROP_ENABLE 495*5113495bSYour Name 496*5113495bSYour Name If set, for multicast packets, multicast echo check (i.e. 497*5113495bSYour Name SA search with mcast_echo_check = 1) shall be performed 498*5113495bSYour Name by RXOLE, and any multicast echo packets should be indicated 499*5113495bSYour Name to RXDMA for release to WBM 500*5113495bSYour Name 501*5113495bSYour Name <legal all> 502*5113495bSYour Name */ 503*5113495bSYour Name 504*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_MCAST_ECHO_DROP_ENABLE_OFFSET 0x00000000 505*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_MCAST_ECHO_DROP_ENABLE_LSB 17 506*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_MCAST_ECHO_DROP_ENABLE_MSB 17 507*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_MCAST_ECHO_DROP_ENABLE_MASK 0x00020000 508*5113495bSYour Name 509*5113495bSYour Name 510*5113495bSYour Name /* Description WDS_LEARNING_DETECT_EN 511*5113495bSYour Name 512*5113495bSYour Name If set, WDS learning detection based on SA search and notification 513*5113495bSYour Name to FW (using RXDMA0 status ring) is enabled and the "timestamp" 514*5113495bSYour Name field in address search failure cache-only entry should 515*5113495bSYour Name be used to avoid multiple WDS learning notifications. 516*5113495bSYour Name 517*5113495bSYour Name <legal all> 518*5113495bSYour Name */ 519*5113495bSYour Name 520*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_WDS_LEARNING_DETECT_EN_OFFSET 0x00000000 521*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_WDS_LEARNING_DETECT_EN_LSB 18 522*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_WDS_LEARNING_DETECT_EN_MSB 18 523*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_WDS_LEARNING_DETECT_EN_MASK 0x00040000 524*5113495bSYour Name 525*5113495bSYour Name 526*5113495bSYour Name /* Description INTRABSS_CHECK_EN 527*5113495bSYour Name 528*5113495bSYour Name If set, intra-BSS routing detection is enabled 529*5113495bSYour Name 530*5113495bSYour Name <legal all> 531*5113495bSYour Name */ 532*5113495bSYour Name 533*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_INTRABSS_CHECK_EN_OFFSET 0x00000000 534*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_INTRABSS_CHECK_EN_LSB 19 535*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_INTRABSS_CHECK_EN_MSB 19 536*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_INTRABSS_CHECK_EN_MASK 0x00080000 537*5113495bSYour Name 538*5113495bSYour Name 539*5113495bSYour Name /* Description USE_PPE 540*5113495bSYour Name 541*5113495bSYour Name Indicates to RXDMA to ignore the REO_destination_indication 542*5113495bSYour Name and use a programmed value corresponding to the REO2PPE 543*5113495bSYour Name ring 544*5113495bSYour Name 545*5113495bSYour Name This override to REO2PPE for packets requiring multiple 546*5113495bSYour Name buffers shall be disabled based on an RXDMA configuration, 547*5113495bSYour Name as PPE may not support such packets. 548*5113495bSYour Name 549*5113495bSYour Name Supported only in full AP chips like Waikiki, not in client/soft 550*5113495bSYour Name AP chips like Hamilton 551*5113495bSYour Name <legal all> 552*5113495bSYour Name */ 553*5113495bSYour Name 554*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_USE_PPE_OFFSET 0x00000000 555*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_USE_PPE_LSB 20 556*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_USE_PPE_MSB 20 557*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_USE_PPE_MASK 0x00100000 558*5113495bSYour Name 559*5113495bSYour Name 560*5113495bSYour Name /* Description PPE_ROUTING_ENABLE 561*5113495bSYour Name 562*5113495bSYour Name Global enable/disable bit for routing to PPE, used to disable 563*5113495bSYour Name PPE routing even if RXOLE CCE or flow search indicate 'Use_PPE' 564*5113495bSYour Name 565*5113495bSYour Name 566*5113495bSYour Name This is set by SW for peers which are being handled by a 567*5113495bSYour Name host SW/accelerator subsystem that also handles packet 568*5113495bSYour Name buffer management for WiFi-to-PPE routing. 569*5113495bSYour Name 570*5113495bSYour Name This is cleared by SW for peers which are being handled 571*5113495bSYour Name by a different subsystem, completely disabling WiFi-to-PPE 572*5113495bSYour Name routing for such peers. 573*5113495bSYour Name 574*5113495bSYour Name <legal all> 575*5113495bSYour Name */ 576*5113495bSYour Name 577*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PPE_ROUTING_ENABLE_OFFSET 0x00000000 578*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PPE_ROUTING_ENABLE_LSB 21 579*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PPE_ROUTING_ENABLE_MSB 21 580*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_PPE_ROUTING_ENABLE_MASK 0x00200000 581*5113495bSYour Name 582*5113495bSYour Name 583*5113495bSYour Name /* Description RESERVED_0B 584*5113495bSYour Name 585*5113495bSYour Name <legal 0> 586*5113495bSYour Name */ 587*5113495bSYour Name 588*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_RESERVED_0B_OFFSET 0x00000000 589*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_RESERVED_0B_LSB 22 590*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_RESERVED_0B_MSB 31 591*5113495bSYour Name #define RX_MPDU_INFO_RXPT_CLASSIFY_INFO_DETAILS_RESERVED_0B_MASK 0xffc00000 592*5113495bSYour Name 593*5113495bSYour Name 594*5113495bSYour Name /* Description RX_REO_QUEUE_DESC_ADDR_31_0 595*5113495bSYour Name 596*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 597*5113495bSYour Name this field will be set to 0 598*5113495bSYour Name 599*5113495bSYour Name Address (lower 32 bits) of the REO queue descriptor. 600*5113495bSYour Name 601*5113495bSYour Name If no Peer entry lookup happened for this frame, the value 602*5113495bSYour Name wil be set to 0, and the frame shall never be pushed to 603*5113495bSYour Name REO entrance ring. 604*5113495bSYour Name <legal all> 605*5113495bSYour Name */ 606*5113495bSYour Name 607*5113495bSYour Name #define RX_MPDU_INFO_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000004 608*5113495bSYour Name #define RX_MPDU_INFO_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0 609*5113495bSYour Name #define RX_MPDU_INFO_RX_REO_QUEUE_DESC_ADDR_31_0_MSB 31 610*5113495bSYour Name #define RX_MPDU_INFO_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff 611*5113495bSYour Name 612*5113495bSYour Name 613*5113495bSYour Name /* Description RX_REO_QUEUE_DESC_ADDR_39_32 614*5113495bSYour Name 615*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 616*5113495bSYour Name this field will be set to 0 617*5113495bSYour Name 618*5113495bSYour Name Address (upper 8 bits) of the REO queue descriptor. 619*5113495bSYour Name 620*5113495bSYour Name If no Peer entry lookup happened for this frame, the value 621*5113495bSYour Name wil be set to 0, and the frame shall never be pushed to 622*5113495bSYour Name REO entrance ring. 623*5113495bSYour Name <legal all> 624*5113495bSYour Name */ 625*5113495bSYour Name 626*5113495bSYour Name #define RX_MPDU_INFO_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000008 627*5113495bSYour Name #define RX_MPDU_INFO_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0 628*5113495bSYour Name #define RX_MPDU_INFO_RX_REO_QUEUE_DESC_ADDR_39_32_MSB 7 629*5113495bSYour Name #define RX_MPDU_INFO_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff 630*5113495bSYour Name 631*5113495bSYour Name 632*5113495bSYour Name /* Description RECEIVE_QUEUE_NUMBER 633*5113495bSYour Name 634*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 635*5113495bSYour Name this field will be set to 0 636*5113495bSYour Name 637*5113495bSYour Name Indicates the MPDU queue ID to which this MPDU link descriptor 638*5113495bSYour Name belongs 639*5113495bSYour Name Used for tracking and debugging 640*5113495bSYour Name <legal all> 641*5113495bSYour Name */ 642*5113495bSYour Name 643*5113495bSYour Name #define RX_MPDU_INFO_RECEIVE_QUEUE_NUMBER_OFFSET 0x00000008 644*5113495bSYour Name #define RX_MPDU_INFO_RECEIVE_QUEUE_NUMBER_LSB 8 645*5113495bSYour Name #define RX_MPDU_INFO_RECEIVE_QUEUE_NUMBER_MSB 23 646*5113495bSYour Name #define RX_MPDU_INFO_RECEIVE_QUEUE_NUMBER_MASK 0x00ffff00 647*5113495bSYour Name 648*5113495bSYour Name 649*5113495bSYour Name /* Description PRE_DELIM_ERR_WARNING 650*5113495bSYour Name 651*5113495bSYour Name Indicates that a delimiter FCS error was found in between 652*5113495bSYour Name the Previous MPDU and this MPDU. 653*5113495bSYour Name 654*5113495bSYour Name Note that this is just a warning, and does not mean that 655*5113495bSYour Name this MPDU is corrupted in any way. If it is, there will 656*5113495bSYour Name be other errors indicated such as FCS or decrypt errors 657*5113495bSYour Name 658*5113495bSYour Name 659*5113495bSYour Name In case of ndp or phy_err, this field will indicate at least 660*5113495bSYour Name one of delimiters located after the last MPDU in the previous 661*5113495bSYour Name PPDU has been corrupted. 662*5113495bSYour Name */ 663*5113495bSYour Name 664*5113495bSYour Name #define RX_MPDU_INFO_PRE_DELIM_ERR_WARNING_OFFSET 0x00000008 665*5113495bSYour Name #define RX_MPDU_INFO_PRE_DELIM_ERR_WARNING_LSB 24 666*5113495bSYour Name #define RX_MPDU_INFO_PRE_DELIM_ERR_WARNING_MSB 24 667*5113495bSYour Name #define RX_MPDU_INFO_PRE_DELIM_ERR_WARNING_MASK 0x01000000 668*5113495bSYour Name 669*5113495bSYour Name 670*5113495bSYour Name /* Description FIRST_DELIM_ERR 671*5113495bSYour Name 672*5113495bSYour Name Indicates that the first delimiter had a FCS failure. Only 673*5113495bSYour Name valid when first_mpdu and first_msdu are set. 674*5113495bSYour Name 675*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 676*5113495bSYour Name 677*5113495bSYour Name */ 678*5113495bSYour Name 679*5113495bSYour Name #define RX_MPDU_INFO_FIRST_DELIM_ERR_OFFSET 0x00000008 680*5113495bSYour Name #define RX_MPDU_INFO_FIRST_DELIM_ERR_LSB 25 681*5113495bSYour Name #define RX_MPDU_INFO_FIRST_DELIM_ERR_MSB 25 682*5113495bSYour Name #define RX_MPDU_INFO_FIRST_DELIM_ERR_MASK 0x02000000 683*5113495bSYour Name 684*5113495bSYour Name 685*5113495bSYour Name /* Description RESERVED_2A 686*5113495bSYour Name 687*5113495bSYour Name <legal 0> 688*5113495bSYour Name */ 689*5113495bSYour Name 690*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_2A_OFFSET 0x00000008 691*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_2A_LSB 26 692*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_2A_MSB 31 693*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_2A_MASK 0xfc000000 694*5113495bSYour Name 695*5113495bSYour Name 696*5113495bSYour Name /* Description PN_31_0 697*5113495bSYour Name 698*5113495bSYour Name Field only valid when Frame_encryption_info_valid is set 699*5113495bSYour Name 700*5113495bSYour Name 701*5113495bSYour Name Bits [31:0] of the PN number extracted from the IV field 702*5113495bSYour Name 703*5113495bSYour Name WEP: IV = {key_id_octet, pn2, pn1, pn0}. Only pn[23:0] 704*5113495bSYour Name is valid. 705*5113495bSYour Name TKIP: IV = {pn5, pn4, pn3, pn2, key_id_octet, pn0, WEPSeed[1], 706*5113495bSYour Name pn1}. Only pn[47:0] is valid. 707*5113495bSYour Name AES-CCM: IV = {pn5, pn4, pn3, pn2, key_id_octet, 0x0, pn1, 708*5113495bSYour Name pn0}. Only pn[47:0] is valid. 709*5113495bSYour Name WAPI: IV = {key_id_octet, 0x0, pn15, pn14, pn13, pn12, pn11, 710*5113495bSYour Name pn10, pn9, pn8, pn7, pn6, pn5, pn4, pn3, pn2, pn1, pn0}. 711*5113495bSYour Name pn[127:0] are valid. 712*5113495bSYour Name 713*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 714*5113495bSYour Name 715*5113495bSYour Name */ 716*5113495bSYour Name 717*5113495bSYour Name #define RX_MPDU_INFO_PN_31_0_OFFSET 0x0000000c 718*5113495bSYour Name #define RX_MPDU_INFO_PN_31_0_LSB 0 719*5113495bSYour Name #define RX_MPDU_INFO_PN_31_0_MSB 31 720*5113495bSYour Name #define RX_MPDU_INFO_PN_31_0_MASK 0xffffffff 721*5113495bSYour Name 722*5113495bSYour Name 723*5113495bSYour Name /* Description PN_63_32 724*5113495bSYour Name 725*5113495bSYour Name Field only valid when Frame_encryption_info_valid is set 726*5113495bSYour Name 727*5113495bSYour Name 728*5113495bSYour Name Bits [63:32] of the PN number. See description for pn_31_0. 729*5113495bSYour Name 730*5113495bSYour Name 731*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 732*5113495bSYour Name 733*5113495bSYour Name */ 734*5113495bSYour Name 735*5113495bSYour Name #define RX_MPDU_INFO_PN_63_32_OFFSET 0x00000010 736*5113495bSYour Name #define RX_MPDU_INFO_PN_63_32_LSB 0 737*5113495bSYour Name #define RX_MPDU_INFO_PN_63_32_MSB 31 738*5113495bSYour Name #define RX_MPDU_INFO_PN_63_32_MASK 0xffffffff 739*5113495bSYour Name 740*5113495bSYour Name 741*5113495bSYour Name /* Description PN_95_64 742*5113495bSYour Name 743*5113495bSYour Name Field only valid when Frame_encryption_info_valid is set 744*5113495bSYour Name 745*5113495bSYour Name 746*5113495bSYour Name Bits [95:64] of the PN number. See description for pn_31_0. 747*5113495bSYour Name 748*5113495bSYour Name 749*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 750*5113495bSYour Name 751*5113495bSYour Name */ 752*5113495bSYour Name 753*5113495bSYour Name #define RX_MPDU_INFO_PN_95_64_OFFSET 0x00000014 754*5113495bSYour Name #define RX_MPDU_INFO_PN_95_64_LSB 0 755*5113495bSYour Name #define RX_MPDU_INFO_PN_95_64_MSB 31 756*5113495bSYour Name #define RX_MPDU_INFO_PN_95_64_MASK 0xffffffff 757*5113495bSYour Name 758*5113495bSYour Name 759*5113495bSYour Name /* Description PN_127_96 760*5113495bSYour Name 761*5113495bSYour Name Field only valid when Frame_encryption_info_valid is set 762*5113495bSYour Name 763*5113495bSYour Name 764*5113495bSYour Name Bits [127:96] of the PN number. See description for pn_31_0. 765*5113495bSYour Name 766*5113495bSYour Name 767*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 768*5113495bSYour Name 769*5113495bSYour Name */ 770*5113495bSYour Name 771*5113495bSYour Name #define RX_MPDU_INFO_PN_127_96_OFFSET 0x00000018 772*5113495bSYour Name #define RX_MPDU_INFO_PN_127_96_LSB 0 773*5113495bSYour Name #define RX_MPDU_INFO_PN_127_96_MSB 31 774*5113495bSYour Name #define RX_MPDU_INFO_PN_127_96_MASK 0xffffffff 775*5113495bSYour Name 776*5113495bSYour Name 777*5113495bSYour Name /* Description EPD_EN 778*5113495bSYour Name 779*5113495bSYour Name Field only valid when AST_based_lookup_valid == 1. 780*5113495bSYour Name 781*5113495bSYour Name 782*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 783*5113495bSYour Name this field will be set to 0 784*5113495bSYour Name 785*5113495bSYour Name If set to one use EPD instead of LPD 786*5113495bSYour Name 787*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 788*5113495bSYour Name 789*5113495bSYour Name <legal all> 790*5113495bSYour Name */ 791*5113495bSYour Name 792*5113495bSYour Name #define RX_MPDU_INFO_EPD_EN_OFFSET 0x0000001c 793*5113495bSYour Name #define RX_MPDU_INFO_EPD_EN_LSB 0 794*5113495bSYour Name #define RX_MPDU_INFO_EPD_EN_MSB 0 795*5113495bSYour Name #define RX_MPDU_INFO_EPD_EN_MASK 0x00000001 796*5113495bSYour Name 797*5113495bSYour Name 798*5113495bSYour Name /* Description ALL_FRAMES_SHALL_BE_ENCRYPTED 799*5113495bSYour Name 800*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 801*5113495bSYour Name this field will be set to 0 802*5113495bSYour Name 803*5113495bSYour Name When set, all frames (data only ?) shall be encrypted. If 804*5113495bSYour Name not, RX CRYPTO shall set an error flag. 805*5113495bSYour Name <legal all> 806*5113495bSYour Name */ 807*5113495bSYour Name 808*5113495bSYour Name #define RX_MPDU_INFO_ALL_FRAMES_SHALL_BE_ENCRYPTED_OFFSET 0x0000001c 809*5113495bSYour Name #define RX_MPDU_INFO_ALL_FRAMES_SHALL_BE_ENCRYPTED_LSB 1 810*5113495bSYour Name #define RX_MPDU_INFO_ALL_FRAMES_SHALL_BE_ENCRYPTED_MSB 1 811*5113495bSYour Name #define RX_MPDU_INFO_ALL_FRAMES_SHALL_BE_ENCRYPTED_MASK 0x00000002 812*5113495bSYour Name 813*5113495bSYour Name 814*5113495bSYour Name /* Description ENCRYPT_TYPE 815*5113495bSYour Name 816*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 817*5113495bSYour Name this field will be set to 0 818*5113495bSYour Name 819*5113495bSYour Name Indicates type of decrypt cipher used (as defined in the 820*5113495bSYour Name peer entry) 821*5113495bSYour Name 822*5113495bSYour Name <enum 0 wep_40> WEP 40-bit 823*5113495bSYour Name <enum 1 wep_104> WEP 104-bit 824*5113495bSYour Name <enum 2 tkip_no_mic> TKIP without MIC 825*5113495bSYour Name <enum 3 wep_128> WEP 128-bit 826*5113495bSYour Name <enum 4 tkip_with_mic> TKIP with MIC 827*5113495bSYour Name <enum 5 wapi> WAPI 828*5113495bSYour Name <enum 6 aes_ccmp_128> AES CCMP 128 829*5113495bSYour Name <enum 7 no_cipher> No crypto 830*5113495bSYour Name <enum 8 aes_ccmp_256> AES CCMP 256 831*5113495bSYour Name <enum 9 aes_gcmp_128> AES CCMP 128 832*5113495bSYour Name <enum 10 aes_gcmp_256> AES CCMP 256 833*5113495bSYour Name <enum 11 wapi_gcm_sm4> WAPI GCM SM4 834*5113495bSYour Name 835*5113495bSYour Name <enum 12 wep_varied_width> WEP encryption. As for WEP per 836*5113495bSYour Name keyid the key bit width can vary, the key bit width for 837*5113495bSYour Name this MPDU will be indicated in field wep_key_width_for_variable 838*5113495bSYour Name key 839*5113495bSYour Name <legal 0-12> 840*5113495bSYour Name */ 841*5113495bSYour Name 842*5113495bSYour Name #define RX_MPDU_INFO_ENCRYPT_TYPE_OFFSET 0x0000001c 843*5113495bSYour Name #define RX_MPDU_INFO_ENCRYPT_TYPE_LSB 2 844*5113495bSYour Name #define RX_MPDU_INFO_ENCRYPT_TYPE_MSB 5 845*5113495bSYour Name #define RX_MPDU_INFO_ENCRYPT_TYPE_MASK 0x0000003c 846*5113495bSYour Name 847*5113495bSYour Name 848*5113495bSYour Name /* Description WEP_KEY_WIDTH_FOR_VARIABLE_KEY 849*5113495bSYour Name 850*5113495bSYour Name Field only valid when key_type is set to wep_varied_width. 851*5113495bSYour Name 852*5113495bSYour Name 853*5113495bSYour Name This field indicates the size of the wep key for this MPDU. 854*5113495bSYour Name 855*5113495bSYour Name 856*5113495bSYour Name <enum 0 wep_varied_width_40> WEP 40-bit 857*5113495bSYour Name <enum 1 wep_varied_width_104> WEP 104-bit 858*5113495bSYour Name <enum 2 wep_varied_width_128> WEP 128-bit 859*5113495bSYour Name 860*5113495bSYour Name <legal 0-2> 861*5113495bSYour Name */ 862*5113495bSYour Name 863*5113495bSYour Name #define RX_MPDU_INFO_WEP_KEY_WIDTH_FOR_VARIABLE_KEY_OFFSET 0x0000001c 864*5113495bSYour Name #define RX_MPDU_INFO_WEP_KEY_WIDTH_FOR_VARIABLE_KEY_LSB 6 865*5113495bSYour Name #define RX_MPDU_INFO_WEP_KEY_WIDTH_FOR_VARIABLE_KEY_MSB 7 866*5113495bSYour Name #define RX_MPDU_INFO_WEP_KEY_WIDTH_FOR_VARIABLE_KEY_MASK 0x000000c0 867*5113495bSYour Name 868*5113495bSYour Name 869*5113495bSYour Name /* Description MESH_STA 870*5113495bSYour Name 871*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 872*5113495bSYour Name this field will be set to 0 873*5113495bSYour Name 874*5113495bSYour Name When set, this is a Mesh (11s) STA. 875*5113495bSYour Name 876*5113495bSYour Name The interpretation of the A-MSDU 'Length' field in the MPDU 877*5113495bSYour Name (if any) is decided by the e-numerations below. 878*5113495bSYour Name 879*5113495bSYour Name <enum 0 MESH_DISABLE> 880*5113495bSYour Name <enum 1 MESH_Q2Q> A-MSDU 'Length' is big endian and includes 881*5113495bSYour Name the length of Mesh Control. 882*5113495bSYour Name <enum 2 MESH_11S_BE> A-MSDU 'Length' is big endian and excludes 883*5113495bSYour Name the length of Mesh Control. 884*5113495bSYour Name <enum 3 MESH_11S_LE> A-MSDU 'Length' is little endian and 885*5113495bSYour Name excludes the length of Mesh Control. This is 802.11s-compliant. 886*5113495bSYour Name 887*5113495bSYour Name <legal all> 888*5113495bSYour Name */ 889*5113495bSYour Name 890*5113495bSYour Name #define RX_MPDU_INFO_MESH_STA_OFFSET 0x0000001c 891*5113495bSYour Name #define RX_MPDU_INFO_MESH_STA_LSB 8 892*5113495bSYour Name #define RX_MPDU_INFO_MESH_STA_MSB 9 893*5113495bSYour Name #define RX_MPDU_INFO_MESH_STA_MASK 0x00000300 894*5113495bSYour Name 895*5113495bSYour Name 896*5113495bSYour Name /* Description BSSID_HIT 897*5113495bSYour Name 898*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 899*5113495bSYour Name this field will be set to 0 900*5113495bSYour Name 901*5113495bSYour Name When set, the BSSID of the incoming frame matched one of 902*5113495bSYour Name the 8 BSSID register values 903*5113495bSYour Name 904*5113495bSYour Name <legal all> 905*5113495bSYour Name */ 906*5113495bSYour Name 907*5113495bSYour Name #define RX_MPDU_INFO_BSSID_HIT_OFFSET 0x0000001c 908*5113495bSYour Name #define RX_MPDU_INFO_BSSID_HIT_LSB 10 909*5113495bSYour Name #define RX_MPDU_INFO_BSSID_HIT_MSB 10 910*5113495bSYour Name #define RX_MPDU_INFO_BSSID_HIT_MASK 0x00000400 911*5113495bSYour Name 912*5113495bSYour Name 913*5113495bSYour Name /* Description BSSID_NUMBER 914*5113495bSYour Name 915*5113495bSYour Name Field only valid when bssid_hit is set. 916*5113495bSYour Name 917*5113495bSYour Name This number indicates which one out of the 8 BSSID register 918*5113495bSYour Name values matched the incoming frame 919*5113495bSYour Name <legal all> 920*5113495bSYour Name */ 921*5113495bSYour Name 922*5113495bSYour Name #define RX_MPDU_INFO_BSSID_NUMBER_OFFSET 0x0000001c 923*5113495bSYour Name #define RX_MPDU_INFO_BSSID_NUMBER_LSB 11 924*5113495bSYour Name #define RX_MPDU_INFO_BSSID_NUMBER_MSB 14 925*5113495bSYour Name #define RX_MPDU_INFO_BSSID_NUMBER_MASK 0x00007800 926*5113495bSYour Name 927*5113495bSYour Name 928*5113495bSYour Name /* Description TID 929*5113495bSYour Name 930*5113495bSYour Name Field only valid when mpdu_qos_control_valid is set 931*5113495bSYour Name 932*5113495bSYour Name The TID field in the QoS control field 933*5113495bSYour Name <legal all> 934*5113495bSYour Name */ 935*5113495bSYour Name 936*5113495bSYour Name #define RX_MPDU_INFO_TID_OFFSET 0x0000001c 937*5113495bSYour Name #define RX_MPDU_INFO_TID_LSB 15 938*5113495bSYour Name #define RX_MPDU_INFO_TID_MSB 18 939*5113495bSYour Name #define RX_MPDU_INFO_TID_MASK 0x00078000 940*5113495bSYour Name 941*5113495bSYour Name 942*5113495bSYour Name /* Description RESERVED_7A 943*5113495bSYour Name 944*5113495bSYour Name <legal 0> 945*5113495bSYour Name */ 946*5113495bSYour Name 947*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_7A_OFFSET 0x0000001c 948*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_7A_LSB 19 949*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_7A_MSB 31 950*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_7A_MASK 0xfff80000 951*5113495bSYour Name 952*5113495bSYour Name 953*5113495bSYour Name /* Description PEER_META_DATA 954*5113495bSYour Name 955*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 956*5113495bSYour Name this field will be set to 0 957*5113495bSYour Name 958*5113495bSYour Name Meta data that SW has programmed in the Peer table entry 959*5113495bSYour Name of the transmitting STA. 960*5113495bSYour Name <legal all> 961*5113495bSYour Name */ 962*5113495bSYour Name 963*5113495bSYour Name #define RX_MPDU_INFO_PEER_META_DATA_OFFSET 0x00000020 964*5113495bSYour Name #define RX_MPDU_INFO_PEER_META_DATA_LSB 0 965*5113495bSYour Name #define RX_MPDU_INFO_PEER_META_DATA_MSB 31 966*5113495bSYour Name #define RX_MPDU_INFO_PEER_META_DATA_MASK 0xffffffff 967*5113495bSYour Name 968*5113495bSYour Name 969*5113495bSYour Name /* Description RXPCU_MPDU_FILTER_IN_CATEGORY 970*5113495bSYour Name 971*5113495bSYour Name Field indicates what the reason was that this MPDU frame 972*5113495bSYour Name was allowed to come into the receive path by RXPCU 973*5113495bSYour Name <enum 0 rxpcu_filter_pass> This MPDU passed the normal frame 974*5113495bSYour Name filter programming of rxpcu 975*5113495bSYour Name <enum 1 rxpcu_monitor_client> This MPDU did NOT pass the 976*5113495bSYour Name regular frame filter and would have been dropped, were 977*5113495bSYour Name it not for the frame fitting into the 'monitor_client' category. 978*5113495bSYour Name 979*5113495bSYour Name <enum 2 rxpcu_monitor_other> This MPDU did NOT pass the 980*5113495bSYour Name regular frame filter and also did not pass the rxpcu_monitor_client 981*5113495bSYour Name filter. It would have been dropped accept that it did pass 982*5113495bSYour Name the 'monitor_other' category. 983*5113495bSYour Name <enum 3 rxpcu_filter_pass_monitor_ovrd> This MPDU passed 984*5113495bSYour Name the normal frame filter programming of RXPCU but additionally 985*5113495bSYour Name fit into the 'monitor_override_client' category. 986*5113495bSYour Name 987*5113495bSYour Name Note: for ndp frame, if it was expected because the preceding 988*5113495bSYour Name NDPA was filter_pass, the setting rxpcu_filter_pass will 989*5113495bSYour Name be used. This setting will also be used for every ndp frame 990*5113495bSYour Name in case Promiscuous mode is enabled. 991*5113495bSYour Name 992*5113495bSYour Name In case promiscuous is not enabled, and an NDP is not preceded 993*5113495bSYour Name by a NPDA filter pass frame, the only other setting that 994*5113495bSYour Name could appear here for the NDP is rxpcu_monitor_other. 995*5113495bSYour Name (rxpcu has a configuration bit specifically for this scenario) 996*5113495bSYour Name 997*5113495bSYour Name 998*5113495bSYour Name Note: for 999*5113495bSYour Name <legal 0-3> 1000*5113495bSYour Name */ 1001*5113495bSYour Name 1002*5113495bSYour Name #define RX_MPDU_INFO_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET 0x00000024 1003*5113495bSYour Name #define RX_MPDU_INFO_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB 0 1004*5113495bSYour Name #define RX_MPDU_INFO_RXPCU_MPDU_FILTER_IN_CATEGORY_MSB 1 1005*5113495bSYour Name #define RX_MPDU_INFO_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK 0x00000003 1006*5113495bSYour Name 1007*5113495bSYour Name 1008*5113495bSYour Name /* Description SW_FRAME_GROUP_ID 1009*5113495bSYour Name 1010*5113495bSYour Name SW processes frames based on certain classifications. This 1011*5113495bSYour Name field indicates to what sw classification this MPDU is 1012*5113495bSYour Name mapped. 1013*5113495bSYour Name The classification is given in priority order 1014*5113495bSYour Name 1015*5113495bSYour Name <enum 0 sw_frame_group_NDP_frame> Note: The corresponding 1016*5113495bSYour Name Rxpcu_Mpdu_filter_in_category can be rxpcu_filter_pass 1017*5113495bSYour Name or rxpcu_monitor_other 1018*5113495bSYour Name 1019*5113495bSYour Name <enum 1 sw_frame_group_Multicast_data> 1020*5113495bSYour Name <enum 2 sw_frame_group_Unicast_data> 1021*5113495bSYour Name <enum 3 sw_frame_group_Null_data > This includes mpdus of 1022*5113495bSYour Name type Data Null. 1023*5113495bSYour Name Hamilton v1 included QoS Data Null as well here. 1024*5113495bSYour Name <enum 38 sw_frame_group_QoS_Null_data> This includes QoS 1025*5113495bSYour Name Null frames except in UL MU or TB PPDUs. 1026*5113495bSYour Name <enum 39 sw_frame_group_QoS_Null_data_TB> This includes 1027*5113495bSYour Name QoS Null frames in UL MU or TB PPDUs. 1028*5113495bSYour Name 1029*5113495bSYour Name <enum 4 sw_frame_group_mgmt_0000 > 1030*5113495bSYour Name <enum 5 sw_frame_group_mgmt_0001 > 1031*5113495bSYour Name <enum 6 sw_frame_group_mgmt_0010 > 1032*5113495bSYour Name <enum 7 sw_frame_group_mgmt_0011 > 1033*5113495bSYour Name <enum 8 sw_frame_group_mgmt_0100 > 1034*5113495bSYour Name <enum 9 sw_frame_group_mgmt_0101 > 1035*5113495bSYour Name <enum 10 sw_frame_group_mgmt_0110 > 1036*5113495bSYour Name <enum 11 sw_frame_group_mgmt_0111 > 1037*5113495bSYour Name <enum 12 sw_frame_group_mgmt_1000 > 1038*5113495bSYour Name <enum 13 sw_frame_group_mgmt_1001 > 1039*5113495bSYour Name <enum 14 sw_frame_group_mgmt_1010 > 1040*5113495bSYour Name <enum 15 sw_frame_group_mgmt_1011 > 1041*5113495bSYour Name <enum 16 sw_frame_group_mgmt_1100 > 1042*5113495bSYour Name <enum 17 sw_frame_group_mgmt_1101 > 1043*5113495bSYour Name <enum 18 sw_frame_group_mgmt_1110 > 1044*5113495bSYour Name <enum 19 sw_frame_group_mgmt_1111 > 1045*5113495bSYour Name 1046*5113495bSYour Name <enum 20 sw_frame_group_ctrl_0000 > 1047*5113495bSYour Name <enum 21 sw_frame_group_ctrl_0001 > 1048*5113495bSYour Name <enum 22 sw_frame_group_ctrl_0010 > 1049*5113495bSYour Name <enum 23 sw_frame_group_ctrl_0011 > 1050*5113495bSYour Name <enum 24 sw_frame_group_ctrl_0100 > 1051*5113495bSYour Name <enum 25 sw_frame_group_ctrl_0101 > 1052*5113495bSYour Name <enum 26 sw_frame_group_ctrl_0110 > 1053*5113495bSYour Name <enum 27 sw_frame_group_ctrl_0111 > 1054*5113495bSYour Name <enum 28 sw_frame_group_ctrl_1000 > 1055*5113495bSYour Name <enum 29 sw_frame_group_ctrl_1001 > 1056*5113495bSYour Name <enum 30 sw_frame_group_ctrl_1010 > 1057*5113495bSYour Name <enum 31 sw_frame_group_ctrl_1011 > 1058*5113495bSYour Name <enum 32 sw_frame_group_ctrl_1100 > 1059*5113495bSYour Name <enum 33 sw_frame_group_ctrl_1101 > 1060*5113495bSYour Name <enum 34 sw_frame_group_ctrl_1110 > 1061*5113495bSYour Name <enum 35 sw_frame_group_ctrl_1111 > 1062*5113495bSYour Name 1063*5113495bSYour Name <enum 36 sw_frame_group_unsupported> This covers type 3 1064*5113495bSYour Name and protocol version != 0 1065*5113495bSYour Name Note: The corresponding Rxpcu_Mpdu_filter_in_category can 1066*5113495bSYour Name only be rxpcu_monitor_other 1067*5113495bSYour Name 1068*5113495bSYour Name <enum 37 sw_frame_group_phy_error> PHY reported an error 1069*5113495bSYour Name 1070*5113495bSYour Name Note: The corresponding Rxpcu_Mpdu_filter_in_category can 1071*5113495bSYour Name be rxpcu_filter_pass 1072*5113495bSYour Name 1073*5113495bSYour Name <legal 0-39> 1074*5113495bSYour Name */ 1075*5113495bSYour Name 1076*5113495bSYour Name #define RX_MPDU_INFO_SW_FRAME_GROUP_ID_OFFSET 0x00000024 1077*5113495bSYour Name #define RX_MPDU_INFO_SW_FRAME_GROUP_ID_LSB 2 1078*5113495bSYour Name #define RX_MPDU_INFO_SW_FRAME_GROUP_ID_MSB 8 1079*5113495bSYour Name #define RX_MPDU_INFO_SW_FRAME_GROUP_ID_MASK 0x000001fc 1080*5113495bSYour Name 1081*5113495bSYour Name 1082*5113495bSYour Name /* Description NDP_FRAME 1083*5113495bSYour Name 1084*5113495bSYour Name When set, the received frame was an NDP frame, and thus 1085*5113495bSYour Name there will be no MPDU data. 1086*5113495bSYour Name TODO: Should this be extended to 2-bit e-num? 1087*5113495bSYour Name <legal all> 1088*5113495bSYour Name */ 1089*5113495bSYour Name 1090*5113495bSYour Name #define RX_MPDU_INFO_NDP_FRAME_OFFSET 0x00000024 1091*5113495bSYour Name #define RX_MPDU_INFO_NDP_FRAME_LSB 9 1092*5113495bSYour Name #define RX_MPDU_INFO_NDP_FRAME_MSB 9 1093*5113495bSYour Name #define RX_MPDU_INFO_NDP_FRAME_MASK 0x00000200 1094*5113495bSYour Name 1095*5113495bSYour Name 1096*5113495bSYour Name /* Description PHY_ERR 1097*5113495bSYour Name 1098*5113495bSYour Name When set, a PHY error was received before MAC received any 1099*5113495bSYour Name data, and thus there will be no MPDU data. 1100*5113495bSYour Name <legal all> 1101*5113495bSYour Name */ 1102*5113495bSYour Name 1103*5113495bSYour Name #define RX_MPDU_INFO_PHY_ERR_OFFSET 0x00000024 1104*5113495bSYour Name #define RX_MPDU_INFO_PHY_ERR_LSB 10 1105*5113495bSYour Name #define RX_MPDU_INFO_PHY_ERR_MSB 10 1106*5113495bSYour Name #define RX_MPDU_INFO_PHY_ERR_MASK 0x00000400 1107*5113495bSYour Name 1108*5113495bSYour Name 1109*5113495bSYour Name /* Description PHY_ERR_DURING_MPDU_HEADER 1110*5113495bSYour Name 1111*5113495bSYour Name When set, a PHY error was received before MAC received the 1112*5113495bSYour Name complete MPDU header which was needed for proper decoding 1113*5113495bSYour Name 1114*5113495bSYour Name <legal all> 1115*5113495bSYour Name */ 1116*5113495bSYour Name 1117*5113495bSYour Name #define RX_MPDU_INFO_PHY_ERR_DURING_MPDU_HEADER_OFFSET 0x00000024 1118*5113495bSYour Name #define RX_MPDU_INFO_PHY_ERR_DURING_MPDU_HEADER_LSB 11 1119*5113495bSYour Name #define RX_MPDU_INFO_PHY_ERR_DURING_MPDU_HEADER_MSB 11 1120*5113495bSYour Name #define RX_MPDU_INFO_PHY_ERR_DURING_MPDU_HEADER_MASK 0x00000800 1121*5113495bSYour Name 1122*5113495bSYour Name 1123*5113495bSYour Name /* Description PROTOCOL_VERSION_ERR 1124*5113495bSYour Name 1125*5113495bSYour Name Set when RXPCU detected a version error in the Frame control 1126*5113495bSYour Name field 1127*5113495bSYour Name <legal all> 1128*5113495bSYour Name */ 1129*5113495bSYour Name 1130*5113495bSYour Name #define RX_MPDU_INFO_PROTOCOL_VERSION_ERR_OFFSET 0x00000024 1131*5113495bSYour Name #define RX_MPDU_INFO_PROTOCOL_VERSION_ERR_LSB 12 1132*5113495bSYour Name #define RX_MPDU_INFO_PROTOCOL_VERSION_ERR_MSB 12 1133*5113495bSYour Name #define RX_MPDU_INFO_PROTOCOL_VERSION_ERR_MASK 0x00001000 1134*5113495bSYour Name 1135*5113495bSYour Name 1136*5113495bSYour Name /* Description AST_BASED_LOOKUP_VALID 1137*5113495bSYour Name 1138*5113495bSYour Name When set, AST based lookup for this frame has found a valid 1139*5113495bSYour Name result. 1140*5113495bSYour Name 1141*5113495bSYour Name Note that for NDP frame this will never be set 1142*5113495bSYour Name <legal all> 1143*5113495bSYour Name */ 1144*5113495bSYour Name 1145*5113495bSYour Name #define RX_MPDU_INFO_AST_BASED_LOOKUP_VALID_OFFSET 0x00000024 1146*5113495bSYour Name #define RX_MPDU_INFO_AST_BASED_LOOKUP_VALID_LSB 13 1147*5113495bSYour Name #define RX_MPDU_INFO_AST_BASED_LOOKUP_VALID_MSB 13 1148*5113495bSYour Name #define RX_MPDU_INFO_AST_BASED_LOOKUP_VALID_MASK 0x00002000 1149*5113495bSYour Name 1150*5113495bSYour Name 1151*5113495bSYour Name /* Description RANGING 1152*5113495bSYour Name 1153*5113495bSYour Name When set, a ranging NDPA or a ranging NDP was received. 1154*5113495bSYour Name 1155*5113495bSYour Name This field is only for FW visibility. HW is not expected 1156*5113495bSYour Name to take any action on this. 1157*5113495bSYour Name <legal all> 1158*5113495bSYour Name */ 1159*5113495bSYour Name 1160*5113495bSYour Name #define RX_MPDU_INFO_RANGING_OFFSET 0x00000024 1161*5113495bSYour Name #define RX_MPDU_INFO_RANGING_LSB 14 1162*5113495bSYour Name #define RX_MPDU_INFO_RANGING_MSB 14 1163*5113495bSYour Name #define RX_MPDU_INFO_RANGING_MASK 0x00004000 1164*5113495bSYour Name 1165*5113495bSYour Name 1166*5113495bSYour Name /* Description RESERVED_9A 1167*5113495bSYour Name 1168*5113495bSYour Name <legal 0> 1169*5113495bSYour Name */ 1170*5113495bSYour Name 1171*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_9A_OFFSET 0x00000024 1172*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_9A_LSB 15 1173*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_9A_MSB 15 1174*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_9A_MASK 0x00008000 1175*5113495bSYour Name 1176*5113495bSYour Name 1177*5113495bSYour Name /* Description PHY_PPDU_ID 1178*5113495bSYour Name 1179*5113495bSYour Name A ppdu counter value that PHY increments for every PPDU 1180*5113495bSYour Name received. The counter value wraps around 1181*5113495bSYour Name <legal all> 1182*5113495bSYour Name */ 1183*5113495bSYour Name 1184*5113495bSYour Name #define RX_MPDU_INFO_PHY_PPDU_ID_OFFSET 0x00000024 1185*5113495bSYour Name #define RX_MPDU_INFO_PHY_PPDU_ID_LSB 16 1186*5113495bSYour Name #define RX_MPDU_INFO_PHY_PPDU_ID_MSB 31 1187*5113495bSYour Name #define RX_MPDU_INFO_PHY_PPDU_ID_MASK 0xffff0000 1188*5113495bSYour Name 1189*5113495bSYour Name 1190*5113495bSYour Name /* Description AST_INDEX 1191*5113495bSYour Name 1192*5113495bSYour Name This field indicates the index of the AST entry corresponding 1193*5113495bSYour Name to this MPDU. It is provided by the GSE module instantiated 1194*5113495bSYour Name in RXPCU. 1195*5113495bSYour Name A value of 0xFFFF indicates an invalid AST index, meaning 1196*5113495bSYour Name that No AST entry was found or NO AST search was performed 1197*5113495bSYour Name 1198*5113495bSYour Name 1199*5113495bSYour Name In case of ndp or phy_err, this field will be set to 0xFFFF 1200*5113495bSYour Name 1201*5113495bSYour Name <legal all> 1202*5113495bSYour Name */ 1203*5113495bSYour Name 1204*5113495bSYour Name #define RX_MPDU_INFO_AST_INDEX_OFFSET 0x00000028 1205*5113495bSYour Name #define RX_MPDU_INFO_AST_INDEX_LSB 0 1206*5113495bSYour Name #define RX_MPDU_INFO_AST_INDEX_MSB 15 1207*5113495bSYour Name #define RX_MPDU_INFO_AST_INDEX_MASK 0x0000ffff 1208*5113495bSYour Name 1209*5113495bSYour Name 1210*5113495bSYour Name /* Description SW_PEER_ID 1211*5113495bSYour Name 1212*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1213*5113495bSYour Name this field will be set to 0 1214*5113495bSYour Name 1215*5113495bSYour Name This field indicates a unique peer identifier. It is set 1216*5113495bSYour Name equal to field 'sw_peer_id' from the AST entry 1217*5113495bSYour Name 1218*5113495bSYour Name <legal all> 1219*5113495bSYour Name */ 1220*5113495bSYour Name 1221*5113495bSYour Name #define RX_MPDU_INFO_SW_PEER_ID_OFFSET 0x00000028 1222*5113495bSYour Name #define RX_MPDU_INFO_SW_PEER_ID_LSB 16 1223*5113495bSYour Name #define RX_MPDU_INFO_SW_PEER_ID_MSB 31 1224*5113495bSYour Name #define RX_MPDU_INFO_SW_PEER_ID_MASK 0xffff0000 1225*5113495bSYour Name 1226*5113495bSYour Name 1227*5113495bSYour Name /* Description MPDU_FRAME_CONTROL_VALID 1228*5113495bSYour Name 1229*5113495bSYour Name When set, the field Mpdu_Frame_control_field has valid information 1230*5113495bSYour Name 1231*5113495bSYour Name 1232*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1233*5113495bSYour Name 1234*5113495bSYour Name <legal all> 1235*5113495bSYour Name */ 1236*5113495bSYour Name 1237*5113495bSYour Name #define RX_MPDU_INFO_MPDU_FRAME_CONTROL_VALID_OFFSET 0x0000002c 1238*5113495bSYour Name #define RX_MPDU_INFO_MPDU_FRAME_CONTROL_VALID_LSB 0 1239*5113495bSYour Name #define RX_MPDU_INFO_MPDU_FRAME_CONTROL_VALID_MSB 0 1240*5113495bSYour Name #define RX_MPDU_INFO_MPDU_FRAME_CONTROL_VALID_MASK 0x00000001 1241*5113495bSYour Name 1242*5113495bSYour Name 1243*5113495bSYour Name /* Description MPDU_DURATION_VALID 1244*5113495bSYour Name 1245*5113495bSYour Name When set, the field Mpdu_duration_field has valid information 1246*5113495bSYour Name 1247*5113495bSYour Name 1248*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1249*5113495bSYour Name 1250*5113495bSYour Name <legal all> 1251*5113495bSYour Name */ 1252*5113495bSYour Name 1253*5113495bSYour Name #define RX_MPDU_INFO_MPDU_DURATION_VALID_OFFSET 0x0000002c 1254*5113495bSYour Name #define RX_MPDU_INFO_MPDU_DURATION_VALID_LSB 1 1255*5113495bSYour Name #define RX_MPDU_INFO_MPDU_DURATION_VALID_MSB 1 1256*5113495bSYour Name #define RX_MPDU_INFO_MPDU_DURATION_VALID_MASK 0x00000002 1257*5113495bSYour Name 1258*5113495bSYour Name 1259*5113495bSYour Name /* Description MAC_ADDR_AD1_VALID 1260*5113495bSYour Name 1261*5113495bSYour Name When set, the fields mac_addr_ad1_..... have valid information 1262*5113495bSYour Name 1263*5113495bSYour Name 1264*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1265*5113495bSYour Name 1266*5113495bSYour Name <legal all> 1267*5113495bSYour Name */ 1268*5113495bSYour Name 1269*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD1_VALID_OFFSET 0x0000002c 1270*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD1_VALID_LSB 2 1271*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD1_VALID_MSB 2 1272*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD1_VALID_MASK 0x00000004 1273*5113495bSYour Name 1274*5113495bSYour Name 1275*5113495bSYour Name /* Description MAC_ADDR_AD2_VALID 1276*5113495bSYour Name 1277*5113495bSYour Name When set, the fields mac_addr_ad2_..... have valid information 1278*5113495bSYour Name 1279*5113495bSYour Name 1280*5113495bSYour Name For MPDUs without Address 2, this field will not be set. 1281*5113495bSYour Name 1282*5113495bSYour Name 1283*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1284*5113495bSYour Name 1285*5113495bSYour Name <legal all> 1286*5113495bSYour Name */ 1287*5113495bSYour Name 1288*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD2_VALID_OFFSET 0x0000002c 1289*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD2_VALID_LSB 3 1290*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD2_VALID_MSB 3 1291*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD2_VALID_MASK 0x00000008 1292*5113495bSYour Name 1293*5113495bSYour Name 1294*5113495bSYour Name /* Description MAC_ADDR_AD3_VALID 1295*5113495bSYour Name 1296*5113495bSYour Name When set, the fields mac_addr_ad3_..... have valid information 1297*5113495bSYour Name 1298*5113495bSYour Name 1299*5113495bSYour Name For MPDUs without Address 3, this field will not be set. 1300*5113495bSYour Name 1301*5113495bSYour Name 1302*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1303*5113495bSYour Name 1304*5113495bSYour Name <legal all> 1305*5113495bSYour Name */ 1306*5113495bSYour Name 1307*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD3_VALID_OFFSET 0x0000002c 1308*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD3_VALID_LSB 4 1309*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD3_VALID_MSB 4 1310*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD3_VALID_MASK 0x00000010 1311*5113495bSYour Name 1312*5113495bSYour Name 1313*5113495bSYour Name /* Description MAC_ADDR_AD4_VALID 1314*5113495bSYour Name 1315*5113495bSYour Name When set, the fields mac_addr_ad4_..... have valid information 1316*5113495bSYour Name 1317*5113495bSYour Name 1318*5113495bSYour Name For MPDUs without Address 4, this field will not be set. 1319*5113495bSYour Name 1320*5113495bSYour Name 1321*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1322*5113495bSYour Name 1323*5113495bSYour Name <legal all> 1324*5113495bSYour Name */ 1325*5113495bSYour Name 1326*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD4_VALID_OFFSET 0x0000002c 1327*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD4_VALID_LSB 5 1328*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD4_VALID_MSB 5 1329*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD4_VALID_MASK 0x00000020 1330*5113495bSYour Name 1331*5113495bSYour Name 1332*5113495bSYour Name /* Description MPDU_SEQUENCE_CONTROL_VALID 1333*5113495bSYour Name 1334*5113495bSYour Name When set, the fields mpdu_sequence_control_field and mpdu_sequence_number 1335*5113495bSYour Name have valid information as well as field 1336*5113495bSYour Name 1337*5113495bSYour Name For MPDUs without a sequence control field, this field will 1338*5113495bSYour Name not be set. 1339*5113495bSYour Name 1340*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1341*5113495bSYour Name 1342*5113495bSYour Name <legal all> 1343*5113495bSYour Name */ 1344*5113495bSYour Name 1345*5113495bSYour Name #define RX_MPDU_INFO_MPDU_SEQUENCE_CONTROL_VALID_OFFSET 0x0000002c 1346*5113495bSYour Name #define RX_MPDU_INFO_MPDU_SEQUENCE_CONTROL_VALID_LSB 6 1347*5113495bSYour Name #define RX_MPDU_INFO_MPDU_SEQUENCE_CONTROL_VALID_MSB 6 1348*5113495bSYour Name #define RX_MPDU_INFO_MPDU_SEQUENCE_CONTROL_VALID_MASK 0x00000040 1349*5113495bSYour Name 1350*5113495bSYour Name 1351*5113495bSYour Name /* Description MPDU_QOS_CONTROL_VALID 1352*5113495bSYour Name 1353*5113495bSYour Name When set, the field mpdu_qos_control_field has valid information 1354*5113495bSYour Name 1355*5113495bSYour Name 1356*5113495bSYour Name For MPDUs without a QoS control field, this field will not 1357*5113495bSYour Name be set. 1358*5113495bSYour Name 1359*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1360*5113495bSYour Name 1361*5113495bSYour Name <legal all> 1362*5113495bSYour Name */ 1363*5113495bSYour Name 1364*5113495bSYour Name #define RX_MPDU_INFO_MPDU_QOS_CONTROL_VALID_OFFSET 0x0000002c 1365*5113495bSYour Name #define RX_MPDU_INFO_MPDU_QOS_CONTROL_VALID_LSB 7 1366*5113495bSYour Name #define RX_MPDU_INFO_MPDU_QOS_CONTROL_VALID_MSB 7 1367*5113495bSYour Name #define RX_MPDU_INFO_MPDU_QOS_CONTROL_VALID_MASK 0x00000080 1368*5113495bSYour Name 1369*5113495bSYour Name 1370*5113495bSYour Name /* Description MPDU_HT_CONTROL_VALID 1371*5113495bSYour Name 1372*5113495bSYour Name When set, the field mpdu_HT_control_field has valid information 1373*5113495bSYour Name 1374*5113495bSYour Name 1375*5113495bSYour Name For MPDUs without a HT control field, this field will not 1376*5113495bSYour Name be set. 1377*5113495bSYour Name 1378*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1379*5113495bSYour Name 1380*5113495bSYour Name <legal all> 1381*5113495bSYour Name */ 1382*5113495bSYour Name 1383*5113495bSYour Name #define RX_MPDU_INFO_MPDU_HT_CONTROL_VALID_OFFSET 0x0000002c 1384*5113495bSYour Name #define RX_MPDU_INFO_MPDU_HT_CONTROL_VALID_LSB 8 1385*5113495bSYour Name #define RX_MPDU_INFO_MPDU_HT_CONTROL_VALID_MSB 8 1386*5113495bSYour Name #define RX_MPDU_INFO_MPDU_HT_CONTROL_VALID_MASK 0x00000100 1387*5113495bSYour Name 1388*5113495bSYour Name 1389*5113495bSYour Name /* Description FRAME_ENCRYPTION_INFO_VALID 1390*5113495bSYour Name 1391*5113495bSYour Name When set, the encryption related info fields, like IV and 1392*5113495bSYour Name PN are valid 1393*5113495bSYour Name 1394*5113495bSYour Name For MPDUs that are not encrypted, this will not be set. 1395*5113495bSYour Name 1396*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1397*5113495bSYour Name 1398*5113495bSYour Name <legal all> 1399*5113495bSYour Name */ 1400*5113495bSYour Name 1401*5113495bSYour Name #define RX_MPDU_INFO_FRAME_ENCRYPTION_INFO_VALID_OFFSET 0x0000002c 1402*5113495bSYour Name #define RX_MPDU_INFO_FRAME_ENCRYPTION_INFO_VALID_LSB 9 1403*5113495bSYour Name #define RX_MPDU_INFO_FRAME_ENCRYPTION_INFO_VALID_MSB 9 1404*5113495bSYour Name #define RX_MPDU_INFO_FRAME_ENCRYPTION_INFO_VALID_MASK 0x00000200 1405*5113495bSYour Name 1406*5113495bSYour Name 1407*5113495bSYour Name /* Description MPDU_FRAGMENT_NUMBER 1408*5113495bSYour Name 1409*5113495bSYour Name Field only valid when Mpdu_sequence_control_valid is set 1410*5113495bSYour Name AND Fragment_flag is set 1411*5113495bSYour Name 1412*5113495bSYour Name The fragment number from the 802.11 header 1413*5113495bSYour Name 1414*5113495bSYour Name <legal all> 1415*5113495bSYour Name */ 1416*5113495bSYour Name 1417*5113495bSYour Name #define RX_MPDU_INFO_MPDU_FRAGMENT_NUMBER_OFFSET 0x0000002c 1418*5113495bSYour Name #define RX_MPDU_INFO_MPDU_FRAGMENT_NUMBER_LSB 10 1419*5113495bSYour Name #define RX_MPDU_INFO_MPDU_FRAGMENT_NUMBER_MSB 13 1420*5113495bSYour Name #define RX_MPDU_INFO_MPDU_FRAGMENT_NUMBER_MASK 0x00003c00 1421*5113495bSYour Name 1422*5113495bSYour Name 1423*5113495bSYour Name /* Description MORE_FRAGMENT_FLAG 1424*5113495bSYour Name 1425*5113495bSYour Name The More Fragment bit setting from the MPDU header of the 1426*5113495bSYour Name received frame 1427*5113495bSYour Name 1428*5113495bSYour Name <legal all> 1429*5113495bSYour Name */ 1430*5113495bSYour Name 1431*5113495bSYour Name #define RX_MPDU_INFO_MORE_FRAGMENT_FLAG_OFFSET 0x0000002c 1432*5113495bSYour Name #define RX_MPDU_INFO_MORE_FRAGMENT_FLAG_LSB 14 1433*5113495bSYour Name #define RX_MPDU_INFO_MORE_FRAGMENT_FLAG_MSB 14 1434*5113495bSYour Name #define RX_MPDU_INFO_MORE_FRAGMENT_FLAG_MASK 0x00004000 1435*5113495bSYour Name 1436*5113495bSYour Name 1437*5113495bSYour Name /* Description RESERVED_11A 1438*5113495bSYour Name 1439*5113495bSYour Name <legal 0> 1440*5113495bSYour Name */ 1441*5113495bSYour Name 1442*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_11A_OFFSET 0x0000002c 1443*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_11A_LSB 15 1444*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_11A_MSB 15 1445*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_11A_MASK 0x00008000 1446*5113495bSYour Name 1447*5113495bSYour Name 1448*5113495bSYour Name /* Description FR_DS 1449*5113495bSYour Name 1450*5113495bSYour Name Field only valid when Mpdu_frame_control_valid is set 1451*5113495bSYour Name 1452*5113495bSYour Name Set if the from DS bit is set in the frame control. 1453*5113495bSYour Name <legal all> 1454*5113495bSYour Name */ 1455*5113495bSYour Name 1456*5113495bSYour Name #define RX_MPDU_INFO_FR_DS_OFFSET 0x0000002c 1457*5113495bSYour Name #define RX_MPDU_INFO_FR_DS_LSB 16 1458*5113495bSYour Name #define RX_MPDU_INFO_FR_DS_MSB 16 1459*5113495bSYour Name #define RX_MPDU_INFO_FR_DS_MASK 0x00010000 1460*5113495bSYour Name 1461*5113495bSYour Name 1462*5113495bSYour Name /* Description TO_DS 1463*5113495bSYour Name 1464*5113495bSYour Name Field only valid when Mpdu_frame_control_valid is set 1465*5113495bSYour Name 1466*5113495bSYour Name Set if the to DS bit is set in the frame control. 1467*5113495bSYour Name <legal all> 1468*5113495bSYour Name */ 1469*5113495bSYour Name 1470*5113495bSYour Name #define RX_MPDU_INFO_TO_DS_OFFSET 0x0000002c 1471*5113495bSYour Name #define RX_MPDU_INFO_TO_DS_LSB 17 1472*5113495bSYour Name #define RX_MPDU_INFO_TO_DS_MSB 17 1473*5113495bSYour Name #define RX_MPDU_INFO_TO_DS_MASK 0x00020000 1474*5113495bSYour Name 1475*5113495bSYour Name 1476*5113495bSYour Name /* Description ENCRYPTED 1477*5113495bSYour Name 1478*5113495bSYour Name Field only valid when Mpdu_frame_control_valid is set. 1479*5113495bSYour Name 1480*5113495bSYour Name Protected bit from the frame control. 1481*5113495bSYour Name <legal all> 1482*5113495bSYour Name */ 1483*5113495bSYour Name 1484*5113495bSYour Name #define RX_MPDU_INFO_ENCRYPTED_OFFSET 0x0000002c 1485*5113495bSYour Name #define RX_MPDU_INFO_ENCRYPTED_LSB 18 1486*5113495bSYour Name #define RX_MPDU_INFO_ENCRYPTED_MSB 18 1487*5113495bSYour Name #define RX_MPDU_INFO_ENCRYPTED_MASK 0x00040000 1488*5113495bSYour Name 1489*5113495bSYour Name 1490*5113495bSYour Name /* Description MPDU_RETRY 1491*5113495bSYour Name 1492*5113495bSYour Name Field only valid when Mpdu_frame_control_valid is set. 1493*5113495bSYour Name 1494*5113495bSYour Name Retry bit from the frame control. Only valid when first_msdu 1495*5113495bSYour Name is set. 1496*5113495bSYour Name <legal all> 1497*5113495bSYour Name */ 1498*5113495bSYour Name 1499*5113495bSYour Name #define RX_MPDU_INFO_MPDU_RETRY_OFFSET 0x0000002c 1500*5113495bSYour Name #define RX_MPDU_INFO_MPDU_RETRY_LSB 19 1501*5113495bSYour Name #define RX_MPDU_INFO_MPDU_RETRY_MSB 19 1502*5113495bSYour Name #define RX_MPDU_INFO_MPDU_RETRY_MASK 0x00080000 1503*5113495bSYour Name 1504*5113495bSYour Name 1505*5113495bSYour Name /* Description MPDU_SEQUENCE_NUMBER 1506*5113495bSYour Name 1507*5113495bSYour Name Field only valid when Mpdu_sequence_control_valid is set. 1508*5113495bSYour Name 1509*5113495bSYour Name 1510*5113495bSYour Name The sequence number from the 802.11 header. 1511*5113495bSYour Name <legal all> 1512*5113495bSYour Name */ 1513*5113495bSYour Name 1514*5113495bSYour Name #define RX_MPDU_INFO_MPDU_SEQUENCE_NUMBER_OFFSET 0x0000002c 1515*5113495bSYour Name #define RX_MPDU_INFO_MPDU_SEQUENCE_NUMBER_LSB 20 1516*5113495bSYour Name #define RX_MPDU_INFO_MPDU_SEQUENCE_NUMBER_MSB 31 1517*5113495bSYour Name #define RX_MPDU_INFO_MPDU_SEQUENCE_NUMBER_MASK 0xfff00000 1518*5113495bSYour Name 1519*5113495bSYour Name 1520*5113495bSYour Name /* Description KEY_ID_OCTET 1521*5113495bSYour Name 1522*5113495bSYour Name Field only valid when Frame_encryption_info_valid is set 1523*5113495bSYour Name 1524*5113495bSYour Name 1525*5113495bSYour Name The key ID octet from the IV. 1526*5113495bSYour Name 1527*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1528*5113495bSYour Name this field will be set to 0 1529*5113495bSYour Name <legal all> 1530*5113495bSYour Name */ 1531*5113495bSYour Name 1532*5113495bSYour Name #define RX_MPDU_INFO_KEY_ID_OCTET_OFFSET 0x00000030 1533*5113495bSYour Name #define RX_MPDU_INFO_KEY_ID_OCTET_LSB 0 1534*5113495bSYour Name #define RX_MPDU_INFO_KEY_ID_OCTET_MSB 7 1535*5113495bSYour Name #define RX_MPDU_INFO_KEY_ID_OCTET_MASK 0x000000ff 1536*5113495bSYour Name 1537*5113495bSYour Name 1538*5113495bSYour Name /* Description NEW_PEER_ENTRY 1539*5113495bSYour Name 1540*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1541*5113495bSYour Name this field will be set to 0 1542*5113495bSYour Name 1543*5113495bSYour Name Set if new RX_PEER_ENTRY TLV follows. If clear, RX_PEER_ENTRY 1544*5113495bSYour Name doesn't follow so RX DECRYPTION module either uses old 1545*5113495bSYour Name peer entry or not decrypt. 1546*5113495bSYour Name <legal all> 1547*5113495bSYour Name */ 1548*5113495bSYour Name 1549*5113495bSYour Name #define RX_MPDU_INFO_NEW_PEER_ENTRY_OFFSET 0x00000030 1550*5113495bSYour Name #define RX_MPDU_INFO_NEW_PEER_ENTRY_LSB 8 1551*5113495bSYour Name #define RX_MPDU_INFO_NEW_PEER_ENTRY_MSB 8 1552*5113495bSYour Name #define RX_MPDU_INFO_NEW_PEER_ENTRY_MASK 0x00000100 1553*5113495bSYour Name 1554*5113495bSYour Name 1555*5113495bSYour Name /* Description DECRYPT_NEEDED 1556*5113495bSYour Name 1557*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1558*5113495bSYour Name this field will be set to 0 1559*5113495bSYour Name 1560*5113495bSYour Name Set if decryption is needed. 1561*5113495bSYour Name 1562*5113495bSYour Name Note: 1563*5113495bSYour Name When RXPCU sets bit 'ast_index_not_found' and/or ast_index_timeout', 1564*5113495bSYour Name RXPCU will also ensure that this bit is NOT set 1565*5113495bSYour Name CRYPTO for that reason only needs to evaluate this bit and 1566*5113495bSYour Name non of the other ones. 1567*5113495bSYour Name <legal all> 1568*5113495bSYour Name */ 1569*5113495bSYour Name 1570*5113495bSYour Name #define RX_MPDU_INFO_DECRYPT_NEEDED_OFFSET 0x00000030 1571*5113495bSYour Name #define RX_MPDU_INFO_DECRYPT_NEEDED_LSB 9 1572*5113495bSYour Name #define RX_MPDU_INFO_DECRYPT_NEEDED_MSB 9 1573*5113495bSYour Name #define RX_MPDU_INFO_DECRYPT_NEEDED_MASK 0x00000200 1574*5113495bSYour Name 1575*5113495bSYour Name 1576*5113495bSYour Name /* Description DECAP_TYPE 1577*5113495bSYour Name 1578*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1579*5113495bSYour Name this field will be set to 0 1580*5113495bSYour Name 1581*5113495bSYour Name Used by the OLE during decapsulation. 1582*5113495bSYour Name 1583*5113495bSYour Name Indicates the decapsulation that HW will perform: 1584*5113495bSYour Name 1585*5113495bSYour Name <enum 0 RAW> No encapsulation 1586*5113495bSYour Name <enum 1 Native_WiFi> 1587*5113495bSYour Name <enum 2 Ethernet> Ethernet 2 (DIX) or 802.3 (uses SNAP/LLC) 1588*5113495bSYour Name 1589*5113495bSYour Name <enum 3 802_3> Indicate Ethernet 1590*5113495bSYour Name 1591*5113495bSYour Name <legal all> 1592*5113495bSYour Name */ 1593*5113495bSYour Name 1594*5113495bSYour Name #define RX_MPDU_INFO_DECAP_TYPE_OFFSET 0x00000030 1595*5113495bSYour Name #define RX_MPDU_INFO_DECAP_TYPE_LSB 10 1596*5113495bSYour Name #define RX_MPDU_INFO_DECAP_TYPE_MSB 11 1597*5113495bSYour Name #define RX_MPDU_INFO_DECAP_TYPE_MASK 0x00000c00 1598*5113495bSYour Name 1599*5113495bSYour Name 1600*5113495bSYour Name /* Description RX_INSERT_VLAN_C_TAG_PADDING 1601*5113495bSYour Name 1602*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1603*5113495bSYour Name this field will be set to 0 1604*5113495bSYour Name 1605*5113495bSYour Name Insert 4 byte of all zeros as VLAN tag if the rx payload 1606*5113495bSYour Name does not have VLAN. Used during decapsulation. 1607*5113495bSYour Name <legal all> 1608*5113495bSYour Name */ 1609*5113495bSYour Name 1610*5113495bSYour Name #define RX_MPDU_INFO_RX_INSERT_VLAN_C_TAG_PADDING_OFFSET 0x00000030 1611*5113495bSYour Name #define RX_MPDU_INFO_RX_INSERT_VLAN_C_TAG_PADDING_LSB 12 1612*5113495bSYour Name #define RX_MPDU_INFO_RX_INSERT_VLAN_C_TAG_PADDING_MSB 12 1613*5113495bSYour Name #define RX_MPDU_INFO_RX_INSERT_VLAN_C_TAG_PADDING_MASK 0x00001000 1614*5113495bSYour Name 1615*5113495bSYour Name 1616*5113495bSYour Name /* Description RX_INSERT_VLAN_S_TAG_PADDING 1617*5113495bSYour Name 1618*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1619*5113495bSYour Name this field will be set to 0 1620*5113495bSYour Name 1621*5113495bSYour Name Insert 4 byte of all zeros as double VLAN tag if the rx 1622*5113495bSYour Name payload does not have VLAN. Used during 1623*5113495bSYour Name <legal all> 1624*5113495bSYour Name */ 1625*5113495bSYour Name 1626*5113495bSYour Name #define RX_MPDU_INFO_RX_INSERT_VLAN_S_TAG_PADDING_OFFSET 0x00000030 1627*5113495bSYour Name #define RX_MPDU_INFO_RX_INSERT_VLAN_S_TAG_PADDING_LSB 13 1628*5113495bSYour Name #define RX_MPDU_INFO_RX_INSERT_VLAN_S_TAG_PADDING_MSB 13 1629*5113495bSYour Name #define RX_MPDU_INFO_RX_INSERT_VLAN_S_TAG_PADDING_MASK 0x00002000 1630*5113495bSYour Name 1631*5113495bSYour Name 1632*5113495bSYour Name /* Description STRIP_VLAN_C_TAG_DECAP 1633*5113495bSYour Name 1634*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1635*5113495bSYour Name this field will be set to 0 1636*5113495bSYour Name 1637*5113495bSYour Name Strip the VLAN during decapsulation. Used by the OLE. 1638*5113495bSYour Name <legal all> 1639*5113495bSYour Name */ 1640*5113495bSYour Name 1641*5113495bSYour Name #define RX_MPDU_INFO_STRIP_VLAN_C_TAG_DECAP_OFFSET 0x00000030 1642*5113495bSYour Name #define RX_MPDU_INFO_STRIP_VLAN_C_TAG_DECAP_LSB 14 1643*5113495bSYour Name #define RX_MPDU_INFO_STRIP_VLAN_C_TAG_DECAP_MSB 14 1644*5113495bSYour Name #define RX_MPDU_INFO_STRIP_VLAN_C_TAG_DECAP_MASK 0x00004000 1645*5113495bSYour Name 1646*5113495bSYour Name 1647*5113495bSYour Name /* Description STRIP_VLAN_S_TAG_DECAP 1648*5113495bSYour Name 1649*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1650*5113495bSYour Name this field will be set to 0 1651*5113495bSYour Name 1652*5113495bSYour Name Strip the double VLAN during decapsulation. Used by the 1653*5113495bSYour Name OLE. 1654*5113495bSYour Name <legal all> 1655*5113495bSYour Name */ 1656*5113495bSYour Name 1657*5113495bSYour Name #define RX_MPDU_INFO_STRIP_VLAN_S_TAG_DECAP_OFFSET 0x00000030 1658*5113495bSYour Name #define RX_MPDU_INFO_STRIP_VLAN_S_TAG_DECAP_LSB 15 1659*5113495bSYour Name #define RX_MPDU_INFO_STRIP_VLAN_S_TAG_DECAP_MSB 15 1660*5113495bSYour Name #define RX_MPDU_INFO_STRIP_VLAN_S_TAG_DECAP_MASK 0x00008000 1661*5113495bSYour Name 1662*5113495bSYour Name 1663*5113495bSYour Name /* Description PRE_DELIM_COUNT 1664*5113495bSYour Name 1665*5113495bSYour Name The number of delimiters before this MPDU. 1666*5113495bSYour Name 1667*5113495bSYour Name Note that this number is cleared at PPDU start. 1668*5113495bSYour Name 1669*5113495bSYour Name If this MPDU is the first received MPDU in the PPDU and 1670*5113495bSYour Name this MPDU gets filtered-in, this field will indicate the 1671*5113495bSYour Name number of delimiters located after the last MPDU in the 1672*5113495bSYour Name previous PPDU. 1673*5113495bSYour Name 1674*5113495bSYour Name If this MPDU is located after the first received MPDU in 1675*5113495bSYour Name an PPDU, this field will indicate the number of delimiters 1676*5113495bSYour Name located between the previous MPDU and this MPDU. 1677*5113495bSYour Name 1678*5113495bSYour Name In case of ndp or phy_err, this field will indicate the 1679*5113495bSYour Name number of delimiters located after the last MPDU in the 1680*5113495bSYour Name previous PPDU. 1681*5113495bSYour Name <legal all> 1682*5113495bSYour Name */ 1683*5113495bSYour Name 1684*5113495bSYour Name #define RX_MPDU_INFO_PRE_DELIM_COUNT_OFFSET 0x00000030 1685*5113495bSYour Name #define RX_MPDU_INFO_PRE_DELIM_COUNT_LSB 16 1686*5113495bSYour Name #define RX_MPDU_INFO_PRE_DELIM_COUNT_MSB 27 1687*5113495bSYour Name #define RX_MPDU_INFO_PRE_DELIM_COUNT_MASK 0x0fff0000 1688*5113495bSYour Name 1689*5113495bSYour Name 1690*5113495bSYour Name /* Description AMPDU_FLAG 1691*5113495bSYour Name 1692*5113495bSYour Name When set, received frame was part of an A-MPDU. 1693*5113495bSYour Name 1694*5113495bSYour Name In case of ndp or phy_err, this field will never be set. 1695*5113495bSYour Name 1696*5113495bSYour Name <legal all> 1697*5113495bSYour Name */ 1698*5113495bSYour Name 1699*5113495bSYour Name #define RX_MPDU_INFO_AMPDU_FLAG_OFFSET 0x00000030 1700*5113495bSYour Name #define RX_MPDU_INFO_AMPDU_FLAG_LSB 28 1701*5113495bSYour Name #define RX_MPDU_INFO_AMPDU_FLAG_MSB 28 1702*5113495bSYour Name #define RX_MPDU_INFO_AMPDU_FLAG_MASK 0x10000000 1703*5113495bSYour Name 1704*5113495bSYour Name 1705*5113495bSYour Name /* Description BAR_FRAME 1706*5113495bSYour Name 1707*5113495bSYour Name In case of ndp or phy_err or AST_based_lookup_valid == 0, 1708*5113495bSYour Name this field will be set to 0 1709*5113495bSYour Name 1710*5113495bSYour Name When set, received frame is a BAR frame 1711*5113495bSYour Name <legal all> 1712*5113495bSYour Name */ 1713*5113495bSYour Name 1714*5113495bSYour Name #define RX_MPDU_INFO_BAR_FRAME_OFFSET 0x00000030 1715*5113495bSYour Name #define RX_MPDU_INFO_BAR_FRAME_LSB 29 1716*5113495bSYour Name #define RX_MPDU_INFO_BAR_FRAME_MSB 29 1717*5113495bSYour Name #define RX_MPDU_INFO_BAR_FRAME_MASK 0x20000000 1718*5113495bSYour Name 1719*5113495bSYour Name 1720*5113495bSYour Name /* Description RAW_MPDU 1721*5113495bSYour Name 1722*5113495bSYour Name Consumer: SW 1723*5113495bSYour Name Producer: RXOLE 1724*5113495bSYour Name 1725*5113495bSYour Name RXPCU sets this field to 0 and RXOLE overwrites it. 1726*5113495bSYour Name 1727*5113495bSYour Name Set to 1 by RXOLE when it has not performed any 802.11 to 1728*5113495bSYour Name Ethernet/Natvie WiFi header conversion on this MPDU. 1729*5113495bSYour Name <legal all> 1730*5113495bSYour Name */ 1731*5113495bSYour Name 1732*5113495bSYour Name #define RX_MPDU_INFO_RAW_MPDU_OFFSET 0x00000030 1733*5113495bSYour Name #define RX_MPDU_INFO_RAW_MPDU_LSB 30 1734*5113495bSYour Name #define RX_MPDU_INFO_RAW_MPDU_MSB 30 1735*5113495bSYour Name #define RX_MPDU_INFO_RAW_MPDU_MASK 0x40000000 1736*5113495bSYour Name 1737*5113495bSYour Name 1738*5113495bSYour Name /* Description RESERVED_12 1739*5113495bSYour Name 1740*5113495bSYour Name <legal 0> 1741*5113495bSYour Name */ 1742*5113495bSYour Name 1743*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_12_OFFSET 0x00000030 1744*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_12_LSB 31 1745*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_12_MSB 31 1746*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_12_MASK 0x80000000 1747*5113495bSYour Name 1748*5113495bSYour Name 1749*5113495bSYour Name /* Description MPDU_LENGTH 1750*5113495bSYour Name 1751*5113495bSYour Name In case of ndp or phy_err this field will be set to 0 1752*5113495bSYour Name 1753*5113495bSYour Name MPDU length before decapsulation. 1754*5113495bSYour Name <legal all> 1755*5113495bSYour Name */ 1756*5113495bSYour Name 1757*5113495bSYour Name #define RX_MPDU_INFO_MPDU_LENGTH_OFFSET 0x00000034 1758*5113495bSYour Name #define RX_MPDU_INFO_MPDU_LENGTH_LSB 0 1759*5113495bSYour Name #define RX_MPDU_INFO_MPDU_LENGTH_MSB 13 1760*5113495bSYour Name #define RX_MPDU_INFO_MPDU_LENGTH_MASK 0x00003fff 1761*5113495bSYour Name 1762*5113495bSYour Name 1763*5113495bSYour Name /* Description FIRST_MPDU 1764*5113495bSYour Name 1765*5113495bSYour Name See definition in RX attention descriptor 1766*5113495bSYour Name 1767*5113495bSYour Name In case of ndp or phy_err, this field will be set. Note 1768*5113495bSYour Name however that there will not actually be any data contents 1769*5113495bSYour Name in the MPDU. 1770*5113495bSYour Name <legal all> 1771*5113495bSYour Name */ 1772*5113495bSYour Name 1773*5113495bSYour Name #define RX_MPDU_INFO_FIRST_MPDU_OFFSET 0x00000034 1774*5113495bSYour Name #define RX_MPDU_INFO_FIRST_MPDU_LSB 14 1775*5113495bSYour Name #define RX_MPDU_INFO_FIRST_MPDU_MSB 14 1776*5113495bSYour Name #define RX_MPDU_INFO_FIRST_MPDU_MASK 0x00004000 1777*5113495bSYour Name 1778*5113495bSYour Name 1779*5113495bSYour Name /* Description MCAST_BCAST 1780*5113495bSYour Name 1781*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1782*5113495bSYour Name this field will be set to 0 1783*5113495bSYour Name 1784*5113495bSYour Name See definition in RX attention descriptor 1785*5113495bSYour Name <legal all> 1786*5113495bSYour Name */ 1787*5113495bSYour Name 1788*5113495bSYour Name #define RX_MPDU_INFO_MCAST_BCAST_OFFSET 0x00000034 1789*5113495bSYour Name #define RX_MPDU_INFO_MCAST_BCAST_LSB 15 1790*5113495bSYour Name #define RX_MPDU_INFO_MCAST_BCAST_MSB 15 1791*5113495bSYour Name #define RX_MPDU_INFO_MCAST_BCAST_MASK 0x00008000 1792*5113495bSYour Name 1793*5113495bSYour Name 1794*5113495bSYour Name /* Description AST_INDEX_NOT_FOUND 1795*5113495bSYour Name 1796*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1797*5113495bSYour Name this field will be set to 0 1798*5113495bSYour Name 1799*5113495bSYour Name See definition in RX attention descriptor 1800*5113495bSYour Name <legal all> 1801*5113495bSYour Name */ 1802*5113495bSYour Name 1803*5113495bSYour Name #define RX_MPDU_INFO_AST_INDEX_NOT_FOUND_OFFSET 0x00000034 1804*5113495bSYour Name #define RX_MPDU_INFO_AST_INDEX_NOT_FOUND_LSB 16 1805*5113495bSYour Name #define RX_MPDU_INFO_AST_INDEX_NOT_FOUND_MSB 16 1806*5113495bSYour Name #define RX_MPDU_INFO_AST_INDEX_NOT_FOUND_MASK 0x00010000 1807*5113495bSYour Name 1808*5113495bSYour Name 1809*5113495bSYour Name /* Description AST_INDEX_TIMEOUT 1810*5113495bSYour Name 1811*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1812*5113495bSYour Name this field will be set to 0 1813*5113495bSYour Name 1814*5113495bSYour Name See definition in RX attention descriptor 1815*5113495bSYour Name <legal all> 1816*5113495bSYour Name */ 1817*5113495bSYour Name 1818*5113495bSYour Name #define RX_MPDU_INFO_AST_INDEX_TIMEOUT_OFFSET 0x00000034 1819*5113495bSYour Name #define RX_MPDU_INFO_AST_INDEX_TIMEOUT_LSB 17 1820*5113495bSYour Name #define RX_MPDU_INFO_AST_INDEX_TIMEOUT_MSB 17 1821*5113495bSYour Name #define RX_MPDU_INFO_AST_INDEX_TIMEOUT_MASK 0x00020000 1822*5113495bSYour Name 1823*5113495bSYour Name 1824*5113495bSYour Name /* Description POWER_MGMT 1825*5113495bSYour Name 1826*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1827*5113495bSYour Name this field will be set to 0 1828*5113495bSYour Name 1829*5113495bSYour Name See definition in RX attention descriptor 1830*5113495bSYour Name <legal all> 1831*5113495bSYour Name */ 1832*5113495bSYour Name 1833*5113495bSYour Name #define RX_MPDU_INFO_POWER_MGMT_OFFSET 0x00000034 1834*5113495bSYour Name #define RX_MPDU_INFO_POWER_MGMT_LSB 18 1835*5113495bSYour Name #define RX_MPDU_INFO_POWER_MGMT_MSB 18 1836*5113495bSYour Name #define RX_MPDU_INFO_POWER_MGMT_MASK 0x00040000 1837*5113495bSYour Name 1838*5113495bSYour Name 1839*5113495bSYour Name /* Description NON_QOS 1840*5113495bSYour Name 1841*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1842*5113495bSYour Name this field will be set to 1 1843*5113495bSYour Name 1844*5113495bSYour Name See definition in RX attention descriptor 1845*5113495bSYour Name <legal all> 1846*5113495bSYour Name */ 1847*5113495bSYour Name 1848*5113495bSYour Name #define RX_MPDU_INFO_NON_QOS_OFFSET 0x00000034 1849*5113495bSYour Name #define RX_MPDU_INFO_NON_QOS_LSB 19 1850*5113495bSYour Name #define RX_MPDU_INFO_NON_QOS_MSB 19 1851*5113495bSYour Name #define RX_MPDU_INFO_NON_QOS_MASK 0x00080000 1852*5113495bSYour Name 1853*5113495bSYour Name 1854*5113495bSYour Name /* Description NULL_DATA 1855*5113495bSYour Name 1856*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1857*5113495bSYour Name this field will be set to 0 1858*5113495bSYour Name 1859*5113495bSYour Name See definition in RX attention descriptor 1860*5113495bSYour Name <legal all> 1861*5113495bSYour Name */ 1862*5113495bSYour Name 1863*5113495bSYour Name #define RX_MPDU_INFO_NULL_DATA_OFFSET 0x00000034 1864*5113495bSYour Name #define RX_MPDU_INFO_NULL_DATA_LSB 20 1865*5113495bSYour Name #define RX_MPDU_INFO_NULL_DATA_MSB 20 1866*5113495bSYour Name #define RX_MPDU_INFO_NULL_DATA_MASK 0x00100000 1867*5113495bSYour Name 1868*5113495bSYour Name 1869*5113495bSYour Name /* Description MGMT_TYPE 1870*5113495bSYour Name 1871*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1872*5113495bSYour Name this field will be set to 0 1873*5113495bSYour Name 1874*5113495bSYour Name See definition in RX attention descriptor 1875*5113495bSYour Name <legal all> 1876*5113495bSYour Name */ 1877*5113495bSYour Name 1878*5113495bSYour Name #define RX_MPDU_INFO_MGMT_TYPE_OFFSET 0x00000034 1879*5113495bSYour Name #define RX_MPDU_INFO_MGMT_TYPE_LSB 21 1880*5113495bSYour Name #define RX_MPDU_INFO_MGMT_TYPE_MSB 21 1881*5113495bSYour Name #define RX_MPDU_INFO_MGMT_TYPE_MASK 0x00200000 1882*5113495bSYour Name 1883*5113495bSYour Name 1884*5113495bSYour Name /* Description CTRL_TYPE 1885*5113495bSYour Name 1886*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1887*5113495bSYour Name this field will be set to 0 1888*5113495bSYour Name 1889*5113495bSYour Name See definition in RX attention descriptor 1890*5113495bSYour Name <legal all> 1891*5113495bSYour Name */ 1892*5113495bSYour Name 1893*5113495bSYour Name #define RX_MPDU_INFO_CTRL_TYPE_OFFSET 0x00000034 1894*5113495bSYour Name #define RX_MPDU_INFO_CTRL_TYPE_LSB 22 1895*5113495bSYour Name #define RX_MPDU_INFO_CTRL_TYPE_MSB 22 1896*5113495bSYour Name #define RX_MPDU_INFO_CTRL_TYPE_MASK 0x00400000 1897*5113495bSYour Name 1898*5113495bSYour Name 1899*5113495bSYour Name /* Description MORE_DATA 1900*5113495bSYour Name 1901*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1902*5113495bSYour Name this field will be set to 0 1903*5113495bSYour Name 1904*5113495bSYour Name See definition in RX attention descriptor 1905*5113495bSYour Name <legal all> 1906*5113495bSYour Name */ 1907*5113495bSYour Name 1908*5113495bSYour Name #define RX_MPDU_INFO_MORE_DATA_OFFSET 0x00000034 1909*5113495bSYour Name #define RX_MPDU_INFO_MORE_DATA_LSB 23 1910*5113495bSYour Name #define RX_MPDU_INFO_MORE_DATA_MSB 23 1911*5113495bSYour Name #define RX_MPDU_INFO_MORE_DATA_MASK 0x00800000 1912*5113495bSYour Name 1913*5113495bSYour Name 1914*5113495bSYour Name /* Description EOSP 1915*5113495bSYour Name 1916*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1917*5113495bSYour Name this field will be set to 0 1918*5113495bSYour Name 1919*5113495bSYour Name See definition in RX attention descriptor 1920*5113495bSYour Name <legal all> 1921*5113495bSYour Name */ 1922*5113495bSYour Name 1923*5113495bSYour Name #define RX_MPDU_INFO_EOSP_OFFSET 0x00000034 1924*5113495bSYour Name #define RX_MPDU_INFO_EOSP_LSB 24 1925*5113495bSYour Name #define RX_MPDU_INFO_EOSP_MSB 24 1926*5113495bSYour Name #define RX_MPDU_INFO_EOSP_MASK 0x01000000 1927*5113495bSYour Name 1928*5113495bSYour Name 1929*5113495bSYour Name /* Description FRAGMENT_FLAG 1930*5113495bSYour Name 1931*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1932*5113495bSYour Name this field will be set to 0 1933*5113495bSYour Name 1934*5113495bSYour Name See definition in RX attention descriptor 1935*5113495bSYour Name <legal all> 1936*5113495bSYour Name */ 1937*5113495bSYour Name 1938*5113495bSYour Name #define RX_MPDU_INFO_FRAGMENT_FLAG_OFFSET 0x00000034 1939*5113495bSYour Name #define RX_MPDU_INFO_FRAGMENT_FLAG_LSB 25 1940*5113495bSYour Name #define RX_MPDU_INFO_FRAGMENT_FLAG_MSB 25 1941*5113495bSYour Name #define RX_MPDU_INFO_FRAGMENT_FLAG_MASK 0x02000000 1942*5113495bSYour Name 1943*5113495bSYour Name 1944*5113495bSYour Name /* Description ORDER 1945*5113495bSYour Name 1946*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1947*5113495bSYour Name this field will be set to 0 1948*5113495bSYour Name 1949*5113495bSYour Name See definition in RX attention descriptor 1950*5113495bSYour Name 1951*5113495bSYour Name <legal all> 1952*5113495bSYour Name */ 1953*5113495bSYour Name 1954*5113495bSYour Name #define RX_MPDU_INFO_ORDER_OFFSET 0x00000034 1955*5113495bSYour Name #define RX_MPDU_INFO_ORDER_LSB 26 1956*5113495bSYour Name #define RX_MPDU_INFO_ORDER_MSB 26 1957*5113495bSYour Name #define RX_MPDU_INFO_ORDER_MASK 0x04000000 1958*5113495bSYour Name 1959*5113495bSYour Name 1960*5113495bSYour Name /* Description U_APSD_TRIGGER 1961*5113495bSYour Name 1962*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1963*5113495bSYour Name this field will be set to 0 1964*5113495bSYour Name 1965*5113495bSYour Name See definition in RX attention descriptor 1966*5113495bSYour Name <legal all> 1967*5113495bSYour Name */ 1968*5113495bSYour Name 1969*5113495bSYour Name #define RX_MPDU_INFO_U_APSD_TRIGGER_OFFSET 0x00000034 1970*5113495bSYour Name #define RX_MPDU_INFO_U_APSD_TRIGGER_LSB 27 1971*5113495bSYour Name #define RX_MPDU_INFO_U_APSD_TRIGGER_MSB 27 1972*5113495bSYour Name #define RX_MPDU_INFO_U_APSD_TRIGGER_MASK 0x08000000 1973*5113495bSYour Name 1974*5113495bSYour Name 1975*5113495bSYour Name /* Description ENCRYPT_REQUIRED 1976*5113495bSYour Name 1977*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1978*5113495bSYour Name this field will be set to 0 1979*5113495bSYour Name 1980*5113495bSYour Name See definition in RX attention descriptor 1981*5113495bSYour Name <legal all> 1982*5113495bSYour Name */ 1983*5113495bSYour Name 1984*5113495bSYour Name #define RX_MPDU_INFO_ENCRYPT_REQUIRED_OFFSET 0x00000034 1985*5113495bSYour Name #define RX_MPDU_INFO_ENCRYPT_REQUIRED_LSB 28 1986*5113495bSYour Name #define RX_MPDU_INFO_ENCRYPT_REQUIRED_MSB 28 1987*5113495bSYour Name #define RX_MPDU_INFO_ENCRYPT_REQUIRED_MASK 0x10000000 1988*5113495bSYour Name 1989*5113495bSYour Name 1990*5113495bSYour Name /* Description DIRECTED 1991*5113495bSYour Name 1992*5113495bSYour Name In case of ndp or phy_err or Phy_err_during_mpdu_header 1993*5113495bSYour Name this field will be set to 0 1994*5113495bSYour Name 1995*5113495bSYour Name See definition in RX attention descriptor 1996*5113495bSYour Name <legal all> 1997*5113495bSYour Name */ 1998*5113495bSYour Name 1999*5113495bSYour Name #define RX_MPDU_INFO_DIRECTED_OFFSET 0x00000034 2000*5113495bSYour Name #define RX_MPDU_INFO_DIRECTED_LSB 29 2001*5113495bSYour Name #define RX_MPDU_INFO_DIRECTED_MSB 29 2002*5113495bSYour Name #define RX_MPDU_INFO_DIRECTED_MASK 0x20000000 2003*5113495bSYour Name 2004*5113495bSYour Name 2005*5113495bSYour Name /* Description AMSDU_PRESENT 2006*5113495bSYour Name 2007*5113495bSYour Name Field only valid when Mpdu_qos_control_valid is set 2008*5113495bSYour Name 2009*5113495bSYour Name The 'amsdu_present' bit within the QoS control field of 2010*5113495bSYour Name the MPDU 2011*5113495bSYour Name <legal all> 2012*5113495bSYour Name */ 2013*5113495bSYour Name 2014*5113495bSYour Name #define RX_MPDU_INFO_AMSDU_PRESENT_OFFSET 0x00000034 2015*5113495bSYour Name #define RX_MPDU_INFO_AMSDU_PRESENT_LSB 30 2016*5113495bSYour Name #define RX_MPDU_INFO_AMSDU_PRESENT_MSB 30 2017*5113495bSYour Name #define RX_MPDU_INFO_AMSDU_PRESENT_MASK 0x40000000 2018*5113495bSYour Name 2019*5113495bSYour Name 2020*5113495bSYour Name /* Description RESERVED_13 2021*5113495bSYour Name 2022*5113495bSYour Name Field only valid when Mpdu_qos_control_valid is set 2023*5113495bSYour Name 2024*5113495bSYour Name This indicates whether the 'Ack policy' field within the 2025*5113495bSYour Name QoS control field of the MPDU indicates 'no-Ack.' 2026*5113495bSYour Name <legal all> 2027*5113495bSYour Name */ 2028*5113495bSYour Name 2029*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_13_OFFSET 0x00000034 2030*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_13_LSB 31 2031*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_13_MSB 31 2032*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_13_MASK 0x80000000 2033*5113495bSYour Name 2034*5113495bSYour Name 2035*5113495bSYour Name /* Description MPDU_FRAME_CONTROL_FIELD 2036*5113495bSYour Name 2037*5113495bSYour Name Field only valid when Mpdu_frame_control_valid is set 2038*5113495bSYour Name 2039*5113495bSYour Name The frame control field of this received MPDU. 2040*5113495bSYour Name 2041*5113495bSYour Name Field only valid when Ndp_frame and phy_err are NOT set 2042*5113495bSYour Name 2043*5113495bSYour Name Bytes 0 + 1 of the received MPDU 2044*5113495bSYour Name <legal all> 2045*5113495bSYour Name */ 2046*5113495bSYour Name 2047*5113495bSYour Name #define RX_MPDU_INFO_MPDU_FRAME_CONTROL_FIELD_OFFSET 0x00000038 2048*5113495bSYour Name #define RX_MPDU_INFO_MPDU_FRAME_CONTROL_FIELD_LSB 0 2049*5113495bSYour Name #define RX_MPDU_INFO_MPDU_FRAME_CONTROL_FIELD_MSB 15 2050*5113495bSYour Name #define RX_MPDU_INFO_MPDU_FRAME_CONTROL_FIELD_MASK 0x0000ffff 2051*5113495bSYour Name 2052*5113495bSYour Name 2053*5113495bSYour Name /* Description MPDU_DURATION_FIELD 2054*5113495bSYour Name 2055*5113495bSYour Name Field only valid when Mpdu_duration_valid is set 2056*5113495bSYour Name 2057*5113495bSYour Name The duration field of this received MPDU. 2058*5113495bSYour Name <legal all> 2059*5113495bSYour Name */ 2060*5113495bSYour Name 2061*5113495bSYour Name #define RX_MPDU_INFO_MPDU_DURATION_FIELD_OFFSET 0x00000038 2062*5113495bSYour Name #define RX_MPDU_INFO_MPDU_DURATION_FIELD_LSB 16 2063*5113495bSYour Name #define RX_MPDU_INFO_MPDU_DURATION_FIELD_MSB 31 2064*5113495bSYour Name #define RX_MPDU_INFO_MPDU_DURATION_FIELD_MASK 0xffff0000 2065*5113495bSYour Name 2066*5113495bSYour Name 2067*5113495bSYour Name /* Description MAC_ADDR_AD1_31_0 2068*5113495bSYour Name 2069*5113495bSYour Name Field only valid when mac_addr_ad1_valid is set 2070*5113495bSYour Name 2071*5113495bSYour Name The Least Significant 4 bytes of the Received Frames MAC 2072*5113495bSYour Name Address AD1 2073*5113495bSYour Name <legal all> 2074*5113495bSYour Name */ 2075*5113495bSYour Name 2076*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD1_31_0_OFFSET 0x0000003c 2077*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD1_31_0_LSB 0 2078*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD1_31_0_MSB 31 2079*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD1_31_0_MASK 0xffffffff 2080*5113495bSYour Name 2081*5113495bSYour Name 2082*5113495bSYour Name /* Description MAC_ADDR_AD1_47_32 2083*5113495bSYour Name 2084*5113495bSYour Name Field only valid when mac_addr_ad1_valid is set 2085*5113495bSYour Name 2086*5113495bSYour Name The 2 most significant bytes of the Received Frames MAC 2087*5113495bSYour Name Address AD1 2088*5113495bSYour Name <legal all> 2089*5113495bSYour Name */ 2090*5113495bSYour Name 2091*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD1_47_32_OFFSET 0x00000040 2092*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD1_47_32_LSB 0 2093*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD1_47_32_MSB 15 2094*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD1_47_32_MASK 0x0000ffff 2095*5113495bSYour Name 2096*5113495bSYour Name 2097*5113495bSYour Name /* Description MAC_ADDR_AD2_15_0 2098*5113495bSYour Name 2099*5113495bSYour Name Field only valid when mac_addr_ad2_valid is set 2100*5113495bSYour Name 2101*5113495bSYour Name The Least Significant 2 bytes of the Received Frames MAC 2102*5113495bSYour Name Address AD2 2103*5113495bSYour Name <legal all> 2104*5113495bSYour Name */ 2105*5113495bSYour Name 2106*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD2_15_0_OFFSET 0x00000040 2107*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD2_15_0_LSB 16 2108*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD2_15_0_MSB 31 2109*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD2_15_0_MASK 0xffff0000 2110*5113495bSYour Name 2111*5113495bSYour Name 2112*5113495bSYour Name /* Description MAC_ADDR_AD2_47_16 2113*5113495bSYour Name 2114*5113495bSYour Name Field only valid when mac_addr_ad2_valid is set 2115*5113495bSYour Name 2116*5113495bSYour Name The 4 most significant bytes of the Received Frames MAC 2117*5113495bSYour Name Address AD2 2118*5113495bSYour Name <legal all> 2119*5113495bSYour Name */ 2120*5113495bSYour Name 2121*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD2_47_16_OFFSET 0x00000044 2122*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD2_47_16_LSB 0 2123*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD2_47_16_MSB 31 2124*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD2_47_16_MASK 0xffffffff 2125*5113495bSYour Name 2126*5113495bSYour Name 2127*5113495bSYour Name /* Description MAC_ADDR_AD3_31_0 2128*5113495bSYour Name 2129*5113495bSYour Name Field only valid when mac_addr_ad3_valid is set 2130*5113495bSYour Name 2131*5113495bSYour Name The Least Significant 4 bytes of the Received Frames MAC 2132*5113495bSYour Name Address AD3 2133*5113495bSYour Name <legal all> 2134*5113495bSYour Name */ 2135*5113495bSYour Name 2136*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD3_31_0_OFFSET 0x00000048 2137*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD3_31_0_LSB 0 2138*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD3_31_0_MSB 31 2139*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD3_31_0_MASK 0xffffffff 2140*5113495bSYour Name 2141*5113495bSYour Name 2142*5113495bSYour Name /* Description MAC_ADDR_AD3_47_32 2143*5113495bSYour Name 2144*5113495bSYour Name Field only valid when mac_addr_ad3_valid is set 2145*5113495bSYour Name 2146*5113495bSYour Name The 2 most significant bytes of the Received Frames MAC 2147*5113495bSYour Name Address AD3 2148*5113495bSYour Name <legal all> 2149*5113495bSYour Name */ 2150*5113495bSYour Name 2151*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD3_47_32_OFFSET 0x0000004c 2152*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD3_47_32_LSB 0 2153*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD3_47_32_MSB 15 2154*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD3_47_32_MASK 0x0000ffff 2155*5113495bSYour Name 2156*5113495bSYour Name 2157*5113495bSYour Name /* Description MPDU_SEQUENCE_CONTROL_FIELD 2158*5113495bSYour Name 2159*5113495bSYour Name Field only valid when mpdu_sequence_control_valid is set 2160*5113495bSYour Name 2161*5113495bSYour Name 2162*5113495bSYour Name The sequence control field of the MPDU 2163*5113495bSYour Name <legal all> 2164*5113495bSYour Name */ 2165*5113495bSYour Name 2166*5113495bSYour Name #define RX_MPDU_INFO_MPDU_SEQUENCE_CONTROL_FIELD_OFFSET 0x0000004c 2167*5113495bSYour Name #define RX_MPDU_INFO_MPDU_SEQUENCE_CONTROL_FIELD_LSB 16 2168*5113495bSYour Name #define RX_MPDU_INFO_MPDU_SEQUENCE_CONTROL_FIELD_MSB 31 2169*5113495bSYour Name #define RX_MPDU_INFO_MPDU_SEQUENCE_CONTROL_FIELD_MASK 0xffff0000 2170*5113495bSYour Name 2171*5113495bSYour Name 2172*5113495bSYour Name /* Description MAC_ADDR_AD4_31_0 2173*5113495bSYour Name 2174*5113495bSYour Name Field only valid when mac_addr_ad4_valid is set 2175*5113495bSYour Name 2176*5113495bSYour Name The Least Significant 4 bytes of the Received Frames MAC 2177*5113495bSYour Name Address AD4 2178*5113495bSYour Name <legal all> 2179*5113495bSYour Name */ 2180*5113495bSYour Name 2181*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD4_31_0_OFFSET 0x00000050 2182*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD4_31_0_LSB 0 2183*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD4_31_0_MSB 31 2184*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD4_31_0_MASK 0xffffffff 2185*5113495bSYour Name 2186*5113495bSYour Name 2187*5113495bSYour Name /* Description MAC_ADDR_AD4_47_32 2188*5113495bSYour Name 2189*5113495bSYour Name Field only valid when mac_addr_ad4_valid is set 2190*5113495bSYour Name 2191*5113495bSYour Name The 2 most significant bytes of the Received Frames MAC 2192*5113495bSYour Name Address AD4 2193*5113495bSYour Name <legal all> 2194*5113495bSYour Name */ 2195*5113495bSYour Name 2196*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD4_47_32_OFFSET 0x00000054 2197*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD4_47_32_LSB 0 2198*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD4_47_32_MSB 15 2199*5113495bSYour Name #define RX_MPDU_INFO_MAC_ADDR_AD4_47_32_MASK 0x0000ffff 2200*5113495bSYour Name 2201*5113495bSYour Name 2202*5113495bSYour Name /* Description MPDU_QOS_CONTROL_FIELD 2203*5113495bSYour Name 2204*5113495bSYour Name Field only valid when mpdu_qos_control_valid is set 2205*5113495bSYour Name 2206*5113495bSYour Name The sequence control field of the MPDU 2207*5113495bSYour Name <legal all> 2208*5113495bSYour Name */ 2209*5113495bSYour Name 2210*5113495bSYour Name #define RX_MPDU_INFO_MPDU_QOS_CONTROL_FIELD_OFFSET 0x00000054 2211*5113495bSYour Name #define RX_MPDU_INFO_MPDU_QOS_CONTROL_FIELD_LSB 16 2212*5113495bSYour Name #define RX_MPDU_INFO_MPDU_QOS_CONTROL_FIELD_MSB 31 2213*5113495bSYour Name #define RX_MPDU_INFO_MPDU_QOS_CONTROL_FIELD_MASK 0xffff0000 2214*5113495bSYour Name 2215*5113495bSYour Name 2216*5113495bSYour Name /* Description MPDU_HT_CONTROL_FIELD 2217*5113495bSYour Name 2218*5113495bSYour Name Field only valid when mpdu_qos_control_valid is set 2219*5113495bSYour Name 2220*5113495bSYour Name The HT control field of the MPDU 2221*5113495bSYour Name <legal all> 2222*5113495bSYour Name */ 2223*5113495bSYour Name 2224*5113495bSYour Name #define RX_MPDU_INFO_MPDU_HT_CONTROL_FIELD_OFFSET 0x00000058 2225*5113495bSYour Name #define RX_MPDU_INFO_MPDU_HT_CONTROL_FIELD_LSB 0 2226*5113495bSYour Name #define RX_MPDU_INFO_MPDU_HT_CONTROL_FIELD_MSB 31 2227*5113495bSYour Name #define RX_MPDU_INFO_MPDU_HT_CONTROL_FIELD_MASK 0xffffffff 2228*5113495bSYour Name 2229*5113495bSYour Name 2230*5113495bSYour Name /* Description VDEV_ID 2231*5113495bSYour Name 2232*5113495bSYour Name Consumer: RXOLE 2233*5113495bSYour Name Producer: FW 2234*5113495bSYour Name 2235*5113495bSYour Name Virtual device associated with this peer 2236*5113495bSYour Name 2237*5113495bSYour Name RXOLE uses this to determine intra-BSS routing. 2238*5113495bSYour Name 2239*5113495bSYour Name <legal all> 2240*5113495bSYour Name */ 2241*5113495bSYour Name 2242*5113495bSYour Name #define RX_MPDU_INFO_VDEV_ID_OFFSET 0x0000005c 2243*5113495bSYour Name #define RX_MPDU_INFO_VDEV_ID_LSB 0 2244*5113495bSYour Name #define RX_MPDU_INFO_VDEV_ID_MSB 7 2245*5113495bSYour Name #define RX_MPDU_INFO_VDEV_ID_MASK 0x000000ff 2246*5113495bSYour Name 2247*5113495bSYour Name 2248*5113495bSYour Name /* Description SERVICE_CODE 2249*5113495bSYour Name 2250*5113495bSYour Name Opaque service code between PPE and Wi-Fi 2251*5113495bSYour Name 2252*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 2253*5113495bSYour Name ('REO_TO_PPE_RING'). 2254*5113495bSYour Name 2255*5113495bSYour Name <legal all> 2256*5113495bSYour Name */ 2257*5113495bSYour Name 2258*5113495bSYour Name #define RX_MPDU_INFO_SERVICE_CODE_OFFSET 0x0000005c 2259*5113495bSYour Name #define RX_MPDU_INFO_SERVICE_CODE_LSB 8 2260*5113495bSYour Name #define RX_MPDU_INFO_SERVICE_CODE_MSB 16 2261*5113495bSYour Name #define RX_MPDU_INFO_SERVICE_CODE_MASK 0x0001ff00 2262*5113495bSYour Name 2263*5113495bSYour Name 2264*5113495bSYour Name /* Description PRIORITY_VALID 2265*5113495bSYour Name 2266*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 2267*5113495bSYour Name ('REO_TO_PPE_RING'). 2268*5113495bSYour Name 2269*5113495bSYour Name <legal all> 2270*5113495bSYour Name */ 2271*5113495bSYour Name 2272*5113495bSYour Name #define RX_MPDU_INFO_PRIORITY_VALID_OFFSET 0x0000005c 2273*5113495bSYour Name #define RX_MPDU_INFO_PRIORITY_VALID_LSB 17 2274*5113495bSYour Name #define RX_MPDU_INFO_PRIORITY_VALID_MSB 17 2275*5113495bSYour Name #define RX_MPDU_INFO_PRIORITY_VALID_MASK 0x00020000 2276*5113495bSYour Name 2277*5113495bSYour Name 2278*5113495bSYour Name /* Description SRC_INFO 2279*5113495bSYour Name 2280*5113495bSYour Name Source (virtual) device/interface info. associated with 2281*5113495bSYour Name this peer 2282*5113495bSYour Name 2283*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 2284*5113495bSYour Name ('REO_TO_PPE_RING'). 2285*5113495bSYour Name 2286*5113495bSYour Name <legal all> 2287*5113495bSYour Name */ 2288*5113495bSYour Name 2289*5113495bSYour Name #define RX_MPDU_INFO_SRC_INFO_OFFSET 0x0000005c 2290*5113495bSYour Name #define RX_MPDU_INFO_SRC_INFO_LSB 18 2291*5113495bSYour Name #define RX_MPDU_INFO_SRC_INFO_MSB 29 2292*5113495bSYour Name #define RX_MPDU_INFO_SRC_INFO_MASK 0x3ffc0000 2293*5113495bSYour Name 2294*5113495bSYour Name 2295*5113495bSYour Name /* Description RESERVED_23A 2296*5113495bSYour Name 2297*5113495bSYour Name <legal 0> 2298*5113495bSYour Name */ 2299*5113495bSYour Name 2300*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_23A_OFFSET 0x0000005c 2301*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_23A_LSB 30 2302*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_23A_MSB 30 2303*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_23A_MASK 0x40000000 2304*5113495bSYour Name 2305*5113495bSYour Name 2306*5113495bSYour Name /* Description MULTI_LINK_ADDR_AD1_AD2_VALID 2307*5113495bSYour Name 2308*5113495bSYour Name If set, Rx OLE shall convert Address1 and Address2 of received 2309*5113495bSYour Name data frames to multi-link addresses during decapsulation 2310*5113495bSYour Name to Ethernet or Native WiFi 2311*5113495bSYour Name <legal all> 2312*5113495bSYour Name */ 2313*5113495bSYour Name 2314*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD1_AD2_VALID_OFFSET 0x0000005c 2315*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD1_AD2_VALID_LSB 31 2316*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD1_AD2_VALID_MSB 31 2317*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD1_AD2_VALID_MASK 0x80000000 2318*5113495bSYour Name 2319*5113495bSYour Name 2320*5113495bSYour Name /* Description MULTI_LINK_ADDR_AD1_31_0 2321*5113495bSYour Name 2322*5113495bSYour Name Field only valid if Multi_link_addr_ad1_ad2_valid is set 2323*5113495bSYour Name 2324*5113495bSYour Name 2325*5113495bSYour Name Multi-link receiver address (address1), bits [31:0] 2326*5113495bSYour Name */ 2327*5113495bSYour Name 2328*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD1_31_0_OFFSET 0x00000060 2329*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD1_31_0_LSB 0 2330*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD1_31_0_MSB 31 2331*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD1_31_0_MASK 0xffffffff 2332*5113495bSYour Name 2333*5113495bSYour Name 2334*5113495bSYour Name /* Description MULTI_LINK_ADDR_AD1_47_32 2335*5113495bSYour Name 2336*5113495bSYour Name Field only valid if Multi_link_addr_ad1_ad2_valid is set 2337*5113495bSYour Name 2338*5113495bSYour Name 2339*5113495bSYour Name Multi-link receiver address (address1), bits [47:32] 2340*5113495bSYour Name */ 2341*5113495bSYour Name 2342*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD1_47_32_OFFSET 0x00000064 2343*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD1_47_32_LSB 0 2344*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD1_47_32_MSB 15 2345*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD1_47_32_MASK 0x0000ffff 2346*5113495bSYour Name 2347*5113495bSYour Name 2348*5113495bSYour Name /* Description MULTI_LINK_ADDR_AD2_15_0 2349*5113495bSYour Name 2350*5113495bSYour Name Field only valid if Multi_link_addr_ad1_ad2_valid is set 2351*5113495bSYour Name 2352*5113495bSYour Name 2353*5113495bSYour Name Multi-link transmitter address (address2), bits [15:0] 2354*5113495bSYour Name */ 2355*5113495bSYour Name 2356*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD2_15_0_OFFSET 0x00000064 2357*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD2_15_0_LSB 16 2358*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD2_15_0_MSB 31 2359*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD2_15_0_MASK 0xffff0000 2360*5113495bSYour Name 2361*5113495bSYour Name 2362*5113495bSYour Name /* Description MULTI_LINK_ADDR_AD2_47_16 2363*5113495bSYour Name 2364*5113495bSYour Name Field only valid if Multi_link_addr_ad1_ad2_valid is set 2365*5113495bSYour Name 2366*5113495bSYour Name 2367*5113495bSYour Name Multi-link transmitter address (address2), bits [47:16] 2368*5113495bSYour Name */ 2369*5113495bSYour Name 2370*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD2_47_16_OFFSET 0x00000068 2371*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD2_47_16_LSB 0 2372*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD2_47_16_MSB 31 2373*5113495bSYour Name #define RX_MPDU_INFO_MULTI_LINK_ADDR_AD2_47_16_MASK 0xffffffff 2374*5113495bSYour Name 2375*5113495bSYour Name 2376*5113495bSYour Name /* Description AUTHORIZED_TO_SEND_WDS 2377*5113495bSYour Name 2378*5113495bSYour Name If not set, RXDMA shall perform error-routing for WDS packets 2379*5113495bSYour Name as the sender is not authorized and might misuse WDS frame 2380*5113495bSYour Name format to inject packets with arbitrary DA/SA. 2381*5113495bSYour Name <legal all> 2382*5113495bSYour Name */ 2383*5113495bSYour Name 2384*5113495bSYour Name #define RX_MPDU_INFO_AUTHORIZED_TO_SEND_WDS_OFFSET 0x0000006c 2385*5113495bSYour Name #define RX_MPDU_INFO_AUTHORIZED_TO_SEND_WDS_LSB 0 2386*5113495bSYour Name #define RX_MPDU_INFO_AUTHORIZED_TO_SEND_WDS_MSB 0 2387*5113495bSYour Name #define RX_MPDU_INFO_AUTHORIZED_TO_SEND_WDS_MASK 0x00000001 2388*5113495bSYour Name 2389*5113495bSYour Name 2390*5113495bSYour Name /* Description RESERVED_27A 2391*5113495bSYour Name 2392*5113495bSYour Name <legal 0> 2393*5113495bSYour Name */ 2394*5113495bSYour Name 2395*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_27A_OFFSET 0x0000006c 2396*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_27A_LSB 1 2397*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_27A_MSB 31 2398*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_27A_MASK 0xfffffffe 2399*5113495bSYour Name 2400*5113495bSYour Name 2401*5113495bSYour Name /* Description RESERVED_28A 2402*5113495bSYour Name 2403*5113495bSYour Name <legal 0> 2404*5113495bSYour Name */ 2405*5113495bSYour Name 2406*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_28A_OFFSET 0x00000070 2407*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_28A_LSB 0 2408*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_28A_MSB 31 2409*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_28A_MASK 0xffffffff 2410*5113495bSYour Name 2411*5113495bSYour Name 2412*5113495bSYour Name /* Description RESERVED_29A 2413*5113495bSYour Name 2414*5113495bSYour Name <legal 0> 2415*5113495bSYour Name */ 2416*5113495bSYour Name 2417*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_29A_OFFSET 0x00000074 2418*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_29A_LSB 0 2419*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_29A_MSB 31 2420*5113495bSYour Name #define RX_MPDU_INFO_RESERVED_29A_MASK 0xffffffff 2421*5113495bSYour Name 2422*5113495bSYour Name 2423*5113495bSYour Name 2424*5113495bSYour Name #endif // RX_MPDU_INFO 2425