1*5113495bSYour Name 2*5113495bSYour Name /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3*5113495bSYour Name * 4*5113495bSYour Name * Permission to use, copy, modify, and/or distribute this software for any 5*5113495bSYour Name * purpose with or without fee is hereby granted, provided that the above 6*5113495bSYour Name * copyright notice and this permission notice appear in all copies. 7*5113495bSYour Name * 8*5113495bSYour Name * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*5113495bSYour Name * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*5113495bSYour Name * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*5113495bSYour Name * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*5113495bSYour Name * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*5113495bSYour Name * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*5113495bSYour Name * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*5113495bSYour Name */ 16*5113495bSYour Name 17*5113495bSYour Name #ifndef _RX_MSDU_LINK_H_ 18*5113495bSYour Name #define _RX_MSDU_LINK_H_ 19*5113495bSYour Name #if !defined(__ASSEMBLER__) 20*5113495bSYour Name #endif 21*5113495bSYour Name 22*5113495bSYour Name #include "uniform_descriptor_header.h" 23*5113495bSYour Name #include "buffer_addr_info.h" 24*5113495bSYour Name #include "rx_msdu_details.h" 25*5113495bSYour Name #define NUM_OF_DWORDS_RX_MSDU_LINK 32 26*5113495bSYour Name 27*5113495bSYour Name 28*5113495bSYour Name struct rx_msdu_link { 29*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 30*5113495bSYour Name struct uniform_descriptor_header descriptor_header; 31*5113495bSYour Name struct buffer_addr_info next_msdu_link_desc_addr_info; 32*5113495bSYour Name uint32_t receive_queue_number : 16, // [15:0] 33*5113495bSYour Name first_rx_msdu_link_struct : 1, // [16:16] 34*5113495bSYour Name reserved_3a : 15; // [31:17] 35*5113495bSYour Name uint32_t pn_31_0 : 32; // [31:0] 36*5113495bSYour Name uint32_t pn_63_32 : 32; // [31:0] 37*5113495bSYour Name uint32_t pn_95_64 : 32; // [31:0] 38*5113495bSYour Name uint32_t pn_127_96 : 32; // [31:0] 39*5113495bSYour Name struct rx_msdu_details msdu_0; 40*5113495bSYour Name struct rx_msdu_details msdu_1; 41*5113495bSYour Name struct rx_msdu_details msdu_2; 42*5113495bSYour Name struct rx_msdu_details msdu_3; 43*5113495bSYour Name struct rx_msdu_details msdu_4; 44*5113495bSYour Name struct rx_msdu_details msdu_5; 45*5113495bSYour Name #else 46*5113495bSYour Name struct uniform_descriptor_header descriptor_header; 47*5113495bSYour Name struct buffer_addr_info next_msdu_link_desc_addr_info; 48*5113495bSYour Name uint32_t reserved_3a : 15, // [31:17] 49*5113495bSYour Name first_rx_msdu_link_struct : 1, // [16:16] 50*5113495bSYour Name receive_queue_number : 16; // [15:0] 51*5113495bSYour Name uint32_t pn_31_0 : 32; // [31:0] 52*5113495bSYour Name uint32_t pn_63_32 : 32; // [31:0] 53*5113495bSYour Name uint32_t pn_95_64 : 32; // [31:0] 54*5113495bSYour Name uint32_t pn_127_96 : 32; // [31:0] 55*5113495bSYour Name struct rx_msdu_details msdu_0; 56*5113495bSYour Name struct rx_msdu_details msdu_1; 57*5113495bSYour Name struct rx_msdu_details msdu_2; 58*5113495bSYour Name struct rx_msdu_details msdu_3; 59*5113495bSYour Name struct rx_msdu_details msdu_4; 60*5113495bSYour Name struct rx_msdu_details msdu_5; 61*5113495bSYour Name #endif 62*5113495bSYour Name }; 63*5113495bSYour Name 64*5113495bSYour Name 65*5113495bSYour Name /* Description DESCRIPTOR_HEADER 66*5113495bSYour Name 67*5113495bSYour Name Details about which module owns this struct. 68*5113495bSYour Name Note that sub field "Buffer_type" shall be set to "Receive_MSDU_Link_descriptor" 69*5113495bSYour Name 70*5113495bSYour Name */ 71*5113495bSYour Name 72*5113495bSYour Name 73*5113495bSYour Name /* Description OWNER 74*5113495bSYour Name 75*5113495bSYour Name Consumer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO 76*5113495bSYour Name Producer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO 77*5113495bSYour Name 78*5113495bSYour Name The owner of this data structure: 79*5113495bSYour Name <enum 0 WBM_owned> Buffer Manager currently owns this data 80*5113495bSYour Name structure. 81*5113495bSYour Name <enum 1 SW_OR_FW_owned> Software of FW currently owns this 82*5113495bSYour Name data structure. 83*5113495bSYour Name <enum 2 TQM_owned> Transmit Queue Manager currently owns 84*5113495bSYour Name this data structure. 85*5113495bSYour Name <enum 3 RXDMA_owned> Receive DMA currently owns this data 86*5113495bSYour Name structure. 87*5113495bSYour Name <enum 4 REO_owned> Reorder currently owns this data structure. 88*5113495bSYour Name 89*5113495bSYour Name <enum 5 SWITCH_owned> SWITCH currently owns this data structure. 90*5113495bSYour Name 91*5113495bSYour Name 92*5113495bSYour Name <legal 0-5> 93*5113495bSYour Name */ 94*5113495bSYour Name 95*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_OWNER_OFFSET 0x00000000 96*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_OWNER_LSB 0 97*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_OWNER_MSB 3 98*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_OWNER_MASK 0x0000000f 99*5113495bSYour Name 100*5113495bSYour Name 101*5113495bSYour Name /* Description BUFFER_TYPE 102*5113495bSYour Name 103*5113495bSYour Name Consumer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO 104*5113495bSYour Name Producer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO 105*5113495bSYour Name 106*5113495bSYour Name Field describing what contents format is of this descriptor 107*5113495bSYour Name 108*5113495bSYour Name 109*5113495bSYour Name <enum 0 Transmit_MSDU_Link_descriptor> 110*5113495bSYour Name <enum 1 Transmit_MPDU_Link_descriptor> 111*5113495bSYour Name <enum 2 Transmit_MPDU_Queue_head_descriptor> 112*5113495bSYour Name <enum 3 Transmit_MPDU_Queue_ext_descriptor> 113*5113495bSYour Name <enum 4 Transmit_flow_descriptor> 114*5113495bSYour Name <enum 5 Transmit_buffer> NOT TO BE USED: 115*5113495bSYour Name 116*5113495bSYour Name <enum 6 Receive_MSDU_Link_descriptor> 117*5113495bSYour Name <enum 7 Receive_MPDU_Link_descriptor> 118*5113495bSYour Name <enum 8 Receive_REO_queue_descriptor> 119*5113495bSYour Name <enum 9 Receive_REO_queue_1k_descriptor> 120*5113495bSYour Name <enum 10 Receive_REO_queue_ext_descriptor> 121*5113495bSYour Name 122*5113495bSYour Name <enum 11 Receive_buffer> 123*5113495bSYour Name 124*5113495bSYour Name <enum 12 Idle_link_list_entry> 125*5113495bSYour Name 126*5113495bSYour Name <legal 0-12> 127*5113495bSYour Name */ 128*5113495bSYour Name 129*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_BUFFER_TYPE_OFFSET 0x00000000 130*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_BUFFER_TYPE_LSB 4 131*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_BUFFER_TYPE_MSB 7 132*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_BUFFER_TYPE_MASK 0x000000f0 133*5113495bSYour Name 134*5113495bSYour Name 135*5113495bSYour Name /* Description TX_MPDU_QUEUE_NUMBER 136*5113495bSYour Name 137*5113495bSYour Name Consumer: TQM/Debug 138*5113495bSYour Name Producer: SW (in 'TX_MPDU_QUEUE_HEAD')/TQM (elsewhere) 139*5113495bSYour Name 140*5113495bSYour Name Field only valid if Buffer_type is any of Transmit_MPDU_*_descriptor 141*5113495bSYour Name 142*5113495bSYour Name 143*5113495bSYour Name Indicates the MPDU queue ID to which this MPDU descriptor 144*5113495bSYour Name belongs 145*5113495bSYour Name Used for tracking and debugging 146*5113495bSYour Name 147*5113495bSYour Name Hamilton and Waikiki used bits [19:0] of word 1 of 'TX_MPDU_LINK,' 148*5113495bSYour Name word 16 of 'TX_MPDU_QUEUE_HEAD' and word 1 of 'TX_MPDU_QUEUE_EXT' 149*5113495bSYour Name for this. 150*5113495bSYour Name <legal all> 151*5113495bSYour Name */ 152*5113495bSYour Name 153*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_OFFSET 0x00000000 154*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_LSB 8 155*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_MSB 27 156*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_TX_MPDU_QUEUE_NUMBER_MASK 0x0fffff00 157*5113495bSYour Name 158*5113495bSYour Name 159*5113495bSYour Name /* Description RESERVED_0A 160*5113495bSYour Name 161*5113495bSYour Name <legal 0> 162*5113495bSYour Name */ 163*5113495bSYour Name 164*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_RESERVED_0A_OFFSET 0x00000000 165*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_RESERVED_0A_LSB 28 166*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_RESERVED_0A_MSB 31 167*5113495bSYour Name #define RX_MSDU_LINK_DESCRIPTOR_HEADER_RESERVED_0A_MASK 0xf0000000 168*5113495bSYour Name 169*5113495bSYour Name 170*5113495bSYour Name /* Description NEXT_MSDU_LINK_DESC_ADDR_INFO 171*5113495bSYour Name 172*5113495bSYour Name Details of the physical address of the next MSDU link descriptor 173*5113495bSYour Name that contains info about additional MSDUs that are part 174*5113495bSYour Name of this MPDU. 175*5113495bSYour Name */ 176*5113495bSYour Name 177*5113495bSYour Name 178*5113495bSYour Name /* Description BUFFER_ADDR_31_0 179*5113495bSYour Name 180*5113495bSYour Name Address (lower 32 bits) of the MSDU buffer OR MSDU_EXTENSION 181*5113495bSYour Name descriptor OR Link Descriptor 182*5113495bSYour Name 183*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 184*5113495bSYour Name <legal all> 185*5113495bSYour Name */ 186*5113495bSYour Name 187*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000004 188*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0 189*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MSB 31 190*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff 191*5113495bSYour Name 192*5113495bSYour Name 193*5113495bSYour Name /* Description BUFFER_ADDR_39_32 194*5113495bSYour Name 195*5113495bSYour Name Address (upper 8 bits) of the MSDU buffer OR MSDU_EXTENSION 196*5113495bSYour Name descriptor OR Link Descriptor 197*5113495bSYour Name 198*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 199*5113495bSYour Name <legal all> 200*5113495bSYour Name */ 201*5113495bSYour Name 202*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000008 203*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0 204*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MSB 7 205*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff 206*5113495bSYour Name 207*5113495bSYour Name 208*5113495bSYour Name /* Description RETURN_BUFFER_MANAGER 209*5113495bSYour Name 210*5113495bSYour Name Consumer: WBM 211*5113495bSYour Name Producer: SW/FW 212*5113495bSYour Name 213*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 214*5113495bSYour Name 215*5113495bSYour Name Indicates to which buffer manager the buffer OR MSDU_EXTENSION 216*5113495bSYour Name descriptor OR link descriptor that is being pointed to 217*5113495bSYour Name shall be returned after the frame has been processed. It 218*5113495bSYour Name is used by WBM for routing purposes. 219*5113495bSYour Name 220*5113495bSYour Name <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned 221*5113495bSYour Name to the WMB buffer idle list 222*5113495bSYour Name <enum 1 WBM_CHIP0_IDLE_DESC_LIST> This buffer shall be returned 223*5113495bSYour Name to the WBM idle link descriptor idle list, where the chip 224*5113495bSYour Name 0 WBM is chosen in case of a multi-chip config 225*5113495bSYour Name <enum 2 WBM_CHIP1_IDLE_DESC_LIST> This buffer shall be returned 226*5113495bSYour Name to the chip 1 WBM idle link descriptor idle list 227*5113495bSYour Name <enum 3 WBM_CHIP2_IDLE_DESC_LIST> This buffer shall be returned 228*5113495bSYour Name to the chip 2 WBM idle link descriptor idle list 229*5113495bSYour Name <enum 12 WBM_CHIP3_IDLE_DESC_LIST> This buffer shall be 230*5113495bSYour Name returned to chip 3 WBM idle link descriptor idle list 231*5113495bSYour Name <enum 4 FW_BM> This buffer shall be returned to the FW 232*5113495bSYour Name <enum 5 SW0_BM> This buffer shall be returned to the SW, 233*5113495bSYour Name ring 0 234*5113495bSYour Name <enum 6 SW1_BM> This buffer shall be returned to the SW, 235*5113495bSYour Name ring 1 236*5113495bSYour Name <enum 7 SW2_BM> This buffer shall be returned to the SW, 237*5113495bSYour Name ring 2 238*5113495bSYour Name <enum 8 SW3_BM> This buffer shall be returned to the SW, 239*5113495bSYour Name ring 3 240*5113495bSYour Name <enum 9 SW4_BM> This buffer shall be returned to the SW, 241*5113495bSYour Name ring 4 242*5113495bSYour Name <enum 10 SW5_BM> This buffer shall be returned to the SW, 243*5113495bSYour Name ring 5 244*5113495bSYour Name <enum 11 SW6_BM> This buffer shall be returned to the SW, 245*5113495bSYour Name ring 6 246*5113495bSYour Name 247*5113495bSYour Name <legal 0-12> 248*5113495bSYour Name */ 249*5113495bSYour Name 250*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000008 251*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8 252*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB 11 253*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000f00 254*5113495bSYour Name 255*5113495bSYour Name 256*5113495bSYour Name /* Description SW_BUFFER_COOKIE 257*5113495bSYour Name 258*5113495bSYour Name Cookie field exclusively used by SW. 259*5113495bSYour Name 260*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 261*5113495bSYour Name 262*5113495bSYour Name HW ignores the contents, accept that it passes the programmed 263*5113495bSYour Name value on to other descriptors together with the physical 264*5113495bSYour Name address 265*5113495bSYour Name 266*5113495bSYour Name Field can be used by SW to for example associate the buffers 267*5113495bSYour Name physical address with the virtual address 268*5113495bSYour Name The bit definitions as used by SW are within SW HLD specification 269*5113495bSYour Name 270*5113495bSYour Name 271*5113495bSYour Name NOTE1: 272*5113495bSYour Name The three most significant bits can have a special meaning 273*5113495bSYour Name in case this struct is embedded in a TX_MPDU_DETAILS STRUCT, 274*5113495bSYour Name and field transmit_bw_restriction is set 275*5113495bSYour Name 276*5113495bSYour Name In case of NON punctured transmission: 277*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b000: 20 MHz TX only 278*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b001: 40 MHz TX only 279*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b010: 80 MHz TX only 280*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b011: 160 MHz TX only 281*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b101: 240 MHz TX only 282*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b100: 320 MHz TX only 283*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 284*5113495bSYour Name 285*5113495bSYour Name In case of punctured transmission: 286*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0000: pattern 0 only 287*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0001: pattern 1 only 288*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0010: pattern 2 only 289*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0011: pattern 3 only 290*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0100: pattern 4 only 291*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0101: pattern 5 only 292*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0110: pattern 6 only 293*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0111: pattern 7 only 294*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1000: pattern 8 only 295*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1001: pattern 9 only 296*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1010: pattern 10 only 297*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1011: pattern 11 only 298*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 299*5113495bSYour Name 300*5113495bSYour Name Note: a punctured transmission is indicated by the presence 301*5113495bSYour Name of TLV TX_PUNCTURE_SETUP embedded in the scheduler TLV 302*5113495bSYour Name 303*5113495bSYour Name <legal all> 304*5113495bSYour Name */ 305*5113495bSYour Name 306*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000008 307*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 12 308*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MSB 31 309*5113495bSYour Name #define RX_MSDU_LINK_NEXT_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff000 310*5113495bSYour Name 311*5113495bSYour Name 312*5113495bSYour Name /* Description RECEIVE_QUEUE_NUMBER 313*5113495bSYour Name 314*5113495bSYour Name Indicates the Receive queue to which this MPDU descriptor 315*5113495bSYour Name belongs 316*5113495bSYour Name Used for tracking, finding bugs and debugging. 317*5113495bSYour Name <legal all> 318*5113495bSYour Name */ 319*5113495bSYour Name 320*5113495bSYour Name #define RX_MSDU_LINK_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000000c 321*5113495bSYour Name #define RX_MSDU_LINK_RECEIVE_QUEUE_NUMBER_LSB 0 322*5113495bSYour Name #define RX_MSDU_LINK_RECEIVE_QUEUE_NUMBER_MSB 15 323*5113495bSYour Name #define RX_MSDU_LINK_RECEIVE_QUEUE_NUMBER_MASK 0x0000ffff 324*5113495bSYour Name 325*5113495bSYour Name 326*5113495bSYour Name /* Description FIRST_RX_MSDU_LINK_STRUCT 327*5113495bSYour Name 328*5113495bSYour Name When set, this RX_MSDU_link descriptor is the first one 329*5113495bSYour Name in the MSDU link list. Field MSDU_0 points to the very first 330*5113495bSYour Name MSDU buffer descriptor in the MPDU 331*5113495bSYour Name <legal all> 332*5113495bSYour Name */ 333*5113495bSYour Name 334*5113495bSYour Name #define RX_MSDU_LINK_FIRST_RX_MSDU_LINK_STRUCT_OFFSET 0x0000000c 335*5113495bSYour Name #define RX_MSDU_LINK_FIRST_RX_MSDU_LINK_STRUCT_LSB 16 336*5113495bSYour Name #define RX_MSDU_LINK_FIRST_RX_MSDU_LINK_STRUCT_MSB 16 337*5113495bSYour Name #define RX_MSDU_LINK_FIRST_RX_MSDU_LINK_STRUCT_MASK 0x00010000 338*5113495bSYour Name 339*5113495bSYour Name 340*5113495bSYour Name /* Description RESERVED_3A 341*5113495bSYour Name 342*5113495bSYour Name <legal 0> 343*5113495bSYour Name */ 344*5113495bSYour Name 345*5113495bSYour Name #define RX_MSDU_LINK_RESERVED_3A_OFFSET 0x0000000c 346*5113495bSYour Name #define RX_MSDU_LINK_RESERVED_3A_LSB 17 347*5113495bSYour Name #define RX_MSDU_LINK_RESERVED_3A_MSB 31 348*5113495bSYour Name #define RX_MSDU_LINK_RESERVED_3A_MASK 0xfffe0000 349*5113495bSYour Name 350*5113495bSYour Name 351*5113495bSYour Name /* Description PN_31_0 352*5113495bSYour Name 353*5113495bSYour Name Field only valid when First_RX_MSDU_link_struct is set. 354*5113495bSYour Name 355*5113495bSYour Name 356*5113495bSYour Name 31-0 bits of the 256-bit packet number bitmap. 357*5113495bSYour Name <legal all> 358*5113495bSYour Name */ 359*5113495bSYour Name 360*5113495bSYour Name #define RX_MSDU_LINK_PN_31_0_OFFSET 0x00000010 361*5113495bSYour Name #define RX_MSDU_LINK_PN_31_0_LSB 0 362*5113495bSYour Name #define RX_MSDU_LINK_PN_31_0_MSB 31 363*5113495bSYour Name #define RX_MSDU_LINK_PN_31_0_MASK 0xffffffff 364*5113495bSYour Name 365*5113495bSYour Name 366*5113495bSYour Name /* Description PN_63_32 367*5113495bSYour Name 368*5113495bSYour Name Field only valid when First_RX_MSDU_link_struct is set. 369*5113495bSYour Name 370*5113495bSYour Name 371*5113495bSYour Name 63-32 bits of the 256-bit packet number bitmap. 372*5113495bSYour Name <legal all> 373*5113495bSYour Name */ 374*5113495bSYour Name 375*5113495bSYour Name #define RX_MSDU_LINK_PN_63_32_OFFSET 0x00000014 376*5113495bSYour Name #define RX_MSDU_LINK_PN_63_32_LSB 0 377*5113495bSYour Name #define RX_MSDU_LINK_PN_63_32_MSB 31 378*5113495bSYour Name #define RX_MSDU_LINK_PN_63_32_MASK 0xffffffff 379*5113495bSYour Name 380*5113495bSYour Name 381*5113495bSYour Name /* Description PN_95_64 382*5113495bSYour Name 383*5113495bSYour Name Field only valid when First_RX_MSDU_link_struct is set. 384*5113495bSYour Name 385*5113495bSYour Name 386*5113495bSYour Name 95-64 bits of the 256-bit packet number bitmap. 387*5113495bSYour Name <legal all> 388*5113495bSYour Name */ 389*5113495bSYour Name 390*5113495bSYour Name #define RX_MSDU_LINK_PN_95_64_OFFSET 0x00000018 391*5113495bSYour Name #define RX_MSDU_LINK_PN_95_64_LSB 0 392*5113495bSYour Name #define RX_MSDU_LINK_PN_95_64_MSB 31 393*5113495bSYour Name #define RX_MSDU_LINK_PN_95_64_MASK 0xffffffff 394*5113495bSYour Name 395*5113495bSYour Name 396*5113495bSYour Name /* Description PN_127_96 397*5113495bSYour Name 398*5113495bSYour Name Field only valid when First_RX_MSDU_link_struct is set. 399*5113495bSYour Name 400*5113495bSYour Name 401*5113495bSYour Name 127-96 bits of the 256-bit packet number bitmap. 402*5113495bSYour Name <legal all> 403*5113495bSYour Name */ 404*5113495bSYour Name 405*5113495bSYour Name #define RX_MSDU_LINK_PN_127_96_OFFSET 0x0000001c 406*5113495bSYour Name #define RX_MSDU_LINK_PN_127_96_LSB 0 407*5113495bSYour Name #define RX_MSDU_LINK_PN_127_96_MSB 31 408*5113495bSYour Name #define RX_MSDU_LINK_PN_127_96_MASK 0xffffffff 409*5113495bSYour Name 410*5113495bSYour Name 411*5113495bSYour Name /* Description MSDU_0 412*5113495bSYour Name 413*5113495bSYour Name When First_RX_MSDU_link_struct is set, this MSDU is the 414*5113495bSYour Name first in the MPDU 415*5113495bSYour Name 416*5113495bSYour Name When First_RX_MSDU_link_struct is NOT set, this MSDU follows 417*5113495bSYour Name the last MSDU in the previous RX_MSDU_link data structure 418*5113495bSYour Name 419*5113495bSYour Name */ 420*5113495bSYour Name 421*5113495bSYour Name 422*5113495bSYour Name /* Description BUFFER_ADDR_INFO_DETAILS 423*5113495bSYour Name 424*5113495bSYour Name Consumer: REO/SW 425*5113495bSYour Name Producer: RXDMA 426*5113495bSYour Name 427*5113495bSYour Name Details of the physical address of the buffer containing 428*5113495bSYour Name an MSDU (or entire MPDU) 429*5113495bSYour Name */ 430*5113495bSYour Name 431*5113495bSYour Name 432*5113495bSYour Name /* Description BUFFER_ADDR_31_0 433*5113495bSYour Name 434*5113495bSYour Name Address (lower 32 bits) of the MSDU buffer OR MSDU_EXTENSION 435*5113495bSYour Name descriptor OR Link Descriptor 436*5113495bSYour Name 437*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 438*5113495bSYour Name <legal all> 439*5113495bSYour Name */ 440*5113495bSYour Name 441*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_OFFSET 0x00000020 442*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_LSB 0 443*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_MSB 31 444*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_MASK 0xffffffff 445*5113495bSYour Name 446*5113495bSYour Name 447*5113495bSYour Name /* Description BUFFER_ADDR_39_32 448*5113495bSYour Name 449*5113495bSYour Name Address (upper 8 bits) of the MSDU buffer OR MSDU_EXTENSION 450*5113495bSYour Name descriptor OR Link Descriptor 451*5113495bSYour Name 452*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 453*5113495bSYour Name <legal all> 454*5113495bSYour Name */ 455*5113495bSYour Name 456*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_OFFSET 0x00000024 457*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_LSB 0 458*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_MSB 7 459*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_MASK 0x000000ff 460*5113495bSYour Name 461*5113495bSYour Name 462*5113495bSYour Name /* Description RETURN_BUFFER_MANAGER 463*5113495bSYour Name 464*5113495bSYour Name Consumer: WBM 465*5113495bSYour Name Producer: SW/FW 466*5113495bSYour Name 467*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 468*5113495bSYour Name 469*5113495bSYour Name Indicates to which buffer manager the buffer OR MSDU_EXTENSION 470*5113495bSYour Name descriptor OR link descriptor that is being pointed to 471*5113495bSYour Name shall be returned after the frame has been processed. It 472*5113495bSYour Name is used by WBM for routing purposes. 473*5113495bSYour Name 474*5113495bSYour Name <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned 475*5113495bSYour Name to the WMB buffer idle list 476*5113495bSYour Name <enum 1 WBM_CHIP0_IDLE_DESC_LIST> This buffer shall be returned 477*5113495bSYour Name to the WBM idle link descriptor idle list, where the chip 478*5113495bSYour Name 0 WBM is chosen in case of a multi-chip config 479*5113495bSYour Name <enum 2 WBM_CHIP1_IDLE_DESC_LIST> This buffer shall be returned 480*5113495bSYour Name to the chip 1 WBM idle link descriptor idle list 481*5113495bSYour Name <enum 3 WBM_CHIP2_IDLE_DESC_LIST> This buffer shall be returned 482*5113495bSYour Name to the chip 2 WBM idle link descriptor idle list 483*5113495bSYour Name <enum 12 WBM_CHIP3_IDLE_DESC_LIST> This buffer shall be 484*5113495bSYour Name returned to chip 3 WBM idle link descriptor idle list 485*5113495bSYour Name <enum 4 FW_BM> This buffer shall be returned to the FW 486*5113495bSYour Name <enum 5 SW0_BM> This buffer shall be returned to the SW, 487*5113495bSYour Name ring 0 488*5113495bSYour Name <enum 6 SW1_BM> This buffer shall be returned to the SW, 489*5113495bSYour Name ring 1 490*5113495bSYour Name <enum 7 SW2_BM> This buffer shall be returned to the SW, 491*5113495bSYour Name ring 2 492*5113495bSYour Name <enum 8 SW3_BM> This buffer shall be returned to the SW, 493*5113495bSYour Name ring 3 494*5113495bSYour Name <enum 9 SW4_BM> This buffer shall be returned to the SW, 495*5113495bSYour Name ring 4 496*5113495bSYour Name <enum 10 SW5_BM> This buffer shall be returned to the SW, 497*5113495bSYour Name ring 5 498*5113495bSYour Name <enum 11 SW6_BM> This buffer shall be returned to the SW, 499*5113495bSYour Name ring 6 500*5113495bSYour Name 501*5113495bSYour Name <legal 0-12> 502*5113495bSYour Name */ 503*5113495bSYour Name 504*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_OFFSET 0x00000024 505*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_LSB 8 506*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_MSB 11 507*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_MASK 0x00000f00 508*5113495bSYour Name 509*5113495bSYour Name 510*5113495bSYour Name /* Description SW_BUFFER_COOKIE 511*5113495bSYour Name 512*5113495bSYour Name Cookie field exclusively used by SW. 513*5113495bSYour Name 514*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 515*5113495bSYour Name 516*5113495bSYour Name HW ignores the contents, accept that it passes the programmed 517*5113495bSYour Name value on to other descriptors together with the physical 518*5113495bSYour Name address 519*5113495bSYour Name 520*5113495bSYour Name Field can be used by SW to for example associate the buffers 521*5113495bSYour Name physical address with the virtual address 522*5113495bSYour Name The bit definitions as used by SW are within SW HLD specification 523*5113495bSYour Name 524*5113495bSYour Name 525*5113495bSYour Name NOTE1: 526*5113495bSYour Name The three most significant bits can have a special meaning 527*5113495bSYour Name in case this struct is embedded in a TX_MPDU_DETAILS STRUCT, 528*5113495bSYour Name and field transmit_bw_restriction is set 529*5113495bSYour Name 530*5113495bSYour Name In case of NON punctured transmission: 531*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b000: 20 MHz TX only 532*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b001: 40 MHz TX only 533*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b010: 80 MHz TX only 534*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b011: 160 MHz TX only 535*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b101: 240 MHz TX only 536*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b100: 320 MHz TX only 537*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 538*5113495bSYour Name 539*5113495bSYour Name In case of punctured transmission: 540*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0000: pattern 0 only 541*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0001: pattern 1 only 542*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0010: pattern 2 only 543*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0011: pattern 3 only 544*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0100: pattern 4 only 545*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0101: pattern 5 only 546*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0110: pattern 6 only 547*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0111: pattern 7 only 548*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1000: pattern 8 only 549*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1001: pattern 9 only 550*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1010: pattern 10 only 551*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1011: pattern 11 only 552*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 553*5113495bSYour Name 554*5113495bSYour Name Note: a punctured transmission is indicated by the presence 555*5113495bSYour Name of TLV TX_PUNCTURE_SETUP embedded in the scheduler TLV 556*5113495bSYour Name 557*5113495bSYour Name <legal all> 558*5113495bSYour Name */ 559*5113495bSYour Name 560*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_OFFSET 0x00000024 561*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_LSB 12 562*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_MSB 31 563*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_MASK 0xfffff000 564*5113495bSYour Name 565*5113495bSYour Name 566*5113495bSYour Name /* Description RX_MSDU_DESC_INFO_DETAILS 567*5113495bSYour Name 568*5113495bSYour Name Consumer: REO/SW 569*5113495bSYour Name Producer: RXDMA 570*5113495bSYour Name 571*5113495bSYour Name General information related to the MSDU that should be passed 572*5113495bSYour Name on from RXDMA all the way to to the REO destination ring. 573*5113495bSYour Name 574*5113495bSYour Name */ 575*5113495bSYour Name 576*5113495bSYour Name 577*5113495bSYour Name /* Description FIRST_MSDU_IN_MPDU_FLAG 578*5113495bSYour Name 579*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 580*5113495bSYour Name multiple buffers, this field will be valid in the Last 581*5113495bSYour Name buffer used by the MSDU 582*5113495bSYour Name 583*5113495bSYour Name <enum 0 Not_first_msdu> This is not the first MSDU in the 584*5113495bSYour Name MPDU. 585*5113495bSYour Name <enum 1 first_msdu> This MSDU is the first one in the MPDU. 586*5113495bSYour Name 587*5113495bSYour Name 588*5113495bSYour Name <legal all> 589*5113495bSYour Name */ 590*5113495bSYour Name 591*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000028 592*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_LSB 0 593*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MSB 0 594*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001 595*5113495bSYour Name 596*5113495bSYour Name 597*5113495bSYour Name /* Description LAST_MSDU_IN_MPDU_FLAG 598*5113495bSYour Name 599*5113495bSYour Name Consumer: WBM/REO/SW/FW 600*5113495bSYour Name Producer: RXDMA 601*5113495bSYour Name 602*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 603*5113495bSYour Name multiple buffers, this field will be valid in the Last 604*5113495bSYour Name buffer used by the MSDU 605*5113495bSYour Name 606*5113495bSYour Name <enum 0 Not_last_msdu> There are more MSDUs linked to this 607*5113495bSYour Name MSDU that belongs to this MPDU 608*5113495bSYour Name <enum 1 Last_msdu> this MSDU is the last one in the MPDU. 609*5113495bSYour Name This setting is only allowed in combination with 'Msdu_continuation' 610*5113495bSYour Name set to 0. This implies that when an msdu is spread out over 611*5113495bSYour Name multiple buffers and thus msdu_continuation is set, only 612*5113495bSYour Name for the very last buffer of the msdu, can the 'last_msdu_in_mpdu_flag' 613*5113495bSYour Name be set. 614*5113495bSYour Name 615*5113495bSYour Name When both first_msdu_in_mpdu_flag and last_msdu_in_mpdu_flag 616*5113495bSYour Name are set, the MPDU that this MSDU belongs to only contains 617*5113495bSYour Name a single MSDU. 618*5113495bSYour Name 619*5113495bSYour Name 620*5113495bSYour Name <legal all> 621*5113495bSYour Name */ 622*5113495bSYour Name 623*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000028 624*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_LSB 1 625*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MSB 1 626*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002 627*5113495bSYour Name 628*5113495bSYour Name 629*5113495bSYour Name /* Description MSDU_CONTINUATION 630*5113495bSYour Name 631*5113495bSYour Name When set, this MSDU buffer was not able to hold the entire 632*5113495bSYour Name MSDU. The next buffer will therefor contain additional 633*5113495bSYour Name information related to this MSDU. 634*5113495bSYour Name 635*5113495bSYour Name <legal all> 636*5113495bSYour Name */ 637*5113495bSYour Name 638*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_OFFSET 0x00000028 639*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_LSB 2 640*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MSB 2 641*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MASK 0x00000004 642*5113495bSYour Name 643*5113495bSYour Name 644*5113495bSYour Name /* Description MSDU_LENGTH 645*5113495bSYour Name 646*5113495bSYour Name Parsed from RX_MSDU_START TLV . In the case MSDU spans over 647*5113495bSYour Name multiple buffers, this field will be valid in the First 648*5113495bSYour Name buffer used by MSDU. 649*5113495bSYour Name 650*5113495bSYour Name Full MSDU length in bytes after decapsulation. 651*5113495bSYour Name 652*5113495bSYour Name This field is still valid for MPDU frames without A-MSDU. 653*5113495bSYour Name It still represents MSDU length after decapsulation 654*5113495bSYour Name 655*5113495bSYour Name Or in case of RAW MPDUs, it indicates the length of the 656*5113495bSYour Name entire MPDU (without FCS field) 657*5113495bSYour Name <legal all> 658*5113495bSYour Name */ 659*5113495bSYour Name 660*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_OFFSET 0x00000028 661*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_LSB 3 662*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MSB 16 663*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MASK 0x0001fff8 664*5113495bSYour Name 665*5113495bSYour Name 666*5113495bSYour Name /* Description MSDU_DROP 667*5113495bSYour Name 668*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 669*5113495bSYour Name multiple buffers, this field will be valid in the Last 670*5113495bSYour Name buffer used by the MSDU 671*5113495bSYour Name 672*5113495bSYour Name When set, REO shall drop this MSDU and not forward it to 673*5113495bSYour Name any other ring... 674*5113495bSYour Name <legal all> 675*5113495bSYour Name */ 676*5113495bSYour Name 677*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_OFFSET 0x00000028 678*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_LSB 17 679*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MSB 17 680*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MASK 0x00020000 681*5113495bSYour Name 682*5113495bSYour Name 683*5113495bSYour Name /* Description SA_IS_VALID 684*5113495bSYour Name 685*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 686*5113495bSYour Name multiple buffers, this field will be valid in the Last 687*5113495bSYour Name buffer used by the MSDU 688*5113495bSYour Name 689*5113495bSYour Name Indicates that OLE found a valid SA entry for this MSDU 690*5113495bSYour Name <legal all> 691*5113495bSYour Name */ 692*5113495bSYour Name 693*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000028 694*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 18 695*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MSB 18 696*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x00040000 697*5113495bSYour Name 698*5113495bSYour Name 699*5113495bSYour Name /* Description DA_IS_VALID 700*5113495bSYour Name 701*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 702*5113495bSYour Name multiple buffers, this field will be valid in the Last 703*5113495bSYour Name buffer used by the MSDU 704*5113495bSYour Name 705*5113495bSYour Name Indicates that OLE found a valid DA entry for this MSDU 706*5113495bSYour Name <legal all> 707*5113495bSYour Name */ 708*5113495bSYour Name 709*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000028 710*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 19 711*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MSB 19 712*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x00080000 713*5113495bSYour Name 714*5113495bSYour Name 715*5113495bSYour Name /* Description DA_IS_MCBC 716*5113495bSYour Name 717*5113495bSYour Name Field Only valid if "da_is_valid" is set 718*5113495bSYour Name 719*5113495bSYour Name Indicates the DA address was a Multicast of Broadcast address 720*5113495bSYour Name for this MSDU 721*5113495bSYour Name <legal all> 722*5113495bSYour Name */ 723*5113495bSYour Name 724*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000028 725*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 20 726*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MSB 20 727*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x00100000 728*5113495bSYour Name 729*5113495bSYour Name 730*5113495bSYour Name /* Description L3_HEADER_PADDING_MSB 731*5113495bSYour Name 732*5113495bSYour Name Passed on from 'RX_MSDU_END' TLV (only the MSB is reported 733*5113495bSYour Name as the LSB is always zero) 734*5113495bSYour Name Number of bytes padded to make sure that the L3 header will 735*5113495bSYour Name always start of a Dword boundary 736*5113495bSYour Name <legal all> 737*5113495bSYour Name */ 738*5113495bSYour Name 739*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_OFFSET 0x00000028 740*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_LSB 21 741*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MSB 21 742*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MASK 0x00200000 743*5113495bSYour Name 744*5113495bSYour Name 745*5113495bSYour Name /* Description TCP_UDP_CHKSUM_FAIL 746*5113495bSYour Name 747*5113495bSYour Name Passed on from 'RX_ATTENTION' TLV 748*5113495bSYour Name Indicates that the computed checksum did not match the checksum 749*5113495bSYour Name in the TCP/UDP header. 750*5113495bSYour Name <legal all> 751*5113495bSYour Name */ 752*5113495bSYour Name 753*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000028 754*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_LSB 22 755*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MSB 22 756*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MASK 0x00400000 757*5113495bSYour Name 758*5113495bSYour Name 759*5113495bSYour Name /* Description IP_CHKSUM_FAIL 760*5113495bSYour Name 761*5113495bSYour Name Passed on from 'RX_ATTENTION' TLV 762*5113495bSYour Name Indicates that the computed checksum did not match the checksum 763*5113495bSYour Name in the IP header. 764*5113495bSYour Name <legal all> 765*5113495bSYour Name */ 766*5113495bSYour Name 767*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_OFFSET 0x00000028 768*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_LSB 23 769*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MSB 23 770*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MASK 0x00800000 771*5113495bSYour Name 772*5113495bSYour Name 773*5113495bSYour Name /* Description FR_DS 774*5113495bSYour Name 775*5113495bSYour Name Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' 776*5113495bSYour Name TLV 777*5113495bSYour Name Set if the 'from DS' bit is set in the frame control. 778*5113495bSYour Name <legal all> 779*5113495bSYour Name */ 780*5113495bSYour Name 781*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_FR_DS_OFFSET 0x00000028 782*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_FR_DS_LSB 24 783*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MSB 24 784*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MASK 0x01000000 785*5113495bSYour Name 786*5113495bSYour Name 787*5113495bSYour Name /* Description TO_DS 788*5113495bSYour Name 789*5113495bSYour Name Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' 790*5113495bSYour Name TLV 791*5113495bSYour Name Set if the 'to DS' bit is set in the frame control. 792*5113495bSYour Name <legal all> 793*5113495bSYour Name */ 794*5113495bSYour Name 795*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_TO_DS_OFFSET 0x00000028 796*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_TO_DS_LSB 25 797*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MSB 25 798*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MASK 0x02000000 799*5113495bSYour Name 800*5113495bSYour Name 801*5113495bSYour Name /* Description INTRA_BSS 802*5113495bSYour Name 803*5113495bSYour Name This packet needs intra-BSS routing by SW as the 'vdev_id' 804*5113495bSYour Name for the destination is the same as the 'vdev_id' (from 'RX_MPDU_PCU_START') 805*5113495bSYour Name that this MSDU was got in. 806*5113495bSYour Name 807*5113495bSYour Name <legal all> 808*5113495bSYour Name */ 809*5113495bSYour Name 810*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_OFFSET 0x00000028 811*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_LSB 26 812*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MSB 26 813*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MASK 0x04000000 814*5113495bSYour Name 815*5113495bSYour Name 816*5113495bSYour Name /* Description DEST_CHIP_ID 817*5113495bSYour Name 818*5113495bSYour Name If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY' 819*5113495bSYour Name to support intra-BSS routing with multi-chip multi-link 820*5113495bSYour Name operation. 821*5113495bSYour Name 822*5113495bSYour Name This indicates into which chip's TCL the packet should be 823*5113495bSYour Name queued. 824*5113495bSYour Name 825*5113495bSYour Name <legal all> 826*5113495bSYour Name */ 827*5113495bSYour Name 828*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_OFFSET 0x00000028 829*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_LSB 27 830*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MSB 28 831*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MASK 0x18000000 832*5113495bSYour Name 833*5113495bSYour Name 834*5113495bSYour Name /* Description DECAP_FORMAT 835*5113495bSYour Name 836*5113495bSYour Name Indicates the format after decapsulation: 837*5113495bSYour Name 838*5113495bSYour Name <enum 0 RAW> No encapsulation 839*5113495bSYour Name <enum 1 Native_WiFi> 840*5113495bSYour Name <enum 2 Ethernet> Ethernet 2 (DIX) or 802.3 (uses SNAP/LLC) 841*5113495bSYour Name 842*5113495bSYour Name <enum 3 802_3> Indicate Ethernet 843*5113495bSYour Name 844*5113495bSYour Name <legal all> 845*5113495bSYour Name */ 846*5113495bSYour Name 847*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_OFFSET 0x00000028 848*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_LSB 29 849*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MSB 30 850*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MASK 0x60000000 851*5113495bSYour Name 852*5113495bSYour Name 853*5113495bSYour Name /* Description DEST_CHIP_PMAC_ID 854*5113495bSYour Name 855*5113495bSYour Name If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY' 856*5113495bSYour Name to support intra-BSS routing with multi-chip multi-link 857*5113495bSYour Name operation. 858*5113495bSYour Name 859*5113495bSYour Name This indicates into which link/'vdev' the packet should 860*5113495bSYour Name be queued in TCL. 861*5113495bSYour Name 862*5113495bSYour Name <legal all> 863*5113495bSYour Name */ 864*5113495bSYour Name 865*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_OFFSET 0x00000028 866*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_LSB 31 867*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_MSB 31 868*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_MASK 0x80000000 869*5113495bSYour Name 870*5113495bSYour Name 871*5113495bSYour Name /* Description RX_MSDU_EXT_DESC_INFO_DETAILS 872*5113495bSYour Name 873*5113495bSYour Name Consumer: REO/SW 874*5113495bSYour Name Producer: RXDMA 875*5113495bSYour Name 876*5113495bSYour Name Extended information related to the MSDU that is passed 877*5113495bSYour Name on from RXDMA to REO but not part of the REO destination 878*5113495bSYour Name ring. Some fields are passed on to PPE. 879*5113495bSYour Name */ 880*5113495bSYour Name 881*5113495bSYour Name 882*5113495bSYour Name /* Description REO_DESTINATION_INDICATION 883*5113495bSYour Name 884*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 885*5113495bSYour Name multiple buffers, this field will be valid in the Last 886*5113495bSYour Name buffer used by the MSDU 887*5113495bSYour Name 888*5113495bSYour Name The ID of the REO exit ring where the MSDU frame shall push 889*5113495bSYour Name after (MPDU level) reordering has finished. 890*5113495bSYour Name 891*5113495bSYour Name <enum 0 reo_destination_sw0> Reo will push the frame into 892*5113495bSYour Name the REO2SW0 ring 893*5113495bSYour Name <enum 1 reo_destination_sw1> Reo will push the frame into 894*5113495bSYour Name the REO2SW1 ring 895*5113495bSYour Name <enum 2 reo_destination_sw2> Reo will push the frame into 896*5113495bSYour Name the REO2SW2 ring 897*5113495bSYour Name <enum 3 reo_destination_sw3> Reo will push the frame into 898*5113495bSYour Name the REO2SW3 ring 899*5113495bSYour Name <enum 4 reo_destination_sw4> Reo will push the frame into 900*5113495bSYour Name the REO2SW4 ring 901*5113495bSYour Name <enum 5 reo_destination_release> Reo will push the frame 902*5113495bSYour Name into the REO_release ring 903*5113495bSYour Name <enum 6 reo_destination_fw> Reo will push the frame into 904*5113495bSYour Name the REO2FW ring 905*5113495bSYour Name <enum 7 reo_destination_sw5> Reo will push the frame into 906*5113495bSYour Name the REO2SW5 ring (REO remaps this in chips without REO2SW5 907*5113495bSYour Name ring, e.g. Pine) 908*5113495bSYour Name <enum 8 reo_destination_sw6> Reo will push the frame into 909*5113495bSYour Name the REO2SW6 ring (REO remaps this in chips without REO2SW6 910*5113495bSYour Name ring, e.g. Pine) 911*5113495bSYour Name <enum 9 reo_destination_sw7> Reo will push the frame into 912*5113495bSYour Name the REO2SW7 ring (REO remaps this in chips without REO2SW7 913*5113495bSYour Name ring) 914*5113495bSYour Name <enum 10 reo_destination_sw8> Reo will push the frame into 915*5113495bSYour Name the REO2SW8 ring (REO remaps this in chips without REO2SW8 916*5113495bSYour Name ring) 917*5113495bSYour Name <enum 11 reo_destination_11> REO remaps this 918*5113495bSYour Name <enum 12 reo_destination_12> REO remaps this <enum 13 reo_destination_13> 919*5113495bSYour Name REO remaps this 920*5113495bSYour Name <enum 14 reo_destination_14> REO remaps this 921*5113495bSYour Name <enum 15 reo_destination_15> REO remaps this 922*5113495bSYour Name <enum 16 reo_destination_16> REO remaps this 923*5113495bSYour Name <enum 17 reo_destination_17> REO remaps this 924*5113495bSYour Name <enum 18 reo_destination_18> REO remaps this 925*5113495bSYour Name <enum 19 reo_destination_19> REO remaps this 926*5113495bSYour Name <enum 20 reo_destination_20> REO remaps this 927*5113495bSYour Name <enum 21 reo_destination_21> REO remaps this 928*5113495bSYour Name <enum 22 reo_destination_22> REO remaps this 929*5113495bSYour Name <enum 23 reo_destination_23> REO remaps this 930*5113495bSYour Name <enum 24 reo_destination_24> REO remaps this 931*5113495bSYour Name <enum 25 reo_destination_25> REO remaps this 932*5113495bSYour Name <enum 26 reo_destination_26> REO remaps this 933*5113495bSYour Name <enum 27 reo_destination_27> REO remaps this 934*5113495bSYour Name <enum 28 reo_destination_28> REO remaps this 935*5113495bSYour Name <enum 29 reo_destination_29> REO remaps this 936*5113495bSYour Name <enum 30 reo_destination_30> REO remaps this 937*5113495bSYour Name <enum 31 reo_destination_31> REO remaps this 938*5113495bSYour Name 939*5113495bSYour Name <legal all> 940*5113495bSYour Name */ 941*5113495bSYour Name 942*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_OFFSET 0x0000002c 943*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_LSB 0 944*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MSB 4 945*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MASK 0x0000001f 946*5113495bSYour Name 947*5113495bSYour Name 948*5113495bSYour Name /* Description SERVICE_CODE 949*5113495bSYour Name 950*5113495bSYour Name Opaque service code between PPE and Wi-Fi 951*5113495bSYour Name 952*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 953*5113495bSYour Name ('REO_TO_PPE_RING'). 954*5113495bSYour Name 955*5113495bSYour Name <legal all> 956*5113495bSYour Name */ 957*5113495bSYour Name 958*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_OFFSET 0x0000002c 959*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_LSB 5 960*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_MSB 13 961*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_MASK 0x00003fe0 962*5113495bSYour Name 963*5113495bSYour Name 964*5113495bSYour Name /* Description PRIORITY_VALID 965*5113495bSYour Name 966*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 967*5113495bSYour Name ('REO_TO_PPE_RING'). 968*5113495bSYour Name 969*5113495bSYour Name <legal all> 970*5113495bSYour Name */ 971*5113495bSYour Name 972*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_OFFSET 0x0000002c 973*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_LSB 14 974*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_MSB 14 975*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_MASK 0x00004000 976*5113495bSYour Name 977*5113495bSYour Name 978*5113495bSYour Name /* Description DATA_OFFSET 979*5113495bSYour Name 980*5113495bSYour Name The offset to Rx packet data within the buffer (including 981*5113495bSYour Name Rx DMA offset programming and L3 header padding inserted 982*5113495bSYour Name by Rx OLE). 983*5113495bSYour Name 984*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 985*5113495bSYour Name ('REO_TO_PPE_RING'). 986*5113495bSYour Name 987*5113495bSYour Name <legal all> 988*5113495bSYour Name */ 989*5113495bSYour Name 990*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_OFFSET 0x0000002c 991*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_LSB 15 992*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_MSB 26 993*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_MASK 0x07ff8000 994*5113495bSYour Name 995*5113495bSYour Name 996*5113495bSYour Name /* Description SRC_LINK_ID 997*5113495bSYour Name 998*5113495bSYour Name Consumer: SW 999*5113495bSYour Name Producer: RXDMA 1000*5113495bSYour Name 1001*5113495bSYour Name Set to the link ID of the PMAC that received the frame 1002*5113495bSYour Name <legal all> 1003*5113495bSYour Name */ 1004*5113495bSYour Name 1005*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_OFFSET 0x0000002c 1006*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_LSB 27 1007*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_MSB 29 1008*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_MASK 0x38000000 1009*5113495bSYour Name 1010*5113495bSYour Name 1011*5113495bSYour Name /* Description RESERVED_0A 1012*5113495bSYour Name 1013*5113495bSYour Name <legal 0> 1014*5113495bSYour Name */ 1015*5113495bSYour Name 1016*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_OFFSET 0x0000002c 1017*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_LSB 30 1018*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_MSB 31 1019*5113495bSYour Name #define RX_MSDU_LINK_MSDU_0_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_MASK 0xc0000000 1020*5113495bSYour Name 1021*5113495bSYour Name 1022*5113495bSYour Name /* Description MSDU_1 1023*5113495bSYour Name 1024*5113495bSYour Name Details of next MSDU in this (MSDU flow) linked list 1025*5113495bSYour Name */ 1026*5113495bSYour Name 1027*5113495bSYour Name 1028*5113495bSYour Name /* Description BUFFER_ADDR_INFO_DETAILS 1029*5113495bSYour Name 1030*5113495bSYour Name Consumer: REO/SW 1031*5113495bSYour Name Producer: RXDMA 1032*5113495bSYour Name 1033*5113495bSYour Name Details of the physical address of the buffer containing 1034*5113495bSYour Name an MSDU (or entire MPDU) 1035*5113495bSYour Name */ 1036*5113495bSYour Name 1037*5113495bSYour Name 1038*5113495bSYour Name /* Description BUFFER_ADDR_31_0 1039*5113495bSYour Name 1040*5113495bSYour Name Address (lower 32 bits) of the MSDU buffer OR MSDU_EXTENSION 1041*5113495bSYour Name descriptor OR Link Descriptor 1042*5113495bSYour Name 1043*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 1044*5113495bSYour Name <legal all> 1045*5113495bSYour Name */ 1046*5113495bSYour Name 1047*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_OFFSET 0x00000030 1048*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_LSB 0 1049*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_MSB 31 1050*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_MASK 0xffffffff 1051*5113495bSYour Name 1052*5113495bSYour Name 1053*5113495bSYour Name /* Description BUFFER_ADDR_39_32 1054*5113495bSYour Name 1055*5113495bSYour Name Address (upper 8 bits) of the MSDU buffer OR MSDU_EXTENSION 1056*5113495bSYour Name descriptor OR Link Descriptor 1057*5113495bSYour Name 1058*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 1059*5113495bSYour Name <legal all> 1060*5113495bSYour Name */ 1061*5113495bSYour Name 1062*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_OFFSET 0x00000034 1063*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_LSB 0 1064*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_MSB 7 1065*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_MASK 0x000000ff 1066*5113495bSYour Name 1067*5113495bSYour Name 1068*5113495bSYour Name /* Description RETURN_BUFFER_MANAGER 1069*5113495bSYour Name 1070*5113495bSYour Name Consumer: WBM 1071*5113495bSYour Name Producer: SW/FW 1072*5113495bSYour Name 1073*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 1074*5113495bSYour Name 1075*5113495bSYour Name Indicates to which buffer manager the buffer OR MSDU_EXTENSION 1076*5113495bSYour Name descriptor OR link descriptor that is being pointed to 1077*5113495bSYour Name shall be returned after the frame has been processed. It 1078*5113495bSYour Name is used by WBM for routing purposes. 1079*5113495bSYour Name 1080*5113495bSYour Name <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned 1081*5113495bSYour Name to the WMB buffer idle list 1082*5113495bSYour Name <enum 1 WBM_CHIP0_IDLE_DESC_LIST> This buffer shall be returned 1083*5113495bSYour Name to the WBM idle link descriptor idle list, where the chip 1084*5113495bSYour Name 0 WBM is chosen in case of a multi-chip config 1085*5113495bSYour Name <enum 2 WBM_CHIP1_IDLE_DESC_LIST> This buffer shall be returned 1086*5113495bSYour Name to the chip 1 WBM idle link descriptor idle list 1087*5113495bSYour Name <enum 3 WBM_CHIP2_IDLE_DESC_LIST> This buffer shall be returned 1088*5113495bSYour Name to the chip 2 WBM idle link descriptor idle list 1089*5113495bSYour Name <enum 12 WBM_CHIP3_IDLE_DESC_LIST> This buffer shall be 1090*5113495bSYour Name returned to chip 3 WBM idle link descriptor idle list 1091*5113495bSYour Name <enum 4 FW_BM> This buffer shall be returned to the FW 1092*5113495bSYour Name <enum 5 SW0_BM> This buffer shall be returned to the SW, 1093*5113495bSYour Name ring 0 1094*5113495bSYour Name <enum 6 SW1_BM> This buffer shall be returned to the SW, 1095*5113495bSYour Name ring 1 1096*5113495bSYour Name <enum 7 SW2_BM> This buffer shall be returned to the SW, 1097*5113495bSYour Name ring 2 1098*5113495bSYour Name <enum 8 SW3_BM> This buffer shall be returned to the SW, 1099*5113495bSYour Name ring 3 1100*5113495bSYour Name <enum 9 SW4_BM> This buffer shall be returned to the SW, 1101*5113495bSYour Name ring 4 1102*5113495bSYour Name <enum 10 SW5_BM> This buffer shall be returned to the SW, 1103*5113495bSYour Name ring 5 1104*5113495bSYour Name <enum 11 SW6_BM> This buffer shall be returned to the SW, 1105*5113495bSYour Name ring 6 1106*5113495bSYour Name 1107*5113495bSYour Name <legal 0-12> 1108*5113495bSYour Name */ 1109*5113495bSYour Name 1110*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_OFFSET 0x00000034 1111*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_LSB 8 1112*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_MSB 11 1113*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_MASK 0x00000f00 1114*5113495bSYour Name 1115*5113495bSYour Name 1116*5113495bSYour Name /* Description SW_BUFFER_COOKIE 1117*5113495bSYour Name 1118*5113495bSYour Name Cookie field exclusively used by SW. 1119*5113495bSYour Name 1120*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 1121*5113495bSYour Name 1122*5113495bSYour Name HW ignores the contents, accept that it passes the programmed 1123*5113495bSYour Name value on to other descriptors together with the physical 1124*5113495bSYour Name address 1125*5113495bSYour Name 1126*5113495bSYour Name Field can be used by SW to for example associate the buffers 1127*5113495bSYour Name physical address with the virtual address 1128*5113495bSYour Name The bit definitions as used by SW are within SW HLD specification 1129*5113495bSYour Name 1130*5113495bSYour Name 1131*5113495bSYour Name NOTE1: 1132*5113495bSYour Name The three most significant bits can have a special meaning 1133*5113495bSYour Name in case this struct is embedded in a TX_MPDU_DETAILS STRUCT, 1134*5113495bSYour Name and field transmit_bw_restriction is set 1135*5113495bSYour Name 1136*5113495bSYour Name In case of NON punctured transmission: 1137*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b000: 20 MHz TX only 1138*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b001: 40 MHz TX only 1139*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b010: 80 MHz TX only 1140*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b011: 160 MHz TX only 1141*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b101: 240 MHz TX only 1142*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b100: 320 MHz TX only 1143*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 1144*5113495bSYour Name 1145*5113495bSYour Name In case of punctured transmission: 1146*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0000: pattern 0 only 1147*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0001: pattern 1 only 1148*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0010: pattern 2 only 1149*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0011: pattern 3 only 1150*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0100: pattern 4 only 1151*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0101: pattern 5 only 1152*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0110: pattern 6 only 1153*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0111: pattern 7 only 1154*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1000: pattern 8 only 1155*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1001: pattern 9 only 1156*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1010: pattern 10 only 1157*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1011: pattern 11 only 1158*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 1159*5113495bSYour Name 1160*5113495bSYour Name Note: a punctured transmission is indicated by the presence 1161*5113495bSYour Name of TLV TX_PUNCTURE_SETUP embedded in the scheduler TLV 1162*5113495bSYour Name 1163*5113495bSYour Name <legal all> 1164*5113495bSYour Name */ 1165*5113495bSYour Name 1166*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_OFFSET 0x00000034 1167*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_LSB 12 1168*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_MSB 31 1169*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_MASK 0xfffff000 1170*5113495bSYour Name 1171*5113495bSYour Name 1172*5113495bSYour Name /* Description RX_MSDU_DESC_INFO_DETAILS 1173*5113495bSYour Name 1174*5113495bSYour Name Consumer: REO/SW 1175*5113495bSYour Name Producer: RXDMA 1176*5113495bSYour Name 1177*5113495bSYour Name General information related to the MSDU that should be passed 1178*5113495bSYour Name on from RXDMA all the way to to the REO destination ring. 1179*5113495bSYour Name 1180*5113495bSYour Name */ 1181*5113495bSYour Name 1182*5113495bSYour Name 1183*5113495bSYour Name /* Description FIRST_MSDU_IN_MPDU_FLAG 1184*5113495bSYour Name 1185*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 1186*5113495bSYour Name multiple buffers, this field will be valid in the Last 1187*5113495bSYour Name buffer used by the MSDU 1188*5113495bSYour Name 1189*5113495bSYour Name <enum 0 Not_first_msdu> This is not the first MSDU in the 1190*5113495bSYour Name MPDU. 1191*5113495bSYour Name <enum 1 first_msdu> This MSDU is the first one in the MPDU. 1192*5113495bSYour Name 1193*5113495bSYour Name 1194*5113495bSYour Name <legal all> 1195*5113495bSYour Name */ 1196*5113495bSYour Name 1197*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000038 1198*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_LSB 0 1199*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MSB 0 1200*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001 1201*5113495bSYour Name 1202*5113495bSYour Name 1203*5113495bSYour Name /* Description LAST_MSDU_IN_MPDU_FLAG 1204*5113495bSYour Name 1205*5113495bSYour Name Consumer: WBM/REO/SW/FW 1206*5113495bSYour Name Producer: RXDMA 1207*5113495bSYour Name 1208*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 1209*5113495bSYour Name multiple buffers, this field will be valid in the Last 1210*5113495bSYour Name buffer used by the MSDU 1211*5113495bSYour Name 1212*5113495bSYour Name <enum 0 Not_last_msdu> There are more MSDUs linked to this 1213*5113495bSYour Name MSDU that belongs to this MPDU 1214*5113495bSYour Name <enum 1 Last_msdu> this MSDU is the last one in the MPDU. 1215*5113495bSYour Name This setting is only allowed in combination with 'Msdu_continuation' 1216*5113495bSYour Name set to 0. This implies that when an msdu is spread out over 1217*5113495bSYour Name multiple buffers and thus msdu_continuation is set, only 1218*5113495bSYour Name for the very last buffer of the msdu, can the 'last_msdu_in_mpdu_flag' 1219*5113495bSYour Name be set. 1220*5113495bSYour Name 1221*5113495bSYour Name When both first_msdu_in_mpdu_flag and last_msdu_in_mpdu_flag 1222*5113495bSYour Name are set, the MPDU that this MSDU belongs to only contains 1223*5113495bSYour Name a single MSDU. 1224*5113495bSYour Name 1225*5113495bSYour Name 1226*5113495bSYour Name <legal all> 1227*5113495bSYour Name */ 1228*5113495bSYour Name 1229*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000038 1230*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_LSB 1 1231*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MSB 1 1232*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002 1233*5113495bSYour Name 1234*5113495bSYour Name 1235*5113495bSYour Name /* Description MSDU_CONTINUATION 1236*5113495bSYour Name 1237*5113495bSYour Name When set, this MSDU buffer was not able to hold the entire 1238*5113495bSYour Name MSDU. The next buffer will therefor contain additional 1239*5113495bSYour Name information related to this MSDU. 1240*5113495bSYour Name 1241*5113495bSYour Name <legal all> 1242*5113495bSYour Name */ 1243*5113495bSYour Name 1244*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_OFFSET 0x00000038 1245*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_LSB 2 1246*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MSB 2 1247*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MASK 0x00000004 1248*5113495bSYour Name 1249*5113495bSYour Name 1250*5113495bSYour Name /* Description MSDU_LENGTH 1251*5113495bSYour Name 1252*5113495bSYour Name Parsed from RX_MSDU_START TLV . In the case MSDU spans over 1253*5113495bSYour Name multiple buffers, this field will be valid in the First 1254*5113495bSYour Name buffer used by MSDU. 1255*5113495bSYour Name 1256*5113495bSYour Name Full MSDU length in bytes after decapsulation. 1257*5113495bSYour Name 1258*5113495bSYour Name This field is still valid for MPDU frames without A-MSDU. 1259*5113495bSYour Name It still represents MSDU length after decapsulation 1260*5113495bSYour Name 1261*5113495bSYour Name Or in case of RAW MPDUs, it indicates the length of the 1262*5113495bSYour Name entire MPDU (without FCS field) 1263*5113495bSYour Name <legal all> 1264*5113495bSYour Name */ 1265*5113495bSYour Name 1266*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_OFFSET 0x00000038 1267*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_LSB 3 1268*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MSB 16 1269*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MASK 0x0001fff8 1270*5113495bSYour Name 1271*5113495bSYour Name 1272*5113495bSYour Name /* Description MSDU_DROP 1273*5113495bSYour Name 1274*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 1275*5113495bSYour Name multiple buffers, this field will be valid in the Last 1276*5113495bSYour Name buffer used by the MSDU 1277*5113495bSYour Name 1278*5113495bSYour Name When set, REO shall drop this MSDU and not forward it to 1279*5113495bSYour Name any other ring... 1280*5113495bSYour Name <legal all> 1281*5113495bSYour Name */ 1282*5113495bSYour Name 1283*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_OFFSET 0x00000038 1284*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_LSB 17 1285*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MSB 17 1286*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MASK 0x00020000 1287*5113495bSYour Name 1288*5113495bSYour Name 1289*5113495bSYour Name /* Description SA_IS_VALID 1290*5113495bSYour Name 1291*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 1292*5113495bSYour Name multiple buffers, this field will be valid in the Last 1293*5113495bSYour Name buffer used by the MSDU 1294*5113495bSYour Name 1295*5113495bSYour Name Indicates that OLE found a valid SA entry for this MSDU 1296*5113495bSYour Name <legal all> 1297*5113495bSYour Name */ 1298*5113495bSYour Name 1299*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000038 1300*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 18 1301*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MSB 18 1302*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x00040000 1303*5113495bSYour Name 1304*5113495bSYour Name 1305*5113495bSYour Name /* Description DA_IS_VALID 1306*5113495bSYour Name 1307*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 1308*5113495bSYour Name multiple buffers, this field will be valid in the Last 1309*5113495bSYour Name buffer used by the MSDU 1310*5113495bSYour Name 1311*5113495bSYour Name Indicates that OLE found a valid DA entry for this MSDU 1312*5113495bSYour Name <legal all> 1313*5113495bSYour Name */ 1314*5113495bSYour Name 1315*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000038 1316*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 19 1317*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MSB 19 1318*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x00080000 1319*5113495bSYour Name 1320*5113495bSYour Name 1321*5113495bSYour Name /* Description DA_IS_MCBC 1322*5113495bSYour Name 1323*5113495bSYour Name Field Only valid if "da_is_valid" is set 1324*5113495bSYour Name 1325*5113495bSYour Name Indicates the DA address was a Multicast of Broadcast address 1326*5113495bSYour Name for this MSDU 1327*5113495bSYour Name <legal all> 1328*5113495bSYour Name */ 1329*5113495bSYour Name 1330*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000038 1331*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 20 1332*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MSB 20 1333*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x00100000 1334*5113495bSYour Name 1335*5113495bSYour Name 1336*5113495bSYour Name /* Description L3_HEADER_PADDING_MSB 1337*5113495bSYour Name 1338*5113495bSYour Name Passed on from 'RX_MSDU_END' TLV (only the MSB is reported 1339*5113495bSYour Name as the LSB is always zero) 1340*5113495bSYour Name Number of bytes padded to make sure that the L3 header will 1341*5113495bSYour Name always start of a Dword boundary 1342*5113495bSYour Name <legal all> 1343*5113495bSYour Name */ 1344*5113495bSYour Name 1345*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_OFFSET 0x00000038 1346*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_LSB 21 1347*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MSB 21 1348*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MASK 0x00200000 1349*5113495bSYour Name 1350*5113495bSYour Name 1351*5113495bSYour Name /* Description TCP_UDP_CHKSUM_FAIL 1352*5113495bSYour Name 1353*5113495bSYour Name Passed on from 'RX_ATTENTION' TLV 1354*5113495bSYour Name Indicates that the computed checksum did not match the checksum 1355*5113495bSYour Name in the TCP/UDP header. 1356*5113495bSYour Name <legal all> 1357*5113495bSYour Name */ 1358*5113495bSYour Name 1359*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000038 1360*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_LSB 22 1361*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MSB 22 1362*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MASK 0x00400000 1363*5113495bSYour Name 1364*5113495bSYour Name 1365*5113495bSYour Name /* Description IP_CHKSUM_FAIL 1366*5113495bSYour Name 1367*5113495bSYour Name Passed on from 'RX_ATTENTION' TLV 1368*5113495bSYour Name Indicates that the computed checksum did not match the checksum 1369*5113495bSYour Name in the IP header. 1370*5113495bSYour Name <legal all> 1371*5113495bSYour Name */ 1372*5113495bSYour Name 1373*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_OFFSET 0x00000038 1374*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_LSB 23 1375*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MSB 23 1376*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MASK 0x00800000 1377*5113495bSYour Name 1378*5113495bSYour Name 1379*5113495bSYour Name /* Description FR_DS 1380*5113495bSYour Name 1381*5113495bSYour Name Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' 1382*5113495bSYour Name TLV 1383*5113495bSYour Name Set if the 'from DS' bit is set in the frame control. 1384*5113495bSYour Name <legal all> 1385*5113495bSYour Name */ 1386*5113495bSYour Name 1387*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_FR_DS_OFFSET 0x00000038 1388*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_FR_DS_LSB 24 1389*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MSB 24 1390*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MASK 0x01000000 1391*5113495bSYour Name 1392*5113495bSYour Name 1393*5113495bSYour Name /* Description TO_DS 1394*5113495bSYour Name 1395*5113495bSYour Name Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' 1396*5113495bSYour Name TLV 1397*5113495bSYour Name Set if the 'to DS' bit is set in the frame control. 1398*5113495bSYour Name <legal all> 1399*5113495bSYour Name */ 1400*5113495bSYour Name 1401*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_TO_DS_OFFSET 0x00000038 1402*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_TO_DS_LSB 25 1403*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MSB 25 1404*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MASK 0x02000000 1405*5113495bSYour Name 1406*5113495bSYour Name 1407*5113495bSYour Name /* Description INTRA_BSS 1408*5113495bSYour Name 1409*5113495bSYour Name This packet needs intra-BSS routing by SW as the 'vdev_id' 1410*5113495bSYour Name for the destination is the same as the 'vdev_id' (from 'RX_MPDU_PCU_START') 1411*5113495bSYour Name that this MSDU was got in. 1412*5113495bSYour Name 1413*5113495bSYour Name <legal all> 1414*5113495bSYour Name */ 1415*5113495bSYour Name 1416*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_OFFSET 0x00000038 1417*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_LSB 26 1418*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MSB 26 1419*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MASK 0x04000000 1420*5113495bSYour Name 1421*5113495bSYour Name 1422*5113495bSYour Name /* Description DEST_CHIP_ID 1423*5113495bSYour Name 1424*5113495bSYour Name If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY' 1425*5113495bSYour Name to support intra-BSS routing with multi-chip multi-link 1426*5113495bSYour Name operation. 1427*5113495bSYour Name 1428*5113495bSYour Name This indicates into which chip's TCL the packet should be 1429*5113495bSYour Name queued. 1430*5113495bSYour Name 1431*5113495bSYour Name <legal all> 1432*5113495bSYour Name */ 1433*5113495bSYour Name 1434*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_OFFSET 0x00000038 1435*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_LSB 27 1436*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MSB 28 1437*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MASK 0x18000000 1438*5113495bSYour Name 1439*5113495bSYour Name 1440*5113495bSYour Name /* Description DECAP_FORMAT 1441*5113495bSYour Name 1442*5113495bSYour Name Indicates the format after decapsulation: 1443*5113495bSYour Name 1444*5113495bSYour Name <enum 0 RAW> No encapsulation 1445*5113495bSYour Name <enum 1 Native_WiFi> 1446*5113495bSYour Name <enum 2 Ethernet> Ethernet 2 (DIX) or 802.3 (uses SNAP/LLC) 1447*5113495bSYour Name 1448*5113495bSYour Name <enum 3 802_3> Indicate Ethernet 1449*5113495bSYour Name 1450*5113495bSYour Name <legal all> 1451*5113495bSYour Name */ 1452*5113495bSYour Name 1453*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_OFFSET 0x00000038 1454*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_LSB 29 1455*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MSB 30 1456*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MASK 0x60000000 1457*5113495bSYour Name 1458*5113495bSYour Name 1459*5113495bSYour Name /* Description DEST_CHIP_PMAC_ID 1460*5113495bSYour Name 1461*5113495bSYour Name If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY' 1462*5113495bSYour Name to support intra-BSS routing with multi-chip multi-link 1463*5113495bSYour Name operation. 1464*5113495bSYour Name 1465*5113495bSYour Name This indicates into which link/'vdev' the packet should 1466*5113495bSYour Name be queued in TCL. 1467*5113495bSYour Name 1468*5113495bSYour Name <legal all> 1469*5113495bSYour Name */ 1470*5113495bSYour Name 1471*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_OFFSET 0x00000038 1472*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_LSB 31 1473*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_MSB 31 1474*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_MASK 0x80000000 1475*5113495bSYour Name 1476*5113495bSYour Name 1477*5113495bSYour Name /* Description RX_MSDU_EXT_DESC_INFO_DETAILS 1478*5113495bSYour Name 1479*5113495bSYour Name Consumer: REO/SW 1480*5113495bSYour Name Producer: RXDMA 1481*5113495bSYour Name 1482*5113495bSYour Name Extended information related to the MSDU that is passed 1483*5113495bSYour Name on from RXDMA to REO but not part of the REO destination 1484*5113495bSYour Name ring. Some fields are passed on to PPE. 1485*5113495bSYour Name */ 1486*5113495bSYour Name 1487*5113495bSYour Name 1488*5113495bSYour Name /* Description REO_DESTINATION_INDICATION 1489*5113495bSYour Name 1490*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 1491*5113495bSYour Name multiple buffers, this field will be valid in the Last 1492*5113495bSYour Name buffer used by the MSDU 1493*5113495bSYour Name 1494*5113495bSYour Name The ID of the REO exit ring where the MSDU frame shall push 1495*5113495bSYour Name after (MPDU level) reordering has finished. 1496*5113495bSYour Name 1497*5113495bSYour Name <enum 0 reo_destination_sw0> Reo will push the frame into 1498*5113495bSYour Name the REO2SW0 ring 1499*5113495bSYour Name <enum 1 reo_destination_sw1> Reo will push the frame into 1500*5113495bSYour Name the REO2SW1 ring 1501*5113495bSYour Name <enum 2 reo_destination_sw2> Reo will push the frame into 1502*5113495bSYour Name the REO2SW2 ring 1503*5113495bSYour Name <enum 3 reo_destination_sw3> Reo will push the frame into 1504*5113495bSYour Name the REO2SW3 ring 1505*5113495bSYour Name <enum 4 reo_destination_sw4> Reo will push the frame into 1506*5113495bSYour Name the REO2SW4 ring 1507*5113495bSYour Name <enum 5 reo_destination_release> Reo will push the frame 1508*5113495bSYour Name into the REO_release ring 1509*5113495bSYour Name <enum 6 reo_destination_fw> Reo will push the frame into 1510*5113495bSYour Name the REO2FW ring 1511*5113495bSYour Name <enum 7 reo_destination_sw5> Reo will push the frame into 1512*5113495bSYour Name the REO2SW5 ring (REO remaps this in chips without REO2SW5 1513*5113495bSYour Name ring, e.g. Pine) 1514*5113495bSYour Name <enum 8 reo_destination_sw6> Reo will push the frame into 1515*5113495bSYour Name the REO2SW6 ring (REO remaps this in chips without REO2SW6 1516*5113495bSYour Name ring, e.g. Pine) 1517*5113495bSYour Name <enum 9 reo_destination_sw7> Reo will push the frame into 1518*5113495bSYour Name the REO2SW7 ring (REO remaps this in chips without REO2SW7 1519*5113495bSYour Name ring) 1520*5113495bSYour Name <enum 10 reo_destination_sw8> Reo will push the frame into 1521*5113495bSYour Name the REO2SW8 ring (REO remaps this in chips without REO2SW8 1522*5113495bSYour Name ring) 1523*5113495bSYour Name <enum 11 reo_destination_11> REO remaps this 1524*5113495bSYour Name <enum 12 reo_destination_12> REO remaps this <enum 13 reo_destination_13> 1525*5113495bSYour Name REO remaps this 1526*5113495bSYour Name <enum 14 reo_destination_14> REO remaps this 1527*5113495bSYour Name <enum 15 reo_destination_15> REO remaps this 1528*5113495bSYour Name <enum 16 reo_destination_16> REO remaps this 1529*5113495bSYour Name <enum 17 reo_destination_17> REO remaps this 1530*5113495bSYour Name <enum 18 reo_destination_18> REO remaps this 1531*5113495bSYour Name <enum 19 reo_destination_19> REO remaps this 1532*5113495bSYour Name <enum 20 reo_destination_20> REO remaps this 1533*5113495bSYour Name <enum 21 reo_destination_21> REO remaps this 1534*5113495bSYour Name <enum 22 reo_destination_22> REO remaps this 1535*5113495bSYour Name <enum 23 reo_destination_23> REO remaps this 1536*5113495bSYour Name <enum 24 reo_destination_24> REO remaps this 1537*5113495bSYour Name <enum 25 reo_destination_25> REO remaps this 1538*5113495bSYour Name <enum 26 reo_destination_26> REO remaps this 1539*5113495bSYour Name <enum 27 reo_destination_27> REO remaps this 1540*5113495bSYour Name <enum 28 reo_destination_28> REO remaps this 1541*5113495bSYour Name <enum 29 reo_destination_29> REO remaps this 1542*5113495bSYour Name <enum 30 reo_destination_30> REO remaps this 1543*5113495bSYour Name <enum 31 reo_destination_31> REO remaps this 1544*5113495bSYour Name 1545*5113495bSYour Name <legal all> 1546*5113495bSYour Name */ 1547*5113495bSYour Name 1548*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_OFFSET 0x0000003c 1549*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_LSB 0 1550*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MSB 4 1551*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MASK 0x0000001f 1552*5113495bSYour Name 1553*5113495bSYour Name 1554*5113495bSYour Name /* Description SERVICE_CODE 1555*5113495bSYour Name 1556*5113495bSYour Name Opaque service code between PPE and Wi-Fi 1557*5113495bSYour Name 1558*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 1559*5113495bSYour Name ('REO_TO_PPE_RING'). 1560*5113495bSYour Name 1561*5113495bSYour Name <legal all> 1562*5113495bSYour Name */ 1563*5113495bSYour Name 1564*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_OFFSET 0x0000003c 1565*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_LSB 5 1566*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_MSB 13 1567*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_MASK 0x00003fe0 1568*5113495bSYour Name 1569*5113495bSYour Name 1570*5113495bSYour Name /* Description PRIORITY_VALID 1571*5113495bSYour Name 1572*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 1573*5113495bSYour Name ('REO_TO_PPE_RING'). 1574*5113495bSYour Name 1575*5113495bSYour Name <legal all> 1576*5113495bSYour Name */ 1577*5113495bSYour Name 1578*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_OFFSET 0x0000003c 1579*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_LSB 14 1580*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_MSB 14 1581*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_MASK 0x00004000 1582*5113495bSYour Name 1583*5113495bSYour Name 1584*5113495bSYour Name /* Description DATA_OFFSET 1585*5113495bSYour Name 1586*5113495bSYour Name The offset to Rx packet data within the buffer (including 1587*5113495bSYour Name Rx DMA offset programming and L3 header padding inserted 1588*5113495bSYour Name by Rx OLE). 1589*5113495bSYour Name 1590*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 1591*5113495bSYour Name ('REO_TO_PPE_RING'). 1592*5113495bSYour Name 1593*5113495bSYour Name <legal all> 1594*5113495bSYour Name */ 1595*5113495bSYour Name 1596*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_OFFSET 0x0000003c 1597*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_LSB 15 1598*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_MSB 26 1599*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_MASK 0x07ff8000 1600*5113495bSYour Name 1601*5113495bSYour Name 1602*5113495bSYour Name /* Description SRC_LINK_ID 1603*5113495bSYour Name 1604*5113495bSYour Name Consumer: SW 1605*5113495bSYour Name Producer: RXDMA 1606*5113495bSYour Name 1607*5113495bSYour Name Set to the link ID of the PMAC that received the frame 1608*5113495bSYour Name <legal all> 1609*5113495bSYour Name */ 1610*5113495bSYour Name 1611*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_OFFSET 0x0000003c 1612*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_LSB 27 1613*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_MSB 29 1614*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_MASK 0x38000000 1615*5113495bSYour Name 1616*5113495bSYour Name 1617*5113495bSYour Name /* Description RESERVED_0A 1618*5113495bSYour Name 1619*5113495bSYour Name <legal 0> 1620*5113495bSYour Name */ 1621*5113495bSYour Name 1622*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_OFFSET 0x0000003c 1623*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_LSB 30 1624*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_MSB 31 1625*5113495bSYour Name #define RX_MSDU_LINK_MSDU_1_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_MASK 0xc0000000 1626*5113495bSYour Name 1627*5113495bSYour Name 1628*5113495bSYour Name /* Description MSDU_2 1629*5113495bSYour Name 1630*5113495bSYour Name Details of next MSDU in this (MSDU flow) linked list 1631*5113495bSYour Name */ 1632*5113495bSYour Name 1633*5113495bSYour Name 1634*5113495bSYour Name /* Description BUFFER_ADDR_INFO_DETAILS 1635*5113495bSYour Name 1636*5113495bSYour Name Consumer: REO/SW 1637*5113495bSYour Name Producer: RXDMA 1638*5113495bSYour Name 1639*5113495bSYour Name Details of the physical address of the buffer containing 1640*5113495bSYour Name an MSDU (or entire MPDU) 1641*5113495bSYour Name */ 1642*5113495bSYour Name 1643*5113495bSYour Name 1644*5113495bSYour Name /* Description BUFFER_ADDR_31_0 1645*5113495bSYour Name 1646*5113495bSYour Name Address (lower 32 bits) of the MSDU buffer OR MSDU_EXTENSION 1647*5113495bSYour Name descriptor OR Link Descriptor 1648*5113495bSYour Name 1649*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 1650*5113495bSYour Name <legal all> 1651*5113495bSYour Name */ 1652*5113495bSYour Name 1653*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_OFFSET 0x00000040 1654*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_LSB 0 1655*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_MSB 31 1656*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_MASK 0xffffffff 1657*5113495bSYour Name 1658*5113495bSYour Name 1659*5113495bSYour Name /* Description BUFFER_ADDR_39_32 1660*5113495bSYour Name 1661*5113495bSYour Name Address (upper 8 bits) of the MSDU buffer OR MSDU_EXTENSION 1662*5113495bSYour Name descriptor OR Link Descriptor 1663*5113495bSYour Name 1664*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 1665*5113495bSYour Name <legal all> 1666*5113495bSYour Name */ 1667*5113495bSYour Name 1668*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_OFFSET 0x00000044 1669*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_LSB 0 1670*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_MSB 7 1671*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_MASK 0x000000ff 1672*5113495bSYour Name 1673*5113495bSYour Name 1674*5113495bSYour Name /* Description RETURN_BUFFER_MANAGER 1675*5113495bSYour Name 1676*5113495bSYour Name Consumer: WBM 1677*5113495bSYour Name Producer: SW/FW 1678*5113495bSYour Name 1679*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 1680*5113495bSYour Name 1681*5113495bSYour Name Indicates to which buffer manager the buffer OR MSDU_EXTENSION 1682*5113495bSYour Name descriptor OR link descriptor that is being pointed to 1683*5113495bSYour Name shall be returned after the frame has been processed. It 1684*5113495bSYour Name is used by WBM for routing purposes. 1685*5113495bSYour Name 1686*5113495bSYour Name <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned 1687*5113495bSYour Name to the WMB buffer idle list 1688*5113495bSYour Name <enum 1 WBM_CHIP0_IDLE_DESC_LIST> This buffer shall be returned 1689*5113495bSYour Name to the WBM idle link descriptor idle list, where the chip 1690*5113495bSYour Name 0 WBM is chosen in case of a multi-chip config 1691*5113495bSYour Name <enum 2 WBM_CHIP1_IDLE_DESC_LIST> This buffer shall be returned 1692*5113495bSYour Name to the chip 1 WBM idle link descriptor idle list 1693*5113495bSYour Name <enum 3 WBM_CHIP2_IDLE_DESC_LIST> This buffer shall be returned 1694*5113495bSYour Name to the chip 2 WBM idle link descriptor idle list 1695*5113495bSYour Name <enum 12 WBM_CHIP3_IDLE_DESC_LIST> This buffer shall be 1696*5113495bSYour Name returned to chip 3 WBM idle link descriptor idle list 1697*5113495bSYour Name <enum 4 FW_BM> This buffer shall be returned to the FW 1698*5113495bSYour Name <enum 5 SW0_BM> This buffer shall be returned to the SW, 1699*5113495bSYour Name ring 0 1700*5113495bSYour Name <enum 6 SW1_BM> This buffer shall be returned to the SW, 1701*5113495bSYour Name ring 1 1702*5113495bSYour Name <enum 7 SW2_BM> This buffer shall be returned to the SW, 1703*5113495bSYour Name ring 2 1704*5113495bSYour Name <enum 8 SW3_BM> This buffer shall be returned to the SW, 1705*5113495bSYour Name ring 3 1706*5113495bSYour Name <enum 9 SW4_BM> This buffer shall be returned to the SW, 1707*5113495bSYour Name ring 4 1708*5113495bSYour Name <enum 10 SW5_BM> This buffer shall be returned to the SW, 1709*5113495bSYour Name ring 5 1710*5113495bSYour Name <enum 11 SW6_BM> This buffer shall be returned to the SW, 1711*5113495bSYour Name ring 6 1712*5113495bSYour Name 1713*5113495bSYour Name <legal 0-12> 1714*5113495bSYour Name */ 1715*5113495bSYour Name 1716*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_OFFSET 0x00000044 1717*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_LSB 8 1718*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_MSB 11 1719*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_MASK 0x00000f00 1720*5113495bSYour Name 1721*5113495bSYour Name 1722*5113495bSYour Name /* Description SW_BUFFER_COOKIE 1723*5113495bSYour Name 1724*5113495bSYour Name Cookie field exclusively used by SW. 1725*5113495bSYour Name 1726*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 1727*5113495bSYour Name 1728*5113495bSYour Name HW ignores the contents, accept that it passes the programmed 1729*5113495bSYour Name value on to other descriptors together with the physical 1730*5113495bSYour Name address 1731*5113495bSYour Name 1732*5113495bSYour Name Field can be used by SW to for example associate the buffers 1733*5113495bSYour Name physical address with the virtual address 1734*5113495bSYour Name The bit definitions as used by SW are within SW HLD specification 1735*5113495bSYour Name 1736*5113495bSYour Name 1737*5113495bSYour Name NOTE1: 1738*5113495bSYour Name The three most significant bits can have a special meaning 1739*5113495bSYour Name in case this struct is embedded in a TX_MPDU_DETAILS STRUCT, 1740*5113495bSYour Name and field transmit_bw_restriction is set 1741*5113495bSYour Name 1742*5113495bSYour Name In case of NON punctured transmission: 1743*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b000: 20 MHz TX only 1744*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b001: 40 MHz TX only 1745*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b010: 80 MHz TX only 1746*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b011: 160 MHz TX only 1747*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b101: 240 MHz TX only 1748*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b100: 320 MHz TX only 1749*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 1750*5113495bSYour Name 1751*5113495bSYour Name In case of punctured transmission: 1752*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0000: pattern 0 only 1753*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0001: pattern 1 only 1754*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0010: pattern 2 only 1755*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0011: pattern 3 only 1756*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0100: pattern 4 only 1757*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0101: pattern 5 only 1758*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0110: pattern 6 only 1759*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0111: pattern 7 only 1760*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1000: pattern 8 only 1761*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1001: pattern 9 only 1762*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1010: pattern 10 only 1763*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1011: pattern 11 only 1764*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 1765*5113495bSYour Name 1766*5113495bSYour Name Note: a punctured transmission is indicated by the presence 1767*5113495bSYour Name of TLV TX_PUNCTURE_SETUP embedded in the scheduler TLV 1768*5113495bSYour Name 1769*5113495bSYour Name <legal all> 1770*5113495bSYour Name */ 1771*5113495bSYour Name 1772*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_OFFSET 0x00000044 1773*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_LSB 12 1774*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_MSB 31 1775*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_MASK 0xfffff000 1776*5113495bSYour Name 1777*5113495bSYour Name 1778*5113495bSYour Name /* Description RX_MSDU_DESC_INFO_DETAILS 1779*5113495bSYour Name 1780*5113495bSYour Name Consumer: REO/SW 1781*5113495bSYour Name Producer: RXDMA 1782*5113495bSYour Name 1783*5113495bSYour Name General information related to the MSDU that should be passed 1784*5113495bSYour Name on from RXDMA all the way to to the REO destination ring. 1785*5113495bSYour Name 1786*5113495bSYour Name */ 1787*5113495bSYour Name 1788*5113495bSYour Name 1789*5113495bSYour Name /* Description FIRST_MSDU_IN_MPDU_FLAG 1790*5113495bSYour Name 1791*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 1792*5113495bSYour Name multiple buffers, this field will be valid in the Last 1793*5113495bSYour Name buffer used by the MSDU 1794*5113495bSYour Name 1795*5113495bSYour Name <enum 0 Not_first_msdu> This is not the first MSDU in the 1796*5113495bSYour Name MPDU. 1797*5113495bSYour Name <enum 1 first_msdu> This MSDU is the first one in the MPDU. 1798*5113495bSYour Name 1799*5113495bSYour Name 1800*5113495bSYour Name <legal all> 1801*5113495bSYour Name */ 1802*5113495bSYour Name 1803*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000048 1804*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_LSB 0 1805*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MSB 0 1806*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001 1807*5113495bSYour Name 1808*5113495bSYour Name 1809*5113495bSYour Name /* Description LAST_MSDU_IN_MPDU_FLAG 1810*5113495bSYour Name 1811*5113495bSYour Name Consumer: WBM/REO/SW/FW 1812*5113495bSYour Name Producer: RXDMA 1813*5113495bSYour Name 1814*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 1815*5113495bSYour Name multiple buffers, this field will be valid in the Last 1816*5113495bSYour Name buffer used by the MSDU 1817*5113495bSYour Name 1818*5113495bSYour Name <enum 0 Not_last_msdu> There are more MSDUs linked to this 1819*5113495bSYour Name MSDU that belongs to this MPDU 1820*5113495bSYour Name <enum 1 Last_msdu> this MSDU is the last one in the MPDU. 1821*5113495bSYour Name This setting is only allowed in combination with 'Msdu_continuation' 1822*5113495bSYour Name set to 0. This implies that when an msdu is spread out over 1823*5113495bSYour Name multiple buffers and thus msdu_continuation is set, only 1824*5113495bSYour Name for the very last buffer of the msdu, can the 'last_msdu_in_mpdu_flag' 1825*5113495bSYour Name be set. 1826*5113495bSYour Name 1827*5113495bSYour Name When both first_msdu_in_mpdu_flag and last_msdu_in_mpdu_flag 1828*5113495bSYour Name are set, the MPDU that this MSDU belongs to only contains 1829*5113495bSYour Name a single MSDU. 1830*5113495bSYour Name 1831*5113495bSYour Name 1832*5113495bSYour Name <legal all> 1833*5113495bSYour Name */ 1834*5113495bSYour Name 1835*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000048 1836*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_LSB 1 1837*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MSB 1 1838*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002 1839*5113495bSYour Name 1840*5113495bSYour Name 1841*5113495bSYour Name /* Description MSDU_CONTINUATION 1842*5113495bSYour Name 1843*5113495bSYour Name When set, this MSDU buffer was not able to hold the entire 1844*5113495bSYour Name MSDU. The next buffer will therefor contain additional 1845*5113495bSYour Name information related to this MSDU. 1846*5113495bSYour Name 1847*5113495bSYour Name <legal all> 1848*5113495bSYour Name */ 1849*5113495bSYour Name 1850*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_OFFSET 0x00000048 1851*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_LSB 2 1852*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MSB 2 1853*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MASK 0x00000004 1854*5113495bSYour Name 1855*5113495bSYour Name 1856*5113495bSYour Name /* Description MSDU_LENGTH 1857*5113495bSYour Name 1858*5113495bSYour Name Parsed from RX_MSDU_START TLV . In the case MSDU spans over 1859*5113495bSYour Name multiple buffers, this field will be valid in the First 1860*5113495bSYour Name buffer used by MSDU. 1861*5113495bSYour Name 1862*5113495bSYour Name Full MSDU length in bytes after decapsulation. 1863*5113495bSYour Name 1864*5113495bSYour Name This field is still valid for MPDU frames without A-MSDU. 1865*5113495bSYour Name It still represents MSDU length after decapsulation 1866*5113495bSYour Name 1867*5113495bSYour Name Or in case of RAW MPDUs, it indicates the length of the 1868*5113495bSYour Name entire MPDU (without FCS field) 1869*5113495bSYour Name <legal all> 1870*5113495bSYour Name */ 1871*5113495bSYour Name 1872*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_OFFSET 0x00000048 1873*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_LSB 3 1874*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MSB 16 1875*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MASK 0x0001fff8 1876*5113495bSYour Name 1877*5113495bSYour Name 1878*5113495bSYour Name /* Description MSDU_DROP 1879*5113495bSYour Name 1880*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 1881*5113495bSYour Name multiple buffers, this field will be valid in the Last 1882*5113495bSYour Name buffer used by the MSDU 1883*5113495bSYour Name 1884*5113495bSYour Name When set, REO shall drop this MSDU and not forward it to 1885*5113495bSYour Name any other ring... 1886*5113495bSYour Name <legal all> 1887*5113495bSYour Name */ 1888*5113495bSYour Name 1889*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_OFFSET 0x00000048 1890*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_LSB 17 1891*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MSB 17 1892*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MASK 0x00020000 1893*5113495bSYour Name 1894*5113495bSYour Name 1895*5113495bSYour Name /* Description SA_IS_VALID 1896*5113495bSYour Name 1897*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 1898*5113495bSYour Name multiple buffers, this field will be valid in the Last 1899*5113495bSYour Name buffer used by the MSDU 1900*5113495bSYour Name 1901*5113495bSYour Name Indicates that OLE found a valid SA entry for this MSDU 1902*5113495bSYour Name <legal all> 1903*5113495bSYour Name */ 1904*5113495bSYour Name 1905*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000048 1906*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 18 1907*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MSB 18 1908*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x00040000 1909*5113495bSYour Name 1910*5113495bSYour Name 1911*5113495bSYour Name /* Description DA_IS_VALID 1912*5113495bSYour Name 1913*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 1914*5113495bSYour Name multiple buffers, this field will be valid in the Last 1915*5113495bSYour Name buffer used by the MSDU 1916*5113495bSYour Name 1917*5113495bSYour Name Indicates that OLE found a valid DA entry for this MSDU 1918*5113495bSYour Name <legal all> 1919*5113495bSYour Name */ 1920*5113495bSYour Name 1921*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000048 1922*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 19 1923*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MSB 19 1924*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x00080000 1925*5113495bSYour Name 1926*5113495bSYour Name 1927*5113495bSYour Name /* Description DA_IS_MCBC 1928*5113495bSYour Name 1929*5113495bSYour Name Field Only valid if "da_is_valid" is set 1930*5113495bSYour Name 1931*5113495bSYour Name Indicates the DA address was a Multicast of Broadcast address 1932*5113495bSYour Name for this MSDU 1933*5113495bSYour Name <legal all> 1934*5113495bSYour Name */ 1935*5113495bSYour Name 1936*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000048 1937*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 20 1938*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MSB 20 1939*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x00100000 1940*5113495bSYour Name 1941*5113495bSYour Name 1942*5113495bSYour Name /* Description L3_HEADER_PADDING_MSB 1943*5113495bSYour Name 1944*5113495bSYour Name Passed on from 'RX_MSDU_END' TLV (only the MSB is reported 1945*5113495bSYour Name as the LSB is always zero) 1946*5113495bSYour Name Number of bytes padded to make sure that the L3 header will 1947*5113495bSYour Name always start of a Dword boundary 1948*5113495bSYour Name <legal all> 1949*5113495bSYour Name */ 1950*5113495bSYour Name 1951*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_OFFSET 0x00000048 1952*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_LSB 21 1953*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MSB 21 1954*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MASK 0x00200000 1955*5113495bSYour Name 1956*5113495bSYour Name 1957*5113495bSYour Name /* Description TCP_UDP_CHKSUM_FAIL 1958*5113495bSYour Name 1959*5113495bSYour Name Passed on from 'RX_ATTENTION' TLV 1960*5113495bSYour Name Indicates that the computed checksum did not match the checksum 1961*5113495bSYour Name in the TCP/UDP header. 1962*5113495bSYour Name <legal all> 1963*5113495bSYour Name */ 1964*5113495bSYour Name 1965*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000048 1966*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_LSB 22 1967*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MSB 22 1968*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MASK 0x00400000 1969*5113495bSYour Name 1970*5113495bSYour Name 1971*5113495bSYour Name /* Description IP_CHKSUM_FAIL 1972*5113495bSYour Name 1973*5113495bSYour Name Passed on from 'RX_ATTENTION' TLV 1974*5113495bSYour Name Indicates that the computed checksum did not match the checksum 1975*5113495bSYour Name in the IP header. 1976*5113495bSYour Name <legal all> 1977*5113495bSYour Name */ 1978*5113495bSYour Name 1979*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_OFFSET 0x00000048 1980*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_LSB 23 1981*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MSB 23 1982*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MASK 0x00800000 1983*5113495bSYour Name 1984*5113495bSYour Name 1985*5113495bSYour Name /* Description FR_DS 1986*5113495bSYour Name 1987*5113495bSYour Name Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' 1988*5113495bSYour Name TLV 1989*5113495bSYour Name Set if the 'from DS' bit is set in the frame control. 1990*5113495bSYour Name <legal all> 1991*5113495bSYour Name */ 1992*5113495bSYour Name 1993*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_FR_DS_OFFSET 0x00000048 1994*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_FR_DS_LSB 24 1995*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MSB 24 1996*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MASK 0x01000000 1997*5113495bSYour Name 1998*5113495bSYour Name 1999*5113495bSYour Name /* Description TO_DS 2000*5113495bSYour Name 2001*5113495bSYour Name Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' 2002*5113495bSYour Name TLV 2003*5113495bSYour Name Set if the 'to DS' bit is set in the frame control. 2004*5113495bSYour Name <legal all> 2005*5113495bSYour Name */ 2006*5113495bSYour Name 2007*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_TO_DS_OFFSET 0x00000048 2008*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_TO_DS_LSB 25 2009*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MSB 25 2010*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MASK 0x02000000 2011*5113495bSYour Name 2012*5113495bSYour Name 2013*5113495bSYour Name /* Description INTRA_BSS 2014*5113495bSYour Name 2015*5113495bSYour Name This packet needs intra-BSS routing by SW as the 'vdev_id' 2016*5113495bSYour Name for the destination is the same as the 'vdev_id' (from 'RX_MPDU_PCU_START') 2017*5113495bSYour Name that this MSDU was got in. 2018*5113495bSYour Name 2019*5113495bSYour Name <legal all> 2020*5113495bSYour Name */ 2021*5113495bSYour Name 2022*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_OFFSET 0x00000048 2023*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_LSB 26 2024*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MSB 26 2025*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MASK 0x04000000 2026*5113495bSYour Name 2027*5113495bSYour Name 2028*5113495bSYour Name /* Description DEST_CHIP_ID 2029*5113495bSYour Name 2030*5113495bSYour Name If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY' 2031*5113495bSYour Name to support intra-BSS routing with multi-chip multi-link 2032*5113495bSYour Name operation. 2033*5113495bSYour Name 2034*5113495bSYour Name This indicates into which chip's TCL the packet should be 2035*5113495bSYour Name queued. 2036*5113495bSYour Name 2037*5113495bSYour Name <legal all> 2038*5113495bSYour Name */ 2039*5113495bSYour Name 2040*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_OFFSET 0x00000048 2041*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_LSB 27 2042*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MSB 28 2043*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MASK 0x18000000 2044*5113495bSYour Name 2045*5113495bSYour Name 2046*5113495bSYour Name /* Description DECAP_FORMAT 2047*5113495bSYour Name 2048*5113495bSYour Name Indicates the format after decapsulation: 2049*5113495bSYour Name 2050*5113495bSYour Name <enum 0 RAW> No encapsulation 2051*5113495bSYour Name <enum 1 Native_WiFi> 2052*5113495bSYour Name <enum 2 Ethernet> Ethernet 2 (DIX) or 802.3 (uses SNAP/LLC) 2053*5113495bSYour Name 2054*5113495bSYour Name <enum 3 802_3> Indicate Ethernet 2055*5113495bSYour Name 2056*5113495bSYour Name <legal all> 2057*5113495bSYour Name */ 2058*5113495bSYour Name 2059*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_OFFSET 0x00000048 2060*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_LSB 29 2061*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MSB 30 2062*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MASK 0x60000000 2063*5113495bSYour Name 2064*5113495bSYour Name 2065*5113495bSYour Name /* Description DEST_CHIP_PMAC_ID 2066*5113495bSYour Name 2067*5113495bSYour Name If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY' 2068*5113495bSYour Name to support intra-BSS routing with multi-chip multi-link 2069*5113495bSYour Name operation. 2070*5113495bSYour Name 2071*5113495bSYour Name This indicates into which link/'vdev' the packet should 2072*5113495bSYour Name be queued in TCL. 2073*5113495bSYour Name 2074*5113495bSYour Name <legal all> 2075*5113495bSYour Name */ 2076*5113495bSYour Name 2077*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_OFFSET 0x00000048 2078*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_LSB 31 2079*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_MSB 31 2080*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_MASK 0x80000000 2081*5113495bSYour Name 2082*5113495bSYour Name 2083*5113495bSYour Name /* Description RX_MSDU_EXT_DESC_INFO_DETAILS 2084*5113495bSYour Name 2085*5113495bSYour Name Consumer: REO/SW 2086*5113495bSYour Name Producer: RXDMA 2087*5113495bSYour Name 2088*5113495bSYour Name Extended information related to the MSDU that is passed 2089*5113495bSYour Name on from RXDMA to REO but not part of the REO destination 2090*5113495bSYour Name ring. Some fields are passed on to PPE. 2091*5113495bSYour Name */ 2092*5113495bSYour Name 2093*5113495bSYour Name 2094*5113495bSYour Name /* Description REO_DESTINATION_INDICATION 2095*5113495bSYour Name 2096*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 2097*5113495bSYour Name multiple buffers, this field will be valid in the Last 2098*5113495bSYour Name buffer used by the MSDU 2099*5113495bSYour Name 2100*5113495bSYour Name The ID of the REO exit ring where the MSDU frame shall push 2101*5113495bSYour Name after (MPDU level) reordering has finished. 2102*5113495bSYour Name 2103*5113495bSYour Name <enum 0 reo_destination_sw0> Reo will push the frame into 2104*5113495bSYour Name the REO2SW0 ring 2105*5113495bSYour Name <enum 1 reo_destination_sw1> Reo will push the frame into 2106*5113495bSYour Name the REO2SW1 ring 2107*5113495bSYour Name <enum 2 reo_destination_sw2> Reo will push the frame into 2108*5113495bSYour Name the REO2SW2 ring 2109*5113495bSYour Name <enum 3 reo_destination_sw3> Reo will push the frame into 2110*5113495bSYour Name the REO2SW3 ring 2111*5113495bSYour Name <enum 4 reo_destination_sw4> Reo will push the frame into 2112*5113495bSYour Name the REO2SW4 ring 2113*5113495bSYour Name <enum 5 reo_destination_release> Reo will push the frame 2114*5113495bSYour Name into the REO_release ring 2115*5113495bSYour Name <enum 6 reo_destination_fw> Reo will push the frame into 2116*5113495bSYour Name the REO2FW ring 2117*5113495bSYour Name <enum 7 reo_destination_sw5> Reo will push the frame into 2118*5113495bSYour Name the REO2SW5 ring (REO remaps this in chips without REO2SW5 2119*5113495bSYour Name ring, e.g. Pine) 2120*5113495bSYour Name <enum 8 reo_destination_sw6> Reo will push the frame into 2121*5113495bSYour Name the REO2SW6 ring (REO remaps this in chips without REO2SW6 2122*5113495bSYour Name ring, e.g. Pine) 2123*5113495bSYour Name <enum 9 reo_destination_sw7> Reo will push the frame into 2124*5113495bSYour Name the REO2SW7 ring (REO remaps this in chips without REO2SW7 2125*5113495bSYour Name ring) 2126*5113495bSYour Name <enum 10 reo_destination_sw8> Reo will push the frame into 2127*5113495bSYour Name the REO2SW8 ring (REO remaps this in chips without REO2SW8 2128*5113495bSYour Name ring) 2129*5113495bSYour Name <enum 11 reo_destination_11> REO remaps this 2130*5113495bSYour Name <enum 12 reo_destination_12> REO remaps this <enum 13 reo_destination_13> 2131*5113495bSYour Name REO remaps this 2132*5113495bSYour Name <enum 14 reo_destination_14> REO remaps this 2133*5113495bSYour Name <enum 15 reo_destination_15> REO remaps this 2134*5113495bSYour Name <enum 16 reo_destination_16> REO remaps this 2135*5113495bSYour Name <enum 17 reo_destination_17> REO remaps this 2136*5113495bSYour Name <enum 18 reo_destination_18> REO remaps this 2137*5113495bSYour Name <enum 19 reo_destination_19> REO remaps this 2138*5113495bSYour Name <enum 20 reo_destination_20> REO remaps this 2139*5113495bSYour Name <enum 21 reo_destination_21> REO remaps this 2140*5113495bSYour Name <enum 22 reo_destination_22> REO remaps this 2141*5113495bSYour Name <enum 23 reo_destination_23> REO remaps this 2142*5113495bSYour Name <enum 24 reo_destination_24> REO remaps this 2143*5113495bSYour Name <enum 25 reo_destination_25> REO remaps this 2144*5113495bSYour Name <enum 26 reo_destination_26> REO remaps this 2145*5113495bSYour Name <enum 27 reo_destination_27> REO remaps this 2146*5113495bSYour Name <enum 28 reo_destination_28> REO remaps this 2147*5113495bSYour Name <enum 29 reo_destination_29> REO remaps this 2148*5113495bSYour Name <enum 30 reo_destination_30> REO remaps this 2149*5113495bSYour Name <enum 31 reo_destination_31> REO remaps this 2150*5113495bSYour Name 2151*5113495bSYour Name <legal all> 2152*5113495bSYour Name */ 2153*5113495bSYour Name 2154*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_OFFSET 0x0000004c 2155*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_LSB 0 2156*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MSB 4 2157*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MASK 0x0000001f 2158*5113495bSYour Name 2159*5113495bSYour Name 2160*5113495bSYour Name /* Description SERVICE_CODE 2161*5113495bSYour Name 2162*5113495bSYour Name Opaque service code between PPE and Wi-Fi 2163*5113495bSYour Name 2164*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 2165*5113495bSYour Name ('REO_TO_PPE_RING'). 2166*5113495bSYour Name 2167*5113495bSYour Name <legal all> 2168*5113495bSYour Name */ 2169*5113495bSYour Name 2170*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_OFFSET 0x0000004c 2171*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_LSB 5 2172*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_MSB 13 2173*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_MASK 0x00003fe0 2174*5113495bSYour Name 2175*5113495bSYour Name 2176*5113495bSYour Name /* Description PRIORITY_VALID 2177*5113495bSYour Name 2178*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 2179*5113495bSYour Name ('REO_TO_PPE_RING'). 2180*5113495bSYour Name 2181*5113495bSYour Name <legal all> 2182*5113495bSYour Name */ 2183*5113495bSYour Name 2184*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_OFFSET 0x0000004c 2185*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_LSB 14 2186*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_MSB 14 2187*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_MASK 0x00004000 2188*5113495bSYour Name 2189*5113495bSYour Name 2190*5113495bSYour Name /* Description DATA_OFFSET 2191*5113495bSYour Name 2192*5113495bSYour Name The offset to Rx packet data within the buffer (including 2193*5113495bSYour Name Rx DMA offset programming and L3 header padding inserted 2194*5113495bSYour Name by Rx OLE). 2195*5113495bSYour Name 2196*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 2197*5113495bSYour Name ('REO_TO_PPE_RING'). 2198*5113495bSYour Name 2199*5113495bSYour Name <legal all> 2200*5113495bSYour Name */ 2201*5113495bSYour Name 2202*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_OFFSET 0x0000004c 2203*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_LSB 15 2204*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_MSB 26 2205*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_MASK 0x07ff8000 2206*5113495bSYour Name 2207*5113495bSYour Name 2208*5113495bSYour Name /* Description SRC_LINK_ID 2209*5113495bSYour Name 2210*5113495bSYour Name Consumer: SW 2211*5113495bSYour Name Producer: RXDMA 2212*5113495bSYour Name 2213*5113495bSYour Name Set to the link ID of the PMAC that received the frame 2214*5113495bSYour Name <legal all> 2215*5113495bSYour Name */ 2216*5113495bSYour Name 2217*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_OFFSET 0x0000004c 2218*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_LSB 27 2219*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_MSB 29 2220*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_MASK 0x38000000 2221*5113495bSYour Name 2222*5113495bSYour Name 2223*5113495bSYour Name /* Description RESERVED_0A 2224*5113495bSYour Name 2225*5113495bSYour Name <legal 0> 2226*5113495bSYour Name */ 2227*5113495bSYour Name 2228*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_OFFSET 0x0000004c 2229*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_LSB 30 2230*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_MSB 31 2231*5113495bSYour Name #define RX_MSDU_LINK_MSDU_2_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_MASK 0xc0000000 2232*5113495bSYour Name 2233*5113495bSYour Name 2234*5113495bSYour Name /* Description MSDU_3 2235*5113495bSYour Name 2236*5113495bSYour Name Details of next MSDU in this (MSDU flow) linked list 2237*5113495bSYour Name */ 2238*5113495bSYour Name 2239*5113495bSYour Name 2240*5113495bSYour Name /* Description BUFFER_ADDR_INFO_DETAILS 2241*5113495bSYour Name 2242*5113495bSYour Name Consumer: REO/SW 2243*5113495bSYour Name Producer: RXDMA 2244*5113495bSYour Name 2245*5113495bSYour Name Details of the physical address of the buffer containing 2246*5113495bSYour Name an MSDU (or entire MPDU) 2247*5113495bSYour Name */ 2248*5113495bSYour Name 2249*5113495bSYour Name 2250*5113495bSYour Name /* Description BUFFER_ADDR_31_0 2251*5113495bSYour Name 2252*5113495bSYour Name Address (lower 32 bits) of the MSDU buffer OR MSDU_EXTENSION 2253*5113495bSYour Name descriptor OR Link Descriptor 2254*5113495bSYour Name 2255*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 2256*5113495bSYour Name <legal all> 2257*5113495bSYour Name */ 2258*5113495bSYour Name 2259*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_OFFSET 0x00000050 2260*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_LSB 0 2261*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_MSB 31 2262*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_MASK 0xffffffff 2263*5113495bSYour Name 2264*5113495bSYour Name 2265*5113495bSYour Name /* Description BUFFER_ADDR_39_32 2266*5113495bSYour Name 2267*5113495bSYour Name Address (upper 8 bits) of the MSDU buffer OR MSDU_EXTENSION 2268*5113495bSYour Name descriptor OR Link Descriptor 2269*5113495bSYour Name 2270*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 2271*5113495bSYour Name <legal all> 2272*5113495bSYour Name */ 2273*5113495bSYour Name 2274*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_OFFSET 0x00000054 2275*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_LSB 0 2276*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_MSB 7 2277*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_MASK 0x000000ff 2278*5113495bSYour Name 2279*5113495bSYour Name 2280*5113495bSYour Name /* Description RETURN_BUFFER_MANAGER 2281*5113495bSYour Name 2282*5113495bSYour Name Consumer: WBM 2283*5113495bSYour Name Producer: SW/FW 2284*5113495bSYour Name 2285*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 2286*5113495bSYour Name 2287*5113495bSYour Name Indicates to which buffer manager the buffer OR MSDU_EXTENSION 2288*5113495bSYour Name descriptor OR link descriptor that is being pointed to 2289*5113495bSYour Name shall be returned after the frame has been processed. It 2290*5113495bSYour Name is used by WBM for routing purposes. 2291*5113495bSYour Name 2292*5113495bSYour Name <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned 2293*5113495bSYour Name to the WMB buffer idle list 2294*5113495bSYour Name <enum 1 WBM_CHIP0_IDLE_DESC_LIST> This buffer shall be returned 2295*5113495bSYour Name to the WBM idle link descriptor idle list, where the chip 2296*5113495bSYour Name 0 WBM is chosen in case of a multi-chip config 2297*5113495bSYour Name <enum 2 WBM_CHIP1_IDLE_DESC_LIST> This buffer shall be returned 2298*5113495bSYour Name to the chip 1 WBM idle link descriptor idle list 2299*5113495bSYour Name <enum 3 WBM_CHIP2_IDLE_DESC_LIST> This buffer shall be returned 2300*5113495bSYour Name to the chip 2 WBM idle link descriptor idle list 2301*5113495bSYour Name <enum 12 WBM_CHIP3_IDLE_DESC_LIST> This buffer shall be 2302*5113495bSYour Name returned to chip 3 WBM idle link descriptor idle list 2303*5113495bSYour Name <enum 4 FW_BM> This buffer shall be returned to the FW 2304*5113495bSYour Name <enum 5 SW0_BM> This buffer shall be returned to the SW, 2305*5113495bSYour Name ring 0 2306*5113495bSYour Name <enum 6 SW1_BM> This buffer shall be returned to the SW, 2307*5113495bSYour Name ring 1 2308*5113495bSYour Name <enum 7 SW2_BM> This buffer shall be returned to the SW, 2309*5113495bSYour Name ring 2 2310*5113495bSYour Name <enum 8 SW3_BM> This buffer shall be returned to the SW, 2311*5113495bSYour Name ring 3 2312*5113495bSYour Name <enum 9 SW4_BM> This buffer shall be returned to the SW, 2313*5113495bSYour Name ring 4 2314*5113495bSYour Name <enum 10 SW5_BM> This buffer shall be returned to the SW, 2315*5113495bSYour Name ring 5 2316*5113495bSYour Name <enum 11 SW6_BM> This buffer shall be returned to the SW, 2317*5113495bSYour Name ring 6 2318*5113495bSYour Name 2319*5113495bSYour Name <legal 0-12> 2320*5113495bSYour Name */ 2321*5113495bSYour Name 2322*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_OFFSET 0x00000054 2323*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_LSB 8 2324*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_MSB 11 2325*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_MASK 0x00000f00 2326*5113495bSYour Name 2327*5113495bSYour Name 2328*5113495bSYour Name /* Description SW_BUFFER_COOKIE 2329*5113495bSYour Name 2330*5113495bSYour Name Cookie field exclusively used by SW. 2331*5113495bSYour Name 2332*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 2333*5113495bSYour Name 2334*5113495bSYour Name HW ignores the contents, accept that it passes the programmed 2335*5113495bSYour Name value on to other descriptors together with the physical 2336*5113495bSYour Name address 2337*5113495bSYour Name 2338*5113495bSYour Name Field can be used by SW to for example associate the buffers 2339*5113495bSYour Name physical address with the virtual address 2340*5113495bSYour Name The bit definitions as used by SW are within SW HLD specification 2341*5113495bSYour Name 2342*5113495bSYour Name 2343*5113495bSYour Name NOTE1: 2344*5113495bSYour Name The three most significant bits can have a special meaning 2345*5113495bSYour Name in case this struct is embedded in a TX_MPDU_DETAILS STRUCT, 2346*5113495bSYour Name and field transmit_bw_restriction is set 2347*5113495bSYour Name 2348*5113495bSYour Name In case of NON punctured transmission: 2349*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b000: 20 MHz TX only 2350*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b001: 40 MHz TX only 2351*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b010: 80 MHz TX only 2352*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b011: 160 MHz TX only 2353*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b101: 240 MHz TX only 2354*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b100: 320 MHz TX only 2355*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 2356*5113495bSYour Name 2357*5113495bSYour Name In case of punctured transmission: 2358*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0000: pattern 0 only 2359*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0001: pattern 1 only 2360*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0010: pattern 2 only 2361*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0011: pattern 3 only 2362*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0100: pattern 4 only 2363*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0101: pattern 5 only 2364*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0110: pattern 6 only 2365*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0111: pattern 7 only 2366*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1000: pattern 8 only 2367*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1001: pattern 9 only 2368*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1010: pattern 10 only 2369*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1011: pattern 11 only 2370*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 2371*5113495bSYour Name 2372*5113495bSYour Name Note: a punctured transmission is indicated by the presence 2373*5113495bSYour Name of TLV TX_PUNCTURE_SETUP embedded in the scheduler TLV 2374*5113495bSYour Name 2375*5113495bSYour Name <legal all> 2376*5113495bSYour Name */ 2377*5113495bSYour Name 2378*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_OFFSET 0x00000054 2379*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_LSB 12 2380*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_MSB 31 2381*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_MASK 0xfffff000 2382*5113495bSYour Name 2383*5113495bSYour Name 2384*5113495bSYour Name /* Description RX_MSDU_DESC_INFO_DETAILS 2385*5113495bSYour Name 2386*5113495bSYour Name Consumer: REO/SW 2387*5113495bSYour Name Producer: RXDMA 2388*5113495bSYour Name 2389*5113495bSYour Name General information related to the MSDU that should be passed 2390*5113495bSYour Name on from RXDMA all the way to to the REO destination ring. 2391*5113495bSYour Name 2392*5113495bSYour Name */ 2393*5113495bSYour Name 2394*5113495bSYour Name 2395*5113495bSYour Name /* Description FIRST_MSDU_IN_MPDU_FLAG 2396*5113495bSYour Name 2397*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 2398*5113495bSYour Name multiple buffers, this field will be valid in the Last 2399*5113495bSYour Name buffer used by the MSDU 2400*5113495bSYour Name 2401*5113495bSYour Name <enum 0 Not_first_msdu> This is not the first MSDU in the 2402*5113495bSYour Name MPDU. 2403*5113495bSYour Name <enum 1 first_msdu> This MSDU is the first one in the MPDU. 2404*5113495bSYour Name 2405*5113495bSYour Name 2406*5113495bSYour Name <legal all> 2407*5113495bSYour Name */ 2408*5113495bSYour Name 2409*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000058 2410*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_LSB 0 2411*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MSB 0 2412*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001 2413*5113495bSYour Name 2414*5113495bSYour Name 2415*5113495bSYour Name /* Description LAST_MSDU_IN_MPDU_FLAG 2416*5113495bSYour Name 2417*5113495bSYour Name Consumer: WBM/REO/SW/FW 2418*5113495bSYour Name Producer: RXDMA 2419*5113495bSYour Name 2420*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 2421*5113495bSYour Name multiple buffers, this field will be valid in the Last 2422*5113495bSYour Name buffer used by the MSDU 2423*5113495bSYour Name 2424*5113495bSYour Name <enum 0 Not_last_msdu> There are more MSDUs linked to this 2425*5113495bSYour Name MSDU that belongs to this MPDU 2426*5113495bSYour Name <enum 1 Last_msdu> this MSDU is the last one in the MPDU. 2427*5113495bSYour Name This setting is only allowed in combination with 'Msdu_continuation' 2428*5113495bSYour Name set to 0. This implies that when an msdu is spread out over 2429*5113495bSYour Name multiple buffers and thus msdu_continuation is set, only 2430*5113495bSYour Name for the very last buffer of the msdu, can the 'last_msdu_in_mpdu_flag' 2431*5113495bSYour Name be set. 2432*5113495bSYour Name 2433*5113495bSYour Name When both first_msdu_in_mpdu_flag and last_msdu_in_mpdu_flag 2434*5113495bSYour Name are set, the MPDU that this MSDU belongs to only contains 2435*5113495bSYour Name a single MSDU. 2436*5113495bSYour Name 2437*5113495bSYour Name 2438*5113495bSYour Name <legal all> 2439*5113495bSYour Name */ 2440*5113495bSYour Name 2441*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000058 2442*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_LSB 1 2443*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MSB 1 2444*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002 2445*5113495bSYour Name 2446*5113495bSYour Name 2447*5113495bSYour Name /* Description MSDU_CONTINUATION 2448*5113495bSYour Name 2449*5113495bSYour Name When set, this MSDU buffer was not able to hold the entire 2450*5113495bSYour Name MSDU. The next buffer will therefor contain additional 2451*5113495bSYour Name information related to this MSDU. 2452*5113495bSYour Name 2453*5113495bSYour Name <legal all> 2454*5113495bSYour Name */ 2455*5113495bSYour Name 2456*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_OFFSET 0x00000058 2457*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_LSB 2 2458*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MSB 2 2459*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MASK 0x00000004 2460*5113495bSYour Name 2461*5113495bSYour Name 2462*5113495bSYour Name /* Description MSDU_LENGTH 2463*5113495bSYour Name 2464*5113495bSYour Name Parsed from RX_MSDU_START TLV . In the case MSDU spans over 2465*5113495bSYour Name multiple buffers, this field will be valid in the First 2466*5113495bSYour Name buffer used by MSDU. 2467*5113495bSYour Name 2468*5113495bSYour Name Full MSDU length in bytes after decapsulation. 2469*5113495bSYour Name 2470*5113495bSYour Name This field is still valid for MPDU frames without A-MSDU. 2471*5113495bSYour Name It still represents MSDU length after decapsulation 2472*5113495bSYour Name 2473*5113495bSYour Name Or in case of RAW MPDUs, it indicates the length of the 2474*5113495bSYour Name entire MPDU (without FCS field) 2475*5113495bSYour Name <legal all> 2476*5113495bSYour Name */ 2477*5113495bSYour Name 2478*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_OFFSET 0x00000058 2479*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_LSB 3 2480*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MSB 16 2481*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MASK 0x0001fff8 2482*5113495bSYour Name 2483*5113495bSYour Name 2484*5113495bSYour Name /* Description MSDU_DROP 2485*5113495bSYour Name 2486*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 2487*5113495bSYour Name multiple buffers, this field will be valid in the Last 2488*5113495bSYour Name buffer used by the MSDU 2489*5113495bSYour Name 2490*5113495bSYour Name When set, REO shall drop this MSDU and not forward it to 2491*5113495bSYour Name any other ring... 2492*5113495bSYour Name <legal all> 2493*5113495bSYour Name */ 2494*5113495bSYour Name 2495*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_OFFSET 0x00000058 2496*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_LSB 17 2497*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MSB 17 2498*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MASK 0x00020000 2499*5113495bSYour Name 2500*5113495bSYour Name 2501*5113495bSYour Name /* Description SA_IS_VALID 2502*5113495bSYour Name 2503*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 2504*5113495bSYour Name multiple buffers, this field will be valid in the Last 2505*5113495bSYour Name buffer used by the MSDU 2506*5113495bSYour Name 2507*5113495bSYour Name Indicates that OLE found a valid SA entry for this MSDU 2508*5113495bSYour Name <legal all> 2509*5113495bSYour Name */ 2510*5113495bSYour Name 2511*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000058 2512*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 18 2513*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MSB 18 2514*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x00040000 2515*5113495bSYour Name 2516*5113495bSYour Name 2517*5113495bSYour Name /* Description DA_IS_VALID 2518*5113495bSYour Name 2519*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 2520*5113495bSYour Name multiple buffers, this field will be valid in the Last 2521*5113495bSYour Name buffer used by the MSDU 2522*5113495bSYour Name 2523*5113495bSYour Name Indicates that OLE found a valid DA entry for this MSDU 2524*5113495bSYour Name <legal all> 2525*5113495bSYour Name */ 2526*5113495bSYour Name 2527*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000058 2528*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 19 2529*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MSB 19 2530*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x00080000 2531*5113495bSYour Name 2532*5113495bSYour Name 2533*5113495bSYour Name /* Description DA_IS_MCBC 2534*5113495bSYour Name 2535*5113495bSYour Name Field Only valid if "da_is_valid" is set 2536*5113495bSYour Name 2537*5113495bSYour Name Indicates the DA address was a Multicast of Broadcast address 2538*5113495bSYour Name for this MSDU 2539*5113495bSYour Name <legal all> 2540*5113495bSYour Name */ 2541*5113495bSYour Name 2542*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000058 2543*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 20 2544*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MSB 20 2545*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x00100000 2546*5113495bSYour Name 2547*5113495bSYour Name 2548*5113495bSYour Name /* Description L3_HEADER_PADDING_MSB 2549*5113495bSYour Name 2550*5113495bSYour Name Passed on from 'RX_MSDU_END' TLV (only the MSB is reported 2551*5113495bSYour Name as the LSB is always zero) 2552*5113495bSYour Name Number of bytes padded to make sure that the L3 header will 2553*5113495bSYour Name always start of a Dword boundary 2554*5113495bSYour Name <legal all> 2555*5113495bSYour Name */ 2556*5113495bSYour Name 2557*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_OFFSET 0x00000058 2558*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_LSB 21 2559*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MSB 21 2560*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MASK 0x00200000 2561*5113495bSYour Name 2562*5113495bSYour Name 2563*5113495bSYour Name /* Description TCP_UDP_CHKSUM_FAIL 2564*5113495bSYour Name 2565*5113495bSYour Name Passed on from 'RX_ATTENTION' TLV 2566*5113495bSYour Name Indicates that the computed checksum did not match the checksum 2567*5113495bSYour Name in the TCP/UDP header. 2568*5113495bSYour Name <legal all> 2569*5113495bSYour Name */ 2570*5113495bSYour Name 2571*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000058 2572*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_LSB 22 2573*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MSB 22 2574*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MASK 0x00400000 2575*5113495bSYour Name 2576*5113495bSYour Name 2577*5113495bSYour Name /* Description IP_CHKSUM_FAIL 2578*5113495bSYour Name 2579*5113495bSYour Name Passed on from 'RX_ATTENTION' TLV 2580*5113495bSYour Name Indicates that the computed checksum did not match the checksum 2581*5113495bSYour Name in the IP header. 2582*5113495bSYour Name <legal all> 2583*5113495bSYour Name */ 2584*5113495bSYour Name 2585*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_OFFSET 0x00000058 2586*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_LSB 23 2587*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MSB 23 2588*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MASK 0x00800000 2589*5113495bSYour Name 2590*5113495bSYour Name 2591*5113495bSYour Name /* Description FR_DS 2592*5113495bSYour Name 2593*5113495bSYour Name Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' 2594*5113495bSYour Name TLV 2595*5113495bSYour Name Set if the 'from DS' bit is set in the frame control. 2596*5113495bSYour Name <legal all> 2597*5113495bSYour Name */ 2598*5113495bSYour Name 2599*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_FR_DS_OFFSET 0x00000058 2600*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_FR_DS_LSB 24 2601*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MSB 24 2602*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MASK 0x01000000 2603*5113495bSYour Name 2604*5113495bSYour Name 2605*5113495bSYour Name /* Description TO_DS 2606*5113495bSYour Name 2607*5113495bSYour Name Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' 2608*5113495bSYour Name TLV 2609*5113495bSYour Name Set if the 'to DS' bit is set in the frame control. 2610*5113495bSYour Name <legal all> 2611*5113495bSYour Name */ 2612*5113495bSYour Name 2613*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_TO_DS_OFFSET 0x00000058 2614*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_TO_DS_LSB 25 2615*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MSB 25 2616*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MASK 0x02000000 2617*5113495bSYour Name 2618*5113495bSYour Name 2619*5113495bSYour Name /* Description INTRA_BSS 2620*5113495bSYour Name 2621*5113495bSYour Name This packet needs intra-BSS routing by SW as the 'vdev_id' 2622*5113495bSYour Name for the destination is the same as the 'vdev_id' (from 'RX_MPDU_PCU_START') 2623*5113495bSYour Name that this MSDU was got in. 2624*5113495bSYour Name 2625*5113495bSYour Name <legal all> 2626*5113495bSYour Name */ 2627*5113495bSYour Name 2628*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_OFFSET 0x00000058 2629*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_LSB 26 2630*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MSB 26 2631*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MASK 0x04000000 2632*5113495bSYour Name 2633*5113495bSYour Name 2634*5113495bSYour Name /* Description DEST_CHIP_ID 2635*5113495bSYour Name 2636*5113495bSYour Name If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY' 2637*5113495bSYour Name to support intra-BSS routing with multi-chip multi-link 2638*5113495bSYour Name operation. 2639*5113495bSYour Name 2640*5113495bSYour Name This indicates into which chip's TCL the packet should be 2641*5113495bSYour Name queued. 2642*5113495bSYour Name 2643*5113495bSYour Name <legal all> 2644*5113495bSYour Name */ 2645*5113495bSYour Name 2646*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_OFFSET 0x00000058 2647*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_LSB 27 2648*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MSB 28 2649*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MASK 0x18000000 2650*5113495bSYour Name 2651*5113495bSYour Name 2652*5113495bSYour Name /* Description DECAP_FORMAT 2653*5113495bSYour Name 2654*5113495bSYour Name Indicates the format after decapsulation: 2655*5113495bSYour Name 2656*5113495bSYour Name <enum 0 RAW> No encapsulation 2657*5113495bSYour Name <enum 1 Native_WiFi> 2658*5113495bSYour Name <enum 2 Ethernet> Ethernet 2 (DIX) or 802.3 (uses SNAP/LLC) 2659*5113495bSYour Name 2660*5113495bSYour Name <enum 3 802_3> Indicate Ethernet 2661*5113495bSYour Name 2662*5113495bSYour Name <legal all> 2663*5113495bSYour Name */ 2664*5113495bSYour Name 2665*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_OFFSET 0x00000058 2666*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_LSB 29 2667*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MSB 30 2668*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MASK 0x60000000 2669*5113495bSYour Name 2670*5113495bSYour Name 2671*5113495bSYour Name /* Description DEST_CHIP_PMAC_ID 2672*5113495bSYour Name 2673*5113495bSYour Name If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY' 2674*5113495bSYour Name to support intra-BSS routing with multi-chip multi-link 2675*5113495bSYour Name operation. 2676*5113495bSYour Name 2677*5113495bSYour Name This indicates into which link/'vdev' the packet should 2678*5113495bSYour Name be queued in TCL. 2679*5113495bSYour Name 2680*5113495bSYour Name <legal all> 2681*5113495bSYour Name */ 2682*5113495bSYour Name 2683*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_OFFSET 0x00000058 2684*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_LSB 31 2685*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_MSB 31 2686*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_MASK 0x80000000 2687*5113495bSYour Name 2688*5113495bSYour Name 2689*5113495bSYour Name /* Description RX_MSDU_EXT_DESC_INFO_DETAILS 2690*5113495bSYour Name 2691*5113495bSYour Name Consumer: REO/SW 2692*5113495bSYour Name Producer: RXDMA 2693*5113495bSYour Name 2694*5113495bSYour Name Extended information related to the MSDU that is passed 2695*5113495bSYour Name on from RXDMA to REO but not part of the REO destination 2696*5113495bSYour Name ring. Some fields are passed on to PPE. 2697*5113495bSYour Name */ 2698*5113495bSYour Name 2699*5113495bSYour Name 2700*5113495bSYour Name /* Description REO_DESTINATION_INDICATION 2701*5113495bSYour Name 2702*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 2703*5113495bSYour Name multiple buffers, this field will be valid in the Last 2704*5113495bSYour Name buffer used by the MSDU 2705*5113495bSYour Name 2706*5113495bSYour Name The ID of the REO exit ring where the MSDU frame shall push 2707*5113495bSYour Name after (MPDU level) reordering has finished. 2708*5113495bSYour Name 2709*5113495bSYour Name <enum 0 reo_destination_sw0> Reo will push the frame into 2710*5113495bSYour Name the REO2SW0 ring 2711*5113495bSYour Name <enum 1 reo_destination_sw1> Reo will push the frame into 2712*5113495bSYour Name the REO2SW1 ring 2713*5113495bSYour Name <enum 2 reo_destination_sw2> Reo will push the frame into 2714*5113495bSYour Name the REO2SW2 ring 2715*5113495bSYour Name <enum 3 reo_destination_sw3> Reo will push the frame into 2716*5113495bSYour Name the REO2SW3 ring 2717*5113495bSYour Name <enum 4 reo_destination_sw4> Reo will push the frame into 2718*5113495bSYour Name the REO2SW4 ring 2719*5113495bSYour Name <enum 5 reo_destination_release> Reo will push the frame 2720*5113495bSYour Name into the REO_release ring 2721*5113495bSYour Name <enum 6 reo_destination_fw> Reo will push the frame into 2722*5113495bSYour Name the REO2FW ring 2723*5113495bSYour Name <enum 7 reo_destination_sw5> Reo will push the frame into 2724*5113495bSYour Name the REO2SW5 ring (REO remaps this in chips without REO2SW5 2725*5113495bSYour Name ring, e.g. Pine) 2726*5113495bSYour Name <enum 8 reo_destination_sw6> Reo will push the frame into 2727*5113495bSYour Name the REO2SW6 ring (REO remaps this in chips without REO2SW6 2728*5113495bSYour Name ring, e.g. Pine) 2729*5113495bSYour Name <enum 9 reo_destination_sw7> Reo will push the frame into 2730*5113495bSYour Name the REO2SW7 ring (REO remaps this in chips without REO2SW7 2731*5113495bSYour Name ring) 2732*5113495bSYour Name <enum 10 reo_destination_sw8> Reo will push the frame into 2733*5113495bSYour Name the REO2SW8 ring (REO remaps this in chips without REO2SW8 2734*5113495bSYour Name ring) 2735*5113495bSYour Name <enum 11 reo_destination_11> REO remaps this 2736*5113495bSYour Name <enum 12 reo_destination_12> REO remaps this <enum 13 reo_destination_13> 2737*5113495bSYour Name REO remaps this 2738*5113495bSYour Name <enum 14 reo_destination_14> REO remaps this 2739*5113495bSYour Name <enum 15 reo_destination_15> REO remaps this 2740*5113495bSYour Name <enum 16 reo_destination_16> REO remaps this 2741*5113495bSYour Name <enum 17 reo_destination_17> REO remaps this 2742*5113495bSYour Name <enum 18 reo_destination_18> REO remaps this 2743*5113495bSYour Name <enum 19 reo_destination_19> REO remaps this 2744*5113495bSYour Name <enum 20 reo_destination_20> REO remaps this 2745*5113495bSYour Name <enum 21 reo_destination_21> REO remaps this 2746*5113495bSYour Name <enum 22 reo_destination_22> REO remaps this 2747*5113495bSYour Name <enum 23 reo_destination_23> REO remaps this 2748*5113495bSYour Name <enum 24 reo_destination_24> REO remaps this 2749*5113495bSYour Name <enum 25 reo_destination_25> REO remaps this 2750*5113495bSYour Name <enum 26 reo_destination_26> REO remaps this 2751*5113495bSYour Name <enum 27 reo_destination_27> REO remaps this 2752*5113495bSYour Name <enum 28 reo_destination_28> REO remaps this 2753*5113495bSYour Name <enum 29 reo_destination_29> REO remaps this 2754*5113495bSYour Name <enum 30 reo_destination_30> REO remaps this 2755*5113495bSYour Name <enum 31 reo_destination_31> REO remaps this 2756*5113495bSYour Name 2757*5113495bSYour Name <legal all> 2758*5113495bSYour Name */ 2759*5113495bSYour Name 2760*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_OFFSET 0x0000005c 2761*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_LSB 0 2762*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MSB 4 2763*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MASK 0x0000001f 2764*5113495bSYour Name 2765*5113495bSYour Name 2766*5113495bSYour Name /* Description SERVICE_CODE 2767*5113495bSYour Name 2768*5113495bSYour Name Opaque service code between PPE and Wi-Fi 2769*5113495bSYour Name 2770*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 2771*5113495bSYour Name ('REO_TO_PPE_RING'). 2772*5113495bSYour Name 2773*5113495bSYour Name <legal all> 2774*5113495bSYour Name */ 2775*5113495bSYour Name 2776*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_OFFSET 0x0000005c 2777*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_LSB 5 2778*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_MSB 13 2779*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_MASK 0x00003fe0 2780*5113495bSYour Name 2781*5113495bSYour Name 2782*5113495bSYour Name /* Description PRIORITY_VALID 2783*5113495bSYour Name 2784*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 2785*5113495bSYour Name ('REO_TO_PPE_RING'). 2786*5113495bSYour Name 2787*5113495bSYour Name <legal all> 2788*5113495bSYour Name */ 2789*5113495bSYour Name 2790*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_OFFSET 0x0000005c 2791*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_LSB 14 2792*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_MSB 14 2793*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_MASK 0x00004000 2794*5113495bSYour Name 2795*5113495bSYour Name 2796*5113495bSYour Name /* Description DATA_OFFSET 2797*5113495bSYour Name 2798*5113495bSYour Name The offset to Rx packet data within the buffer (including 2799*5113495bSYour Name Rx DMA offset programming and L3 header padding inserted 2800*5113495bSYour Name by Rx OLE). 2801*5113495bSYour Name 2802*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 2803*5113495bSYour Name ('REO_TO_PPE_RING'). 2804*5113495bSYour Name 2805*5113495bSYour Name <legal all> 2806*5113495bSYour Name */ 2807*5113495bSYour Name 2808*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_OFFSET 0x0000005c 2809*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_LSB 15 2810*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_MSB 26 2811*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_MASK 0x07ff8000 2812*5113495bSYour Name 2813*5113495bSYour Name 2814*5113495bSYour Name /* Description SRC_LINK_ID 2815*5113495bSYour Name 2816*5113495bSYour Name Consumer: SW 2817*5113495bSYour Name Producer: RXDMA 2818*5113495bSYour Name 2819*5113495bSYour Name Set to the link ID of the PMAC that received the frame 2820*5113495bSYour Name <legal all> 2821*5113495bSYour Name */ 2822*5113495bSYour Name 2823*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_OFFSET 0x0000005c 2824*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_LSB 27 2825*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_MSB 29 2826*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_MASK 0x38000000 2827*5113495bSYour Name 2828*5113495bSYour Name 2829*5113495bSYour Name /* Description RESERVED_0A 2830*5113495bSYour Name 2831*5113495bSYour Name <legal 0> 2832*5113495bSYour Name */ 2833*5113495bSYour Name 2834*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_OFFSET 0x0000005c 2835*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_LSB 30 2836*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_MSB 31 2837*5113495bSYour Name #define RX_MSDU_LINK_MSDU_3_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_MASK 0xc0000000 2838*5113495bSYour Name 2839*5113495bSYour Name 2840*5113495bSYour Name /* Description MSDU_4 2841*5113495bSYour Name 2842*5113495bSYour Name Details of next MSDU in this (MSDU flow) linked list 2843*5113495bSYour Name */ 2844*5113495bSYour Name 2845*5113495bSYour Name 2846*5113495bSYour Name /* Description BUFFER_ADDR_INFO_DETAILS 2847*5113495bSYour Name 2848*5113495bSYour Name Consumer: REO/SW 2849*5113495bSYour Name Producer: RXDMA 2850*5113495bSYour Name 2851*5113495bSYour Name Details of the physical address of the buffer containing 2852*5113495bSYour Name an MSDU (or entire MPDU) 2853*5113495bSYour Name */ 2854*5113495bSYour Name 2855*5113495bSYour Name 2856*5113495bSYour Name /* Description BUFFER_ADDR_31_0 2857*5113495bSYour Name 2858*5113495bSYour Name Address (lower 32 bits) of the MSDU buffer OR MSDU_EXTENSION 2859*5113495bSYour Name descriptor OR Link Descriptor 2860*5113495bSYour Name 2861*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 2862*5113495bSYour Name <legal all> 2863*5113495bSYour Name */ 2864*5113495bSYour Name 2865*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_OFFSET 0x00000060 2866*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_LSB 0 2867*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_MSB 31 2868*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_MASK 0xffffffff 2869*5113495bSYour Name 2870*5113495bSYour Name 2871*5113495bSYour Name /* Description BUFFER_ADDR_39_32 2872*5113495bSYour Name 2873*5113495bSYour Name Address (upper 8 bits) of the MSDU buffer OR MSDU_EXTENSION 2874*5113495bSYour Name descriptor OR Link Descriptor 2875*5113495bSYour Name 2876*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 2877*5113495bSYour Name <legal all> 2878*5113495bSYour Name */ 2879*5113495bSYour Name 2880*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_OFFSET 0x00000064 2881*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_LSB 0 2882*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_MSB 7 2883*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_MASK 0x000000ff 2884*5113495bSYour Name 2885*5113495bSYour Name 2886*5113495bSYour Name /* Description RETURN_BUFFER_MANAGER 2887*5113495bSYour Name 2888*5113495bSYour Name Consumer: WBM 2889*5113495bSYour Name Producer: SW/FW 2890*5113495bSYour Name 2891*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 2892*5113495bSYour Name 2893*5113495bSYour Name Indicates to which buffer manager the buffer OR MSDU_EXTENSION 2894*5113495bSYour Name descriptor OR link descriptor that is being pointed to 2895*5113495bSYour Name shall be returned after the frame has been processed. It 2896*5113495bSYour Name is used by WBM for routing purposes. 2897*5113495bSYour Name 2898*5113495bSYour Name <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned 2899*5113495bSYour Name to the WMB buffer idle list 2900*5113495bSYour Name <enum 1 WBM_CHIP0_IDLE_DESC_LIST> This buffer shall be returned 2901*5113495bSYour Name to the WBM idle link descriptor idle list, where the chip 2902*5113495bSYour Name 0 WBM is chosen in case of a multi-chip config 2903*5113495bSYour Name <enum 2 WBM_CHIP1_IDLE_DESC_LIST> This buffer shall be returned 2904*5113495bSYour Name to the chip 1 WBM idle link descriptor idle list 2905*5113495bSYour Name <enum 3 WBM_CHIP2_IDLE_DESC_LIST> This buffer shall be returned 2906*5113495bSYour Name to the chip 2 WBM idle link descriptor idle list 2907*5113495bSYour Name <enum 12 WBM_CHIP3_IDLE_DESC_LIST> This buffer shall be 2908*5113495bSYour Name returned to chip 3 WBM idle link descriptor idle list 2909*5113495bSYour Name <enum 4 FW_BM> This buffer shall be returned to the FW 2910*5113495bSYour Name <enum 5 SW0_BM> This buffer shall be returned to the SW, 2911*5113495bSYour Name ring 0 2912*5113495bSYour Name <enum 6 SW1_BM> This buffer shall be returned to the SW, 2913*5113495bSYour Name ring 1 2914*5113495bSYour Name <enum 7 SW2_BM> This buffer shall be returned to the SW, 2915*5113495bSYour Name ring 2 2916*5113495bSYour Name <enum 8 SW3_BM> This buffer shall be returned to the SW, 2917*5113495bSYour Name ring 3 2918*5113495bSYour Name <enum 9 SW4_BM> This buffer shall be returned to the SW, 2919*5113495bSYour Name ring 4 2920*5113495bSYour Name <enum 10 SW5_BM> This buffer shall be returned to the SW, 2921*5113495bSYour Name ring 5 2922*5113495bSYour Name <enum 11 SW6_BM> This buffer shall be returned to the SW, 2923*5113495bSYour Name ring 6 2924*5113495bSYour Name 2925*5113495bSYour Name <legal 0-12> 2926*5113495bSYour Name */ 2927*5113495bSYour Name 2928*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_OFFSET 0x00000064 2929*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_LSB 8 2930*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_MSB 11 2931*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_MASK 0x00000f00 2932*5113495bSYour Name 2933*5113495bSYour Name 2934*5113495bSYour Name /* Description SW_BUFFER_COOKIE 2935*5113495bSYour Name 2936*5113495bSYour Name Cookie field exclusively used by SW. 2937*5113495bSYour Name 2938*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 2939*5113495bSYour Name 2940*5113495bSYour Name HW ignores the contents, accept that it passes the programmed 2941*5113495bSYour Name value on to other descriptors together with the physical 2942*5113495bSYour Name address 2943*5113495bSYour Name 2944*5113495bSYour Name Field can be used by SW to for example associate the buffers 2945*5113495bSYour Name physical address with the virtual address 2946*5113495bSYour Name The bit definitions as used by SW are within SW HLD specification 2947*5113495bSYour Name 2948*5113495bSYour Name 2949*5113495bSYour Name NOTE1: 2950*5113495bSYour Name The three most significant bits can have a special meaning 2951*5113495bSYour Name in case this struct is embedded in a TX_MPDU_DETAILS STRUCT, 2952*5113495bSYour Name and field transmit_bw_restriction is set 2953*5113495bSYour Name 2954*5113495bSYour Name In case of NON punctured transmission: 2955*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b000: 20 MHz TX only 2956*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b001: 40 MHz TX only 2957*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b010: 80 MHz TX only 2958*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b011: 160 MHz TX only 2959*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b101: 240 MHz TX only 2960*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b100: 320 MHz TX only 2961*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 2962*5113495bSYour Name 2963*5113495bSYour Name In case of punctured transmission: 2964*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0000: pattern 0 only 2965*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0001: pattern 1 only 2966*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0010: pattern 2 only 2967*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0011: pattern 3 only 2968*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0100: pattern 4 only 2969*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0101: pattern 5 only 2970*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0110: pattern 6 only 2971*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0111: pattern 7 only 2972*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1000: pattern 8 only 2973*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1001: pattern 9 only 2974*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1010: pattern 10 only 2975*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1011: pattern 11 only 2976*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 2977*5113495bSYour Name 2978*5113495bSYour Name Note: a punctured transmission is indicated by the presence 2979*5113495bSYour Name of TLV TX_PUNCTURE_SETUP embedded in the scheduler TLV 2980*5113495bSYour Name 2981*5113495bSYour Name <legal all> 2982*5113495bSYour Name */ 2983*5113495bSYour Name 2984*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_OFFSET 0x00000064 2985*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_LSB 12 2986*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_MSB 31 2987*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_MASK 0xfffff000 2988*5113495bSYour Name 2989*5113495bSYour Name 2990*5113495bSYour Name /* Description RX_MSDU_DESC_INFO_DETAILS 2991*5113495bSYour Name 2992*5113495bSYour Name Consumer: REO/SW 2993*5113495bSYour Name Producer: RXDMA 2994*5113495bSYour Name 2995*5113495bSYour Name General information related to the MSDU that should be passed 2996*5113495bSYour Name on from RXDMA all the way to to the REO destination ring. 2997*5113495bSYour Name 2998*5113495bSYour Name */ 2999*5113495bSYour Name 3000*5113495bSYour Name 3001*5113495bSYour Name /* Description FIRST_MSDU_IN_MPDU_FLAG 3002*5113495bSYour Name 3003*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 3004*5113495bSYour Name multiple buffers, this field will be valid in the Last 3005*5113495bSYour Name buffer used by the MSDU 3006*5113495bSYour Name 3007*5113495bSYour Name <enum 0 Not_first_msdu> This is not the first MSDU in the 3008*5113495bSYour Name MPDU. 3009*5113495bSYour Name <enum 1 first_msdu> This MSDU is the first one in the MPDU. 3010*5113495bSYour Name 3011*5113495bSYour Name 3012*5113495bSYour Name <legal all> 3013*5113495bSYour Name */ 3014*5113495bSYour Name 3015*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000068 3016*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_LSB 0 3017*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MSB 0 3018*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001 3019*5113495bSYour Name 3020*5113495bSYour Name 3021*5113495bSYour Name /* Description LAST_MSDU_IN_MPDU_FLAG 3022*5113495bSYour Name 3023*5113495bSYour Name Consumer: WBM/REO/SW/FW 3024*5113495bSYour Name Producer: RXDMA 3025*5113495bSYour Name 3026*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 3027*5113495bSYour Name multiple buffers, this field will be valid in the Last 3028*5113495bSYour Name buffer used by the MSDU 3029*5113495bSYour Name 3030*5113495bSYour Name <enum 0 Not_last_msdu> There are more MSDUs linked to this 3031*5113495bSYour Name MSDU that belongs to this MPDU 3032*5113495bSYour Name <enum 1 Last_msdu> this MSDU is the last one in the MPDU. 3033*5113495bSYour Name This setting is only allowed in combination with 'Msdu_continuation' 3034*5113495bSYour Name set to 0. This implies that when an msdu is spread out over 3035*5113495bSYour Name multiple buffers and thus msdu_continuation is set, only 3036*5113495bSYour Name for the very last buffer of the msdu, can the 'last_msdu_in_mpdu_flag' 3037*5113495bSYour Name be set. 3038*5113495bSYour Name 3039*5113495bSYour Name When both first_msdu_in_mpdu_flag and last_msdu_in_mpdu_flag 3040*5113495bSYour Name are set, the MPDU that this MSDU belongs to only contains 3041*5113495bSYour Name a single MSDU. 3042*5113495bSYour Name 3043*5113495bSYour Name 3044*5113495bSYour Name <legal all> 3045*5113495bSYour Name */ 3046*5113495bSYour Name 3047*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000068 3048*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_LSB 1 3049*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MSB 1 3050*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002 3051*5113495bSYour Name 3052*5113495bSYour Name 3053*5113495bSYour Name /* Description MSDU_CONTINUATION 3054*5113495bSYour Name 3055*5113495bSYour Name When set, this MSDU buffer was not able to hold the entire 3056*5113495bSYour Name MSDU. The next buffer will therefor contain additional 3057*5113495bSYour Name information related to this MSDU. 3058*5113495bSYour Name 3059*5113495bSYour Name <legal all> 3060*5113495bSYour Name */ 3061*5113495bSYour Name 3062*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_OFFSET 0x00000068 3063*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_LSB 2 3064*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MSB 2 3065*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MASK 0x00000004 3066*5113495bSYour Name 3067*5113495bSYour Name 3068*5113495bSYour Name /* Description MSDU_LENGTH 3069*5113495bSYour Name 3070*5113495bSYour Name Parsed from RX_MSDU_START TLV . In the case MSDU spans over 3071*5113495bSYour Name multiple buffers, this field will be valid in the First 3072*5113495bSYour Name buffer used by MSDU. 3073*5113495bSYour Name 3074*5113495bSYour Name Full MSDU length in bytes after decapsulation. 3075*5113495bSYour Name 3076*5113495bSYour Name This field is still valid for MPDU frames without A-MSDU. 3077*5113495bSYour Name It still represents MSDU length after decapsulation 3078*5113495bSYour Name 3079*5113495bSYour Name Or in case of RAW MPDUs, it indicates the length of the 3080*5113495bSYour Name entire MPDU (without FCS field) 3081*5113495bSYour Name <legal all> 3082*5113495bSYour Name */ 3083*5113495bSYour Name 3084*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_OFFSET 0x00000068 3085*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_LSB 3 3086*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MSB 16 3087*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MASK 0x0001fff8 3088*5113495bSYour Name 3089*5113495bSYour Name 3090*5113495bSYour Name /* Description MSDU_DROP 3091*5113495bSYour Name 3092*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 3093*5113495bSYour Name multiple buffers, this field will be valid in the Last 3094*5113495bSYour Name buffer used by the MSDU 3095*5113495bSYour Name 3096*5113495bSYour Name When set, REO shall drop this MSDU and not forward it to 3097*5113495bSYour Name any other ring... 3098*5113495bSYour Name <legal all> 3099*5113495bSYour Name */ 3100*5113495bSYour Name 3101*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_OFFSET 0x00000068 3102*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_LSB 17 3103*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MSB 17 3104*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MASK 0x00020000 3105*5113495bSYour Name 3106*5113495bSYour Name 3107*5113495bSYour Name /* Description SA_IS_VALID 3108*5113495bSYour Name 3109*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 3110*5113495bSYour Name multiple buffers, this field will be valid in the Last 3111*5113495bSYour Name buffer used by the MSDU 3112*5113495bSYour Name 3113*5113495bSYour Name Indicates that OLE found a valid SA entry for this MSDU 3114*5113495bSYour Name <legal all> 3115*5113495bSYour Name */ 3116*5113495bSYour Name 3117*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000068 3118*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 18 3119*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MSB 18 3120*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x00040000 3121*5113495bSYour Name 3122*5113495bSYour Name 3123*5113495bSYour Name /* Description DA_IS_VALID 3124*5113495bSYour Name 3125*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 3126*5113495bSYour Name multiple buffers, this field will be valid in the Last 3127*5113495bSYour Name buffer used by the MSDU 3128*5113495bSYour Name 3129*5113495bSYour Name Indicates that OLE found a valid DA entry for this MSDU 3130*5113495bSYour Name <legal all> 3131*5113495bSYour Name */ 3132*5113495bSYour Name 3133*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000068 3134*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 19 3135*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MSB 19 3136*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x00080000 3137*5113495bSYour Name 3138*5113495bSYour Name 3139*5113495bSYour Name /* Description DA_IS_MCBC 3140*5113495bSYour Name 3141*5113495bSYour Name Field Only valid if "da_is_valid" is set 3142*5113495bSYour Name 3143*5113495bSYour Name Indicates the DA address was a Multicast of Broadcast address 3144*5113495bSYour Name for this MSDU 3145*5113495bSYour Name <legal all> 3146*5113495bSYour Name */ 3147*5113495bSYour Name 3148*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000068 3149*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 20 3150*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MSB 20 3151*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x00100000 3152*5113495bSYour Name 3153*5113495bSYour Name 3154*5113495bSYour Name /* Description L3_HEADER_PADDING_MSB 3155*5113495bSYour Name 3156*5113495bSYour Name Passed on from 'RX_MSDU_END' TLV (only the MSB is reported 3157*5113495bSYour Name as the LSB is always zero) 3158*5113495bSYour Name Number of bytes padded to make sure that the L3 header will 3159*5113495bSYour Name always start of a Dword boundary 3160*5113495bSYour Name <legal all> 3161*5113495bSYour Name */ 3162*5113495bSYour Name 3163*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_OFFSET 0x00000068 3164*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_LSB 21 3165*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MSB 21 3166*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MASK 0x00200000 3167*5113495bSYour Name 3168*5113495bSYour Name 3169*5113495bSYour Name /* Description TCP_UDP_CHKSUM_FAIL 3170*5113495bSYour Name 3171*5113495bSYour Name Passed on from 'RX_ATTENTION' TLV 3172*5113495bSYour Name Indicates that the computed checksum did not match the checksum 3173*5113495bSYour Name in the TCP/UDP header. 3174*5113495bSYour Name <legal all> 3175*5113495bSYour Name */ 3176*5113495bSYour Name 3177*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000068 3178*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_LSB 22 3179*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MSB 22 3180*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MASK 0x00400000 3181*5113495bSYour Name 3182*5113495bSYour Name 3183*5113495bSYour Name /* Description IP_CHKSUM_FAIL 3184*5113495bSYour Name 3185*5113495bSYour Name Passed on from 'RX_ATTENTION' TLV 3186*5113495bSYour Name Indicates that the computed checksum did not match the checksum 3187*5113495bSYour Name in the IP header. 3188*5113495bSYour Name <legal all> 3189*5113495bSYour Name */ 3190*5113495bSYour Name 3191*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_OFFSET 0x00000068 3192*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_LSB 23 3193*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MSB 23 3194*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MASK 0x00800000 3195*5113495bSYour Name 3196*5113495bSYour Name 3197*5113495bSYour Name /* Description FR_DS 3198*5113495bSYour Name 3199*5113495bSYour Name Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' 3200*5113495bSYour Name TLV 3201*5113495bSYour Name Set if the 'from DS' bit is set in the frame control. 3202*5113495bSYour Name <legal all> 3203*5113495bSYour Name */ 3204*5113495bSYour Name 3205*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_FR_DS_OFFSET 0x00000068 3206*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_FR_DS_LSB 24 3207*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MSB 24 3208*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MASK 0x01000000 3209*5113495bSYour Name 3210*5113495bSYour Name 3211*5113495bSYour Name /* Description TO_DS 3212*5113495bSYour Name 3213*5113495bSYour Name Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' 3214*5113495bSYour Name TLV 3215*5113495bSYour Name Set if the 'to DS' bit is set in the frame control. 3216*5113495bSYour Name <legal all> 3217*5113495bSYour Name */ 3218*5113495bSYour Name 3219*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_TO_DS_OFFSET 0x00000068 3220*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_TO_DS_LSB 25 3221*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MSB 25 3222*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MASK 0x02000000 3223*5113495bSYour Name 3224*5113495bSYour Name 3225*5113495bSYour Name /* Description INTRA_BSS 3226*5113495bSYour Name 3227*5113495bSYour Name This packet needs intra-BSS routing by SW as the 'vdev_id' 3228*5113495bSYour Name for the destination is the same as the 'vdev_id' (from 'RX_MPDU_PCU_START') 3229*5113495bSYour Name that this MSDU was got in. 3230*5113495bSYour Name 3231*5113495bSYour Name <legal all> 3232*5113495bSYour Name */ 3233*5113495bSYour Name 3234*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_OFFSET 0x00000068 3235*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_LSB 26 3236*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MSB 26 3237*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MASK 0x04000000 3238*5113495bSYour Name 3239*5113495bSYour Name 3240*5113495bSYour Name /* Description DEST_CHIP_ID 3241*5113495bSYour Name 3242*5113495bSYour Name If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY' 3243*5113495bSYour Name to support intra-BSS routing with multi-chip multi-link 3244*5113495bSYour Name operation. 3245*5113495bSYour Name 3246*5113495bSYour Name This indicates into which chip's TCL the packet should be 3247*5113495bSYour Name queued. 3248*5113495bSYour Name 3249*5113495bSYour Name <legal all> 3250*5113495bSYour Name */ 3251*5113495bSYour Name 3252*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_OFFSET 0x00000068 3253*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_LSB 27 3254*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MSB 28 3255*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MASK 0x18000000 3256*5113495bSYour Name 3257*5113495bSYour Name 3258*5113495bSYour Name /* Description DECAP_FORMAT 3259*5113495bSYour Name 3260*5113495bSYour Name Indicates the format after decapsulation: 3261*5113495bSYour Name 3262*5113495bSYour Name <enum 0 RAW> No encapsulation 3263*5113495bSYour Name <enum 1 Native_WiFi> 3264*5113495bSYour Name <enum 2 Ethernet> Ethernet 2 (DIX) or 802.3 (uses SNAP/LLC) 3265*5113495bSYour Name 3266*5113495bSYour Name <enum 3 802_3> Indicate Ethernet 3267*5113495bSYour Name 3268*5113495bSYour Name <legal all> 3269*5113495bSYour Name */ 3270*5113495bSYour Name 3271*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_OFFSET 0x00000068 3272*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_LSB 29 3273*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MSB 30 3274*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MASK 0x60000000 3275*5113495bSYour Name 3276*5113495bSYour Name 3277*5113495bSYour Name /* Description DEST_CHIP_PMAC_ID 3278*5113495bSYour Name 3279*5113495bSYour Name If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY' 3280*5113495bSYour Name to support intra-BSS routing with multi-chip multi-link 3281*5113495bSYour Name operation. 3282*5113495bSYour Name 3283*5113495bSYour Name This indicates into which link/'vdev' the packet should 3284*5113495bSYour Name be queued in TCL. 3285*5113495bSYour Name 3286*5113495bSYour Name <legal all> 3287*5113495bSYour Name */ 3288*5113495bSYour Name 3289*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_OFFSET 0x00000068 3290*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_LSB 31 3291*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_MSB 31 3292*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_MASK 0x80000000 3293*5113495bSYour Name 3294*5113495bSYour Name 3295*5113495bSYour Name /* Description RX_MSDU_EXT_DESC_INFO_DETAILS 3296*5113495bSYour Name 3297*5113495bSYour Name Consumer: REO/SW 3298*5113495bSYour Name Producer: RXDMA 3299*5113495bSYour Name 3300*5113495bSYour Name Extended information related to the MSDU that is passed 3301*5113495bSYour Name on from RXDMA to REO but not part of the REO destination 3302*5113495bSYour Name ring. Some fields are passed on to PPE. 3303*5113495bSYour Name */ 3304*5113495bSYour Name 3305*5113495bSYour Name 3306*5113495bSYour Name /* Description REO_DESTINATION_INDICATION 3307*5113495bSYour Name 3308*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 3309*5113495bSYour Name multiple buffers, this field will be valid in the Last 3310*5113495bSYour Name buffer used by the MSDU 3311*5113495bSYour Name 3312*5113495bSYour Name The ID of the REO exit ring where the MSDU frame shall push 3313*5113495bSYour Name after (MPDU level) reordering has finished. 3314*5113495bSYour Name 3315*5113495bSYour Name <enum 0 reo_destination_sw0> Reo will push the frame into 3316*5113495bSYour Name the REO2SW0 ring 3317*5113495bSYour Name <enum 1 reo_destination_sw1> Reo will push the frame into 3318*5113495bSYour Name the REO2SW1 ring 3319*5113495bSYour Name <enum 2 reo_destination_sw2> Reo will push the frame into 3320*5113495bSYour Name the REO2SW2 ring 3321*5113495bSYour Name <enum 3 reo_destination_sw3> Reo will push the frame into 3322*5113495bSYour Name the REO2SW3 ring 3323*5113495bSYour Name <enum 4 reo_destination_sw4> Reo will push the frame into 3324*5113495bSYour Name the REO2SW4 ring 3325*5113495bSYour Name <enum 5 reo_destination_release> Reo will push the frame 3326*5113495bSYour Name into the REO_release ring 3327*5113495bSYour Name <enum 6 reo_destination_fw> Reo will push the frame into 3328*5113495bSYour Name the REO2FW ring 3329*5113495bSYour Name <enum 7 reo_destination_sw5> Reo will push the frame into 3330*5113495bSYour Name the REO2SW5 ring (REO remaps this in chips without REO2SW5 3331*5113495bSYour Name ring, e.g. Pine) 3332*5113495bSYour Name <enum 8 reo_destination_sw6> Reo will push the frame into 3333*5113495bSYour Name the REO2SW6 ring (REO remaps this in chips without REO2SW6 3334*5113495bSYour Name ring, e.g. Pine) 3335*5113495bSYour Name <enum 9 reo_destination_sw7> Reo will push the frame into 3336*5113495bSYour Name the REO2SW7 ring (REO remaps this in chips without REO2SW7 3337*5113495bSYour Name ring) 3338*5113495bSYour Name <enum 10 reo_destination_sw8> Reo will push the frame into 3339*5113495bSYour Name the REO2SW8 ring (REO remaps this in chips without REO2SW8 3340*5113495bSYour Name ring) 3341*5113495bSYour Name <enum 11 reo_destination_11> REO remaps this 3342*5113495bSYour Name <enum 12 reo_destination_12> REO remaps this <enum 13 reo_destination_13> 3343*5113495bSYour Name REO remaps this 3344*5113495bSYour Name <enum 14 reo_destination_14> REO remaps this 3345*5113495bSYour Name <enum 15 reo_destination_15> REO remaps this 3346*5113495bSYour Name <enum 16 reo_destination_16> REO remaps this 3347*5113495bSYour Name <enum 17 reo_destination_17> REO remaps this 3348*5113495bSYour Name <enum 18 reo_destination_18> REO remaps this 3349*5113495bSYour Name <enum 19 reo_destination_19> REO remaps this 3350*5113495bSYour Name <enum 20 reo_destination_20> REO remaps this 3351*5113495bSYour Name <enum 21 reo_destination_21> REO remaps this 3352*5113495bSYour Name <enum 22 reo_destination_22> REO remaps this 3353*5113495bSYour Name <enum 23 reo_destination_23> REO remaps this 3354*5113495bSYour Name <enum 24 reo_destination_24> REO remaps this 3355*5113495bSYour Name <enum 25 reo_destination_25> REO remaps this 3356*5113495bSYour Name <enum 26 reo_destination_26> REO remaps this 3357*5113495bSYour Name <enum 27 reo_destination_27> REO remaps this 3358*5113495bSYour Name <enum 28 reo_destination_28> REO remaps this 3359*5113495bSYour Name <enum 29 reo_destination_29> REO remaps this 3360*5113495bSYour Name <enum 30 reo_destination_30> REO remaps this 3361*5113495bSYour Name <enum 31 reo_destination_31> REO remaps this 3362*5113495bSYour Name 3363*5113495bSYour Name <legal all> 3364*5113495bSYour Name */ 3365*5113495bSYour Name 3366*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_OFFSET 0x0000006c 3367*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_LSB 0 3368*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MSB 4 3369*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MASK 0x0000001f 3370*5113495bSYour Name 3371*5113495bSYour Name 3372*5113495bSYour Name /* Description SERVICE_CODE 3373*5113495bSYour Name 3374*5113495bSYour Name Opaque service code between PPE and Wi-Fi 3375*5113495bSYour Name 3376*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 3377*5113495bSYour Name ('REO_TO_PPE_RING'). 3378*5113495bSYour Name 3379*5113495bSYour Name <legal all> 3380*5113495bSYour Name */ 3381*5113495bSYour Name 3382*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_OFFSET 0x0000006c 3383*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_LSB 5 3384*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_MSB 13 3385*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_MASK 0x00003fe0 3386*5113495bSYour Name 3387*5113495bSYour Name 3388*5113495bSYour Name /* Description PRIORITY_VALID 3389*5113495bSYour Name 3390*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 3391*5113495bSYour Name ('REO_TO_PPE_RING'). 3392*5113495bSYour Name 3393*5113495bSYour Name <legal all> 3394*5113495bSYour Name */ 3395*5113495bSYour Name 3396*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_OFFSET 0x0000006c 3397*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_LSB 14 3398*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_MSB 14 3399*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_MASK 0x00004000 3400*5113495bSYour Name 3401*5113495bSYour Name 3402*5113495bSYour Name /* Description DATA_OFFSET 3403*5113495bSYour Name 3404*5113495bSYour Name The offset to Rx packet data within the buffer (including 3405*5113495bSYour Name Rx DMA offset programming and L3 header padding inserted 3406*5113495bSYour Name by Rx OLE). 3407*5113495bSYour Name 3408*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 3409*5113495bSYour Name ('REO_TO_PPE_RING'). 3410*5113495bSYour Name 3411*5113495bSYour Name <legal all> 3412*5113495bSYour Name */ 3413*5113495bSYour Name 3414*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_OFFSET 0x0000006c 3415*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_LSB 15 3416*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_MSB 26 3417*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_MASK 0x07ff8000 3418*5113495bSYour Name 3419*5113495bSYour Name 3420*5113495bSYour Name /* Description SRC_LINK_ID 3421*5113495bSYour Name 3422*5113495bSYour Name Consumer: SW 3423*5113495bSYour Name Producer: RXDMA 3424*5113495bSYour Name 3425*5113495bSYour Name Set to the link ID of the PMAC that received the frame 3426*5113495bSYour Name <legal all> 3427*5113495bSYour Name */ 3428*5113495bSYour Name 3429*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_OFFSET 0x0000006c 3430*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_LSB 27 3431*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_MSB 29 3432*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_MASK 0x38000000 3433*5113495bSYour Name 3434*5113495bSYour Name 3435*5113495bSYour Name /* Description RESERVED_0A 3436*5113495bSYour Name 3437*5113495bSYour Name <legal 0> 3438*5113495bSYour Name */ 3439*5113495bSYour Name 3440*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_OFFSET 0x0000006c 3441*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_LSB 30 3442*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_MSB 31 3443*5113495bSYour Name #define RX_MSDU_LINK_MSDU_4_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_MASK 0xc0000000 3444*5113495bSYour Name 3445*5113495bSYour Name 3446*5113495bSYour Name /* Description MSDU_5 3447*5113495bSYour Name 3448*5113495bSYour Name Details of next MSDU in this (MSDU flow) linked list 3449*5113495bSYour Name */ 3450*5113495bSYour Name 3451*5113495bSYour Name 3452*5113495bSYour Name /* Description BUFFER_ADDR_INFO_DETAILS 3453*5113495bSYour Name 3454*5113495bSYour Name Consumer: REO/SW 3455*5113495bSYour Name Producer: RXDMA 3456*5113495bSYour Name 3457*5113495bSYour Name Details of the physical address of the buffer containing 3458*5113495bSYour Name an MSDU (or entire MPDU) 3459*5113495bSYour Name */ 3460*5113495bSYour Name 3461*5113495bSYour Name 3462*5113495bSYour Name /* Description BUFFER_ADDR_31_0 3463*5113495bSYour Name 3464*5113495bSYour Name Address (lower 32 bits) of the MSDU buffer OR MSDU_EXTENSION 3465*5113495bSYour Name descriptor OR Link Descriptor 3466*5113495bSYour Name 3467*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 3468*5113495bSYour Name <legal all> 3469*5113495bSYour Name */ 3470*5113495bSYour Name 3471*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_OFFSET 0x00000070 3472*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_LSB 0 3473*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_MSB 31 3474*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_MASK 0xffffffff 3475*5113495bSYour Name 3476*5113495bSYour Name 3477*5113495bSYour Name /* Description BUFFER_ADDR_39_32 3478*5113495bSYour Name 3479*5113495bSYour Name Address (upper 8 bits) of the MSDU buffer OR MSDU_EXTENSION 3480*5113495bSYour Name descriptor OR Link Descriptor 3481*5113495bSYour Name 3482*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 3483*5113495bSYour Name <legal all> 3484*5113495bSYour Name */ 3485*5113495bSYour Name 3486*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_OFFSET 0x00000074 3487*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_LSB 0 3488*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_MSB 7 3489*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_MASK 0x000000ff 3490*5113495bSYour Name 3491*5113495bSYour Name 3492*5113495bSYour Name /* Description RETURN_BUFFER_MANAGER 3493*5113495bSYour Name 3494*5113495bSYour Name Consumer: WBM 3495*5113495bSYour Name Producer: SW/FW 3496*5113495bSYour Name 3497*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 3498*5113495bSYour Name 3499*5113495bSYour Name Indicates to which buffer manager the buffer OR MSDU_EXTENSION 3500*5113495bSYour Name descriptor OR link descriptor that is being pointed to 3501*5113495bSYour Name shall be returned after the frame has been processed. It 3502*5113495bSYour Name is used by WBM for routing purposes. 3503*5113495bSYour Name 3504*5113495bSYour Name <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned 3505*5113495bSYour Name to the WMB buffer idle list 3506*5113495bSYour Name <enum 1 WBM_CHIP0_IDLE_DESC_LIST> This buffer shall be returned 3507*5113495bSYour Name to the WBM idle link descriptor idle list, where the chip 3508*5113495bSYour Name 0 WBM is chosen in case of a multi-chip config 3509*5113495bSYour Name <enum 2 WBM_CHIP1_IDLE_DESC_LIST> This buffer shall be returned 3510*5113495bSYour Name to the chip 1 WBM idle link descriptor idle list 3511*5113495bSYour Name <enum 3 WBM_CHIP2_IDLE_DESC_LIST> This buffer shall be returned 3512*5113495bSYour Name to the chip 2 WBM idle link descriptor idle list 3513*5113495bSYour Name <enum 12 WBM_CHIP3_IDLE_DESC_LIST> This buffer shall be 3514*5113495bSYour Name returned to chip 3 WBM idle link descriptor idle list 3515*5113495bSYour Name <enum 4 FW_BM> This buffer shall be returned to the FW 3516*5113495bSYour Name <enum 5 SW0_BM> This buffer shall be returned to the SW, 3517*5113495bSYour Name ring 0 3518*5113495bSYour Name <enum 6 SW1_BM> This buffer shall be returned to the SW, 3519*5113495bSYour Name ring 1 3520*5113495bSYour Name <enum 7 SW2_BM> This buffer shall be returned to the SW, 3521*5113495bSYour Name ring 2 3522*5113495bSYour Name <enum 8 SW3_BM> This buffer shall be returned to the SW, 3523*5113495bSYour Name ring 3 3524*5113495bSYour Name <enum 9 SW4_BM> This buffer shall be returned to the SW, 3525*5113495bSYour Name ring 4 3526*5113495bSYour Name <enum 10 SW5_BM> This buffer shall be returned to the SW, 3527*5113495bSYour Name ring 5 3528*5113495bSYour Name <enum 11 SW6_BM> This buffer shall be returned to the SW, 3529*5113495bSYour Name ring 6 3530*5113495bSYour Name 3531*5113495bSYour Name <legal 0-12> 3532*5113495bSYour Name */ 3533*5113495bSYour Name 3534*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_OFFSET 0x00000074 3535*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_LSB 8 3536*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_MSB 11 3537*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_MASK 0x00000f00 3538*5113495bSYour Name 3539*5113495bSYour Name 3540*5113495bSYour Name /* Description SW_BUFFER_COOKIE 3541*5113495bSYour Name 3542*5113495bSYour Name Cookie field exclusively used by SW. 3543*5113495bSYour Name 3544*5113495bSYour Name In case of 'NULL' pointer, this field is set to 0 3545*5113495bSYour Name 3546*5113495bSYour Name HW ignores the contents, accept that it passes the programmed 3547*5113495bSYour Name value on to other descriptors together with the physical 3548*5113495bSYour Name address 3549*5113495bSYour Name 3550*5113495bSYour Name Field can be used by SW to for example associate the buffers 3551*5113495bSYour Name physical address with the virtual address 3552*5113495bSYour Name The bit definitions as used by SW are within SW HLD specification 3553*5113495bSYour Name 3554*5113495bSYour Name 3555*5113495bSYour Name NOTE1: 3556*5113495bSYour Name The three most significant bits can have a special meaning 3557*5113495bSYour Name in case this struct is embedded in a TX_MPDU_DETAILS STRUCT, 3558*5113495bSYour Name and field transmit_bw_restriction is set 3559*5113495bSYour Name 3560*5113495bSYour Name In case of NON punctured transmission: 3561*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b000: 20 MHz TX only 3562*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b001: 40 MHz TX only 3563*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b010: 80 MHz TX only 3564*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b011: 160 MHz TX only 3565*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b101: 240 MHz TX only 3566*5113495bSYour Name Sw_buffer_cookie[19:17] = 3'b100: 320 MHz TX only 3567*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 3568*5113495bSYour Name 3569*5113495bSYour Name In case of punctured transmission: 3570*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0000: pattern 0 only 3571*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0001: pattern 1 only 3572*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0010: pattern 2 only 3573*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0011: pattern 3 only 3574*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0100: pattern 4 only 3575*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0101: pattern 5 only 3576*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0110: pattern 6 only 3577*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b0111: pattern 7 only 3578*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1000: pattern 8 only 3579*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1001: pattern 9 only 3580*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1010: pattern 10 only 3581*5113495bSYour Name Sw_buffer_cookie[19:16] = 4'b1011: pattern 11 only 3582*5113495bSYour Name Sw_buffer_cookie[19:18] = 2'b11: reserved 3583*5113495bSYour Name 3584*5113495bSYour Name Note: a punctured transmission is indicated by the presence 3585*5113495bSYour Name of TLV TX_PUNCTURE_SETUP embedded in the scheduler TLV 3586*5113495bSYour Name 3587*5113495bSYour Name <legal all> 3588*5113495bSYour Name */ 3589*5113495bSYour Name 3590*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_OFFSET 0x00000074 3591*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_LSB 12 3592*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_MSB 31 3593*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_MASK 0xfffff000 3594*5113495bSYour Name 3595*5113495bSYour Name 3596*5113495bSYour Name /* Description RX_MSDU_DESC_INFO_DETAILS 3597*5113495bSYour Name 3598*5113495bSYour Name Consumer: REO/SW 3599*5113495bSYour Name Producer: RXDMA 3600*5113495bSYour Name 3601*5113495bSYour Name General information related to the MSDU that should be passed 3602*5113495bSYour Name on from RXDMA all the way to to the REO destination ring. 3603*5113495bSYour Name 3604*5113495bSYour Name */ 3605*5113495bSYour Name 3606*5113495bSYour Name 3607*5113495bSYour Name /* Description FIRST_MSDU_IN_MPDU_FLAG 3608*5113495bSYour Name 3609*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 3610*5113495bSYour Name multiple buffers, this field will be valid in the Last 3611*5113495bSYour Name buffer used by the MSDU 3612*5113495bSYour Name 3613*5113495bSYour Name <enum 0 Not_first_msdu> This is not the first MSDU in the 3614*5113495bSYour Name MPDU. 3615*5113495bSYour Name <enum 1 first_msdu> This MSDU is the first one in the MPDU. 3616*5113495bSYour Name 3617*5113495bSYour Name 3618*5113495bSYour Name <legal all> 3619*5113495bSYour Name */ 3620*5113495bSYour Name 3621*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000078 3622*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_LSB 0 3623*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MSB 0 3624*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001 3625*5113495bSYour Name 3626*5113495bSYour Name 3627*5113495bSYour Name /* Description LAST_MSDU_IN_MPDU_FLAG 3628*5113495bSYour Name 3629*5113495bSYour Name Consumer: WBM/REO/SW/FW 3630*5113495bSYour Name Producer: RXDMA 3631*5113495bSYour Name 3632*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 3633*5113495bSYour Name multiple buffers, this field will be valid in the Last 3634*5113495bSYour Name buffer used by the MSDU 3635*5113495bSYour Name 3636*5113495bSYour Name <enum 0 Not_last_msdu> There are more MSDUs linked to this 3637*5113495bSYour Name MSDU that belongs to this MPDU 3638*5113495bSYour Name <enum 1 Last_msdu> this MSDU is the last one in the MPDU. 3639*5113495bSYour Name This setting is only allowed in combination with 'Msdu_continuation' 3640*5113495bSYour Name set to 0. This implies that when an msdu is spread out over 3641*5113495bSYour Name multiple buffers and thus msdu_continuation is set, only 3642*5113495bSYour Name for the very last buffer of the msdu, can the 'last_msdu_in_mpdu_flag' 3643*5113495bSYour Name be set. 3644*5113495bSYour Name 3645*5113495bSYour Name When both first_msdu_in_mpdu_flag and last_msdu_in_mpdu_flag 3646*5113495bSYour Name are set, the MPDU that this MSDU belongs to only contains 3647*5113495bSYour Name a single MSDU. 3648*5113495bSYour Name 3649*5113495bSYour Name 3650*5113495bSYour Name <legal all> 3651*5113495bSYour Name */ 3652*5113495bSYour Name 3653*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000078 3654*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_LSB 1 3655*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MSB 1 3656*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002 3657*5113495bSYour Name 3658*5113495bSYour Name 3659*5113495bSYour Name /* Description MSDU_CONTINUATION 3660*5113495bSYour Name 3661*5113495bSYour Name When set, this MSDU buffer was not able to hold the entire 3662*5113495bSYour Name MSDU. The next buffer will therefor contain additional 3663*5113495bSYour Name information related to this MSDU. 3664*5113495bSYour Name 3665*5113495bSYour Name <legal all> 3666*5113495bSYour Name */ 3667*5113495bSYour Name 3668*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_OFFSET 0x00000078 3669*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_LSB 2 3670*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MSB 2 3671*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MASK 0x00000004 3672*5113495bSYour Name 3673*5113495bSYour Name 3674*5113495bSYour Name /* Description MSDU_LENGTH 3675*5113495bSYour Name 3676*5113495bSYour Name Parsed from RX_MSDU_START TLV . In the case MSDU spans over 3677*5113495bSYour Name multiple buffers, this field will be valid in the First 3678*5113495bSYour Name buffer used by MSDU. 3679*5113495bSYour Name 3680*5113495bSYour Name Full MSDU length in bytes after decapsulation. 3681*5113495bSYour Name 3682*5113495bSYour Name This field is still valid for MPDU frames without A-MSDU. 3683*5113495bSYour Name It still represents MSDU length after decapsulation 3684*5113495bSYour Name 3685*5113495bSYour Name Or in case of RAW MPDUs, it indicates the length of the 3686*5113495bSYour Name entire MPDU (without FCS field) 3687*5113495bSYour Name <legal all> 3688*5113495bSYour Name */ 3689*5113495bSYour Name 3690*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_OFFSET 0x00000078 3691*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_LSB 3 3692*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MSB 16 3693*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MASK 0x0001fff8 3694*5113495bSYour Name 3695*5113495bSYour Name 3696*5113495bSYour Name /* Description MSDU_DROP 3697*5113495bSYour Name 3698*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 3699*5113495bSYour Name multiple buffers, this field will be valid in the Last 3700*5113495bSYour Name buffer used by the MSDU 3701*5113495bSYour Name 3702*5113495bSYour Name When set, REO shall drop this MSDU and not forward it to 3703*5113495bSYour Name any other ring... 3704*5113495bSYour Name <legal all> 3705*5113495bSYour Name */ 3706*5113495bSYour Name 3707*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_OFFSET 0x00000078 3708*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_LSB 17 3709*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MSB 17 3710*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MASK 0x00020000 3711*5113495bSYour Name 3712*5113495bSYour Name 3713*5113495bSYour Name /* Description SA_IS_VALID 3714*5113495bSYour Name 3715*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 3716*5113495bSYour Name multiple buffers, this field will be valid in the Last 3717*5113495bSYour Name buffer used by the MSDU 3718*5113495bSYour Name 3719*5113495bSYour Name Indicates that OLE found a valid SA entry for this MSDU 3720*5113495bSYour Name <legal all> 3721*5113495bSYour Name */ 3722*5113495bSYour Name 3723*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000078 3724*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 18 3725*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MSB 18 3726*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x00040000 3727*5113495bSYour Name 3728*5113495bSYour Name 3729*5113495bSYour Name /* Description DA_IS_VALID 3730*5113495bSYour Name 3731*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 3732*5113495bSYour Name multiple buffers, this field will be valid in the Last 3733*5113495bSYour Name buffer used by the MSDU 3734*5113495bSYour Name 3735*5113495bSYour Name Indicates that OLE found a valid DA entry for this MSDU 3736*5113495bSYour Name <legal all> 3737*5113495bSYour Name */ 3738*5113495bSYour Name 3739*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000078 3740*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 19 3741*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MSB 19 3742*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x00080000 3743*5113495bSYour Name 3744*5113495bSYour Name 3745*5113495bSYour Name /* Description DA_IS_MCBC 3746*5113495bSYour Name 3747*5113495bSYour Name Field Only valid if "da_is_valid" is set 3748*5113495bSYour Name 3749*5113495bSYour Name Indicates the DA address was a Multicast of Broadcast address 3750*5113495bSYour Name for this MSDU 3751*5113495bSYour Name <legal all> 3752*5113495bSYour Name */ 3753*5113495bSYour Name 3754*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000078 3755*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 20 3756*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MSB 20 3757*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x00100000 3758*5113495bSYour Name 3759*5113495bSYour Name 3760*5113495bSYour Name /* Description L3_HEADER_PADDING_MSB 3761*5113495bSYour Name 3762*5113495bSYour Name Passed on from 'RX_MSDU_END' TLV (only the MSB is reported 3763*5113495bSYour Name as the LSB is always zero) 3764*5113495bSYour Name Number of bytes padded to make sure that the L3 header will 3765*5113495bSYour Name always start of a Dword boundary 3766*5113495bSYour Name <legal all> 3767*5113495bSYour Name */ 3768*5113495bSYour Name 3769*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_OFFSET 0x00000078 3770*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_LSB 21 3771*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MSB 21 3772*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MASK 0x00200000 3773*5113495bSYour Name 3774*5113495bSYour Name 3775*5113495bSYour Name /* Description TCP_UDP_CHKSUM_FAIL 3776*5113495bSYour Name 3777*5113495bSYour Name Passed on from 'RX_ATTENTION' TLV 3778*5113495bSYour Name Indicates that the computed checksum did not match the checksum 3779*5113495bSYour Name in the TCP/UDP header. 3780*5113495bSYour Name <legal all> 3781*5113495bSYour Name */ 3782*5113495bSYour Name 3783*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000078 3784*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_LSB 22 3785*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MSB 22 3786*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MASK 0x00400000 3787*5113495bSYour Name 3788*5113495bSYour Name 3789*5113495bSYour Name /* Description IP_CHKSUM_FAIL 3790*5113495bSYour Name 3791*5113495bSYour Name Passed on from 'RX_ATTENTION' TLV 3792*5113495bSYour Name Indicates that the computed checksum did not match the checksum 3793*5113495bSYour Name in the IP header. 3794*5113495bSYour Name <legal all> 3795*5113495bSYour Name */ 3796*5113495bSYour Name 3797*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_OFFSET 0x00000078 3798*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_LSB 23 3799*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MSB 23 3800*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MASK 0x00800000 3801*5113495bSYour Name 3802*5113495bSYour Name 3803*5113495bSYour Name /* Description FR_DS 3804*5113495bSYour Name 3805*5113495bSYour Name Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' 3806*5113495bSYour Name TLV 3807*5113495bSYour Name Set if the 'from DS' bit is set in the frame control. 3808*5113495bSYour Name <legal all> 3809*5113495bSYour Name */ 3810*5113495bSYour Name 3811*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_FR_DS_OFFSET 0x00000078 3812*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_FR_DS_LSB 24 3813*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MSB 24 3814*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MASK 0x01000000 3815*5113495bSYour Name 3816*5113495bSYour Name 3817*5113495bSYour Name /* Description TO_DS 3818*5113495bSYour Name 3819*5113495bSYour Name Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' 3820*5113495bSYour Name TLV 3821*5113495bSYour Name Set if the 'to DS' bit is set in the frame control. 3822*5113495bSYour Name <legal all> 3823*5113495bSYour Name */ 3824*5113495bSYour Name 3825*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_TO_DS_OFFSET 0x00000078 3826*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_TO_DS_LSB 25 3827*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MSB 25 3828*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MASK 0x02000000 3829*5113495bSYour Name 3830*5113495bSYour Name 3831*5113495bSYour Name /* Description INTRA_BSS 3832*5113495bSYour Name 3833*5113495bSYour Name This packet needs intra-BSS routing by SW as the 'vdev_id' 3834*5113495bSYour Name for the destination is the same as the 'vdev_id' (from 'RX_MPDU_PCU_START') 3835*5113495bSYour Name that this MSDU was got in. 3836*5113495bSYour Name 3837*5113495bSYour Name <legal all> 3838*5113495bSYour Name */ 3839*5113495bSYour Name 3840*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_OFFSET 0x00000078 3841*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_LSB 26 3842*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MSB 26 3843*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MASK 0x04000000 3844*5113495bSYour Name 3845*5113495bSYour Name 3846*5113495bSYour Name /* Description DEST_CHIP_ID 3847*5113495bSYour Name 3848*5113495bSYour Name If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY' 3849*5113495bSYour Name to support intra-BSS routing with multi-chip multi-link 3850*5113495bSYour Name operation. 3851*5113495bSYour Name 3852*5113495bSYour Name This indicates into which chip's TCL the packet should be 3853*5113495bSYour Name queued. 3854*5113495bSYour Name 3855*5113495bSYour Name <legal all> 3856*5113495bSYour Name */ 3857*5113495bSYour Name 3858*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_OFFSET 0x00000078 3859*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_LSB 27 3860*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MSB 28 3861*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MASK 0x18000000 3862*5113495bSYour Name 3863*5113495bSYour Name 3864*5113495bSYour Name /* Description DECAP_FORMAT 3865*5113495bSYour Name 3866*5113495bSYour Name Indicates the format after decapsulation: 3867*5113495bSYour Name 3868*5113495bSYour Name <enum 0 RAW> No encapsulation 3869*5113495bSYour Name <enum 1 Native_WiFi> 3870*5113495bSYour Name <enum 2 Ethernet> Ethernet 2 (DIX) or 802.3 (uses SNAP/LLC) 3871*5113495bSYour Name 3872*5113495bSYour Name <enum 3 802_3> Indicate Ethernet 3873*5113495bSYour Name 3874*5113495bSYour Name <legal all> 3875*5113495bSYour Name */ 3876*5113495bSYour Name 3877*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_OFFSET 0x00000078 3878*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_LSB 29 3879*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MSB 30 3880*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MASK 0x60000000 3881*5113495bSYour Name 3882*5113495bSYour Name 3883*5113495bSYour Name /* Description DEST_CHIP_PMAC_ID 3884*5113495bSYour Name 3885*5113495bSYour Name If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY' 3886*5113495bSYour Name to support intra-BSS routing with multi-chip multi-link 3887*5113495bSYour Name operation. 3888*5113495bSYour Name 3889*5113495bSYour Name This indicates into which link/'vdev' the packet should 3890*5113495bSYour Name be queued in TCL. 3891*5113495bSYour Name 3892*5113495bSYour Name <legal all> 3893*5113495bSYour Name */ 3894*5113495bSYour Name 3895*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_OFFSET 0x00000078 3896*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_LSB 31 3897*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_MSB 31 3898*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_MASK 0x80000000 3899*5113495bSYour Name 3900*5113495bSYour Name 3901*5113495bSYour Name /* Description RX_MSDU_EXT_DESC_INFO_DETAILS 3902*5113495bSYour Name 3903*5113495bSYour Name Consumer: REO/SW 3904*5113495bSYour Name Producer: RXDMA 3905*5113495bSYour Name 3906*5113495bSYour Name Extended information related to the MSDU that is passed 3907*5113495bSYour Name on from RXDMA to REO but not part of the REO destination 3908*5113495bSYour Name ring. Some fields are passed on to PPE. 3909*5113495bSYour Name */ 3910*5113495bSYour Name 3911*5113495bSYour Name 3912*5113495bSYour Name /* Description REO_DESTINATION_INDICATION 3913*5113495bSYour Name 3914*5113495bSYour Name Parsed from RX_MSDU_END TLV . In the case MSDU spans over 3915*5113495bSYour Name multiple buffers, this field will be valid in the Last 3916*5113495bSYour Name buffer used by the MSDU 3917*5113495bSYour Name 3918*5113495bSYour Name The ID of the REO exit ring where the MSDU frame shall push 3919*5113495bSYour Name after (MPDU level) reordering has finished. 3920*5113495bSYour Name 3921*5113495bSYour Name <enum 0 reo_destination_sw0> Reo will push the frame into 3922*5113495bSYour Name the REO2SW0 ring 3923*5113495bSYour Name <enum 1 reo_destination_sw1> Reo will push the frame into 3924*5113495bSYour Name the REO2SW1 ring 3925*5113495bSYour Name <enum 2 reo_destination_sw2> Reo will push the frame into 3926*5113495bSYour Name the REO2SW2 ring 3927*5113495bSYour Name <enum 3 reo_destination_sw3> Reo will push the frame into 3928*5113495bSYour Name the REO2SW3 ring 3929*5113495bSYour Name <enum 4 reo_destination_sw4> Reo will push the frame into 3930*5113495bSYour Name the REO2SW4 ring 3931*5113495bSYour Name <enum 5 reo_destination_release> Reo will push the frame 3932*5113495bSYour Name into the REO_release ring 3933*5113495bSYour Name <enum 6 reo_destination_fw> Reo will push the frame into 3934*5113495bSYour Name the REO2FW ring 3935*5113495bSYour Name <enum 7 reo_destination_sw5> Reo will push the frame into 3936*5113495bSYour Name the REO2SW5 ring (REO remaps this in chips without REO2SW5 3937*5113495bSYour Name ring, e.g. Pine) 3938*5113495bSYour Name <enum 8 reo_destination_sw6> Reo will push the frame into 3939*5113495bSYour Name the REO2SW6 ring (REO remaps this in chips without REO2SW6 3940*5113495bSYour Name ring, e.g. Pine) 3941*5113495bSYour Name <enum 9 reo_destination_sw7> Reo will push the frame into 3942*5113495bSYour Name the REO2SW7 ring (REO remaps this in chips without REO2SW7 3943*5113495bSYour Name ring) 3944*5113495bSYour Name <enum 10 reo_destination_sw8> Reo will push the frame into 3945*5113495bSYour Name the REO2SW8 ring (REO remaps this in chips without REO2SW8 3946*5113495bSYour Name ring) 3947*5113495bSYour Name <enum 11 reo_destination_11> REO remaps this 3948*5113495bSYour Name <enum 12 reo_destination_12> REO remaps this <enum 13 reo_destination_13> 3949*5113495bSYour Name REO remaps this 3950*5113495bSYour Name <enum 14 reo_destination_14> REO remaps this 3951*5113495bSYour Name <enum 15 reo_destination_15> REO remaps this 3952*5113495bSYour Name <enum 16 reo_destination_16> REO remaps this 3953*5113495bSYour Name <enum 17 reo_destination_17> REO remaps this 3954*5113495bSYour Name <enum 18 reo_destination_18> REO remaps this 3955*5113495bSYour Name <enum 19 reo_destination_19> REO remaps this 3956*5113495bSYour Name <enum 20 reo_destination_20> REO remaps this 3957*5113495bSYour Name <enum 21 reo_destination_21> REO remaps this 3958*5113495bSYour Name <enum 22 reo_destination_22> REO remaps this 3959*5113495bSYour Name <enum 23 reo_destination_23> REO remaps this 3960*5113495bSYour Name <enum 24 reo_destination_24> REO remaps this 3961*5113495bSYour Name <enum 25 reo_destination_25> REO remaps this 3962*5113495bSYour Name <enum 26 reo_destination_26> REO remaps this 3963*5113495bSYour Name <enum 27 reo_destination_27> REO remaps this 3964*5113495bSYour Name <enum 28 reo_destination_28> REO remaps this 3965*5113495bSYour Name <enum 29 reo_destination_29> REO remaps this 3966*5113495bSYour Name <enum 30 reo_destination_30> REO remaps this 3967*5113495bSYour Name <enum 31 reo_destination_31> REO remaps this 3968*5113495bSYour Name 3969*5113495bSYour Name <legal all> 3970*5113495bSYour Name */ 3971*5113495bSYour Name 3972*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_OFFSET 0x0000007c 3973*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_LSB 0 3974*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MSB 4 3975*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MASK 0x0000001f 3976*5113495bSYour Name 3977*5113495bSYour Name 3978*5113495bSYour Name /* Description SERVICE_CODE 3979*5113495bSYour Name 3980*5113495bSYour Name Opaque service code between PPE and Wi-Fi 3981*5113495bSYour Name 3982*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 3983*5113495bSYour Name ('REO_TO_PPE_RING'). 3984*5113495bSYour Name 3985*5113495bSYour Name <legal all> 3986*5113495bSYour Name */ 3987*5113495bSYour Name 3988*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_OFFSET 0x0000007c 3989*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_LSB 5 3990*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_MSB 13 3991*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_SERVICE_CODE_MASK 0x00003fe0 3992*5113495bSYour Name 3993*5113495bSYour Name 3994*5113495bSYour Name /* Description PRIORITY_VALID 3995*5113495bSYour Name 3996*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 3997*5113495bSYour Name ('REO_TO_PPE_RING'). 3998*5113495bSYour Name 3999*5113495bSYour Name <legal all> 4000*5113495bSYour Name */ 4001*5113495bSYour Name 4002*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_OFFSET 0x0000007c 4003*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_LSB 14 4004*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_MSB 14 4005*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_PRIORITY_VALID_MASK 0x00004000 4006*5113495bSYour Name 4007*5113495bSYour Name 4008*5113495bSYour Name /* Description DATA_OFFSET 4009*5113495bSYour Name 4010*5113495bSYour Name The offset to Rx packet data within the buffer (including 4011*5113495bSYour Name Rx DMA offset programming and L3 header padding inserted 4012*5113495bSYour Name by Rx OLE). 4013*5113495bSYour Name 4014*5113495bSYour Name This field gets passed on by REO to PPE in the EDMA descriptor 4015*5113495bSYour Name ('REO_TO_PPE_RING'). 4016*5113495bSYour Name 4017*5113495bSYour Name <legal all> 4018*5113495bSYour Name */ 4019*5113495bSYour Name 4020*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_OFFSET 0x0000007c 4021*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_LSB 15 4022*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_MSB 26 4023*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_DATA_OFFSET_MASK 0x07ff8000 4024*5113495bSYour Name 4025*5113495bSYour Name 4026*5113495bSYour Name /* Description SRC_LINK_ID 4027*5113495bSYour Name 4028*5113495bSYour Name Consumer: SW 4029*5113495bSYour Name Producer: RXDMA 4030*5113495bSYour Name 4031*5113495bSYour Name Set to the link ID of the PMAC that received the frame 4032*5113495bSYour Name <legal all> 4033*5113495bSYour Name */ 4034*5113495bSYour Name 4035*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_OFFSET 0x0000007c 4036*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_LSB 27 4037*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_MSB 29 4038*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_SRC_LINK_ID_MASK 0x38000000 4039*5113495bSYour Name 4040*5113495bSYour Name 4041*5113495bSYour Name /* Description RESERVED_0A 4042*5113495bSYour Name 4043*5113495bSYour Name <legal 0> 4044*5113495bSYour Name */ 4045*5113495bSYour Name 4046*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_OFFSET 0x0000007c 4047*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_LSB 30 4048*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_MSB 31 4049*5113495bSYour Name #define RX_MSDU_LINK_MSDU_5_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_MASK 0xc0000000 4050*5113495bSYour Name 4051*5113495bSYour Name 4052*5113495bSYour Name 4053*5113495bSYour Name #endif // RX_MSDU_LINK 4054