xref: /wlan-driver/fw-api/hw/qca5332/rx_ppdu_ack_report.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 
19 
20 
21 
22 
23 
24 
25 
26 #ifndef _RX_PPDU_ACK_REPORT_H_
27 #define _RX_PPDU_ACK_REPORT_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #include "ack_report.h"
32 #define NUM_OF_DWORDS_RX_PPDU_ACK_REPORT 2
33 
34 #define NUM_OF_QWORDS_RX_PPDU_ACK_REPORT 1
35 
36 
37 struct rx_ppdu_ack_report {
38 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
39              struct   ack_report                                                ack_report_details;
40              uint32_t tlv64_padding                                           : 32; // [31:0]
41 #else
42              struct   ack_report                                                ack_report_details;
43              uint32_t tlv64_padding                                           : 32; // [31:0]
44 #endif
45 };
46 
47 
48 /* Description		ACK_REPORT_DETAILS
49 
50 			Info indicating why the received frame needed a SIFS response.
51 
52 */
53 
54 
55 /* Description		SELFGEN_RESPONSE_REASON
56 
57 			Field that indicates why the received frame needs a response
58 			 in SIFS time. The possible responses are listed in order.
59 
60 
61 			<enum 0     CTS_frame>
62 			<enum 1     ACK_frame>
63 			<enum 2     BA_frame >
64 			<enum 3     Qboost_trigger> Qboost trigger received
65 			<enum 4     PSPOLL_trigger> PSPOLL trigger received
66 			<enum 5     UAPSD_trigger > Unscheduled APSD  trigger received
67 
68 			<enum 6     CBF_frame> the CBF frame needs to be send as
69 			 a result of NDP or BRPOLL
70 			<enum 7     ax_su_trigger> 11ax trigger received for this
71 			 device
72 			<enum 8     ax_wildcard_trigger> 11ax wildcardtrigger has
73 			 been received
74 			<enum 9     ax_unassoc_wildcard_trigger> 11ax wildcard trigger
75 			 for unassociated STAs has been received
76 			<enum 12     eht_su_trigger> EHT R1 trigger received for
77 			 this device
78 
79 			<enum 10     MU_UL_response_to_response>
80 
81 			<enum 11     Ranging_NDP_LMR_frames> Ranging NDP + LMR need
82 			 to be sent in response to ranging NDPA + NDP
83 
84 			<legal 0-12>
85 */
86 
87 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_OFFSET        0x0000000000000000
88 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_LSB           0
89 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_MSB           3
90 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_MASK          0x000000000000000f
91 
92 
93 /* Description		AX_TRIGGER_TYPE
94 
95 			Field Only valid when selfgen_response_reason is an 11ax
96 			 related trigger
97 
98 			The 11AX trigger type/ trigger number:
99 			It identifies which trigger was received.
100 			<enum 0 ax_trigger_basic>
101 			<enum 1 ax_trigger_brpoll>
102 			<enum 2 ax_trigger_mu_bar>
103 			<enum 3 ax_trigger_mu_rts>
104 			<enum 4 ax_trigger_buffer_size>
105 			<enum 5 ax_trigger_gcr_mu_bar>
106 			<enum 6 ax_trigger_BQRP>
107 			<enum 7 ax_trigger_NDP_fb_report_poll>
108 			<enum 8 ax_tb_ranging_trigger>
109 			<enum 9 ax_trigger_reserved_9>
110 			<enum 10 ax_trigger_reserved_10>
111 			<enum 11 ax_trigger_reserved_11>
112 			<enum 12 ax_trigger_reserved_12>
113 			<enum 13 ax_trigger_reserved_13>
114 			<enum 14 ax_trigger_reserved_14>
115 			<enum 15 ax_trigger_reserved_15>
116 
117 			<legal all>
118 */
119 
120 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_OFFSET                0x0000000000000000
121 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_LSB                   4
122 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_MSB                   7
123 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_MASK                  0x00000000000000f0
124 
125 
126 /* Description		SR_PPDU
127 
128 			Field only valid with SRP Responder support (not PoR in
129 			Moselle/Maple/Spruce)
130 
131 			Indicates if the received frame was sent using SRP as indicated
132 			 by the 'SR PPDU' bit in the 'CAS Control' in the 'HE A-Control'
133 			in one of the MPDUs received
134 			<legal all>
135 */
136 
137 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_OFFSET                        0x0000000000000000
138 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_LSB                           8
139 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_MSB                           8
140 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_MASK                          0x0000000000000100
141 
142 
143 /* Description		RESERVED
144 
145 			<legal 0>
146 */
147 
148 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_OFFSET                       0x0000000000000000
149 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_LSB                          9
150 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_MSB                          15
151 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_MASK                         0x000000000000fe00
152 
153 
154 /* Description		FRAME_CONTROL
155 
156 			Field not valid when selfgen_response_reason is MU_UL_response_to_response
157 
158 
159 			For SU receptions:
160 			frame control field of the received frame
161 
162 			In 11ah Mode of Operation, for non-NDP frames the BW information
163 			 is extracted from Frame Control fields [11:8].
164 
165 			Decode is as follows
166 
167 			Bits[11] - Dynamic/Static
168 			Bits[10:8] - Channel BW
169 */
170 
171 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_OFFSET                  0x0000000000000000
172 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_LSB                     16
173 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_MSB                     31
174 #define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_MASK                    0x00000000ffff0000
175 
176 
177 /* Description		TLV64_PADDING
178 
179 			Automatic DWORD padding inserted while converting TLV32
180 			to TLV64 for 64 bit ARCH
181 			<legal 0>
182 */
183 
184 #define RX_PPDU_ACK_REPORT_TLV64_PADDING_OFFSET                                     0x0000000000000000
185 #define RX_PPDU_ACK_REPORT_TLV64_PADDING_LSB                                        32
186 #define RX_PPDU_ACK_REPORT_TLV64_PADDING_MSB                                        63
187 #define RX_PPDU_ACK_REPORT_TLV64_PADDING_MASK                                       0xffffffff00000000
188 
189 
190 
191 #endif   // RX_PPDU_ACK_REPORT
192