1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _RXPT_CLASSIFY_INFO_H_ 27 #define _RXPT_CLASSIFY_INFO_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_DWORDS_RXPT_CLASSIFY_INFO 1 32 33 34 struct rxpt_classify_info { 35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 36 uint32_t reo_destination_indication : 5, // [4:0] 37 lmac_peer_id_msb : 2, // [6:5] 38 use_flow_id_toeplitz_clfy : 1, // [7:7] 39 pkt_selection_fp_ucast_data : 1, // [8:8] 40 pkt_selection_fp_mcast_data : 1, // [9:9] 41 pkt_selection_fp_1000 : 1, // [10:10] 42 rxdma0_source_ring_selection : 3, // [13:11] 43 rxdma0_destination_ring_selection : 3, // [16:14] 44 mcast_echo_drop_enable : 1, // [17:17] 45 wds_learning_detect_en : 1, // [18:18] 46 intrabss_check_en : 1, // [19:19] 47 use_ppe : 1, // [20:20] 48 ppe_routing_enable : 1, // [21:21] 49 reserved_0b : 10; // [31:22] 50 #else 51 uint32_t reserved_0b : 10, // [31:22] 52 ppe_routing_enable : 1, // [21:21] 53 use_ppe : 1, // [20:20] 54 intrabss_check_en : 1, // [19:19] 55 wds_learning_detect_en : 1, // [18:18] 56 mcast_echo_drop_enable : 1, // [17:17] 57 rxdma0_destination_ring_selection : 3, // [16:14] 58 rxdma0_source_ring_selection : 3, // [13:11] 59 pkt_selection_fp_1000 : 1, // [10:10] 60 pkt_selection_fp_mcast_data : 1, // [9:9] 61 pkt_selection_fp_ucast_data : 1, // [8:8] 62 use_flow_id_toeplitz_clfy : 1, // [7:7] 63 lmac_peer_id_msb : 2, // [6:5] 64 reo_destination_indication : 5; // [4:0] 65 #endif 66 }; 67 68 69 /* Description REO_DESTINATION_INDICATION 70 71 The ID of the REO exit ring where the MSDU frame shall push 72 after (MPDU level) reordering has finished. 73 74 <enum 0 reo_destination_sw0> Reo will push the frame into 75 the REO2SW0 ring 76 <enum 1 reo_destination_sw1> Reo will push the frame into 77 the REO2SW1 ring 78 <enum 2 reo_destination_sw2> Reo will push the frame into 79 the REO2SW2 ring 80 <enum 3 reo_destination_sw3> Reo will push the frame into 81 the REO2SW3 ring 82 <enum 4 reo_destination_sw4> Reo will push the frame into 83 the REO2SW4 ring 84 <enum 5 reo_destination_release> Reo will push the frame 85 into the REO_release ring 86 <enum 6 reo_destination_fw> Reo will push the frame into 87 the REO2FW ring 88 <enum 7 reo_destination_sw5> Reo will push the frame into 89 the REO2SW5 ring (REO remaps this in chips without REO2SW5 90 ring, e.g. Pine) 91 <enum 8 reo_destination_sw6> Reo will push the frame into 92 the REO2SW6 ring (REO remaps this in chips without REO2SW6 93 ring, e.g. Pine) 94 <enum 9 reo_destination_sw7> Reo will push the frame into 95 the REO2SW7 ring (REO remaps this in chips without REO2SW7 96 ring) 97 <enum 10 reo_destination_sw8> Reo will push the frame into 98 the REO2SW8 ring (REO remaps this in chips without REO2SW8 99 ring) 100 <enum 11 reo_destination_11> REO remaps this 101 <enum 12 reo_destination_12> REO remaps this <enum 13 reo_destination_13> 102 REO remaps this 103 <enum 14 reo_destination_14> REO remaps this 104 <enum 15 reo_destination_15> REO remaps this 105 <enum 16 reo_destination_16> REO remaps this 106 <enum 17 reo_destination_17> REO remaps this 107 <enum 18 reo_destination_18> REO remaps this 108 <enum 19 reo_destination_19> REO remaps this 109 <enum 20 reo_destination_20> REO remaps this 110 <enum 21 reo_destination_21> REO remaps this 111 <enum 22 reo_destination_22> REO remaps this 112 <enum 23 reo_destination_23> REO remaps this 113 <enum 24 reo_destination_24> REO remaps this 114 <enum 25 reo_destination_25> REO remaps this 115 <enum 26 reo_destination_26> REO remaps this 116 <enum 27 reo_destination_27> REO remaps this 117 <enum 28 reo_destination_28> REO remaps this 118 <enum 29 reo_destination_29> REO remaps this 119 <enum 30 reo_destination_30> REO remaps this 120 <enum 31 reo_destination_31> REO remaps this 121 122 <legal all> 123 */ 124 125 #define RXPT_CLASSIFY_INFO_REO_DESTINATION_INDICATION_OFFSET 0x00000000 126 #define RXPT_CLASSIFY_INFO_REO_DESTINATION_INDICATION_LSB 0 127 #define RXPT_CLASSIFY_INFO_REO_DESTINATION_INDICATION_MSB 4 128 #define RXPT_CLASSIFY_INFO_REO_DESTINATION_INDICATION_MASK 0x0000001f 129 130 131 /* Description LMAC_PEER_ID_MSB 132 133 If use_flow_id_toeplitz_clfy is set and lmac_peer_id_'sb 134 is 2'b00, Rx OLE uses a REO desination indicati'n of {1'b1, 135 hash[3:0]} using the chosen Toeplitz hash from Common Parser 136 if flow search fails. 137 If use_flow_id_toeplitz_clfy is set and lmac_peer_id_msb 138 's not 2'b00, Rx OLE uses a REO desination indication of 139 {lmac_peer_id_msb, hash[2:0]} using the chosen Toeplitz 140 hash from Common Parser if flow search fails. 141 This LMAC/peer-based routing is not supported in Hastings80 142 and HastingsPrime. 143 <legal all> 144 */ 145 146 #define RXPT_CLASSIFY_INFO_LMAC_PEER_ID_MSB_OFFSET 0x00000000 147 #define RXPT_CLASSIFY_INFO_LMAC_PEER_ID_MSB_LSB 5 148 #define RXPT_CLASSIFY_INFO_LMAC_PEER_ID_MSB_MSB 6 149 #define RXPT_CLASSIFY_INFO_LMAC_PEER_ID_MSB_MASK 0x00000060 150 151 152 /* Description USE_FLOW_ID_TOEPLITZ_CLFY 153 154 Indication to Rx OLE to enable REO destination routing based 155 on the chosen Toeplitz hash from Common Parser, in case 156 flow search fails 157 <legal all> 158 */ 159 160 #define RXPT_CLASSIFY_INFO_USE_FLOW_ID_TOEPLITZ_CLFY_OFFSET 0x00000000 161 #define RXPT_CLASSIFY_INFO_USE_FLOW_ID_TOEPLITZ_CLFY_LSB 7 162 #define RXPT_CLASSIFY_INFO_USE_FLOW_ID_TOEPLITZ_CLFY_MSB 7 163 #define RXPT_CLASSIFY_INFO_USE_FLOW_ID_TOEPLITZ_CLFY_MASK 0x00000080 164 165 166 /* Description PKT_SELECTION_FP_UCAST_DATA 167 168 Filter pass Unicast data frame (matching rxpcu_filter_pass 169 and sw_frame_group_Unicast_data) routing selection 170 TODO: What about 'rxpcu_filter_pass_monior_ovrd'? 171 172 1'b0: source and destination rings are selected from the 173 RxOLE register settings for the packet type 174 175 1'b1: source ring and destination ring is selected from 176 the rxdma0_source_ring_selection and rxdma0_destination_ring_selection 177 fields in this STRUCT 178 <legal all> 179 */ 180 181 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_UCAST_DATA_OFFSET 0x00000000 182 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_UCAST_DATA_LSB 8 183 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_UCAST_DATA_MSB 8 184 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_UCAST_DATA_MASK 0x00000100 185 186 187 /* Description PKT_SELECTION_FP_MCAST_DATA 188 189 Filter pass Multicast data frame (matching rxpcu_filter_pass 190 and sw_frame_group_Multicast_data) routing selection 191 TODO: What about 'rxpcu_filter_pass_monior_ovrd'? 192 193 1'b0: source and destination rings are selected from the 194 RxOLE register settings for the packet type 195 196 1'b1: source ring and destination ring is selected from 197 the rxdma0_source_ring_selection and rxdma0_destination_ring_selection 198 fields in this STRUCT 199 <legal all> 200 */ 201 202 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_MCAST_DATA_OFFSET 0x00000000 203 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_MCAST_DATA_LSB 9 204 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_MCAST_DATA_MSB 9 205 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_MCAST_DATA_MASK 0x00000200 206 207 208 /* Description PKT_SELECTION_FP_1000 209 210 Filter pass BAR frame (matching rxpcu_filter_pass and sw_frame_group_ctrl_1000) 211 routing selection 212 TODO: What about 'rxpcu_filter_pass_monior_ovrd'? 213 214 1'b0: source and destination rings are selected from the 215 RxOLE register settings for the packet type 216 217 1'b1: source ring and destination ring is selected from 218 the rxdma0_source_ring_selection and rxdma0_destination_ring_selection 219 fields in this STRUCT 220 <legal all> 221 */ 222 223 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_1000_OFFSET 0x00000000 224 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_1000_LSB 10 225 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_1000_MSB 10 226 #define RXPT_CLASSIFY_INFO_PKT_SELECTION_FP_1000_MASK 0x00000400 227 228 229 /* Description RXDMA0_SOURCE_RING_SELECTION 230 231 Field only valid when for the received frame type the corresponding 232 pkt_selection_fp_... bit is set 233 234 <enum 0 sw2rxdma0_0_buf_source_ring> The data buffer for 235 this frame shall be sourced by sw2rxdma0 buffer source 236 ring. 237 <enum 1 fw2rxdma0_pmac0_buf_source_ring> The data buffer 238 for this frame shall be sourced by fw2rxdma buffer source 239 ring for PMAC0. 240 <enum 2 sw2rxdma0_1_buf_source_ring> The data buffer for 241 this frame shall be sourced by sw2rxdma1 buffer source 242 ring. 243 <enum 3 no_buffer_rxdma0_ring> The frame shall not be written 244 to any data buffer. 245 <enum 4 sw2rxdma0_exception_buf_source_ring> The data buffer 246 for this frame shall be sourced by sw2rxdma_exception buffer 247 source ring. 248 <enum 5 fw2rxdma0_pmac1_buf_source_ring> The data buffer 249 for this frame shall be sourced by fw2rxdma buffer source 250 ring for PMAC1. 251 252 <legal 0-5> 253 */ 254 255 #define RXPT_CLASSIFY_INFO_RXDMA0_SOURCE_RING_SELECTION_OFFSET 0x00000000 256 #define RXPT_CLASSIFY_INFO_RXDMA0_SOURCE_RING_SELECTION_LSB 11 257 #define RXPT_CLASSIFY_INFO_RXDMA0_SOURCE_RING_SELECTION_MSB 13 258 #define RXPT_CLASSIFY_INFO_RXDMA0_SOURCE_RING_SELECTION_MASK 0x00003800 259 260 261 /* Description RXDMA0_DESTINATION_RING_SELECTION 262 263 Field only valid when for the received frame type the corresponding 264 pkt_selection_fp_... bit is set 265 266 <enum 0 rxdma_release_ring> RXDMA0 shall push the frame 267 to the Release ring. Effectively this means the frame needs 268 to be dropped. 269 <enum 1 rxdma2fw_pmac0_ring> RXDMA0 shall push the frame 270 to the FW ring for PMAC0. 271 <enum 2 rxdma2sw_ring> RXDMA0 shall push the frame to the 272 SW ring. 273 <enum 3 rxdma2reo_ring> RXDMA0 shall push the frame to 274 the REO entrance ring. 275 <enum 4 rxdma2fw_pmac1_ring> RXDMA0 shall push the frame 276 to the FW ring for PMAC1. 277 <enum 5 rxdma2reo_remote0_ring> RXDMA0 shall push the frame 278 to the first MLO REO entrance ring. 279 <enum 6 rxdma2reo_remote1_ring> RXDMA0 shall push the frame 280 to the second MLO REO entrance ring. 281 282 <legal 0-6> 283 */ 284 285 #define RXPT_CLASSIFY_INFO_RXDMA0_DESTINATION_RING_SELECTION_OFFSET 0x00000000 286 #define RXPT_CLASSIFY_INFO_RXDMA0_DESTINATION_RING_SELECTION_LSB 14 287 #define RXPT_CLASSIFY_INFO_RXDMA0_DESTINATION_RING_SELECTION_MSB 16 288 #define RXPT_CLASSIFY_INFO_RXDMA0_DESTINATION_RING_SELECTION_MASK 0x0001c000 289 290 291 /* Description MCAST_ECHO_DROP_ENABLE 292 293 If set, for multicast packets, multicast echo check (i.e. 294 SA search with mcast_echo_check = 1) shall be performed 295 by RXOLE, and any multicast echo packets should be indicated 296 to RXDMA for release to WBM 297 298 <legal all> 299 */ 300 301 #define RXPT_CLASSIFY_INFO_MCAST_ECHO_DROP_ENABLE_OFFSET 0x00000000 302 #define RXPT_CLASSIFY_INFO_MCAST_ECHO_DROP_ENABLE_LSB 17 303 #define RXPT_CLASSIFY_INFO_MCAST_ECHO_DROP_ENABLE_MSB 17 304 #define RXPT_CLASSIFY_INFO_MCAST_ECHO_DROP_ENABLE_MASK 0x00020000 305 306 307 /* Description WDS_LEARNING_DETECT_EN 308 309 If set, WDS learning detection based on SA search and notification 310 to FW (using RXDMA0 status ring) is enabled and the "timestamp" 311 field in address search failure cache-only entry should 312 be used to avoid multiple WDS learning notifications. 313 314 <legal all> 315 */ 316 317 #define RXPT_CLASSIFY_INFO_WDS_LEARNING_DETECT_EN_OFFSET 0x00000000 318 #define RXPT_CLASSIFY_INFO_WDS_LEARNING_DETECT_EN_LSB 18 319 #define RXPT_CLASSIFY_INFO_WDS_LEARNING_DETECT_EN_MSB 18 320 #define RXPT_CLASSIFY_INFO_WDS_LEARNING_DETECT_EN_MASK 0x00040000 321 322 323 /* Description INTRABSS_CHECK_EN 324 325 If set, intra-BSS routing detection is enabled 326 327 <legal all> 328 */ 329 330 #define RXPT_CLASSIFY_INFO_INTRABSS_CHECK_EN_OFFSET 0x00000000 331 #define RXPT_CLASSIFY_INFO_INTRABSS_CHECK_EN_LSB 19 332 #define RXPT_CLASSIFY_INFO_INTRABSS_CHECK_EN_MSB 19 333 #define RXPT_CLASSIFY_INFO_INTRABSS_CHECK_EN_MASK 0x00080000 334 335 336 /* Description USE_PPE 337 338 Indicates to RXDMA to ignore the REO_destination_indication 339 and use a programmed value corresponding to the REO2PPE 340 ring 341 342 This override to REO2PPE for packets requiring multiple 343 buffers shall be disabled based on an RXDMA configuration, 344 as PPE may not support such packets. 345 346 Supported only in full AP chips like Waikiki, not in client/soft 347 AP chips like Hamilton 348 <legal all> 349 */ 350 351 #define RXPT_CLASSIFY_INFO_USE_PPE_OFFSET 0x00000000 352 #define RXPT_CLASSIFY_INFO_USE_PPE_LSB 20 353 #define RXPT_CLASSIFY_INFO_USE_PPE_MSB 20 354 #define RXPT_CLASSIFY_INFO_USE_PPE_MASK 0x00100000 355 356 357 /* Description PPE_ROUTING_ENABLE 358 359 Global enable/disable bit for routing to PPE, used to disable 360 PPE routing even if RXOLE CCE or flow search indicate 'Use_PPE' 361 362 363 This is set by SW for peers which are being handled by a 364 host SW/accelerator subsystem that also handles packet 365 buffer management for WiFi-to-PPE routing. 366 367 This is cleared by SW for peers which are being handled 368 by a different subsystem, completely disabling WiFi-to-PPE 369 routing for such peers. 370 371 <legal all> 372 */ 373 374 #define RXPT_CLASSIFY_INFO_PPE_ROUTING_ENABLE_OFFSET 0x00000000 375 #define RXPT_CLASSIFY_INFO_PPE_ROUTING_ENABLE_LSB 21 376 #define RXPT_CLASSIFY_INFO_PPE_ROUTING_ENABLE_MSB 21 377 #define RXPT_CLASSIFY_INFO_PPE_ROUTING_ENABLE_MASK 0x00200000 378 379 380 /* Description RESERVED_0B 381 382 <legal 0> 383 */ 384 385 #define RXPT_CLASSIFY_INFO_RESERVED_0B_OFFSET 0x00000000 386 #define RXPT_CLASSIFY_INFO_RESERVED_0B_LSB 22 387 #define RXPT_CLASSIFY_INFO_RESERVED_0B_MSB 31 388 #define RXPT_CLASSIFY_INFO_RESERVED_0B_MASK 0xffc00000 389 390 391 392 #endif // RXPT_CLASSIFY_INFO 393