1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _TX_FLUSH_REQ_H_ 27 #define _TX_FLUSH_REQ_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_DWORDS_TX_FLUSH_REQ 2 32 33 #define NUM_OF_QWORDS_TX_FLUSH_REQ 1 34 35 36 struct tx_flush_req { 37 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 38 uint32_t flush_req_reason : 8, // [7:0] 39 phytx_abort_reason : 8, // [15:8] 40 flush_req_user_number_or_link_id : 6, // [21:16] 41 mlo_abort_reason : 5, // [26:22] 42 reserved_0a : 5; // [31:27] 43 uint32_t tlv64_padding : 32; // [31:0] 44 #else 45 uint32_t reserved_0a : 5, // [31:27] 46 mlo_abort_reason : 5, // [26:22] 47 flush_req_user_number_or_link_id : 6, // [21:16] 48 phytx_abort_reason : 8, // [15:8] 49 flush_req_reason : 8; // [7:0] 50 uint32_t tlv64_padding : 32; // [31:0] 51 #endif 52 }; 53 54 55 /* Description FLUSH_REQ_REASON 56 57 The reason why the flush request was generated. 58 59 <enum 0 reserved_code>This is included for clean implementation 60 and verification. This code should NOT be used during a 61 valid FLUSH. It is used as a keeper value when flush logic 62 is idle 63 <enum 1 txpcu_flreq_code_txop_exceeded>Flush request issued 64 by TXPCU in case of a WCOEX abort. 65 <enum 2 crypt_flreq_rx_int_tx>This is a corner case scenario. 66 A situation where: 67 a.A RX is just over and CCA indication is IDLE 68 b.Crypt is still busy decrypting 69 c.A TX just starts. 70 The TX should be tried later. This situation may be rare. 71 Just taking an extra precaution. 72 <enum 3 txpcu_flreq_code_rts_pkt_cca_abort>This is the static 73 BW failure happening right after start_tx for either RTS 74 frame or data packet 75 <enum 4 txpcu_flreq_code_cts_cca_abort>This is the static 76 BW failure in the protection sequence (CTS). 77 <enum 5 pdg_flreq_code_txop_abort>This is PDG signaling 78 not enough TXOP for transmission 79 <enum 6 sw_explicit_flush_termination>When SW issues a flush 80 WHICH CAUSES AN ONGOING FES to terminate 81 <enum 7 fes_stp_not_enough_txop_rem>Not enough TXOP remaining 82 in either SW or HW mode. This checks if the remaining TXOP 83 < a parameterized minimum time. Currently half SIFS duration 84 (5 us). 85 <enum 8 hwsch_sch_tlv_zero_hdr_err>HWSCH flush when Parser 86 engine encounters a header with all zeros in the DWORD 87 <enum 9 fes_stp_tlv_time_exceeded_bkof_exp>Issued in case 88 TLV transmission exceeds start_tx time 89 <enum 10 fes_stp_sw_fes_time_gt_hw>SW mode abort. When HWSCH 90 determines that none of the SW programmed (upto 3) BW times 91 can fit into the current TXOP remaining 92 <enum 11 txpcu_flreq_ppdu_allow_bw_fields_not_set>Flush 93 request issued by TXPCU in case none of the PPDU_ALLOW_BW_* 94 fields are set in PCU_PPDU_SETUP TLV 95 <enum 12 txpcu_false_mu_reception>Flush request issued by 96 TXPCU if RXPCU initiates a response generation for a MU 97 reception even though MU reception was not expected 98 <enum 13 hwsch_coex_abort>Flush request issued by HWSCH 99 when a coex event caused this transmit to be aborted 100 <enum 14 hwsch_svd_rdy_timeout>Flush request issued by HWSCH 101 when the PHY does not return the SVD_READY before a timeout 102 expires 103 <enum 15 num_mpdu_count_zero>Flush request issued by TXPCU 104 when the number of MPDU counter for selected BW is zero 105 106 <enum 16 unsupported_cbf>Flush request issued by TXPCU if 107 TXPCU receives TX_PKT_END with error_unsupported_cbf during 108 CV transfer. 109 <enum 17 txpcu_flreq_pcu_ppdu_setup_init_not_valid>Indicates 110 TXPCU has not received PCU_PPDU_SETUP_INIT from PDG, by 111 the time it received PRE_START_TX from HWSCH. 112 <enum 18 txpcu_flreq_pcu_ppdu_setup_start_not_valid>Indicates 113 TXPCU has not received PCU_PPDU_SETUP_START from PDG, by 114 the time it received START_TX from HWSCH. 115 <enum 19 txpcu_flreq_tx_phy_descriptor_not_valid>Indicates 116 TXPCU has not received TX_PHY_DESCRIPTOR within REQD_TLVS_WAIT_TIME 117 after receiving START_TX from HWSCH. 118 <enum 20 txpcu_req_tlvs_timeout_for_cbf>TXPCU did nor receive 119 the CBF info TLVs from the PHY fast enough which resulted 120 in a timeout. 121 <enum 21 txdma_flreq_no_of_mpdu_less_than_limit_status>Indicates 122 the total number of MPDUs that needs to be send out by 123 TXDMA is less than the number indicated by PDG/TXPCU in 124 the MPDU_LIMIT_STATUS 125 <enum 22 txole_flreq_frag_en_amsdu_ampdu>Fragmentation is 126 enabled in TX_FES_SETUP for an AMSDU or AMPDU 127 <enum 23 txole_flreq_more_frag_set_for_last_seg>more_frag 128 bit in TX_FES_SETUP TLV is set for the last MPDU fragment 129 130 <enum 24 txpcu_flreq_start_tx_bw_mismatch>Indicates TXPCU 131 has detected a mismatch between BWs detected at PRE_START_TX 132 and START_TX 133 <enum 25 txpcu_flreq_coex_bw_not_allowed>flush request and 134 is asserted by TXPCU when the final negotiated BW from 135 COEX is not allowed by SW 136 <enum 26 txole_flreq_frag_en_sw_encrypted>flush request 137 and is asserted by TXPCU when the final negotiated BW from 138 COEX is not allowed by SW 139 <enum 27 txole_flreq_frag_en_buffer_chaining>Fragmentation 140 is enabled in raw mode buffer chaining mode. 141 <enum 28 txole_flreq_pv1_type3_amsdu_error>A1 and A2 set 142 to MAC addresses for 11ah PV1 short frame which is an AMSDU 143 144 <enum 29 txole_flreq_pv1_wrong_key_type>An unsupported key_type 145 is set for a PV1 frames. WEP, TKIP and WAPI are not supported 146 for PV1 frames 147 <enum 30 txole_flreq_illegal_frame>Unexpected Tx Mpdu length. 148 Asserted if the MSDU PACKET TLV length is less than the 149 expected WMAC header 150 <enum 31 pdg_flreq_coex_reasons>Asserted by PDG when COEX 151 related logic in PDG requires a flush request. 152 <enum 32 wifi_txole_no_full_msdu_for_checksum_en>Full MSDU 153 packet was not provided by TXDMA when checksum/TSO/fragmentation 154 was enabled 155 <enum 33 wifi_txole_length_mismatch_802_3_eth_frame>The 156 length field in the incoming 802.3 ethernet frame doesn't 157 match with the actual number of bytes in the data TLV. 158 <enum 34 wifi_txole_pv0_amsdu_frame_err>Non-QoS frames are 159 queued as part of AMSDU 160 <enum 35 wifi_txole_pv0_wrong_key_type>Key type in peer 161 table set to NO_CIPHER for protected frames 162 <enum 36 wifi_fes_stp_cca_busy_in_pifs>This flush is initiated 163 by scheduler when (if enabled) CCA goes busy in the middle 164 of a PIFS burst 165 <enum 37 prot_frame_data_underrun>This flush is initiated 166 by TXPCU when a protection frame is send, but TXPCU has 167 not received address fields in time. 168 <enum 38 pdg_no_length_received>PDG generated this flush 169 request because not one MPDU length info has been received 170 at the required timeout (which is programmable) 171 <enum 39 pdg_wrong_preamble_req_order>PDG generated this 172 flush request because PHY issued an unexpected preamble 173 request type 174 <enum 40 txpcu_flreq_retry_for_optimal_bw>The most desired 175 BW was not available, and TXPCU would like to try the most 176 optimal transmit BW again after a new BO period. 177 <enum 41 wifi_txole_incomplete_llc_frame>LLC received incomplete 178 frame 179 <enum 42 pdg_cts_lower_bw_fit_err>PDG received a CTS frame 180 that reduced the BW, As a result the MPDU does not fit 181 in the previous reserved time, the thus this transmission 182 is aborted 183 <enum 43 pdg_cts_shorter_dur_fit_err>PDG received a CTS 184 frame that a reduced duration field. As a result the MPDU 185 does not fit in the previous reserved time, the thus this 186 transmission is aborted 187 188 Note the duration field in CTS can be reduced as a result 189 of COEX reasons 190 <enum 44 hwsch_sch_tlv_len_oor_err>HWSCH flush when Parser 191 engine encounters a header whose length is greater than 192 511 dwords. This excludes DUMMY TLVs. 193 <enum 45 hwsch_sch_tlv_taglen_mismatch_err>HWSCH flush when 194 Parser engine encounters a header whose TAG does not match 195 the XML specified length. This check excludes zero length 196 and variable length TLVs 197 <enum 46 hwsch_sch_tlv_sfm_tracking_err>HWSCH flush when 198 Parser engine encounters a non contiguous error check code, 199 while reading SFM. This check is primarily to catch data 200 write or read issues within the buffering process of scheduler 201 TLV in SFM 202 <enum 47 wifitx_flush_rssi_above_obss_nonsrg_thr>When HWSCH 203 attempts to transmit a packet based on OBSS_PD non-SRG 204 opportunity, a flush with this code is generated if "ReceivedRssi 205 from RXPCU > Scheduler_cmd.RssiAltNonSrg". 206 <enum 48 wifitx_flush_rssi_above_obss_srg_thr>When HWSCH 207 attempts to transmit a packet based on OBSS_PD non-SRG 208 opportunity, a flush with this code is generated if "ReceivedRssi 209 from RXPCU > Scheduler_cmd.RssiAltSrg". 210 <enum 49 wifitx_flush_rssi_above_srp_pwr_thr>When HWSCH 211 attempts to transmit a packet within an SRP opportunity 212 window, a flush with this code is generated if "Scheduler_cmd.SrpAltPwr 213 > SRP_less_RSSI". 214 <enum 50 hwsch_unexpected_sch_tlv_end_err>parse errors 215 <enum 51 hwsch_sch_tlv_tag_oor_err>HWSCH flush when Parser 216 engine encounters a header whose TAG is not listed in the 217 XML TAG table 218 <enum 52 txpcu_phytx_abort_err>An abort from PHY TX got 219 received 220 <enum 53 txpcu_coex_soft_abort_err>A soft from coex got 221 received before even a single MPDU got transmitted. Therefor 222 transmission is terminated. 223 <enum 54 pdg_min_user_count_missed>PDG was asked to start 224 an MU transmission, but the number of users with actual 225 data was less then the threshold (Min_users_with_data_count) 226 227 <enum 55 pdg_min_byte_count_missed>PDG was asked to start 228 an SU transmission, but the number of bytes that PDG has 229 been informed about that can be transmitted is less then 230 the required threshold (min_ppdu_bytes) 231 <enum 56 pdg_min_mpdu_count_missed>PDG was asked to start 232 an SU transmission, but the number of MPDUs that PDG has 233 been informed about that can be transmitted is less then 234 the required threshold (min_mpdus_in_ppdu) 235 <enum 57 pdg_cannot_pad_min_ppdu_time>PDG uses this code 236 when the min PPDU time to pad up to (pad_min_ppdu_time) 237 can not be met due to other boundary conditions (e.g. FES 238 time/TXOP time/TBTT) 239 <enum 58 ucode_flush_request>Flush request initiated by 240 the ucode (M3) 241 <enum 59 txpcu_resp_frame_flushed>TXPCU uses this code on 242 encountering an error condition (e.g. late MACTX_PHY_DESC 243 or CV error) while generating a response. 244 <enum 60 hwsch_sifs_burst_svd_ready_timeout>This flush code 245 is used by HWSCH to indicate that during SIFS bursting, 246 an SVD_READY timeout was detected, which resulted in the 247 SIFS burst to be aborted. 248 <enum 61 txpcu_phy_data_request_to_early>TXPCU has not been 249 properly initialized when the first data request from the 250 PHY has been seen. 251 <enum 62 txpcu_trigger_response_cs_check_fail>TXPCU found 252 that the medium was not idle for the Carries Sense check 253 that PDG indicated was needed for the triggered response 254 frame. 255 <enum 63 pdg_ofdma_max_unused_space_violation>PDG found 256 out that when trying to assign the RUs among the available 257 users, the number of unused RUs remained above the allowed 258 threshold 259 <enum 64 crypto_tx_user_capacity_exceeded>This happens when 260 Crypto receives TLVs for more TX users than it can support 261 at that point of time 262 <enum 65 crypto_tx_non_mu_key_type_rcvd>This happens when 263 Crypto receives unsupported Key types (WEP, TKIP) for MU 264 265 <enum 66 txpcu_cbf_resp_abort>CBF response generation by 266 TXPCU ran into issues due to info not being available from 267 the PHY 268 <enum 67 txpcu_phy_nap_received_during_tx>TXPCU received 269 a PHY NAP TLV from rxpcu while a transmission was ongoing. 270 The transmission will be terminated with this abort reason. 271 272 <enum 68 rxpcu_trigger_with_fcs_error>RXPCU found out that 273 the trigger frame that was received and for which the TX 274 path has been activated to generate a response, had an 275 FCS error. 276 <enum 69 pdg_flreq_coex_bt_higher_priority>Asserted by PDG 277 when COEX indicated to PDG that the transmit request is 278 NOT granted because a higher priority BT activity is ongoing. 279 280 <enum 70 txpcu_txrx_conflict_detected>TXPCU detected a conflict 281 between an FES transmission and a self-gen response transmission. 282 This is when the PHY + RXPCU delays cause a self-gen to 283 overlap with the pre-backoff time from HWSCH for the next 284 FES. 285 <enum 71 pdg_mu_cts_ru_allocation_corruption>PDG received 286 a MU-RTS trigger for which the CTS RU response setting 287 is not valid 288 <enum 72 pdg_trig_for_blocked_ru>PDG received a trigger 289 based transmission request for an RU size that is blocked 290 by SW. 291 <enum 73 pdg_trig_response_mode_corruption>Asserted when 292 PDG gets a TX_FES_SETUP with field "Fes_in_11ax_Trigger_response_config" 293 not being in sync with what it was expecting. 294 <enum 74 pdg_invalid_trigger_config_received>PDG received 295 OFDMA_TRIGGER_DETAILS and the configuration in there (which 296 RXPCU gets from the trigger frame has invalid field value 297 combinations 298 <enum 75 txole_msdu_too_long>This flush request will be 299 asserted if the length of a checksum enabled MSDU is more 300 than 2400 bytes. 301 <enum 76 txole_inconsistent_mesh>This flush request will 302 be asserted if mesh_enable is set for an MSDU subframe 303 while its not set for another MSDU subframe in the same 304 AMSDU 305 <enum 77 txole_mesh_enable_for_ethernet>This flush request 306 will be asserted if mesh_enable is set for an ethernet 307 frame 308 <enum 78 txpcu_trig_response_mode_corruption>Asserted when 309 TXPCU gets a TX_FES_SETUP with field "ofdma_triggered_response" 310 not being in sync with what it was expecting. 311 <enum 79 pdg_11ax_invalid_rate_setup>PDG received an 11ax 312 transmit set of parameters that is not allowed or not supported 313 314 <enum 80 txpcu_trig_response_info_too_late>TXPCU generates 315 this flush request because trigger response transmission 316 setup info from the SCH was received too late 317 <enum 81 wifitx_flush_obss_pd_disabled_for_tx>When HWSCH 318 attempts to transmit a packet having obss_pd disabled within 319 an obss_pd opportunity window this flush code is generated 320 321 <enum 82 wifitx_flush_srp_disabled_for_tx>When HWSCH attempts 322 to transmit a packet having SRP disabled within an obss_pd 323 opportunity window this flush code is generated 324 <enum 83 pdg_flreq_code_srp_sr_missed>In SRP SR, PDG will 325 generate flush if receiving PDG_TX_REQ in a blocking window 326 around SRP SR limit 327 <enum 84 pdg_rbo_user_limit_no_data>PDG generates when no 328 data can be sent for the users specified by TX_FES_SETUP 329 field "RBO_must_have_data_user_limit." 330 <enum 85 pdg_no_cbf_response_received>Used by PDG for an 331 MU-MIMO sounding plus steering burst when it did not receive 332 CBF from any recipient STA 333 <enum 86 pdg_flreq_unexpected_notify_frame>PDG generates 334 when encountering a 'HARD_NOTIFY' or a 'SEMI_HARD_NOTIFY' 335 frame unless ignore_tx_notify_setting is set in 'PDG_FES_SETUP' 336 337 <enum 87 pdg_flush_min_ppdu_time_missed>PDG was asked to 338 start a transmission, but the time required to transmit 339 the PPDU is less than the required threshold (flush_min_ppdu_time) 340 341 <enum 88 txpcu_flreq_rxpcu_setup_config_error>Used by TXPCU 342 when Tx is complete and it is about to generate 'EXPECTED_RESPONSE' 343 but it has not got any 'RXPCU_SETUP_COMPLETE' although 'rxpcu_setup_complete_present' 344 was set in 'TX_FES_SETUP' 345 <enum 89 txpcu_flreq_late_trig_tlvs>Used by TXPCU when the 346 'RECEIVED_TRIGER_INFO' TLV is sent to SCH after the 'pre_phy_desc' 347 timer has expired, if enabled 348 <enum 90 pdg_flreq_notify_mpdu_late>Used by PDG when the 349 first 'MPDU_INFO' is not available when sending 'PCU_PPDU_SETUP_START' 350 so PDG has assumed a regular MPDU ('FW_tx_notify_frame = 351 NO_TX_NOTIFY'), but later the MPDU turned out to be a notify 352 frame, if enabled 353 <enum 91 txdma_flreq_sfm_full>TXDMA generates this flush 354 request when it gets 'MPDU_INFO's for a user that it is 355 unable to write into SFM since its SFM allocation is full. 356 357 <enum 92 txpcu_flreq_pre_phy_desc_late>Used in TXPCU for 358 generating a flush request when 'PRE_PHY_DESC' is received 359 late (determined by a timer) 360 <enum 93 pdg_flreq_cannot_fit_trig_response>This flush request 361 code is used by PDG if the trigger response MPDUs cannot 362 be fit to avoid sending only null delimiters for e.g. unassociated 363 UORA and colliding with another STA with valid data. 364 <enum 94 pdg_flreq_unexpected_fes_setup>Flush request used 365 by PDG in case of unexpected 'TX_FES_SETUP' 366 <enum 95 pdg_flreq_code_mlo_abort>Flush request used by 367 PDG in case of MLO constraints forcing an abort 368 <enum 96 hwsch_bkoff_trunc_seq_abort>Flush request used 369 by HWSCH if an MLO backoff truncation request resulted in 370 a forced abort to avoid windows too close to transmissions 371 372 <enum 97 txole_flreq_illegal_frag_settings>Flush request 373 used by TXOLE if fragmentation is requested but the settings 374 are illegal 375 <enum 98 txpcu_flreq_mac_flex_overwrite_err>Flush request 376 used by TXPCU when required overwrite TLVs are not received 377 from microcode, or when overwrite TLVs are dropped in MAC 378 due to SFM full condition 379 <enum 99 txpcu_lmr_req_timeout>Flush request by TXPCU if 380 PHY does not respond to 'MACRX_LMR_READ_REQUEST' or 'MACRX_LMR_DATA_REQUEST' 381 on time 382 <enum 100 txpcu_lmr_phyrx_err_abort>Flush request by TXPCU 383 if PHY sent 'PHYRX_LMR_TRANSFER_ABORT' or 'PHYRX_LMR_READ_REQUEST_ACK' 384 with status anything other than OK 385 <enum 101 txpcu_rx_bitmap_ack_mismatch>Flush request by 386 TXPCU on getting a mismatched TLV from RXPCU for 'RX_FRAME_*BITMAP_ACK' (1Kbit 387 instead of 256-bit or vice versa) 388 <enum 102 txpcu_rx_incorrect_ba_cnt_for_ampdu>Flush request 389 by TXPCU on getting an 'RX_RESPONSE_REQUIRED_INFO' with 390 A-MPDU set, VHT Ack clear and 'response_ba*_cnt' zero, 391 to avoid a system hang 392 <enum 103 txpcu_flreq_cbf_done_delayed>Flush request by 393 TXPCU on not getting a 'MACTX_CBF_DONE' from RXPCU after 394 sending 'RESPONSE_END_STATUS' TLV 395 <enum 104 txpcu_flreq_sfm_full>Flush request by TXPCU if 396 SFM indicates 'user_fifo_full' 397 <enum 105 pdg_flreq_calc_psdu_length_too_low>PDG was asked 398 to start an MU transmission, but one of the users' RU is 399 such that within the PPDU time the PSDU length that can 400 be fit is too low (based on a threshold in a PDG register) 401 402 <enum 106 pdg_flush_min_ppdu_time_obss_sr_missed>PDG was 403 asked to start an OBSS PD SR transmission, but the time 404 required to transmit the PPDU is less than the required 405 threshold (flush_min_ppdu_time_obss_pd_sr) 406 <enum 107 pdg_flreq_code_txop_abort_obss_sr>PDG was asked 407 to start an OBSS PD SR transmission, but the time required 408 for the FES is more than the OBSS PPDU duration (max_fes_time_obss_pd_sr) 409 410 <enum 108 pdg_flreq_cv_corr_tlv_timeout>PDG timed out waiting 411 for CV correlation TLVs from microcode 412 <enum 109 pdg_flreq_pri_user_cbf_fail>Flush request from 413 PDG if CV correlation is enabled and the 'PHYTX_CV_CORR_STATUS' 414 from microcode indicates that the primary user's CBF has 415 failed 416 <enum 110 hwsch_sfm_availability_check_fail>HWSCH-issued 417 flush when the SFM availability check fails during a SIFS 418 burst or when fetching part 2 TLVs 419 <enum 111 pdg_cannot_pad_response_time>PDG uses this code 420 when the response time to pad up to (required_response_time) 421 cannot be met due to the frame length in 'PDG_RESPONSE' 422 exceeding the calculated padded length 423 <enum 112 ul_mu_rx_early_abort>Flush request to terminate 424 an FES when RXPCU aborted an UL MU reception early because 425 at the end of the "early_termination_window," the required 426 number of users with at least one valid MPDU delimiter 427 was not reached. 428 429 This is unsupported in Beryllium. 430 <enum 113 reserved_flush_code_25>Placeholder for future 431 needs 432 <enum 114 reserved_flush_code_26>TXPCU uses this code when 433 more than the configured maximum CTS2SELF are being sent. 434 435 <enum 115 reserved_flush_code_27>TXPCU uses this code when 436 at the time of the main PPDU transmission, fewer than the 437 configured minimum CTS2SELF were sent. 438 <enum 116 reserved_flush_code_28>Placeholder for future 439 needs 440 <enum 117 reserved_flush_code_29>Placeholder for future 441 needs 442 <enum 118 reserved_flush_code_30>Placeholder for future 443 needs 444 <enum 119 reserved_flush_code_31>Placeholder for future 445 needs 446 <enum 120 reserved_flush_code_32>Placeholder for future 447 needs 448 <enum 121 reserved_flush_code_33>Placeholder for future 449 needs 450 <enum 122 reserved_flush_code_34>Placeholder for future 451 needs 452 <enum 123 reserved_flush_code_35>Placeholder for future 453 needs 454 <enum 124 reserved_flush_code_36>Placeholder for future 455 needs 456 <enum 125 reserved_flush_code_37>Placeholder for future 457 needs 458 <enum 126 reserved_flush_code_38>Placeholder for future 459 needs 460 <enum 127 unknown_flush_request_code>Used by SCH when it 461 receives an undefined flush request reason code 462 */ 463 464 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_OFFSET 0x0000000000000000 465 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_LSB 0 466 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_MSB 7 467 #define TX_FLUSH_REQ_FLUSH_REQ_REASON_MASK 0x00000000000000ff 468 469 470 /* Description PHYTX_ABORT_REASON 471 472 Field only valid when Flush_req_reason == TXPCU_PHYTX_ABORT_ERR 473 474 475 <enum 0 no_phytx_error_reported>This value is the default 476 value the MAC will fill in the status TLV (when not PHY 477 abort was received). 478 479 Note that when PHY generates the PHYTX_ABORT_REQUEST, this 480 value shall never be used. 481 <enum 1 error_txtd_ifft_underrun>PHY ran out of transmit 482 data due to transmit underrun - this field is user-specific 483 (see user_number field) 484 <enum 2 error_tx_invalid_tlv> 485 <enum 3 error_tx_unexpected_tlv> 486 <enum 4 error_tx_pkt_end_error> 487 <enum 5 error_tx_bw_is_gt_dyn_bw> 488 <enum 6 error_txtd_pkt_start_error> 489 <enum 7 error_txfd_pre_phy_tlv_ooo> 490 <enum 8 error_txtd_mu_data_underrun> 491 <enum 9 error_tx_legacy_rate_illegal> 492 <enum 10 error_tx_fifo_error> 493 <enum 11 error_tx_ack_wd_error> 494 <enum 12 error_tx_tpc_miss> 495 <enum 13 error_mac_tx_abort> 496 <enum 14 error_tx_pcss_phy_desc_wdg_timeout> 497 <enum 15 error_unsupported_cbf> 498 <enum 16 error_cv_static_bandwidth_mismatch> 499 <enum 17 error_cv_dynamic_bandwidth_mismatch> 500 <enum 18 error_cv_unsupported_nss_total> 501 <enum 19 error_nss_bf_params_mismatch> 502 <enum 20 error_txbf_fail> 503 <enum 21 error_txbf_snd_fail>This used to be called 'error_illegal_nss.' 504 505 <enum 22 error_otp_txbf> 506 <enum 23 error_tx_inv_chainmask> 507 <enum 24 error_cv_index_assign_overload>This error indicates 508 that CV prefetch command indicated a CV index that is not 509 available. 510 <enum 25 error_cv_index_delete>This error indicates that 511 CV delete command indicated a CV index that did not contain 512 any valid info 513 <enum 26 error_tx_he_rate_illegal>Error found with the HE 514 transmission parameters 515 <enum 27 error_tx_pcss_wdg_timeout> 516 <enum 28 error_tx_tlv_tag_mismatch> 517 <enum 29 error_tx_cck_fifo_flush> 518 <enum 30 error_tx_no_mac_pkt_end> 519 <enum 31 error_tx_abort_for_mac_war> 520 <enum 32 error_tx_stuck> 521 <enum 33 error_tx_invalid_uplink_tlv> 522 <enum 34 error_txfd_txcck_illegal_tx_rate_error> 523 <enum 35 error_txfd_txcck_underrun_error> 524 <enum 36 error_txfd_mpi_req_grant_error> 525 <enum 37 error_txfd_control_tlv_fifo_ovfl_error> 526 <enum 38 error_txfd_tlv_fifo_overflow_error> 527 <enum 39 error_txfd_data_fifo_underflow_error> 528 <enum 40 error_txfd_data_fifo_overflow_error> 529 <enum 41 error_txfd_service_fifo_overflow_error> 530 <enum 42 error_txfd_he_sigb_fifo_overflow_error> 531 <enum 43 error_txfd_spurious_data_fifo_error> 532 <enum 44 error_txfd_he_siga_fifo_ovfl_error> 533 <enum 45 error_txfd_unknown_tlv_error> 534 <enum 46 error_txfd_mac_response_ordering_error> 535 <enum 47 error_txfd_unexpected_mac_pkt_end_error> 536 <enum 48 error_txfd_tlv_fifo_rd_hang_error>All FIFO read 537 hang errors use this value. 538 <enum 49 error_txfd_tlv_fifo_no_rd_error>All FIFO no read 539 errors use this value. 540 <enum 50 error_txfd_ordering_fifo_no_rd_error> 541 <enum 51 error_txfd_illegal_cf_tlv_error> 542 <enum 52 error_txfd_user_ru_hang_error> 543 <enum 53 error_txfd_stream_ru_hang_error> 544 <enum 54 error_txfd_num_pad_bits_error> 545 <enum 55 error_txfd_phy_abort_ack_wd_to_error> 546 <enum 56 error_txfd_pre_pkt_isr_not_done_before_phy_desc_error> 547 548 <enum 57 error_txfd_bf_weights_not_ready_error> 549 <enum 58 error_txfd_req_timer_breach_error> 550 <enum 59 error_txfd_wd_to_error> 551 <enum 60 error_txfd_legacy_bf_weights_not_ready_error> 552 <enum 61 error_txfd_axi_slave_to_error> 553 <enum 62 error_txfd_hw_acc_error> 554 <enum 63 error_txfd_txb_req_fifo_underrun_error> 555 <enum 64 error_txfd_unknown_ru_alloc_error> 556 <enum 65 error_txfd_more_user_desc_per_user_tlvs_error> 557 <enum 66 error_txfd_ldpc_param_calc_to_error> 558 <enum 69 error_txfd_cbf_start_before_expect_cbf_clear_error> 559 560 <enum 70 error_txfd_out_of_range_cbf_user_id_error> 561 <enum 71 error_txfd_less_cbf_data_error> 562 <enum 72 error_txfd_more_cbf_data_error> 563 <enum 73 error_txfd_cbf_done_not_received_error> 564 <enum 74 error_txfd_mpi_cbf_valid_to_error> 565 <enum 75 error_txfd_cbf_start_missing_error> 566 <enum 76 error_txfd_mimo_ctrl_error> 567 <enum 77 error_txfd_cbf_buffer_ovfl_error> 568 <enum 78 error_txfd_dma0_hang_error> 569 <enum 79 error_txfd_dma1_hang_error> 570 <enum 80 error_txfd_b2b_cbf_start_error> 571 <enum 81 error_txfd_b2b_cbf_done_error> 572 <enum 82 error_txfd_unsaved_cv_error> 573 <enum 83 error_txfd_wt_mem_wr_conflict_error> 574 <enum 84 error_txfd_wt_mem_rd_conflict_error> 575 <enum 85 error_txfd_qre_intf_to_error> 576 <enum 86 error_txfd_qre_txbf_stomp_rx_error> 577 <enum 87 error_txfd_qre_rx_stomp_txbf_error> 578 <enum 88 error_txfd_precoding_start_before_bf_param_clr_error> 579 580 <enum 89 error_txfd_tone_map_lut_rd_conflict_error> 581 <enum 90 error_txfd_precoding_fifo_ovfl_error> 582 <enum 91 error_txfd_precoding_fifo_udfl_error> 583 <enum 92 error_txfd_txbf_axi_slave_to_error> 584 <enum 93 error_txfd_less_prefetch_tlvs_error> 585 <enum 94 error_txfd_more_prefetch_tlvs_error> 586 <enum 95 error_txfd_prefetch_fifo_ovfl_error> 587 <enum 96 error_txfd_prefetch_fifo_udfl_error> 588 <enum 97 error_txfd_precoding_error> 589 <enum 98 error_txfd_cv_ctrl_state_to_error> 590 <enum 99 error_txfd_txbfp_qre_tone_udfl_error> 591 <enum 100 error_txfd_less_bf_param_per_user_tlvs_error> 592 <enum 101 error_txfd_more_bf_param_per_user_tlvs_error> 593 <enum 102 error_txfd_bf_param_common_unexpected_error> 594 <enum 103 error_txfd_less_expect_cbf_per_user_tlvs_error> 595 596 <enum 104 error_txfd_more_expect_cbf_per_user_tlvs_error> 597 598 <enum 105 error_txfd_precoding_stg1_stg2_wait_to_error> 599 <enum 106 error_txfd_expect_cbf_per_user_before_common_error> 600 601 <enum 107 error_txfd_prefetch_per_user_before_common_error> 602 603 <enum 108 error_txfd_bf_param_per_user_before_common_error> 604 605 <enum 109 error_txfd_ndp_cbf_bw_mismatch_error> 606 <enum 110 error_txtd_tx_pre_desc_error> 607 <enum 111 error_txtd_tx_desc_error> 608 <enum 112 error_txtd_start_error> 609 <enum 113 error_txtd_sym_error> 610 <enum 114 error_txtd_multi_sym_error> 611 <enum 115 error_txtd_pre_data_error> 612 <enum 116 error_txtd_pkt_data_error> 613 <enum 117 error_txtd_pkt_end_error> 614 <enum 118 error_txtd_tx_frame_unexp> 615 <enum 119 error_txtd_start_unexp> 616 <enum 120 error_txtd_fft_error_1> 617 <enum 121 error_txtd_fft_error_2> 618 <enum 122 error_txtd_uld_sym_cp_len_zero> 619 <enum 123 error_txtd_start_done> 620 <enum 124 error_txtd_start_nonidle> 621 <enum 125 error_txtd_tx_abort_nonidle> 622 <enum 126 error_txtd_tx_abort_done> 623 <enum 127 error_txtd_tx_abort_idle> 624 <enum 128 error_txtd_cck_sample_overflow> 625 <enum 129 error_txtd_cck_timeout> 626 <enum 130 error_txtd_ofdm_sym_mismatch> 627 <enum 131 error_txtd_tx_vld_unalign_error> 628 <enum 132 error_txtd_fft_cdc_fifo>This is the merged Rx/Tx 629 CDC FIFO empty/full error code 630 <enum 133 error_mac_tb_ppdu_abort>All 'error_txtd_chn' codes 631 use this value as well. 632 <enum 136 error_abort_req_from_macrx_enum_05>This code is 633 used to abort the Tx when MAC Rx issues an abort request 634 with code 05 "macrx_abort_too_much_bad_data." 635 <enum 137 error_tx_extra_sym_mismatch> 636 <enum 138 error_tx_vht_length_not_multiple_of_3> 637 <enum 139 error_tx_11b_rate_illegal> 638 <enum 140 error_tx_ht_rate_illegal> 639 <enum 141 error_tx_vht_rate_illegal> 640 <enum 142 error_mac_rf_only_abort> 641 <enum 255 error_tx_invalid_error_code> 642 */ 643 644 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_OFFSET 0x0000000000000000 645 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_LSB 8 646 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_MSB 15 647 #define TX_FLUSH_REQ_PHYTX_ABORT_REASON_MASK 0x000000000000ff00 648 649 650 /* Description FLUSH_REQ_USER_NUMBER_OR_LINK_ID 651 652 Field only valid when Flush_req_reason == TXPCU_PHYTX_ABORT_ERR 653 or PDG_FLREQ_CODE_{TXOP, MLO}_ABORT 654 655 In case of TXPCU_PHYTX_ABORT_ERR, for some errors, the user 656 for which this error was detected can be indicated in this 657 field. 658 659 In case of PDG_FLREQ_CODE_*_ABORT due to MLO, this field 660 will carry the partner link ID and validity due to which 661 the abort was initiated. 662 Bit [5]: partner link ID valid 663 Bits [4:3]: set to 0 664 Bits [2:0]: partner link ID 665 <legal 0-39> 666 */ 667 668 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_OFFSET 0x0000000000000000 669 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_LSB 16 670 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_MSB 21 671 #define TX_FLUSH_REQ_FLUSH_REQ_USER_NUMBER_OR_LINK_ID_MASK 0x00000000003f0000 672 673 674 /* Description MLO_ABORT_REASON 675 676 Field valid only when Flush_req_reason == PDG_FLREQ_CODE_{TXOP, 677 MLO}_ABORT 678 679 <enum 0 sw_blocked_self> SW-specified block of the peer 680 for self-link 681 <enum 1 sw_blocked_partner> SW-specified block of the peer 682 from a partner link 683 <enum 2 rx_ongoing> Blocked due to RX ongoing in partner 684 link 685 <enum 3 cts2self_truncated> MLO truncated CTS2SELF leading 686 to abort 687 <enum 4 max_padding_exceeded> Maximum padding exceeded 688 <enum 5 max_overlap_exceeded> Maximum overlap duration exceeded 689 690 <enum 6 user_collision_threshold_exceeded> User collision 691 threshold for MU exceeded 692 <enum 7 sw_blocked_vdev_id> SW-specified block due to VDEV 693 ID collision with a non-MLO broadcast/multicast 694 <enum 8 r2r_response_truncated> 695 <enum 10 emlsr_blackout> Blocked due to EMLSR black-out 696 window 697 <enum 16 t2_response_changed> T2 response changed in 'MLO_TX_RESP' 698 699 <enum 17 ppdu_duration_zero> PPDU duration zero in 'MLO_TX_RESP' 700 701 <enum 18 ppdu_duration_bigger_than_allowed> PPDU duration 702 bigger than allowed in non-response mode 'MLO_TX_RESP' 703 <enum 19 ppdu_padding_not_allowed> PPDU in non-A-MPDU format 704 cannot be padded 705 <enum 20 resp_ppdu_duration_truncated> PPDU duration truncated 706 in response mode 'MLO_TX_RESP' 707 <enum 21 ppdu_duration_limit> flush generated due to TXOP 708 abort 709 <enum 22 overview_mpdu_cnt_zero> flush generated due to 710 TXOP abort as MPDU count is zero for all users in 'MPDU_QUEUE_OVERVIEW' 711 712 <enum 23 overview_not_ready> flush generated due to MLO 713 abort as 'MPDU_QUEUE_OVERVIEW' is not ready for all users 714 at PPDU phase 715 <enum 24 trigger_frame_mlo_alignment_fail> Trigger frame 716 end-alignment cannot be met, e.g. due to LDPC extra symbol 717 718 <enum 9 mlo_reserved> 719 */ 720 721 #define TX_FLUSH_REQ_MLO_ABORT_REASON_OFFSET 0x0000000000000000 722 #define TX_FLUSH_REQ_MLO_ABORT_REASON_LSB 22 723 #define TX_FLUSH_REQ_MLO_ABORT_REASON_MSB 26 724 #define TX_FLUSH_REQ_MLO_ABORT_REASON_MASK 0x0000000007c00000 725 726 727 /* Description RESERVED_0A 728 729 <legal 0> 730 */ 731 732 #define TX_FLUSH_REQ_RESERVED_0A_OFFSET 0x0000000000000000 733 #define TX_FLUSH_REQ_RESERVED_0A_LSB 27 734 #define TX_FLUSH_REQ_RESERVED_0A_MSB 31 735 #define TX_FLUSH_REQ_RESERVED_0A_MASK 0x00000000f8000000 736 737 738 /* Description TLV64_PADDING 739 740 Automatic DWORD padding inserted while converting TLV32 741 to TLV64 for 64 bit ARCH 742 <legal 0> 743 */ 744 745 #define TX_FLUSH_REQ_TLV64_PADDING_OFFSET 0x0000000000000000 746 #define TX_FLUSH_REQ_TLV64_PADDING_LSB 32 747 #define TX_FLUSH_REQ_TLV64_PADDING_MSB 63 748 #define TX_FLUSH_REQ_TLV64_PADDING_MASK 0xffffffff00000000 749 750 751 752 #endif // TX_FLUSH_REQ 753