1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _TX_RAW_OR_NATIVE_FRAME_SETUP_H_ 27 #define _TX_RAW_OR_NATIVE_FRAME_SETUP_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_DWORDS_TX_RAW_OR_NATIVE_FRAME_SETUP 2 32 33 #define NUM_OF_QWORDS_TX_RAW_OR_NATIVE_FRAME_SETUP 1 34 35 36 struct tx_raw_or_native_frame_setup { 37 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 38 uint32_t fc_to_ds_mask : 1, // [0:0] 39 fc_from_ds_mask : 1, // [1:1] 40 fc_more_frag_mask : 1, // [2:2] 41 fc_retry_mask : 1, // [3:3] 42 fc_pwr_mgt_mask : 1, // [4:4] 43 fc_more_data_mask : 1, // [5:5] 44 fc_prot_frame_mask : 1, // [6:6] 45 fc_order_mask : 1, // [7:7] 46 duration_field_mask : 1, // [8:8] 47 sequence_control_mask : 1, // [9:9] 48 qc_tid_mask : 1, // [10:10] 49 qc_eosp_mask : 1, // [11:11] 50 qc_ack_policy_mask : 1, // [12:12] 51 qc_amsdu_mask : 1, // [13:13] 52 reserved_0a : 1, // [14:14] 53 qc_15to8_mask : 1, // [15:15] 54 iv_mask : 1, // [16:16] 55 fc_to_ds_setting : 1, // [17:17] 56 fc_from_ds_setting : 1, // [18:18] 57 fc_more_frag_setting : 1, // [19:19] 58 fc_retry_setting : 2, // [21:20] 59 fc_pwr_mgt_setting : 1, // [22:22] 60 fc_more_data_setting : 2, // [24:23] 61 fc_prot_frame_setting : 2, // [26:25] 62 fc_order_setting : 1, // [27:27] 63 qc_tid_setting : 4; // [31:28] 64 uint32_t qc_eosp_setting : 2, // [1:0] 65 qc_ack_policy_setting : 2, // [3:2] 66 qc_amsdu_setting : 1, // [4:4] 67 qc_15to8_setting : 8, // [12:5] 68 mlo_addr_override : 1, // [13:13] 69 mlo_ignore_addr3_override : 1, // [14:14] 70 sequence_control_source : 1, // [15:15] 71 fragment_number : 4, // [19:16] 72 sequence_number : 12; // [31:20] 73 #else 74 uint32_t qc_tid_setting : 4, // [31:28] 75 fc_order_setting : 1, // [27:27] 76 fc_prot_frame_setting : 2, // [26:25] 77 fc_more_data_setting : 2, // [24:23] 78 fc_pwr_mgt_setting : 1, // [22:22] 79 fc_retry_setting : 2, // [21:20] 80 fc_more_frag_setting : 1, // [19:19] 81 fc_from_ds_setting : 1, // [18:18] 82 fc_to_ds_setting : 1, // [17:17] 83 iv_mask : 1, // [16:16] 84 qc_15to8_mask : 1, // [15:15] 85 reserved_0a : 1, // [14:14] 86 qc_amsdu_mask : 1, // [13:13] 87 qc_ack_policy_mask : 1, // [12:12] 88 qc_eosp_mask : 1, // [11:11] 89 qc_tid_mask : 1, // [10:10] 90 sequence_control_mask : 1, // [9:9] 91 duration_field_mask : 1, // [8:8] 92 fc_order_mask : 1, // [7:7] 93 fc_prot_frame_mask : 1, // [6:6] 94 fc_more_data_mask : 1, // [5:5] 95 fc_pwr_mgt_mask : 1, // [4:4] 96 fc_retry_mask : 1, // [3:3] 97 fc_more_frag_mask : 1, // [2:2] 98 fc_from_ds_mask : 1, // [1:1] 99 fc_to_ds_mask : 1; // [0:0] 100 uint32_t sequence_number : 12, // [31:20] 101 fragment_number : 4, // [19:16] 102 sequence_control_source : 1, // [15:15] 103 mlo_ignore_addr3_override : 1, // [14:14] 104 mlo_addr_override : 1, // [13:13] 105 qc_15to8_setting : 8, // [12:5] 106 qc_amsdu_setting : 1, // [4:4] 107 qc_ack_policy_setting : 2, // [3:2] 108 qc_eosp_setting : 2; // [1:0] 109 #endif 110 }; 111 112 113 /* Description FC_TO_DS_MASK 114 115 Consumer: TXOLE 116 Producer: SW 117 118 Field only valid for MSDU frames with enc_type == RAW or 119 Native WiFi 120 Note: Enc_type is NOT allowed b 121 122 Note: 123 When enc_type != RAW or Native WiFi, OLE will get the setting 124 from the frame_ctl field in the MPDU_queue extension data 125 structure. 126 127 <enum 0 mask_disable>: HW is allowed to update this field. 128 The value that HW (OLE) will insert is the given in field: 129 fc_to_ds_setting. 130 <enum 1 mask_enable>: HW is not allowed to update the contents 131 of this field. 132 133 <legal all> 134 135 In 11ah mode of Operation, same description as above applies 136 if this field is a part of FC field of the MPDU. This field 137 does not apply to Short MAC header (PV=1) and is ignored 138 by HW 139 */ 140 141 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_MASK_OFFSET 0x0000000000000000 142 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_MASK_LSB 0 143 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_MASK_MSB 0 144 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_MASK_MASK 0x0000000000000001 145 146 147 /* Description FC_FROM_DS_MASK 148 149 Consumer: TXOLE 150 Producer: SW 151 152 Field only valid for MSDU frames with enc_type == RAW or 153 Native WiFi 154 155 Note: 156 When enc_type != RAW or Native WiFi, OLE will get the setting 157 from the frame_ctl field in the MPDU_queue extension data 158 structure. 159 160 <enum 0 mask_disable>: HW is allowed to update this field. 161 The value that HW (OLE) will insert is the given in field: 162 fc_from_ds_setting. 163 <enum 1 mask_enable>: HW is not allowed to update the contents 164 of this field. 165 166 <legal all> 167 168 In 11ah mode of Operation, same description as above applies 169 if this field is a part of FC field of the MPDU. 170 */ 171 172 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_MASK_OFFSET 0x0000000000000000 173 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_MASK_LSB 1 174 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_MASK_MSB 1 175 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_MASK_MASK 0x0000000000000002 176 177 178 /* Description FC_MORE_FRAG_MASK 179 180 Consumer: TXOLE 181 Producer: SW 182 183 Field only valid for MSDU frames with enc_type == RAW or 184 Native WiFi 185 186 Note: 187 When enc_type != RAW or Native WiFi, OLE will get the setting 188 from the frame_ctl field in the MPDU_queue extension data 189 structure. 190 191 <enum 0 mask_disable>: HW is allowed to update this field. 192 The value that HW (OLE) will insert is the given in field: 193 fc_more_frag_setting. 194 <enum 1 mask_enable>: HW is not allowed to update the contents 195 of this field. 196 197 <legal all> 198 */ 199 200 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_MASK_OFFSET 0x0000000000000000 201 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_MASK_LSB 2 202 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_MASK_MSB 2 203 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_MASK_MASK 0x0000000000000004 204 205 206 /* Description FC_RETRY_MASK 207 208 Consumer: TXOLE 209 Producer: SW 210 211 Field only valid for MSDU frames with enc_type == RAW or 212 Native WiFi 213 214 Note: 215 When enc_type != RAW or Native WiFi, OLE will base the setting 216 for this field on the retry_bitmap_31_0 and retry_bitmap_63_32 217 fields in the MPDU_queue_extension descriptor 218 219 <enum 0 mask_disable>: HW is allowed to update this field. 220 The value that HW (OLE) will insert is the given in field: 221 fc_retry_setting. 222 <enum 1 mask_enable>: HW is not allowed to update the contents 223 of this field. 224 225 <legal all> 226 */ 227 228 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_MASK_OFFSET 0x0000000000000000 229 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_MASK_LSB 3 230 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_MASK_MSB 3 231 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_MASK_MASK 0x0000000000000008 232 233 234 /* Description FC_PWR_MGT_MASK 235 236 Consumer: TXOLE 237 Producer: SW 238 239 Field only valid for MSDU frames with enc_type == RAW or 240 Native WiFi 241 242 Note: 243 When enc_type != RAW or Native WiFi, OLE will get the setting 244 from the frame_ctl field in the MPDU_queue extension data 245 structure. 246 247 <enum 0 mask_disable>: HW is allowed to update this field. 248 The value that HW (OLE) will insert is the given in field: 249 fc_pwr_mgt_setting. 250 <enum 1 mask_enable>: HW is not allowed to update the contents 251 of this field. 252 253 <legal all> 254 */ 255 256 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_MASK_OFFSET 0x0000000000000000 257 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_MASK_LSB 4 258 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_MASK_MSB 4 259 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_MASK_MASK 0x0000000000000010 260 261 262 /* Description FC_MORE_DATA_MASK 263 264 Consumer: TXOLE 265 Producer: SW 266 267 Field only valid for MSDU frames with enc_type == RAW or 268 Native WiFi 269 270 Note: 271 When enc_type != RAW or Native WiFi, OLE will get the setting 272 from the frame_ctl field in the MPDU_queue extension data 273 structure. 274 275 TX_PCU has the abilty of overwrite the More data field, 276 based on the Set_fc_more_data field in the PPDU_SS_... TLVs 277 given by PDG. 278 279 <enum 0 mask_disable>: HW is allowed to update this field. 280 The value that HW (OLE) will insert is the given in field: 281 fc_more_data_setting. 282 <enum 1 mask_enable>: HW is not allowed to update the contents 283 of this field. 284 285 <legal all> 286 */ 287 288 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_MASK_OFFSET 0x0000000000000000 289 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_MASK_LSB 5 290 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_MASK_MSB 5 291 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_MASK_MASK 0x0000000000000020 292 293 294 /* Description FC_PROT_FRAME_MASK 295 296 Consumer: TXOLE 297 Producer: SW 298 299 Field only valid for MSDU frames with enc_type == RAW or 300 Native WiFi 301 302 Note: 303 When enc_type != RAW or Native WiFi, OLE will base the setting 304 for the Protected frame bit on the key_type setting in 305 the peer entry. When NO encryption is needed, the bit will 306 be set to 0, When the any encryption is needed, the bit 307 will be set to 0. 308 309 <enum 0 mask_disable>: HW is allowed to update this field. 310 The value that HW (OLE) will insert is the given in field: 311 fc_prot_frame_setting. When fc_prot_frame_setting is set, 312 OLE will encrypt the frame, based on the encryption type 313 indicate with the key_type setting in the peer entry 314 315 <enum 1 mask_enable>: HW is not allowed to update the contents 316 of this field. 317 <legal all> 318 */ 319 320 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_MASK_OFFSET 0x0000000000000000 321 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_MASK_LSB 6 322 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_MASK_MSB 6 323 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_MASK_MASK 0x0000000000000040 324 325 326 /* Description FC_ORDER_MASK 327 328 Consumer: TXOLE 329 Producer: SW 330 331 Field only valid for MSDU frames with enc_type == RAW or 332 Native WiFi 333 334 Note: 335 When enc_type != RAW or Native WiFi, OLE will get the setting 336 from the frame_ctl field in the MPDU_queue extension data 337 structure. 338 339 <enum 0 mask_disable>: HW is allowed to update this field. 340 The value that HW (OLE) will insert is the given in field: 341 fc_order_setting. 342 <enum 1 mask_enable>: HW is not allowed to update the contents 343 of this field. 344 345 <legal all> 346 347 In 11ah mode of Operation, same description as above applies 348 if this field is a part of FC field of the MPDU. 349 */ 350 351 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_MASK_OFFSET 0x0000000000000000 352 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_MASK_LSB 7 353 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_MASK_MSB 7 354 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_MASK_MASK 0x0000000000000080 355 356 357 /* Description DURATION_FIELD_MASK 358 359 Consumer: TXOLE 360 Producer: SW 361 362 Field only valid for MPDU frames with MSDU enc_type == RAW 363 or Native WiFi 364 365 Note: 366 When enc_type != RAW or Native WiFi, TX PCU will get the 367 value for this field from the Duration fields in the PPDU_SS_... 368 TLVs from PDG. 369 370 <enum 0 mask_disable>: HW is allowed to update this field. 371 The value that HW (TX_PCU) will insert is coming from the 372 Duration fields in the PPDU_SS_... TLVs from PDG (similar 373 as with NON RAW/Native WiFi frames). 374 <enum 1 mask_enable>: HW is not allowed to update the contents 375 of this field. 376 377 <legal all> 378 379 In 11ah mode of Operation, same description as above applies 380 if this field is a part of FC field of the MPDU. 381 */ 382 383 #define TX_RAW_OR_NATIVE_FRAME_SETUP_DURATION_FIELD_MASK_OFFSET 0x0000000000000000 384 #define TX_RAW_OR_NATIVE_FRAME_SETUP_DURATION_FIELD_MASK_LSB 8 385 #define TX_RAW_OR_NATIVE_FRAME_SETUP_DURATION_FIELD_MASK_MSB 8 386 #define TX_RAW_OR_NATIVE_FRAME_SETUP_DURATION_FIELD_MASK_MASK 0x0000000000000100 387 388 389 /* Description SEQUENCE_CONTROL_MASK 390 391 Consumer: TXOLE 392 Producer: SW 393 394 Field only valid for MPDU frames with MSDU enc_type == RAW 395 or Native WiFi 396 397 Note: 398 When enc_type != RAW or Native WiFi, OLE will base the value 399 for this field on sequence number field in the TX_MPDU_START 400 descriptor 401 402 <enum 0 mask_disable>: HW is allowed to update this field. 403 The value that HW (OLE) will insert is dependent on the 404 setting in the 'sequence_control_source' field 405 406 <enum 1 mask_enable>: HW is not allowed to update the contents 407 of this field. 408 409 <legal all> 410 */ 411 412 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_MASK_OFFSET 0x0000000000000000 413 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_MASK_LSB 9 414 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_MASK_MSB 9 415 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_MASK_MASK 0x0000000000000200 416 417 418 /* Description QC_TID_MASK 419 420 Consumer: TXOLE 421 Producer: SW 422 423 Field only valid for MPDU frames with MSDU enc_type == RAW 424 or Native WiFi 425 426 Note: 427 When enc_type != RAW or Native WiFi, OLE will base the value 428 for this field on the qos_ctl field from the MPDU_queue_ext 429 data structure. 430 431 <enum 0 mask_disable>: HW is allowed to update this field. 432 The value that HW (OLE) will insert is the given in field: 433 qc_tid_setting. 434 435 <enum 1 mask_enable>: HW is not allowed to update the contents 436 of this field. 437 438 <legal all> 439 */ 440 441 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_MASK_OFFSET 0x0000000000000000 442 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_MASK_LSB 10 443 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_MASK_MSB 10 444 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_MASK_MASK 0x0000000000000400 445 446 447 /* Description QC_EOSP_MASK 448 449 Consumer: TXOLE 450 Producer: SW 451 452 Field only valid for MPDU frames with MSDU enc_type == RAW 453 or Native WiFi 454 455 Note: 456 When enc_type != RAW or Native WiFi, OLE will base the value 457 for this field on the qos_ctl field from the MPDU_queue_ext 458 data structure. 459 460 TX_PCU has the abilty of overwrite the QoS eosp field, based 461 on the Set_fc_more_data field in the PPDU_SS_... TLVs given 462 by PDG. 463 464 <enum 0 mask_disable>: HW is allowed to update the QoS eosp 465 field. The value that HW (OLE) will insert is the given 466 in field: qc_eosp_setting. 467 468 <enum 1 mask_enable>: HW is not allowed to update the contents 469 of this field. 470 471 <legal all> 472 473 In 11ah mode of Operation, same description as above applies 474 if this field is a part of FC field of the MPDU. 475 */ 476 477 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_MASK_OFFSET 0x0000000000000000 478 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_MASK_LSB 11 479 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_MASK_MSB 11 480 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_MASK_MASK 0x0000000000000800 481 482 483 /* Description QC_ACK_POLICY_MASK 484 485 Consumer: TXOLE 486 Producer: SW 487 488 Field only valid for MPDU frames with MSDU enc_type == RAW 489 or Native WiFi 490 491 Note: 492 When enc_type != RAW or Native WiFi, OLE will base the value 493 for this field on the qos_ctl field from the MPDU_queue_ext 494 data structure. 495 496 <enum 0 mask_disable>: HW is allowed to update the QoS ack 497 policy field. The value that HW (OLE) will insert is determined 498 by field: qc_ack_policy_setting. 499 500 <enum 1 mask_enable>: HW is not allowed to update the contents 501 of this field. 502 503 <legal all> 504 */ 505 506 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_MASK_OFFSET 0x0000000000000000 507 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_MASK_LSB 12 508 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_MASK_MSB 12 509 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_MASK_MASK 0x0000000000001000 510 511 512 /* Description QC_AMSDU_MASK 513 514 Consumer: TXOLE 515 Producer: SW 516 517 Field only valid for MPDU frames with MSDU enc_type == RAW 518 or Native WiFi 519 520 Note: 521 When enc_type != RAW or Native WiFi, OLE will base the value 522 for this field on the qos_ctl field from the MPDU_queue_ext 523 data structure. 524 525 <enum 0 mask_disable>: HW is allowed to update the QoS amsdu 526 field. The value that HW (OLE) will insert is determined 527 by field: qc_amsdu_setting. 528 529 <enum 1 mask_enable>: HW is not allowed to update the contents 530 of this field. 531 532 <legal all> 533 */ 534 535 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_MASK_OFFSET 0x0000000000000000 536 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_MASK_LSB 13 537 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_MASK_MSB 13 538 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_MASK_MASK 0x0000000000002000 539 540 541 /* Description RESERVED_0A 542 543 <legal 0> 544 */ 545 546 #define TX_RAW_OR_NATIVE_FRAME_SETUP_RESERVED_0A_OFFSET 0x0000000000000000 547 #define TX_RAW_OR_NATIVE_FRAME_SETUP_RESERVED_0A_LSB 14 548 #define TX_RAW_OR_NATIVE_FRAME_SETUP_RESERVED_0A_MSB 14 549 #define TX_RAW_OR_NATIVE_FRAME_SETUP_RESERVED_0A_MASK 0x0000000000004000 550 551 552 /* Description QC_15TO8_MASK 553 554 Consumer: TXOLE 555 Producer: SW 556 557 Field only valid for MPDU frames with MSDU enc_type == RAW 558 or Native WiFi 559 560 Note: 561 When enc_type != RAW or Native WiFi, OLE will base the value 562 for this field on the qos_ctl field from the MPDU_queue_ext 563 data structure. 564 565 <enum 0 mask_disable>: HW is allowed to update the QoS control 566 field, bits 15-8. The value that HW (OLE) will insert is 567 determined by field: qc_15to8_setting. 568 569 <enum 1 mask_enable>: HW is not allowed to update the contents 570 of this field. 571 572 <legal all> 573 */ 574 575 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_MASK_OFFSET 0x0000000000000000 576 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_MASK_LSB 15 577 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_MASK_MSB 15 578 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_MASK_MASK 0x0000000000008000 579 580 581 /* Description IV_MASK 582 583 Consumer: TXOLE 584 Producer: SW 585 586 Field only valid for MPDU frames with MSDU enc_type == RAW 587 or Native WiFi 588 589 Note: 590 When enc_type != RAW or Native WiFi, OLE will base the IV 591 field insertion/value on the on the encryption type indicate 592 with the key_type setting in the peer entry 593 594 <enum 0 mask_disable>: OLE is allowed to overwrite the IV 595 field, in case key_type setting in the peer entry indicates 596 some encryption. 597 598 <enum 1 mask_enable>: OLE is not allowed to overwrite any 599 of the IV field contents. 600 <legal all> 601 */ 602 603 #define TX_RAW_OR_NATIVE_FRAME_SETUP_IV_MASK_OFFSET 0x0000000000000000 604 #define TX_RAW_OR_NATIVE_FRAME_SETUP_IV_MASK_LSB 16 605 #define TX_RAW_OR_NATIVE_FRAME_SETUP_IV_MASK_MSB 16 606 #define TX_RAW_OR_NATIVE_FRAME_SETUP_IV_MASK_MASK 0x0000000000010000 607 608 609 /* Description FC_TO_DS_SETTING 610 611 Consumer: TXOLE 612 Producer: SW 613 614 Field only valid for MSDU frames with enc_type == RAW or 615 Native WiFi. 616 Field only valid when field Fc_to_ds_mask is not set. 617 618 <enum 0 clear>: OLE will set the frame control field, to 619 ds bit to 0 620 <enum 1 set>: OLE will set the frame control field, to ds 621 bit to 1 622 <legal all> 623 */ 624 625 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_SETTING_OFFSET 0x0000000000000000 626 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_SETTING_LSB 17 627 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_SETTING_MSB 17 628 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_TO_DS_SETTING_MASK 0x0000000000020000 629 630 631 /* Description FC_FROM_DS_SETTING 632 633 Consumer: TXOLE 634 Producer: SW 635 636 Field only valid for MSDU frames with enc_type == RAW or 637 Native WiFi. 638 Field only valid when field Fc_from_ds_mask is not set. 639 640 <enum 0 clear>: OLE will set the frame control field, from 641 ds bit to 0 642 <enum 1 set>: OLE will set the frame control field, from 643 ds bit to 1 644 <legal all> 645 */ 646 647 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_SETTING_OFFSET 0x0000000000000000 648 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_SETTING_LSB 18 649 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_SETTING_MSB 18 650 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_FROM_DS_SETTING_MASK 0x0000000000040000 651 652 653 /* Description FC_MORE_FRAG_SETTING 654 655 Consumer: TXOLE 656 Producer: SW 657 658 Field only valid for MSDU frames with enc_type == RAW or 659 Native WiFi. 660 Field only valid when field Fc_more_frag_mask is not set. 661 662 663 <enum 0 clear>: OLE will set the frame control field, more 664 frag bit to 0 665 <enum 1 set>: OLE will set the frame control field, more 666 frag bit to 1 667 <legal all> 668 */ 669 670 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_SETTING_OFFSET 0x0000000000000000 671 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_SETTING_LSB 19 672 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_SETTING_MSB 19 673 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_FRAG_SETTING_MASK 0x0000000000080000 674 675 676 /* Description FC_RETRY_SETTING 677 678 Consumer: TXOLE 679 Producer: SW 680 681 Field only valid for MSDU frames with enc_type == RAW or 682 Native WiFi. 683 Field only valid when field Fc_retry_mask is not set. 684 685 <enum 0 fc_retry_clear>: OLE will set the frame control 686 field, retry bit to 0 687 <enum 1 fc_retry_set>: OLE will set the frame control field, 688 retry bit to 1 689 <enum 2 fc_retry_bimap_based>: OLE will base the setting 690 for this field on the retry_bitmap_31_0 and retry_bitmap_63_32 691 fields in the MPDU_queue_extension descriptor 692 693 <legal 0-2> 694 */ 695 696 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_SETTING_OFFSET 0x0000000000000000 697 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_SETTING_LSB 20 698 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_SETTING_MSB 21 699 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_RETRY_SETTING_MASK 0x0000000000300000 700 701 702 /* Description FC_PWR_MGT_SETTING 703 704 Field only valid for MSDU frames with enc_type == RAW or 705 Native WiFi. 706 Field only valid when field Fc_pwr_mgt_mask is not set. 707 708 <enum 0 clear>: OLE will set the frame control field, pwr_mgt 709 bit to 0 710 <enum 1 set>: OLE will set the frame control field, pwr_mgt 711 bit to 1 712 <legal all> 713 */ 714 715 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_SETTING_OFFSET 0x0000000000000000 716 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_SETTING_LSB 22 717 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_SETTING_MSB 22 718 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PWR_MGT_SETTING_MASK 0x0000000000400000 719 720 721 /* Description FC_MORE_DATA_SETTING 722 723 Consumer: TXOLE 724 Producer: SW 725 726 Field only valid for MSDU frames with enc_type == RAW or 727 Native WiFi. 728 Field only valid when field Fc_more_Data_mask is not set. 729 730 731 <enum 0 fc_more_data_clear>: OLE will set the frame control 732 field, More data bit to 0 733 <enum 1 fc_more_data_set>: OLE will set the frame control 734 field, More data bit to 1 735 736 <enum 2 fc_more_data_pdg_based>: OLE will set the Frame 737 control, More data bit to 0, but TX_PCU has the abilty to 738 overwrite this based on the Set_fc_more_data field in the 739 PPDU_SS_... TLVs given by PDG. 740 741 <legal 0-2> 742 */ 743 744 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_SETTING_OFFSET 0x0000000000000000 745 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_SETTING_LSB 23 746 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_SETTING_MSB 24 747 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_MORE_DATA_SETTING_MASK 0x0000000001800000 748 749 750 /* Description FC_PROT_FRAME_SETTING 751 752 Consumer: TXOLE 753 Producer: SW 754 755 Field only valid for MSDU frames with enc_type == RAW or 756 Native WiFi. 757 Field only valid when field Fc_prot_frame_mask is not set. 758 759 760 <enum 0 fc_prot_frame_clear>: OLE will set the frame control 761 field , "Protected Frame" bit to 0 762 <enum 1 fc_prot_frame_set>: OLE will set the frame control 763 field , "Protected Frame" bit to 1 764 <enum 2 fc_prot_frame_encap_type_based>: OLE configures 765 the Frame Control field, Prot frame bit according to the 766 following rule: 767 When the encryption type indicated with the key_type setting 768 in the peer entry is set to no crypto, the Frame control 769 "Protected Frame" bit is set to 0. 770 When the encryption type indicated with the key_type setting 771 in the peer entry is set to some encryption type, the OLE 772 will set the frame control "Protected Frame" bit to 1. 773 OLE changes only the value of the prot_frame bit. It won't 774 push IV in the frame according to this bit. 775 776 <legal 0-2> 777 */ 778 779 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_SETTING_OFFSET 0x0000000000000000 780 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_SETTING_LSB 25 781 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_SETTING_MSB 26 782 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_PROT_FRAME_SETTING_MASK 0x0000000006000000 783 784 785 /* Description FC_ORDER_SETTING 786 787 Consumer: TXOLE 788 Producer: SW 789 790 Field only valid for MSDU frames with enc_type == RAW or 791 Native WiFi. 792 Field only valid when field Fc_order_mask is not set. 793 794 <enum 0 clear>: OLE will set the frame control field , order 795 bit to 0 796 <enum 1 set>: OLE will set the frame control field , order 797 bit to 1 798 <legal all> 799 */ 800 801 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_SETTING_OFFSET 0x0000000000000000 802 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_SETTING_LSB 27 803 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_SETTING_MSB 27 804 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FC_ORDER_SETTING_MASK 0x0000000008000000 805 806 807 /* Description QC_TID_SETTING 808 809 Consumer: TXOLE 810 Producer: SW 811 812 Field only valid for MSDU frames with enc_type == RAW or 813 Native WiFi. 814 Field only valid when field Qc_tid_mask is not set. 815 816 OLE sets the TID field in the QoS control field to this 817 value. 818 819 <legal all> 820 */ 821 822 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_SETTING_OFFSET 0x0000000000000000 823 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_SETTING_LSB 28 824 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_SETTING_MSB 31 825 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_TID_SETTING_MASK 0x00000000f0000000 826 827 828 /* Description QC_EOSP_SETTING 829 830 Consumer: TXOLE 831 Producer: SW 832 833 Field only valid for MSDU frames with enc_type == RAW or 834 Native WiFi. 835 Field only valid when field Qc_eosp_mask is not set. 836 837 <enum 0 qc_eosp_clear>: OLE will set the QoS control bit 838 to 0 839 <enum 1 qc_eosp_set>: OLE will set the QoS control bit to 840 1 841 <enum 2 qc_eosp_pdg_based>: OLE will set the QoS control 842 bit to 0, but TX_PCU has the abilty of overwrite the QoS 843 eosp field, based on the Set_fc_more_data field in the 844 PPDU_SS_... TLVs given by PDG. 845 846 <legal 0-2> 847 */ 848 849 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_SETTING_OFFSET 0x0000000000000000 850 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_SETTING_LSB 32 851 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_SETTING_MSB 33 852 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_EOSP_SETTING_MASK 0x0000000300000000 853 854 855 /* Description QC_ACK_POLICY_SETTING 856 857 Consumer: TXOLE 858 Producer: SW 859 860 Field only valid for MSDU frames with enc_type == RAW or 861 Native WiFi. 862 Field only valid when field Qc_ack_policy_mask is not set. 863 864 865 This is is QoS ACK policy value that RXOLE shall put in 866 the ACK policy field in the QoS control field 867 868 <legal all> 869 */ 870 871 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_SETTING_OFFSET 0x0000000000000000 872 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_SETTING_LSB 34 873 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_SETTING_MSB 35 874 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_ACK_POLICY_SETTING_MASK 0x0000000c00000000 875 876 877 /* Description QC_AMSDU_SETTING 878 879 Consumer: TXOLE 880 Producer: SW 881 882 Field only valid for MSDU frames with enc_type == RAW or 883 Native WiFi. 884 Field only valid when field Qc_amsdu_mask is not set. 885 886 <enum 0 clear>: OLE will set the QoS control field amsdu 887 bit to 0 888 <enum 1 set>: OLE will set the QoS control field amsdu bit 889 to 1 890 891 <legal all> 892 */ 893 894 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_SETTING_OFFSET 0x0000000000000000 895 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_SETTING_LSB 36 896 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_SETTING_MSB 36 897 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_AMSDU_SETTING_MASK 0x0000001000000000 898 899 900 /* Description QC_15TO8_SETTING 901 902 Consumer: TXOLE 903 Producer: SW 904 905 Field only valid for MSDU frames with enc_type == RAW or 906 Native WiFi. 907 Field only valid when field Qc_15to8_mask is not set. 908 909 OLE sets bit 8 to 16 in the QoS control field to this value. 910 911 912 <legal all> 913 */ 914 915 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_SETTING_OFFSET 0x0000000000000000 916 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_SETTING_LSB 37 917 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_SETTING_MSB 44 918 #define TX_RAW_OR_NATIVE_FRAME_SETUP_QC_15TO8_SETTING_MASK 0x00001fe000000000 919 920 921 /* Description MLO_ADDR_OVERRIDE 922 923 Consumer: TXOLE 924 Producer: SW 925 926 Field only valid for MSDU frames with enc_type == RAW or 927 Native WiFi. 928 929 Enables address translation for raw Wi-Fi frames to multi-link 930 peers, esp. management frames 931 <legal all> 932 */ 933 934 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_ADDR_OVERRIDE_OFFSET 0x0000000000000000 935 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_ADDR_OVERRIDE_LSB 45 936 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_ADDR_OVERRIDE_MSB 45 937 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_ADDR_OVERRIDE_MASK 0x0000200000000000 938 939 940 /* Description MLO_IGNORE_ADDR3_OVERRIDE 941 942 Consumer: TXOLE 943 Producer: SW 944 945 Field only valid for MSDU frames with enc_type == RAW or 946 Native WiFi when Mlo_addr_override is set. 947 948 Preserves Address3 (BSSID) for raw Wi-Fi management frames 949 to multi-link peers. 950 951 <legal all> 952 */ 953 954 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_IGNORE_ADDR3_OVERRIDE_OFFSET 0x0000000000000000 955 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_IGNORE_ADDR3_OVERRIDE_LSB 46 956 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_IGNORE_ADDR3_OVERRIDE_MSB 46 957 #define TX_RAW_OR_NATIVE_FRAME_SETUP_MLO_IGNORE_ADDR3_OVERRIDE_MASK 0x0000400000000000 958 959 960 /* Description SEQUENCE_CONTROL_SOURCE 961 962 Field only valid when field Sequence_control_mask is set 963 to 'mask_disable'. 964 965 <enum 0 seq_ctrl_source_mpdu_start>: OLE will set the sequence 966 control field based on what is indicated in the TX_MPDU_START 967 TLV. 968 969 <enum 1 seq_ctrl_source_this_tlv>: OLE will set the sequence 970 control field based on what is indicated in this TLV, fields 971 Fragment_number and Sequence_number 972 Note that this setting assumes that there is only a single 973 RAW or Native Wifi MPDU for this user in the transmit path. 974 This works well for level 1 fragmentation. Reason that there 975 should only be a single RAW or Native WiFi frames is that 976 with this feature they would all get the same sequence + 977 fragment number 978 979 <legal 0-1> 980 */ 981 982 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_SOURCE_OFFSET 0x0000000000000000 983 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_SOURCE_LSB 47 984 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_SOURCE_MSB 47 985 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_CONTROL_SOURCE_MASK 0x0000800000000000 986 987 988 /* Description FRAGMENT_NUMBER 989 990 Consumer: TXOLE 991 Producer: SW 992 993 Field only valid for MSDU frames with enc_type == RAW or 994 Native WiFi. 995 996 Field only valid when field Sequence_control_mask = mask_disable 997 AND sequence_control_source is set to seq_ctrl_source_this_tlv 998 999 1000 The Fragment number to be filled in 1001 <legal all> 1002 */ 1003 1004 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FRAGMENT_NUMBER_OFFSET 0x0000000000000000 1005 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FRAGMENT_NUMBER_LSB 48 1006 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FRAGMENT_NUMBER_MSB 51 1007 #define TX_RAW_OR_NATIVE_FRAME_SETUP_FRAGMENT_NUMBER_MASK 0x000f000000000000 1008 1009 1010 /* Description SEQUENCE_NUMBER 1011 1012 Consumer: TXOLE 1013 Producer: SW 1014 1015 Field only valid for MSDU frames with enc_type == RAW or 1016 Native WiFi. 1017 1018 Field only valid when field Sequence_control_mask = mask_disable 1019 AND sequence_control_source is set to seq_ctrl_source_this_tlv 1020 1021 1022 The Sequence number to be filled in 1023 <legal all> 1024 */ 1025 1026 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_NUMBER_OFFSET 0x0000000000000000 1027 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_NUMBER_LSB 52 1028 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_NUMBER_MSB 63 1029 #define TX_RAW_OR_NATIVE_FRAME_SETUP_SEQUENCE_NUMBER_MASK 0xfff0000000000000 1030 1031 1032 1033 #endif // TX_RAW_OR_NATIVE_FRAME_SETUP 1034