1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _U_SIG_EHT_TB_INFO_H_ 27 #define _U_SIG_EHT_TB_INFO_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_DWORDS_U_SIG_EHT_TB_INFO 2 32 33 34 struct u_sig_eht_tb_info { 35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 36 uint32_t phy_version : 3, // [2:0] 37 transmit_bw : 3, // [5:3] 38 dl_ul_flag : 1, // [6:6] 39 bss_color_id : 6, // [12:7] 40 txop_duration : 7, // [19:13] 41 disregard_0a : 6, // [25:20] 42 reserved_0c : 6; // [31:26] 43 uint32_t eht_ppdu_sig_cmn_type : 2, // [1:0] 44 validate_1a : 1, // [2:2] 45 spatial_reuse : 8, // [10:3] 46 disregard_1b : 5, // [15:11] 47 crc : 4, // [19:16] 48 tail : 6, // [25:20] 49 reserved_1c : 5, // [30:26] 50 rx_integrity_check_passed : 1; // [31:31] 51 #else 52 uint32_t reserved_0c : 6, // [31:26] 53 disregard_0a : 6, // [25:20] 54 txop_duration : 7, // [19:13] 55 bss_color_id : 6, // [12:7] 56 dl_ul_flag : 1, // [6:6] 57 transmit_bw : 3, // [5:3] 58 phy_version : 3; // [2:0] 59 uint32_t rx_integrity_check_passed : 1, // [31:31] 60 reserved_1c : 5, // [30:26] 61 tail : 6, // [25:20] 62 crc : 4, // [19:16] 63 disregard_1b : 5, // [15:11] 64 spatial_reuse : 8, // [10:3] 65 validate_1a : 1, // [2:2] 66 eht_ppdu_sig_cmn_type : 2; // [1:0] 67 #endif 68 }; 69 70 71 /* Description PHY_VERSION 72 73 <enum 0 U_SIG_VERSION_EHT> 74 Values 1 - 7 are reserved. 75 <legal 0> 76 */ 77 78 #define U_SIG_EHT_TB_INFO_PHY_VERSION_OFFSET 0x00000000 79 #define U_SIG_EHT_TB_INFO_PHY_VERSION_LSB 0 80 #define U_SIG_EHT_TB_INFO_PHY_VERSION_MSB 2 81 #define U_SIG_EHT_TB_INFO_PHY_VERSION_MASK 0x00000007 82 83 84 /* Description TRANSMIT_BW 85 86 Bandwidth of the PPDU, as indicated in the trigger frame 87 88 89 <enum 0 U_SIG_BW20> 20 MHz 90 <enum 1 U_SIG_BW40> 40 MHz 91 <enum 2 U_SIG_BW80> 80 MHz 92 <enum 3 U_SIG_BW160> 160 MHz 93 <enum 4 U_SIG_BW320> 320 MHz channelization scheme 1 94 <enum 5 U_SIG_BW320_2> 320 MHz channelization scheme 2 95 96 On RX side, field used by MAC HW 97 <legal all> 98 */ 99 100 #define U_SIG_EHT_TB_INFO_TRANSMIT_BW_OFFSET 0x00000000 101 #define U_SIG_EHT_TB_INFO_TRANSMIT_BW_LSB 3 102 #define U_SIG_EHT_TB_INFO_TRANSMIT_BW_MSB 5 103 #define U_SIG_EHT_TB_INFO_TRANSMIT_BW_MASK 0x00000038 104 105 106 /* Description DL_UL_FLAG 107 108 Differentiates between DL and UL transmission 109 110 <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS> 111 <enum 1 DL_UL_FLAG_IS_UL> 112 <legal all> 113 */ 114 115 #define U_SIG_EHT_TB_INFO_DL_UL_FLAG_OFFSET 0x00000000 116 #define U_SIG_EHT_TB_INFO_DL_UL_FLAG_LSB 6 117 #define U_SIG_EHT_TB_INFO_DL_UL_FLAG_MSB 6 118 #define U_SIG_EHT_TB_INFO_DL_UL_FLAG_MASK 0x00000040 119 120 121 /* Description BSS_COLOR_ID 122 123 BSS color ID 124 125 Field used by MAC HW 126 <legal all> 127 */ 128 129 #define U_SIG_EHT_TB_INFO_BSS_COLOR_ID_OFFSET 0x00000000 130 #define U_SIG_EHT_TB_INFO_BSS_COLOR_ID_LSB 7 131 #define U_SIG_EHT_TB_INFO_BSS_COLOR_ID_MSB 12 132 #define U_SIG_EHT_TB_INFO_BSS_COLOR_ID_MASK 0x00001f80 133 134 135 /* Description TXOP_DURATION 136 137 Indicates the remaining time in the current TXOP 138 139 Field used by MAC HW 140 <legal all> 141 */ 142 143 #define U_SIG_EHT_TB_INFO_TXOP_DURATION_OFFSET 0x00000000 144 #define U_SIG_EHT_TB_INFO_TXOP_DURATION_LSB 13 145 #define U_SIG_EHT_TB_INFO_TXOP_DURATION_MSB 19 146 #define U_SIG_EHT_TB_INFO_TXOP_DURATION_MASK 0x000fe000 147 148 149 /* Description DISREGARD_0A 150 151 Set to value indicated in the trigger frame 152 <legal all> 153 */ 154 155 #define U_SIG_EHT_TB_INFO_DISREGARD_0A_OFFSET 0x00000000 156 #define U_SIG_EHT_TB_INFO_DISREGARD_0A_LSB 20 157 #define U_SIG_EHT_TB_INFO_DISREGARD_0A_MSB 25 158 #define U_SIG_EHT_TB_INFO_DISREGARD_0A_MASK 0x03f00000 159 160 161 /* Description RESERVED_0C 162 163 <legal 0> 164 */ 165 166 #define U_SIG_EHT_TB_INFO_RESERVED_0C_OFFSET 0x00000000 167 #define U_SIG_EHT_TB_INFO_RESERVED_0C_LSB 26 168 #define U_SIG_EHT_TB_INFO_RESERVED_0C_MSB 31 169 #define U_SIG_EHT_TB_INFO_RESERVED_0C_MASK 0xfc000000 170 171 172 /* Description EHT_PPDU_SIG_CMN_TYPE 173 174 <enum 3 EHT_PPDU_SIG_rsvd> DO NOT USE 175 <enum 0 EHT_PPDU_SIG_TB_or_DL_OFDMA> Need to look at both 176 EHT-SIG content channels for DL OFDMA (including OFDMA+MU-MIMO) 177 178 <enum 2 EHT_PPDU_SIG_DL_MU_MIMO> Need to look at both EHT-SIG 179 content channels 180 <enum 1 EHT_PPDU_SIG_SU> Need to look at only one EHT-SIG 181 content channel 182 <legal all> 183 */ 184 185 #define U_SIG_EHT_TB_INFO_EHT_PPDU_SIG_CMN_TYPE_OFFSET 0x00000004 186 #define U_SIG_EHT_TB_INFO_EHT_PPDU_SIG_CMN_TYPE_LSB 0 187 #define U_SIG_EHT_TB_INFO_EHT_PPDU_SIG_CMN_TYPE_MSB 1 188 #define U_SIG_EHT_TB_INFO_EHT_PPDU_SIG_CMN_TYPE_MASK 0x00000003 189 190 191 /* Description VALIDATE_1A 192 193 Set to value indicated in the trigger frame 194 <legal 1> 195 */ 196 197 #define U_SIG_EHT_TB_INFO_VALIDATE_1A_OFFSET 0x00000004 198 #define U_SIG_EHT_TB_INFO_VALIDATE_1A_LSB 2 199 #define U_SIG_EHT_TB_INFO_VALIDATE_1A_MSB 2 200 #define U_SIG_EHT_TB_INFO_VALIDATE_1A_MASK 0x00000004 201 202 203 /* Description SPATIAL_REUSE 204 205 TODO: Placeholder 206 <legal all> 207 */ 208 209 #define U_SIG_EHT_TB_INFO_SPATIAL_REUSE_OFFSET 0x00000004 210 #define U_SIG_EHT_TB_INFO_SPATIAL_REUSE_LSB 3 211 #define U_SIG_EHT_TB_INFO_SPATIAL_REUSE_MSB 10 212 #define U_SIG_EHT_TB_INFO_SPATIAL_REUSE_MASK 0x000007f8 213 214 215 /* Description DISREGARD_1B 216 217 Set to value indicated in the trigger frame 218 <legal all> 219 */ 220 221 #define U_SIG_EHT_TB_INFO_DISREGARD_1B_OFFSET 0x00000004 222 #define U_SIG_EHT_TB_INFO_DISREGARD_1B_LSB 11 223 #define U_SIG_EHT_TB_INFO_DISREGARD_1B_MSB 15 224 #define U_SIG_EHT_TB_INFO_DISREGARD_1B_MASK 0x0000f800 225 226 227 /* Description CRC 228 229 CRC for U-SIG contents 230 <legal all> 231 */ 232 233 #define U_SIG_EHT_TB_INFO_CRC_OFFSET 0x00000004 234 #define U_SIG_EHT_TB_INFO_CRC_LSB 16 235 #define U_SIG_EHT_TB_INFO_CRC_MSB 19 236 #define U_SIG_EHT_TB_INFO_CRC_MASK 0x000f0000 237 238 239 /* Description TAIL 240 241 <legal 0> 242 */ 243 244 #define U_SIG_EHT_TB_INFO_TAIL_OFFSET 0x00000004 245 #define U_SIG_EHT_TB_INFO_TAIL_LSB 20 246 #define U_SIG_EHT_TB_INFO_TAIL_MSB 25 247 #define U_SIG_EHT_TB_INFO_TAIL_MASK 0x03f00000 248 249 250 /* Description RESERVED_1C 251 252 <legal 0> 253 */ 254 255 #define U_SIG_EHT_TB_INFO_RESERVED_1C_OFFSET 0x00000004 256 #define U_SIG_EHT_TB_INFO_RESERVED_1C_LSB 26 257 #define U_SIG_EHT_TB_INFO_RESERVED_1C_MSB 30 258 #define U_SIG_EHT_TB_INFO_RESERVED_1C_MASK 0x7c000000 259 260 261 /* Description RX_INTEGRITY_CHECK_PASSED 262 263 TX side: Set to 0 264 RX side: Set to 1 if PHY determines the U-SIG CRC check 265 has passed, else set to 0 266 267 <legal all> 268 */ 269 270 #define U_SIG_EHT_TB_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x00000004 271 #define U_SIG_EHT_TB_INFO_RX_INTEGRITY_CHECK_PASSED_LSB 31 272 #define U_SIG_EHT_TB_INFO_RX_INTEGRITY_CHECK_PASSED_MSB 31 273 #define U_SIG_EHT_TB_INFO_RX_INTEGRITY_CHECK_PASSED_MASK 0x80000000 274 275 276 277 #endif // U_SIG_EHT_TB_INFO 278