1 2 /* 3 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 4 * SPDX-License-Identifier: ISC 5 */ 6 7 8 9 10 11 12 13 14 15 16 17 18 19 #ifndef _PDG_RESPONSE_RATE_SETTING_H_ 20 #define _PDG_RESPONSE_RATE_SETTING_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #include "mlo_sta_id_details.h" 25 #define NUM_OF_DWORDS_PDG_RESPONSE_RATE_SETTING 7 26 27 28 struct pdg_response_rate_setting { 29 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 30 uint32_t reserved_0a : 1, 31 tx_antenna_sector_ctrl : 24, 32 pkt_type : 4, 33 smoothing : 1, 34 ldpc : 1, 35 stbc : 1; 36 uint32_t alt_tx_pwr : 8, 37 alt_min_tx_pwr : 8, 38 alt_nss : 3, 39 alt_tx_chain_mask : 8, 40 alt_bw : 3, 41 stf_ltf_3db_boost : 1, 42 force_extra_symbol : 1; 43 uint32_t alt_rate_mcs : 4, 44 nss : 3, 45 dpd_enable : 1, 46 tx_pwr : 8, 47 min_tx_pwr : 8, 48 tx_chain_mask : 8; 49 uint32_t reserved_3a : 8, 50 sgi : 2, 51 rate_mcs : 4, 52 reserved_3b : 2, 53 tx_pwr_1 : 8, 54 alt_tx_pwr_1 : 8; 55 uint32_t aggregation : 1, 56 dot11ax_bss_color_id : 6, 57 dot11ax_spatial_reuse : 4, 58 dot11ax_cp_ltf_size : 2, 59 dot11ax_dcm : 1, 60 dot11ax_doppler_indication : 1, 61 dot11ax_su_extended : 1, 62 dot11ax_min_packet_extension : 2, 63 dot11ax_pe_nss : 3, 64 dot11ax_pe_content : 1, 65 dot11ax_pe_ltf_size : 2, 66 dot11ax_chain_csd_en : 1, 67 dot11ax_pe_chain_csd_en : 1, 68 dot11ax_dl_ul_flag : 1, 69 reserved_4a : 5; 70 uint32_t dot11ax_ext_ru_start_index : 4, 71 dot11ax_ext_ru_size : 4, 72 eht_duplicate_mode : 2, 73 he_sigb_dcm : 1, 74 he_sigb_0_mcs : 3, 75 num_he_sigb_sym : 5, 76 required_response_time_source : 1, 77 reserved_5a : 6, 78 u_sig_puncture_pattern_encoding : 6; 79 struct mlo_sta_id_details mlo_sta_id_details_rx; 80 uint16_t required_response_time : 12, 81 dot11be_params_placeholder : 4; 82 #else 83 uint32_t stbc : 1, 84 ldpc : 1, 85 smoothing : 1, 86 pkt_type : 4, 87 tx_antenna_sector_ctrl : 24, 88 reserved_0a : 1; 89 uint32_t force_extra_symbol : 1, 90 stf_ltf_3db_boost : 1, 91 alt_bw : 3, 92 alt_tx_chain_mask : 8, 93 alt_nss : 3, 94 alt_min_tx_pwr : 8, 95 alt_tx_pwr : 8; 96 uint32_t tx_chain_mask : 8, 97 min_tx_pwr : 8, 98 tx_pwr : 8, 99 dpd_enable : 1, 100 nss : 3, 101 alt_rate_mcs : 4; 102 uint32_t alt_tx_pwr_1 : 8, 103 tx_pwr_1 : 8, 104 reserved_3b : 2, 105 rate_mcs : 4, 106 sgi : 2, 107 reserved_3a : 8; 108 uint32_t reserved_4a : 5, 109 dot11ax_dl_ul_flag : 1, 110 dot11ax_pe_chain_csd_en : 1, 111 dot11ax_chain_csd_en : 1, 112 dot11ax_pe_ltf_size : 2, 113 dot11ax_pe_content : 1, 114 dot11ax_pe_nss : 3, 115 dot11ax_min_packet_extension : 2, 116 dot11ax_su_extended : 1, 117 dot11ax_doppler_indication : 1, 118 dot11ax_dcm : 1, 119 dot11ax_cp_ltf_size : 2, 120 dot11ax_spatial_reuse : 4, 121 dot11ax_bss_color_id : 6, 122 aggregation : 1; 123 uint32_t u_sig_puncture_pattern_encoding : 6, 124 reserved_5a : 6, 125 required_response_time_source : 1, 126 num_he_sigb_sym : 5, 127 he_sigb_0_mcs : 3, 128 he_sigb_dcm : 1, 129 eht_duplicate_mode : 2, 130 dot11ax_ext_ru_size : 4, 131 dot11ax_ext_ru_start_index : 4; 132 uint32_t dot11be_params_placeholder : 4, 133 required_response_time : 12; 134 struct mlo_sta_id_details mlo_sta_id_details_rx; 135 #endif 136 }; 137 138 139 140 141 #define PDG_RESPONSE_RATE_SETTING_RESERVED_0A_OFFSET 0x00000000 142 #define PDG_RESPONSE_RATE_SETTING_RESERVED_0A_LSB 0 143 #define PDG_RESPONSE_RATE_SETTING_RESERVED_0A_MSB 0 144 #define PDG_RESPONSE_RATE_SETTING_RESERVED_0A_MASK 0x00000001 145 146 147 148 149 #define PDG_RESPONSE_RATE_SETTING_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x00000000 150 #define PDG_RESPONSE_RATE_SETTING_TX_ANTENNA_SECTOR_CTRL_LSB 1 151 #define PDG_RESPONSE_RATE_SETTING_TX_ANTENNA_SECTOR_CTRL_MSB 24 152 #define PDG_RESPONSE_RATE_SETTING_TX_ANTENNA_SECTOR_CTRL_MASK 0x01fffffe 153 154 155 156 157 #define PDG_RESPONSE_RATE_SETTING_PKT_TYPE_OFFSET 0x00000000 158 #define PDG_RESPONSE_RATE_SETTING_PKT_TYPE_LSB 25 159 #define PDG_RESPONSE_RATE_SETTING_PKT_TYPE_MSB 28 160 #define PDG_RESPONSE_RATE_SETTING_PKT_TYPE_MASK 0x1e000000 161 162 163 164 165 #define PDG_RESPONSE_RATE_SETTING_SMOOTHING_OFFSET 0x00000000 166 #define PDG_RESPONSE_RATE_SETTING_SMOOTHING_LSB 29 167 #define PDG_RESPONSE_RATE_SETTING_SMOOTHING_MSB 29 168 #define PDG_RESPONSE_RATE_SETTING_SMOOTHING_MASK 0x20000000 169 170 171 172 173 #define PDG_RESPONSE_RATE_SETTING_LDPC_OFFSET 0x00000000 174 #define PDG_RESPONSE_RATE_SETTING_LDPC_LSB 30 175 #define PDG_RESPONSE_RATE_SETTING_LDPC_MSB 30 176 #define PDG_RESPONSE_RATE_SETTING_LDPC_MASK 0x40000000 177 178 179 180 181 #define PDG_RESPONSE_RATE_SETTING_STBC_OFFSET 0x00000000 182 #define PDG_RESPONSE_RATE_SETTING_STBC_LSB 31 183 #define PDG_RESPONSE_RATE_SETTING_STBC_MSB 31 184 #define PDG_RESPONSE_RATE_SETTING_STBC_MASK 0x80000000 185 186 187 188 189 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_OFFSET 0x00000004 190 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_LSB 0 191 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_MSB 7 192 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_MASK 0x000000ff 193 194 195 196 197 #define PDG_RESPONSE_RATE_SETTING_ALT_MIN_TX_PWR_OFFSET 0x00000004 198 #define PDG_RESPONSE_RATE_SETTING_ALT_MIN_TX_PWR_LSB 8 199 #define PDG_RESPONSE_RATE_SETTING_ALT_MIN_TX_PWR_MSB 15 200 #define PDG_RESPONSE_RATE_SETTING_ALT_MIN_TX_PWR_MASK 0x0000ff00 201 202 203 204 205 #define PDG_RESPONSE_RATE_SETTING_ALT_NSS_OFFSET 0x00000004 206 #define PDG_RESPONSE_RATE_SETTING_ALT_NSS_LSB 16 207 #define PDG_RESPONSE_RATE_SETTING_ALT_NSS_MSB 18 208 #define PDG_RESPONSE_RATE_SETTING_ALT_NSS_MASK 0x00070000 209 210 211 212 213 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_CHAIN_MASK_OFFSET 0x00000004 214 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_CHAIN_MASK_LSB 19 215 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_CHAIN_MASK_MSB 26 216 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_CHAIN_MASK_MASK 0x07f80000 217 218 219 220 221 #define PDG_RESPONSE_RATE_SETTING_ALT_BW_OFFSET 0x00000004 222 #define PDG_RESPONSE_RATE_SETTING_ALT_BW_LSB 27 223 #define PDG_RESPONSE_RATE_SETTING_ALT_BW_MSB 29 224 #define PDG_RESPONSE_RATE_SETTING_ALT_BW_MASK 0x38000000 225 226 227 228 229 #define PDG_RESPONSE_RATE_SETTING_STF_LTF_3DB_BOOST_OFFSET 0x00000004 230 #define PDG_RESPONSE_RATE_SETTING_STF_LTF_3DB_BOOST_LSB 30 231 #define PDG_RESPONSE_RATE_SETTING_STF_LTF_3DB_BOOST_MSB 30 232 #define PDG_RESPONSE_RATE_SETTING_STF_LTF_3DB_BOOST_MASK 0x40000000 233 234 235 236 237 #define PDG_RESPONSE_RATE_SETTING_FORCE_EXTRA_SYMBOL_OFFSET 0x00000004 238 #define PDG_RESPONSE_RATE_SETTING_FORCE_EXTRA_SYMBOL_LSB 31 239 #define PDG_RESPONSE_RATE_SETTING_FORCE_EXTRA_SYMBOL_MSB 31 240 #define PDG_RESPONSE_RATE_SETTING_FORCE_EXTRA_SYMBOL_MASK 0x80000000 241 242 243 244 245 #define PDG_RESPONSE_RATE_SETTING_ALT_RATE_MCS_OFFSET 0x00000008 246 #define PDG_RESPONSE_RATE_SETTING_ALT_RATE_MCS_LSB 0 247 #define PDG_RESPONSE_RATE_SETTING_ALT_RATE_MCS_MSB 3 248 #define PDG_RESPONSE_RATE_SETTING_ALT_RATE_MCS_MASK 0x0000000f 249 250 251 252 253 #define PDG_RESPONSE_RATE_SETTING_NSS_OFFSET 0x00000008 254 #define PDG_RESPONSE_RATE_SETTING_NSS_LSB 4 255 #define PDG_RESPONSE_RATE_SETTING_NSS_MSB 6 256 #define PDG_RESPONSE_RATE_SETTING_NSS_MASK 0x00000070 257 258 259 260 261 #define PDG_RESPONSE_RATE_SETTING_DPD_ENABLE_OFFSET 0x00000008 262 #define PDG_RESPONSE_RATE_SETTING_DPD_ENABLE_LSB 7 263 #define PDG_RESPONSE_RATE_SETTING_DPD_ENABLE_MSB 7 264 #define PDG_RESPONSE_RATE_SETTING_DPD_ENABLE_MASK 0x00000080 265 266 267 268 269 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_OFFSET 0x00000008 270 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_LSB 8 271 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_MSB 15 272 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_MASK 0x0000ff00 273 274 275 276 277 #define PDG_RESPONSE_RATE_SETTING_MIN_TX_PWR_OFFSET 0x00000008 278 #define PDG_RESPONSE_RATE_SETTING_MIN_TX_PWR_LSB 16 279 #define PDG_RESPONSE_RATE_SETTING_MIN_TX_PWR_MSB 23 280 #define PDG_RESPONSE_RATE_SETTING_MIN_TX_PWR_MASK 0x00ff0000 281 282 283 284 285 #define PDG_RESPONSE_RATE_SETTING_TX_CHAIN_MASK_OFFSET 0x00000008 286 #define PDG_RESPONSE_RATE_SETTING_TX_CHAIN_MASK_LSB 24 287 #define PDG_RESPONSE_RATE_SETTING_TX_CHAIN_MASK_MSB 31 288 #define PDG_RESPONSE_RATE_SETTING_TX_CHAIN_MASK_MASK 0xff000000 289 290 291 292 293 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3A_OFFSET 0x0000000c 294 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3A_LSB 0 295 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3A_MSB 7 296 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3A_MASK 0x000000ff 297 298 299 300 301 #define PDG_RESPONSE_RATE_SETTING_SGI_OFFSET 0x0000000c 302 #define PDG_RESPONSE_RATE_SETTING_SGI_LSB 8 303 #define PDG_RESPONSE_RATE_SETTING_SGI_MSB 9 304 #define PDG_RESPONSE_RATE_SETTING_SGI_MASK 0x00000300 305 306 307 308 309 #define PDG_RESPONSE_RATE_SETTING_RATE_MCS_OFFSET 0x0000000c 310 #define PDG_RESPONSE_RATE_SETTING_RATE_MCS_LSB 10 311 #define PDG_RESPONSE_RATE_SETTING_RATE_MCS_MSB 13 312 #define PDG_RESPONSE_RATE_SETTING_RATE_MCS_MASK 0x00003c00 313 314 315 316 317 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3B_OFFSET 0x0000000c 318 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3B_LSB 14 319 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3B_MSB 15 320 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3B_MASK 0x0000c000 321 322 323 324 325 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_1_OFFSET 0x0000000c 326 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_1_LSB 16 327 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_1_MSB 23 328 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_1_MASK 0x00ff0000 329 330 331 332 333 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_1_OFFSET 0x0000000c 334 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_1_LSB 24 335 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_1_MSB 31 336 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_1_MASK 0xff000000 337 338 339 340 341 #define PDG_RESPONSE_RATE_SETTING_AGGREGATION_OFFSET 0x00000010 342 #define PDG_RESPONSE_RATE_SETTING_AGGREGATION_LSB 0 343 #define PDG_RESPONSE_RATE_SETTING_AGGREGATION_MSB 0 344 #define PDG_RESPONSE_RATE_SETTING_AGGREGATION_MASK 0x00000001 345 346 347 348 349 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_BSS_COLOR_ID_OFFSET 0x00000010 350 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_BSS_COLOR_ID_LSB 1 351 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_BSS_COLOR_ID_MSB 6 352 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_BSS_COLOR_ID_MASK 0x0000007e 353 354 355 356 357 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SPATIAL_REUSE_OFFSET 0x00000010 358 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SPATIAL_REUSE_LSB 7 359 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SPATIAL_REUSE_MSB 10 360 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SPATIAL_REUSE_MASK 0x00000780 361 362 363 364 365 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CP_LTF_SIZE_OFFSET 0x00000010 366 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CP_LTF_SIZE_LSB 11 367 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CP_LTF_SIZE_MSB 12 368 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CP_LTF_SIZE_MASK 0x00001800 369 370 371 372 373 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DCM_OFFSET 0x00000010 374 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DCM_LSB 13 375 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DCM_MSB 13 376 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DCM_MASK 0x00002000 377 378 379 380 381 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DOPPLER_INDICATION_OFFSET 0x00000010 382 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DOPPLER_INDICATION_LSB 14 383 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DOPPLER_INDICATION_MSB 14 384 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DOPPLER_INDICATION_MASK 0x00004000 385 386 387 388 389 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SU_EXTENDED_OFFSET 0x00000010 390 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SU_EXTENDED_LSB 15 391 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SU_EXTENDED_MSB 15 392 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SU_EXTENDED_MASK 0x00008000 393 394 395 396 397 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x00000010 398 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_MIN_PACKET_EXTENSION_LSB 16 399 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_MIN_PACKET_EXTENSION_MSB 17 400 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x00030000 401 402 403 404 405 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_NSS_OFFSET 0x00000010 406 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_NSS_LSB 18 407 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_NSS_MSB 20 408 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_NSS_MASK 0x001c0000 409 410 411 412 413 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CONTENT_OFFSET 0x00000010 414 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CONTENT_LSB 21 415 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CONTENT_MSB 21 416 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CONTENT_MASK 0x00200000 417 418 419 420 421 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_LTF_SIZE_OFFSET 0x00000010 422 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_LTF_SIZE_LSB 22 423 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_LTF_SIZE_MSB 23 424 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_LTF_SIZE_MASK 0x00c00000 425 426 427 428 429 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CHAIN_CSD_EN_OFFSET 0x00000010 430 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CHAIN_CSD_EN_LSB 24 431 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CHAIN_CSD_EN_MSB 24 432 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CHAIN_CSD_EN_MASK 0x01000000 433 434 435 436 437 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x00000010 438 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CHAIN_CSD_EN_LSB 25 439 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CHAIN_CSD_EN_MSB 25 440 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x02000000 441 442 443 444 445 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DL_UL_FLAG_OFFSET 0x00000010 446 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DL_UL_FLAG_LSB 26 447 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DL_UL_FLAG_MSB 26 448 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DL_UL_FLAG_MASK 0x04000000 449 450 451 452 453 #define PDG_RESPONSE_RATE_SETTING_RESERVED_4A_OFFSET 0x00000010 454 #define PDG_RESPONSE_RATE_SETTING_RESERVED_4A_LSB 27 455 #define PDG_RESPONSE_RATE_SETTING_RESERVED_4A_MSB 31 456 #define PDG_RESPONSE_RATE_SETTING_RESERVED_4A_MASK 0xf8000000 457 458 459 460 461 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x00000014 462 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_START_INDEX_LSB 0 463 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_START_INDEX_MSB 3 464 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_START_INDEX_MASK 0x0000000f 465 466 467 468 469 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_SIZE_OFFSET 0x00000014 470 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_SIZE_LSB 4 471 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_SIZE_MSB 7 472 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_SIZE_MASK 0x000000f0 473 474 475 476 477 #define PDG_RESPONSE_RATE_SETTING_EHT_DUPLICATE_MODE_OFFSET 0x00000014 478 #define PDG_RESPONSE_RATE_SETTING_EHT_DUPLICATE_MODE_LSB 8 479 #define PDG_RESPONSE_RATE_SETTING_EHT_DUPLICATE_MODE_MSB 9 480 #define PDG_RESPONSE_RATE_SETTING_EHT_DUPLICATE_MODE_MASK 0x00000300 481 482 483 484 485 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_DCM_OFFSET 0x00000014 486 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_DCM_LSB 10 487 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_DCM_MSB 10 488 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_DCM_MASK 0x00000400 489 490 491 492 493 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_0_MCS_OFFSET 0x00000014 494 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_0_MCS_LSB 11 495 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_0_MCS_MSB 13 496 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_0_MCS_MASK 0x00003800 497 498 499 500 501 #define PDG_RESPONSE_RATE_SETTING_NUM_HE_SIGB_SYM_OFFSET 0x00000014 502 #define PDG_RESPONSE_RATE_SETTING_NUM_HE_SIGB_SYM_LSB 14 503 #define PDG_RESPONSE_RATE_SETTING_NUM_HE_SIGB_SYM_MSB 18 504 #define PDG_RESPONSE_RATE_SETTING_NUM_HE_SIGB_SYM_MASK 0x0007c000 505 506 507 508 509 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x00000014 510 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_SOURCE_LSB 19 511 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_SOURCE_MSB 19 512 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x00080000 513 514 515 516 517 #define PDG_RESPONSE_RATE_SETTING_RESERVED_5A_OFFSET 0x00000014 518 #define PDG_RESPONSE_RATE_SETTING_RESERVED_5A_LSB 20 519 #define PDG_RESPONSE_RATE_SETTING_RESERVED_5A_MSB 25 520 #define PDG_RESPONSE_RATE_SETTING_RESERVED_5A_MASK 0x03f00000 521 522 523 524 525 #define PDG_RESPONSE_RATE_SETTING_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x00000014 526 #define PDG_RESPONSE_RATE_SETTING_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26 527 #define PDG_RESPONSE_RATE_SETTING_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31 528 #define PDG_RESPONSE_RATE_SETTING_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc000000 529 530 531 532 533 534 535 536 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x00000018 537 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0 538 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9 539 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff 540 541 542 543 544 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x00000018 545 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10 546 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10 547 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x00000400 548 549 550 551 552 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x00000018 553 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11 554 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11 555 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x00000800 556 557 558 559 560 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x00000018 561 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12 562 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12 563 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x00001000 564 565 566 567 568 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x00000018 569 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13 570 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15 571 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e000 572 573 574 575 576 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_OFFSET 0x00000018 577 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_LSB 16 578 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_MSB 27 579 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_MASK 0x0fff0000 580 581 582 583 584 #define PDG_RESPONSE_RATE_SETTING_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x00000018 585 #define PDG_RESPONSE_RATE_SETTING_DOT11BE_PARAMS_PLACEHOLDER_LSB 28 586 #define PDG_RESPONSE_RATE_SETTING_DOT11BE_PARAMS_PLACEHOLDER_MSB 31 587 #define PDG_RESPONSE_RATE_SETTING_DOT11BE_PARAMS_PLACEHOLDER_MASK 0xf0000000 588 589 590 591 #endif 592