1 2 /* 3 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 4 * SPDX-License-Identifier: ISC 5 */ 6 7 8 9 10 11 12 13 14 15 16 17 18 19 #ifndef _PHYRX_L_SIG_B_H_ 20 #define _PHYRX_L_SIG_B_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #include "l_sig_b_info.h" 25 #define NUM_OF_DWORDS_PHYRX_L_SIG_B 2 26 27 #define NUM_OF_QWORDS_PHYRX_L_SIG_B 1 28 29 30 struct phyrx_l_sig_b { 31 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 32 struct l_sig_b_info phyrx_l_sig_b_info_details; 33 uint32_t tlv64_padding : 32; 34 #else 35 struct l_sig_b_info phyrx_l_sig_b_info_details; 36 uint32_t tlv64_padding : 32; 37 #endif 38 }; 39 40 41 42 43 44 45 46 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RATE_OFFSET 0x0000000000000000 47 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RATE_LSB 0 48 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RATE_MSB 3 49 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RATE_MASK 0x000000000000000f 50 51 52 53 54 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_LENGTH_OFFSET 0x0000000000000000 55 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_LENGTH_LSB 4 56 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_LENGTH_MSB 15 57 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_LENGTH_MASK 0x000000000000fff0 58 59 60 61 62 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RESERVED_OFFSET 0x0000000000000000 63 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RESERVED_LSB 16 64 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RESERVED_MSB 30 65 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RESERVED_MASK 0x000000007fff0000 66 67 68 69 70 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x0000000000000000 71 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB 31 72 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB 31 73 #define PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK 0x0000000080000000 74 75 76 77 78 #define PHYRX_L_SIG_B_TLV64_PADDING_OFFSET 0x0000000000000000 79 #define PHYRX_L_SIG_B_TLV64_PADDING_LSB 32 80 #define PHYRX_L_SIG_B_TLV64_PADDING_MSB 63 81 #define PHYRX_L_SIG_B_TLV64_PADDING_MASK 0xffffffff00000000 82 83 84 85 #endif 86