1 2 /* 3 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 4 * SPDX-License-Identifier: ISC 5 */ 6 7 8 9 10 11 12 13 14 15 16 17 18 19 #ifndef _RECEIVED_TRIGGER_INFO_DETAILS_H_ 20 #define _RECEIVED_TRIGGER_INFO_DETAILS_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #define NUM_OF_DWORDS_RECEIVED_TRIGGER_INFO_DETAILS 5 25 26 27 struct received_trigger_info_details { 28 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 29 uint32_t trigger_type : 4, 30 ax_trigger_source : 1, 31 ax_trigger_type : 4, 32 trigger_source_sta_full_aid : 13, 33 frame_control_valid : 1, 34 qos_control_valid : 1, 35 he_control_info_valid : 1, 36 ranging_trigger_subtype : 4, 37 reserved_0b : 3; 38 uint32_t phy_ppdu_id : 16, 39 lsig_response_length : 12, 40 reserved_1a : 4; 41 uint32_t frame_control : 16, 42 qos_control : 16; 43 uint32_t sw_peer_id : 16, 44 reserved_3a : 16; 45 uint32_t he_control : 32; 46 #else 47 uint32_t reserved_0b : 3, 48 ranging_trigger_subtype : 4, 49 he_control_info_valid : 1, 50 qos_control_valid : 1, 51 frame_control_valid : 1, 52 trigger_source_sta_full_aid : 13, 53 ax_trigger_type : 4, 54 ax_trigger_source : 1, 55 trigger_type : 4; 56 uint32_t reserved_1a : 4, 57 lsig_response_length : 12, 58 phy_ppdu_id : 16; 59 uint32_t qos_control : 16, 60 frame_control : 16; 61 uint32_t reserved_3a : 16, 62 sw_peer_id : 16; 63 uint32_t he_control : 32; 64 #endif 65 }; 66 67 68 69 70 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_TYPE_OFFSET 0x00000000 71 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_TYPE_LSB 0 72 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_TYPE_MSB 3 73 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_TYPE_MASK 0x0000000f 74 75 76 77 78 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_SOURCE_OFFSET 0x00000000 79 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_SOURCE_LSB 4 80 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_SOURCE_MSB 4 81 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_SOURCE_MASK 0x00000010 82 83 84 85 86 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_TYPE_OFFSET 0x00000000 87 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_TYPE_LSB 5 88 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_TYPE_MSB 8 89 #define RECEIVED_TRIGGER_INFO_DETAILS_AX_TRIGGER_TYPE_MASK 0x000001e0 90 91 92 93 94 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_SOURCE_STA_FULL_AID_OFFSET 0x00000000 95 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_SOURCE_STA_FULL_AID_LSB 9 96 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_SOURCE_STA_FULL_AID_MSB 21 97 #define RECEIVED_TRIGGER_INFO_DETAILS_TRIGGER_SOURCE_STA_FULL_AID_MASK 0x003ffe00 98 99 100 101 102 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_VALID_OFFSET 0x00000000 103 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_VALID_LSB 22 104 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_VALID_MSB 22 105 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_VALID_MASK 0x00400000 106 107 108 109 110 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_VALID_OFFSET 0x00000000 111 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_VALID_LSB 23 112 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_VALID_MSB 23 113 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_VALID_MASK 0x00800000 114 115 116 117 118 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_INFO_VALID_OFFSET 0x00000000 119 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_INFO_VALID_LSB 24 120 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_INFO_VALID_MSB 24 121 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_INFO_VALID_MASK 0x01000000 122 123 124 125 126 #define RECEIVED_TRIGGER_INFO_DETAILS_RANGING_TRIGGER_SUBTYPE_OFFSET 0x00000000 127 #define RECEIVED_TRIGGER_INFO_DETAILS_RANGING_TRIGGER_SUBTYPE_LSB 25 128 #define RECEIVED_TRIGGER_INFO_DETAILS_RANGING_TRIGGER_SUBTYPE_MSB 28 129 #define RECEIVED_TRIGGER_INFO_DETAILS_RANGING_TRIGGER_SUBTYPE_MASK 0x1e000000 130 131 132 133 134 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_0B_OFFSET 0x00000000 135 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_0B_LSB 29 136 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_0B_MSB 31 137 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_0B_MASK 0xe0000000 138 139 140 141 142 #define RECEIVED_TRIGGER_INFO_DETAILS_PHY_PPDU_ID_OFFSET 0x00000004 143 #define RECEIVED_TRIGGER_INFO_DETAILS_PHY_PPDU_ID_LSB 0 144 #define RECEIVED_TRIGGER_INFO_DETAILS_PHY_PPDU_ID_MSB 15 145 #define RECEIVED_TRIGGER_INFO_DETAILS_PHY_PPDU_ID_MASK 0x0000ffff 146 147 148 149 150 #define RECEIVED_TRIGGER_INFO_DETAILS_LSIG_RESPONSE_LENGTH_OFFSET 0x00000004 151 #define RECEIVED_TRIGGER_INFO_DETAILS_LSIG_RESPONSE_LENGTH_LSB 16 152 #define RECEIVED_TRIGGER_INFO_DETAILS_LSIG_RESPONSE_LENGTH_MSB 27 153 #define RECEIVED_TRIGGER_INFO_DETAILS_LSIG_RESPONSE_LENGTH_MASK 0x0fff0000 154 155 156 157 158 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_1A_OFFSET 0x00000004 159 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_1A_LSB 28 160 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_1A_MSB 31 161 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_1A_MASK 0xf0000000 162 163 164 165 166 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_OFFSET 0x00000008 167 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_LSB 0 168 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_MSB 15 169 #define RECEIVED_TRIGGER_INFO_DETAILS_FRAME_CONTROL_MASK 0x0000ffff 170 171 172 173 174 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_OFFSET 0x00000008 175 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_LSB 16 176 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_MSB 31 177 #define RECEIVED_TRIGGER_INFO_DETAILS_QOS_CONTROL_MASK 0xffff0000 178 179 180 181 182 #define RECEIVED_TRIGGER_INFO_DETAILS_SW_PEER_ID_OFFSET 0x0000000c 183 #define RECEIVED_TRIGGER_INFO_DETAILS_SW_PEER_ID_LSB 0 184 #define RECEIVED_TRIGGER_INFO_DETAILS_SW_PEER_ID_MSB 15 185 #define RECEIVED_TRIGGER_INFO_DETAILS_SW_PEER_ID_MASK 0x0000ffff 186 187 188 189 190 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_3A_OFFSET 0x0000000c 191 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_3A_LSB 16 192 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_3A_MSB 31 193 #define RECEIVED_TRIGGER_INFO_DETAILS_RESERVED_3A_MASK 0xffff0000 194 195 196 197 198 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_OFFSET 0x00000010 199 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_LSB 0 200 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_MSB 31 201 #define RECEIVED_TRIGGER_INFO_DETAILS_HE_CONTROL_MASK 0xffffffff 202 203 204 205 #endif 206