xref: /wlan-driver/fw-api/hw/qca5424/reo_flush_timeout_list.h (revision 5113495b16420b49004c444715d2daae2066e7dc) 
1*5113495bSYour Name 
2*5113495bSYour Name /*
3*5113495bSYour Name  * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
4*5113495bSYour Name  * SPDX-License-Identifier: ISC
5*5113495bSYour Name  */
6*5113495bSYour Name 
7*5113495bSYour Name 
8*5113495bSYour Name 
9*5113495bSYour Name 
10*5113495bSYour Name 
11*5113495bSYour Name 
12*5113495bSYour Name 
13*5113495bSYour Name 
14*5113495bSYour Name 
15*5113495bSYour Name 
16*5113495bSYour Name 
17*5113495bSYour Name 
18*5113495bSYour Name 
19*5113495bSYour Name #ifndef _REO_FLUSH_TIMEOUT_LIST_H_
20*5113495bSYour Name #define _REO_FLUSH_TIMEOUT_LIST_H_
21*5113495bSYour Name #if !defined(__ASSEMBLER__)
22*5113495bSYour Name #endif
23*5113495bSYour Name 
24*5113495bSYour Name #include "uniform_reo_cmd_header.h"
25*5113495bSYour Name #define NUM_OF_DWORDS_REO_FLUSH_TIMEOUT_LIST 10
26*5113495bSYour Name 
27*5113495bSYour Name #define NUM_OF_QWORDS_REO_FLUSH_TIMEOUT_LIST 5
28*5113495bSYour Name 
29*5113495bSYour Name 
30*5113495bSYour Name struct reo_flush_timeout_list {
31*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
32*5113495bSYour Name              struct   uniform_reo_cmd_header                                    cmd_header;
33*5113495bSYour Name              uint32_t ac_timout_list                                          :  2,
34*5113495bSYour Name                       reserved_1                                              : 30;
35*5113495bSYour Name              uint32_t minimum_release_desc_count                              : 16,
36*5113495bSYour Name                       minimum_forward_buf_count                               : 16;
37*5113495bSYour Name              uint32_t reserved_3a                                             : 32;
38*5113495bSYour Name              uint32_t reserved_4a                                             : 32;
39*5113495bSYour Name              uint32_t reserved_5a                                             : 32;
40*5113495bSYour Name              uint32_t reserved_6a                                             : 32;
41*5113495bSYour Name              uint32_t reserved_7a                                             : 32;
42*5113495bSYour Name              uint32_t reserved_8a                                             : 32;
43*5113495bSYour Name              uint32_t tlv64_padding                                           : 32;
44*5113495bSYour Name #else
45*5113495bSYour Name              struct   uniform_reo_cmd_header                                    cmd_header;
46*5113495bSYour Name              uint32_t reserved_1                                              : 30,
47*5113495bSYour Name                       ac_timout_list                                          :  2;
48*5113495bSYour Name              uint32_t minimum_forward_buf_count                               : 16,
49*5113495bSYour Name                       minimum_release_desc_count                              : 16;
50*5113495bSYour Name              uint32_t reserved_3a                                             : 32;
51*5113495bSYour Name              uint32_t reserved_4a                                             : 32;
52*5113495bSYour Name              uint32_t reserved_5a                                             : 32;
53*5113495bSYour Name              uint32_t reserved_6a                                             : 32;
54*5113495bSYour Name              uint32_t reserved_7a                                             : 32;
55*5113495bSYour Name              uint32_t reserved_8a                                             : 32;
56*5113495bSYour Name              uint32_t tlv64_padding                                           : 32;
57*5113495bSYour Name #endif
58*5113495bSYour Name };
59*5113495bSYour Name 
60*5113495bSYour Name 
61*5113495bSYour Name 
62*5113495bSYour Name 
63*5113495bSYour Name 
64*5113495bSYour Name 
65*5113495bSYour Name 
66*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_CMD_NUMBER_OFFSET                     0x0000000000000000
67*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_CMD_NUMBER_LSB                        0
68*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_CMD_NUMBER_MSB                        15
69*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_CMD_NUMBER_MASK                       0x000000000000ffff
70*5113495bSYour Name 
71*5113495bSYour Name 
72*5113495bSYour Name 
73*5113495bSYour Name 
74*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET                0x0000000000000000
75*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_STATUS_REQUIRED_LSB                   16
76*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_STATUS_REQUIRED_MSB                   16
77*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_REO_STATUS_REQUIRED_MASK                  0x0000000000010000
78*5113495bSYour Name 
79*5113495bSYour Name 
80*5113495bSYour Name 
81*5113495bSYour Name 
82*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_RESERVED_0A_OFFSET                        0x0000000000000000
83*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_RESERVED_0A_LSB                           17
84*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_RESERVED_0A_MSB                           31
85*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_CMD_HEADER_RESERVED_0A_MASK                          0x00000000fffe0000
86*5113495bSYour Name 
87*5113495bSYour Name 
88*5113495bSYour Name 
89*5113495bSYour Name 
90*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_AC_TIMOUT_LIST_OFFSET                                0x0000000000000000
91*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_AC_TIMOUT_LIST_LSB                                   32
92*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_AC_TIMOUT_LIST_MSB                                   33
93*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_AC_TIMOUT_LIST_MASK                                  0x0000000300000000
94*5113495bSYour Name 
95*5113495bSYour Name 
96*5113495bSYour Name 
97*5113495bSYour Name 
98*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_1_OFFSET                                    0x0000000000000000
99*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_1_LSB                                       34
100*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_1_MSB                                       63
101*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_1_MASK                                      0xfffffffc00000000
102*5113495bSYour Name 
103*5113495bSYour Name 
104*5113495bSYour Name 
105*5113495bSYour Name 
106*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_RELEASE_DESC_COUNT_OFFSET                    0x0000000000000008
107*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_RELEASE_DESC_COUNT_LSB                       0
108*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_RELEASE_DESC_COUNT_MSB                       15
109*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_RELEASE_DESC_COUNT_MASK                      0x000000000000ffff
110*5113495bSYour Name 
111*5113495bSYour Name 
112*5113495bSYour Name 
113*5113495bSYour Name 
114*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_FORWARD_BUF_COUNT_OFFSET                     0x0000000000000008
115*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_FORWARD_BUF_COUNT_LSB                        16
116*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_FORWARD_BUF_COUNT_MSB                        31
117*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_MINIMUM_FORWARD_BUF_COUNT_MASK                       0x00000000ffff0000
118*5113495bSYour Name 
119*5113495bSYour Name 
120*5113495bSYour Name 
121*5113495bSYour Name 
122*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_3A_OFFSET                                   0x0000000000000008
123*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_3A_LSB                                      32
124*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_3A_MSB                                      63
125*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_3A_MASK                                     0xffffffff00000000
126*5113495bSYour Name 
127*5113495bSYour Name 
128*5113495bSYour Name 
129*5113495bSYour Name 
130*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_4A_OFFSET                                   0x0000000000000010
131*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_4A_LSB                                      0
132*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_4A_MSB                                      31
133*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_4A_MASK                                     0x00000000ffffffff
134*5113495bSYour Name 
135*5113495bSYour Name 
136*5113495bSYour Name 
137*5113495bSYour Name 
138*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_5A_OFFSET                                   0x0000000000000010
139*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_5A_LSB                                      32
140*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_5A_MSB                                      63
141*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_5A_MASK                                     0xffffffff00000000
142*5113495bSYour Name 
143*5113495bSYour Name 
144*5113495bSYour Name 
145*5113495bSYour Name 
146*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_6A_OFFSET                                   0x0000000000000018
147*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_6A_LSB                                      0
148*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_6A_MSB                                      31
149*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_6A_MASK                                     0x00000000ffffffff
150*5113495bSYour Name 
151*5113495bSYour Name 
152*5113495bSYour Name 
153*5113495bSYour Name 
154*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_7A_OFFSET                                   0x0000000000000018
155*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_7A_LSB                                      32
156*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_7A_MSB                                      63
157*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_7A_MASK                                     0xffffffff00000000
158*5113495bSYour Name 
159*5113495bSYour Name 
160*5113495bSYour Name 
161*5113495bSYour Name 
162*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_8A_OFFSET                                   0x0000000000000020
163*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_8A_LSB                                      0
164*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_8A_MSB                                      31
165*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_RESERVED_8A_MASK                                     0x00000000ffffffff
166*5113495bSYour Name 
167*5113495bSYour Name 
168*5113495bSYour Name 
169*5113495bSYour Name 
170*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_TLV64_PADDING_OFFSET                                 0x0000000000000020
171*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_TLV64_PADDING_LSB                                    32
172*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_TLV64_PADDING_MSB                                    63
173*5113495bSYour Name #define REO_FLUSH_TIMEOUT_LIST_TLV64_PADDING_MASK                                   0xffffffff00000000
174*5113495bSYour Name 
175*5113495bSYour Name 
176*5113495bSYour Name 
177*5113495bSYour Name #endif
178