1 2 /* 3 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 4 * SPDX-License-Identifier: ISC 5 */ 6 7 8 9 10 11 12 13 14 15 16 17 18 19 #ifndef _RX_FRAME_BITMAP_REQ_H_ 20 #define _RX_FRAME_BITMAP_REQ_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #define NUM_OF_DWORDS_RX_FRAME_BITMAP_REQ 2 25 26 #define NUM_OF_QWORDS_RX_FRAME_BITMAP_REQ 1 27 28 29 struct rx_frame_bitmap_req { 30 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 31 uint32_t explicit_user_request : 1, 32 user_request_type : 1, 33 user_number : 6, 34 sw_peer_id : 16, 35 tid_specific_request : 1, 36 requested_tid : 4, 37 reserved_0 : 3; 38 uint32_t tlv64_padding : 32; 39 #else 40 uint32_t reserved_0 : 3, 41 requested_tid : 4, 42 tid_specific_request : 1, 43 sw_peer_id : 16, 44 user_number : 6, 45 user_request_type : 1, 46 explicit_user_request : 1; 47 uint32_t tlv64_padding : 32; 48 #endif 49 }; 50 51 52 53 54 #define RX_FRAME_BITMAP_REQ_EXPLICIT_USER_REQUEST_OFFSET 0x0000000000000000 55 #define RX_FRAME_BITMAP_REQ_EXPLICIT_USER_REQUEST_LSB 0 56 #define RX_FRAME_BITMAP_REQ_EXPLICIT_USER_REQUEST_MSB 0 57 #define RX_FRAME_BITMAP_REQ_EXPLICIT_USER_REQUEST_MASK 0x0000000000000001 58 59 60 61 62 #define RX_FRAME_BITMAP_REQ_USER_REQUEST_TYPE_OFFSET 0x0000000000000000 63 #define RX_FRAME_BITMAP_REQ_USER_REQUEST_TYPE_LSB 1 64 #define RX_FRAME_BITMAP_REQ_USER_REQUEST_TYPE_MSB 1 65 #define RX_FRAME_BITMAP_REQ_USER_REQUEST_TYPE_MASK 0x0000000000000002 66 67 68 69 70 #define RX_FRAME_BITMAP_REQ_USER_NUMBER_OFFSET 0x0000000000000000 71 #define RX_FRAME_BITMAP_REQ_USER_NUMBER_LSB 2 72 #define RX_FRAME_BITMAP_REQ_USER_NUMBER_MSB 7 73 #define RX_FRAME_BITMAP_REQ_USER_NUMBER_MASK 0x00000000000000fc 74 75 76 77 78 #define RX_FRAME_BITMAP_REQ_SW_PEER_ID_OFFSET 0x0000000000000000 79 #define RX_FRAME_BITMAP_REQ_SW_PEER_ID_LSB 8 80 #define RX_FRAME_BITMAP_REQ_SW_PEER_ID_MSB 23 81 #define RX_FRAME_BITMAP_REQ_SW_PEER_ID_MASK 0x0000000000ffff00 82 83 84 85 86 #define RX_FRAME_BITMAP_REQ_TID_SPECIFIC_REQUEST_OFFSET 0x0000000000000000 87 #define RX_FRAME_BITMAP_REQ_TID_SPECIFIC_REQUEST_LSB 24 88 #define RX_FRAME_BITMAP_REQ_TID_SPECIFIC_REQUEST_MSB 24 89 #define RX_FRAME_BITMAP_REQ_TID_SPECIFIC_REQUEST_MASK 0x0000000001000000 90 91 92 93 94 #define RX_FRAME_BITMAP_REQ_REQUESTED_TID_OFFSET 0x0000000000000000 95 #define RX_FRAME_BITMAP_REQ_REQUESTED_TID_LSB 25 96 #define RX_FRAME_BITMAP_REQ_REQUESTED_TID_MSB 28 97 #define RX_FRAME_BITMAP_REQ_REQUESTED_TID_MASK 0x000000001e000000 98 99 100 101 102 #define RX_FRAME_BITMAP_REQ_RESERVED_0_OFFSET 0x0000000000000000 103 #define RX_FRAME_BITMAP_REQ_RESERVED_0_LSB 29 104 #define RX_FRAME_BITMAP_REQ_RESERVED_0_MSB 31 105 #define RX_FRAME_BITMAP_REQ_RESERVED_0_MASK 0x00000000e0000000 106 107 108 109 110 #define RX_FRAME_BITMAP_REQ_TLV64_PADDING_OFFSET 0x0000000000000000 111 #define RX_FRAME_BITMAP_REQ_TLV64_PADDING_LSB 32 112 #define RX_FRAME_BITMAP_REQ_TLV64_PADDING_MSB 63 113 #define RX_FRAME_BITMAP_REQ_TLV64_PADDING_MASK 0xffffffff00000000 114 115 116 117 #endif 118