1*5113495bSYour Name 2*5113495bSYour Name /* 3*5113495bSYour Name * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 4*5113495bSYour Name * SPDX-License-Identifier: ISC 5*5113495bSYour Name */ 6*5113495bSYour Name 7*5113495bSYour Name 8*5113495bSYour Name 9*5113495bSYour Name 10*5113495bSYour Name 11*5113495bSYour Name 12*5113495bSYour Name 13*5113495bSYour Name 14*5113495bSYour Name 15*5113495bSYour Name 16*5113495bSYour Name 17*5113495bSYour Name 18*5113495bSYour Name 19*5113495bSYour Name #ifndef _RXPCU_EARLY_RX_INDICATION_H_ 20*5113495bSYour Name #define _RXPCU_EARLY_RX_INDICATION_H_ 21*5113495bSYour Name #if !defined(__ASSEMBLER__) 22*5113495bSYour Name #endif 23*5113495bSYour Name 24*5113495bSYour Name #define NUM_OF_DWORDS_RXPCU_EARLY_RX_INDICATION 2 25*5113495bSYour Name 26*5113495bSYour Name #define NUM_OF_QWORDS_RXPCU_EARLY_RX_INDICATION 1 27*5113495bSYour Name 28*5113495bSYour Name 29*5113495bSYour Name struct rxpcu_early_rx_indication { 30*5113495bSYour Name #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 31*5113495bSYour Name uint32_t pkt_type : 4, 32*5113495bSYour Name dot11ax_su_extended : 1, 33*5113495bSYour Name rate_mcs : 4, 34*5113495bSYour Name dot11ax_received_ext_ru_size : 4, 35*5113495bSYour Name reserved_0a : 19; 36*5113495bSYour Name uint32_t tlv64_padding : 32; 37*5113495bSYour Name #else 38*5113495bSYour Name uint32_t reserved_0a : 19, 39*5113495bSYour Name dot11ax_received_ext_ru_size : 4, 40*5113495bSYour Name rate_mcs : 4, 41*5113495bSYour Name dot11ax_su_extended : 1, 42*5113495bSYour Name pkt_type : 4; 43*5113495bSYour Name uint32_t tlv64_padding : 32; 44*5113495bSYour Name #endif 45*5113495bSYour Name }; 46*5113495bSYour Name 47*5113495bSYour Name 48*5113495bSYour Name 49*5113495bSYour Name 50*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_PKT_TYPE_OFFSET 0x0000000000000000 51*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_PKT_TYPE_LSB 0 52*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_PKT_TYPE_MSB 3 53*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_PKT_TYPE_MASK 0x000000000000000f 54*5113495bSYour Name 55*5113495bSYour Name 56*5113495bSYour Name 57*5113495bSYour Name 58*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000000 59*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_SU_EXTENDED_LSB 4 60*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_SU_EXTENDED_MSB 4 61*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_SU_EXTENDED_MASK 0x0000000000000010 62*5113495bSYour Name 63*5113495bSYour Name 64*5113495bSYour Name 65*5113495bSYour Name 66*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RATE_MCS_OFFSET 0x0000000000000000 67*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RATE_MCS_LSB 5 68*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RATE_MCS_MSB 8 69*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RATE_MCS_MASK 0x00000000000001e0 70*5113495bSYour Name 71*5113495bSYour Name 72*5113495bSYour Name 73*5113495bSYour Name 74*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_RECEIVED_EXT_RU_SIZE_OFFSET 0x0000000000000000 75*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_RECEIVED_EXT_RU_SIZE_LSB 9 76*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_RECEIVED_EXT_RU_SIZE_MSB 12 77*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_DOT11AX_RECEIVED_EXT_RU_SIZE_MASK 0x0000000000001e00 78*5113495bSYour Name 79*5113495bSYour Name 80*5113495bSYour Name 81*5113495bSYour Name 82*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RESERVED_0A_OFFSET 0x0000000000000000 83*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RESERVED_0A_LSB 13 84*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RESERVED_0A_MSB 31 85*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_RESERVED_0A_MASK 0x00000000ffffe000 86*5113495bSYour Name 87*5113495bSYour Name 88*5113495bSYour Name 89*5113495bSYour Name 90*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_TLV64_PADDING_OFFSET 0x0000000000000000 91*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_TLV64_PADDING_LSB 32 92*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_TLV64_PADDING_MSB 63 93*5113495bSYour Name #define RXPCU_EARLY_RX_INDICATION_TLV64_PADDING_MASK 0xffffffff00000000 94*5113495bSYour Name 95*5113495bSYour Name 96*5113495bSYour Name 97*5113495bSYour Name #endif 98